CN113423189B - Preparation method of metal electrode - Google Patents
Preparation method of metal electrode Download PDFInfo
- Publication number
- CN113423189B CN113423189B CN202110685010.3A CN202110685010A CN113423189B CN 113423189 B CN113423189 B CN 113423189B CN 202110685010 A CN202110685010 A CN 202110685010A CN 113423189 B CN113423189 B CN 113423189B
- Authority
- CN
- China
- Prior art keywords
- seed layer
- plated
- substrate
- metal electrode
- patterned seed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
- H05K3/182—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/188—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by direct electroplating
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
The invention discloses a preparation method of a metal electrode, which comprises the following steps: manufacturing a graphical seed layer on a substrate to be plated, and forming a region which is not covered by the graphical seed layer in a specified region of the substrate to be plated; manufacturing mask patterns on the substrate to be plated and the patterned seed layer; and depositing a metal layer on the substrate to be plated with the mask pattern and the patterned seed layer to form a metal electrode. According to the scheme, the substrate to be plated is divided into the area covered by the graphical seed layer and the area not covered by the graphical seed layer, so that the thickness distribution of the prepared metal electrode can be adjusted, and the uniformity of the thickness of the electrode is improved.
Description
Technical Field
The invention relates to the technical field of metal electrode preparation processes, in particular to a preparation method of a metal electrode.
Background
Electroplating is a common traditional process in the fields of circuit board manufacturing, MEMS manufacturing, IC manufacturing, and the like, and is generally used for manufacturing metal interconnection structures to achieve electrical connection between elements and between layers of multilayer wiring circuits.
The current electroplating method often has the condition that the thickness distribution of the obtained metal electrode is not uniform due to the limitation of the process conditions. At present, in the electroplating process, the position of a substrate to be plated, the sizes and the shapes of an electroplating device and an electroplating anode, the size and the pulse period of electroplating current, a liquid medicine circulating system and the like are adjusted according to experience, and the current density of each area on the substrate to be plated is adjusted by changing the distribution of power lines outside a plating piece, so that the purpose of controlling the thickness of a plating layer is achieved.
However, this adjustment method can only adjust the difference of the thickness of the plating layer in each area as a whole, and the uniformity of the thickness of the prepared metal electrode is poor for different areas.
Disclosure of Invention
The embodiment of the application aims to provide a preparation method of a metal electrode, so as to solve the technical problem that the electroplating process in the prior art cannot accurately control the thickness of a local line coating.
In order to solve the above problems, some embodiments of the present application provide a method for preparing a metal electrode, including the steps of:
manufacturing a graphical seed layer on a substrate to be plated, and forming a region which is not covered by the graphical seed layer in a specified region of the substrate to be plated;
manufacturing mask patterns on the substrate to be plated and the patterned seed layer;
and depositing a metal layer on the substrate to be plated with the mask pattern and the patterned seed layer to form a metal electrode.
In some embodiments of the method for manufacturing a metal electrode, a patterned seed layer is fabricated on a substrate to be plated, and in the step of forming a region not covered by the patterned seed layer in a designated region of the substrate to be plated, the designated region is determined by:
and when the electrode is formed on the seed layer without the pattern in an electroplating way, the appointed area is arranged on the substrate to be plated in the area range of the thickness of the electrode larger than the set thickness value.
In some embodiments of the method for manufacturing a metal electrode, a patterned seed layer is fabricated on a substrate to be plated, and in the step of forming a region not covered by the patterned seed layer in a designated region of the substrate to be plated, the designated region is determined by:
and when the electrode is formed on the seed layer without the pattern in an electroplating way, the appointed area is arranged on the substrate to be plated in the area range of the current density of the seed layer which is larger than the set density value.
In some embodiments, the method for manufacturing a metal electrode includes the steps of manufacturing a patterned seed layer on a substrate to be plated, and forming a region not covered by the patterned seed layer in a designated region of the substrate to be plated:
the shape of the designated area is a closed figure or a semi-closed figure with any shape, wherein the closed figure comprises but is not limited to a rectangle, a circle, a trapezoid or a triangle.
In some embodiments, the method for manufacturing a metal electrode includes the steps of manufacturing a patterned seed layer on a substrate to be plated, and forming a region not covered by the patterned seed layer in a designated region of the substrate to be plated, where the step further includes:
the patterned seed layer is divided into at least two electrically isolated independent regions.
In some embodiments, in the method for manufacturing a metal electrode, the step of dividing the patterned seed layer into at least two electrically isolated independent regions includes:
and arranging at least two electrically insulated independent areas on the patterned seed layer according to the gradient of the thickness of the electrode according to the distribution of the thickness of the electrode when the electrode is formed on the non-patterned seed layer by electroplating.
In some embodiments, in the method for manufacturing a metal electrode, the step of dividing the patterned seed layer into at least two electrically isolated independent regions includes:
and arranging at least two electrically insulated independent areas on the patterned seed layer according to the distribution of current density in the seed layer when the electrode is formed on the non-patterned seed layer by electroplating and the distribution gradient of the current density in the seed layer.
In some embodiments, in the method for manufacturing a metal electrode, the step of dividing the patterned seed layer into at least two electrically isolated independent regions includes:
the shape of each independent area is a closed figure or a semi-closed figure with any shape, wherein the closed figure comprises but is not limited to a rectangle, a circle, a trapezoid or a triangle.
In some embodiments, in the method for manufacturing a metal electrode, the step of dividing the patterned seed layer into at least two electrically isolated independent regions includes:
and at least one independent area of the closed pattern exposes the substrate to be plated.
In some embodiments, in the metal electrode manufacturing method, a metal layer is deposited on the substrate to be plated with the mask pattern and the patterned seed layer, and in the step of forming the metal electrode:
the ratio of the thickness to the width of the metal electrode is greater than 2.
Compared with the prior art, the technical scheme provided by the application at least has the following beneficial effects: forming a region without coverage of the patterned seed layer in a designated region of the substrate to be plated, manufacturing mask patterns on the substrate to be plated and the patterned seed layer, and depositing a metal layer on the substrate to be plated with the mask patterns and the patterned seed layer to form a metal electrode. According to the scheme, the substrate to be plated is divided into the area covered by the patterned seed layer and the area not covered by the patterned seed layer, so that the thickness distribution of the prepared metal electrode can be adjusted, and the uniformity of the thickness of the electrode is improved.
Drawings
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application.
FIG. 1 is a flow chart of a method of making a metal electrode according to one embodiment of the present application;
FIGS. 2a to 2d are schematic structural views of a plated part at various stages in the implementation of a method for manufacturing a metal electrode according to an embodiment of the present disclosure;
FIGS. 3 a-3 d are schematic structural views of an electroplating part at various stages in a process of fabricating a patterned seed layer according to an embodiment of the present disclosure;
FIGS. 4 a-4 c are schematic views illustrating the structure of an electroplated component at various stages in the process of fabricating a patterned seed layer according to another embodiment of the present application;
fig. 5 is a schematic structural diagram of a metal electrode prepared by a method for preparing a metal electrode according to an embodiment of the present disclosure;
fig. 6 is a schematic structural diagram of a metal electrode manufactured by a method for manufacturing a metal electrode according to another embodiment of the present application.
Detailed Description
In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only used for convenience of description of the present application, and do not indicate or imply that the device or component being referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; the two components can be directly connected or indirectly connected through an intermediate medium, and the two components can be communicated with each other. The specific meaning of the above terms in this application will be understood to be a specific case for those of ordinary skill in the art.
This embodiment provides a method for manufacturing a metal electrode, as shown in fig. 1 and fig. 2a to 2d, the method including the steps of:
the method comprises the following steps: and manufacturing a patterned seed layer 2 on the substrate 1 to be plated, wherein a region which is not covered by the patterned seed layer is formed in the designated region 1a of the substrate 1 to be plated. In general, when the uniformity of the thickness of the metal electrode obtained by the conventional plating method is not high, the thickness of a part of the metal electrode may be large and the thickness of a part of the metal electrode may be small, and the predetermined region 1a may be provided by selecting a region having a large thickness of the metal electrode obtained by the conventional plating method. The substrate 1 to be plated may be a substrate including a functional element or a circuit, and the method for manufacturing the patterned seed layer 2 may select a deposition manner, and the deposition manner may select a chemical vapor deposition manner.
Step two: manufacturing a mask pattern 3 on the substrate 1 to be plated and the patterned seed layer 2; the mask pattern 3 includes a type of plating bath 3a on the patterned seed layer 2 and a type of plating bath 3b on a designated area.
Step three: and depositing a metal layer 4 on the substrate 1 to be plated with the mask pattern 3 and the patterned seed layer 2 to form a metal electrode.
According to the scheme provided by the application, the area which is not covered by the graphical seed layer is formed in the specified area 1a of the substrate 1 to be plated, the mask pattern 3 is manufactured on the substrate 1 to be plated and the graphical seed layer 2, the metal layer 4 is deposited on the substrate 1 to be plated with the mask pattern 3 and the graphical seed layer 2, and the metal electrode is formed. The substrate 1 to be plated is divided into an area covered by the patterned seed layer and an area not covered by the patterned seed layer, so that the thickness distribution of the prepared metal electrode can be adjusted, and the uniformity of the thickness of the electrode is improved.
In some embodiments, in the first step, the designated area 1a is determined as follows: and when the electrode is formed on the seed layer without the pattern by electroplating, the appointed region 1a is arranged on the substrate 1 to be plated in the region range of the electrode thickness larger than the set thickness value. The set thickness value can be selected according to historical empirical values, as mentioned above, if the existing conventional electroplating process is adopted to prepare the metal electrode, the uniformity of the thickness of the electrode is poor, through the scheme, the graphical seed layer is not arranged for the region with larger electrode thickness in the original process, and the graphical seed layer is arranged for the region with smaller motor thickness in the original process. The thickness of the patterned seed layer can be determined according to historical empirical values, after electroplating is finally completed, the thickness of the conductive element in the area with small original electroplating thickness is the thickness of the patterned seed layer and the electroplated metal layer, and the thickness of the area with large original electroplating thickness is the thickness of the electroplated metal layer, so that the thickness uniformity of the finally obtained metal electrode can be improved.
In some embodiments, in the above step one, the designated area 1a is determined by: when the electrodes are formed on the seed layer without the pattern in the electroplating process, the specified area is arranged on the substrate to be plated within the area range of the current density of the seed layer, which is larger than the set density value, wherein the set density value can be selected according to historical experience values, and the condition that the thickness of the deposited electrodes at the corresponding position of the seed layer is too large when the current density of the seed layer is too large also corresponds to the condition that the thickness of the deposited electrodes at the corresponding position of the seed layer is too large in the electroplating process, so that the specified area 1a can be determined by adopting a mode of detecting the current density of the seed layer in the scheme.
In the above solution, the shape of the designated area may be selected according to actual needs, and may be a closed figure or a semi-closed figure with any shape, where the closed figure includes, but is not limited to, a rectangle, a circle, a trapezoid, or a triangle.
In the above scheme, with reference to fig. 3a to 3d, the patterned seed layer 2 may be fabricated on the patterned seed layer coverage area 1b in the substrate to be plated through the following steps:
s101: depositing a first seed layer 21 on the coverage area 1b of the substrate to be plated; the material of the first seed layer 21 may be at least one of palladium, titanium, nickel, copper, gold, and silver, or an alloy material containing at least one of palladium, titanium, nickel, copper, gold, and silver. The first seed layer 21 may be deposited by physical vapor deposition, chemical vapor deposition, electroplating, electroless plating, or the like.
S102: manufacturing a first seed layer mask pattern 2A on the first seed layer 21; the mask can be made of photoresist or hard mask material. The photoresist comprises at least one of photoresist and dry film photoresist, and the hard mask material comprises at least one of silicon, silicon oxide, silicon nitride and silicon oxynitride.
S103: and etching the first seed layer 21 with the first seed layer mask pattern 2A to expose the coverage area 1b of the substrate to be plated, and reserving the first seed layer 21 on the coverage area 1b of the substrate to be plated in the coverage area of the first seed layer mask pattern 2A to form the patterned seed layer 2.
In some embodiments, in conjunction with fig. 4a to 4c, the above solution can also fabricate the patterned seed layer 2 on the patterned seed layer coverage area 1b in the substrate to be plated by:
s201: and manufacturing a second seed layer mask pattern 2B on the coverage area 1B of the substrate to be plated. The mask can be made of photoresist or hard mask material. The photoresist comprises at least one of photoresist and dry film photoresist, and the hard mask material comprises at least one of silicon, silicon oxide, silicon nitride and silicon oxynitride.
S202: depositing a second conductive seed layer 22 on said covered area 1B with said second seed layer mask pattern 2B. Physical vapor deposition, chemical vapor deposition, electroplating, electroless plating, and the like may be used. The material of the second seed layer may be at least one of palladium, titanium, nickel, copper, gold, silver, or an alloy material containing at least one of palladium, titanium, nickel, copper, gold, silver.
S203: and removing the second seed layer mask pattern 2B to expose the coverage area 1B, and reserving the second conductive seed layer 22 in the coverage area 1B which is not covered by the second seed layer mask pattern 2B to form the patterned conductive seed layer 2.
Preferably, in the above scheme, the step one may further include: the patterned seed layer 2 is divided into at least two electrically isolated independent areas. Based on the principle, the seed layer is divided into at least two independent areas according to the current density distribution of the seed layer or the thickness gradient distribution of the electrode. Specifically, the method comprises the following steps:
at least two electrically insulated independent areas can be arranged on the patterned seed layer according to the gradient of the electrode thickness according to the distribution of the electrode thickness when the electrode is formed on the non-patterned seed layer by electroplating. Or at least two electrically insulated independent areas are arranged on the patterned seed layer according to the distribution of the current density in the seed layer when the electrode is formed on the non-patterned seed layer by electroplating and the distribution gradient of the current density in the seed layer. That is to say, when the conventional electroplating process is performed on the substrate 1 to be plated, the obtained electrode thickness can be divided into several grades, the substrate 1 to be plated is divided into different types of regions according to different grades, some regions are not provided with the patterned seed layer, and other regions are provided with the patterned seed layers with different thicknesses, so as to ensure that the thickness of the metal electrode obtained by final electroplating can have better uniformity. Preferably, the shape of each independent area is a closed figure or a semi-closed figure with any shape, wherein the closed figure includes but is not limited to a rectangle, a circle, a trapezoid or a triangle. Moreover, in some embodiments, at least one isolated area of the closed pattern exposes the substrate to be plated.
In some embodiments, as shown in fig. 2c, the patterned seed layer 2 and the plating mask pattern 3 have different projections in the thickness direction. Further, the different projection of the patterned seed layer 2 and the electroplating mask pattern 3 in the thickness direction comprises: the shapes of the electroplating mask pattern 3 and the patterned seed layer 2 are not overlapped; and the electroplating mask pattern 3 is not complementary to the patterned seed layer 2.
In some preferred embodiments, in step three, a metal layer is deposited on the substrate to be plated with the mask pattern and the patterned seed layer, wherein the ratio of the thickness to the width of the obtained metal electrode is greater than 2, preferably greater than 3, and may even reach 5 or 10, and the like. In the present application, the electroplating mask pattern 3 is fabricated on the substrate 1 to be plated and the patterned seed layer 2, and a ratio of a depth to a width of the groove pattern 3a of the electroplating mask pattern 3 may be greater than 3 or greater. And then filling a metal material 4 in the groove pattern 3a of the electroplating mask pattern 3 to obtain a thickened metal pattern, wherein the metal material 4 is finally formed into the metal wire, and the filling thickness of the metal material 4 is less than or equal to the depth of the groove pattern 3a, so that the filling proportion of the metal material 4 can be adjusted according to the depth of the groove pattern 3a to achieve the purpose that the ratio of the thickness to the width of the metal wire is greater than 2. The metal electrode obtained by the scheme can finally realize that the ratio of the whole thickness to the whole width is more than 3 and even can reach 10 or 20, and the metal electrode prepared by the method can greatly improve the bandwidth of a photoelectronic device.
Preferably, in some embodiments, the electroplating method further comprises the following steps:
step four: the plating mask pattern 3 is removed from the structure shown in fig. 2d, and the resulting structure is shown in fig. 5.
Step five: the excess patterned seed layer in fig. 5 is removed, leaving only the seed layer 23 covered by the metal layer 4.
The structure of the metal electrode obtained by the scheme is shown in fig. 6, wherein the thickness of the conductive part in some areas is the sum of the thicknesses of the metal layer 4 and the original patterned seed layer 2, and the thickness of the electroplated filling metal layer in some areas is consistent with the thicknesses of the two types of conductive parts. Therefore, by adopting the scheme in the embodiment of the application, the thickness uniformity of the finally obtained conductive part can be adjusted by modifying the substrate to be plated and the conductive seed layer, and the finally obtained metal electrode has uniform thickness, so that the current density distribution in the conductive seed layer near the electrode also has uniformity.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present application.
Claims (5)
1. A preparation method of a metal electrode is characterized by comprising the following steps:
manufacturing a graphical seed layer on a substrate to be plated, and forming a region which is not covered by the graphical seed layer in a specified region of the substrate to be plated;
manufacturing mask patterns on the substrate to be plated and the patterned seed layer;
depositing a metal layer on the substrate to be plated with the mask pattern and the patterned seed layer to form a metal electrode;
in the step of manufacturing a patterned seed layer on a substrate to be plated and forming a region which is not covered by the patterned seed layer in a specified region of the substrate to be plated, the specified region is determined in the following way: when an electrode is formed on the seed layer without the pattern in an electroplating mode, the appointed region is arranged on the substrate to be plated in the region range of the electrode thickness larger than the set thickness value;
the step of manufacturing a patterned seed layer on a substrate to be plated and forming a region which is not covered by the patterned seed layer in the designated region of the substrate to be plated further comprises the following steps:
dividing the patterned seed layer into at least two electrically isolated independent regions; it comprises the following steps:
and arranging at least two electrically insulated independent areas on the patterned seed layer according to the distribution of current density in the seed layer when the electrode is formed on the non-patterned seed layer by electroplating and the distribution gradient of the current density in the seed layer.
2. The method for preparing a metal electrode according to claim 1, wherein the step of forming a patterned seed layer on a substrate to be plated and forming a region not covered by the patterned seed layer in a designated region of the substrate to be plated is:
the shape of the designated area is a closed figure or a semi-closed figure with any shape, wherein the closed figure comprises but is not limited to a rectangle, a circle, a trapezoid or a triangle.
3. The method for preparing a metal electrode according to claim 1, wherein the step of dividing the patterned seed layer into at least two electrically isolated independent regions comprises:
the shape of each independent area is a closed figure or a semi-closed figure with any shape, wherein the closed figure comprises but is not limited to a rectangle, a circle, a trapezoid or a triangle.
4. The method for preparing a metal electrode according to claim 3, wherein the step of dividing the patterned seed layer into at least two electrically isolated independent regions comprises:
and at least one independent area of the closed pattern exposes the substrate to be plated.
5. The method for preparing a metal electrode according to any one of claims 1 to 4, wherein a metal layer is deposited on the substrate to be plated with the mask pattern and the patterned seed layer, and the step of forming the metal electrode comprises:
the ratio of the thickness to the width of the metal electrode is greater than 2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110685010.3A CN113423189B (en) | 2021-06-21 | 2021-06-21 | Preparation method of metal electrode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110685010.3A CN113423189B (en) | 2021-06-21 | 2021-06-21 | Preparation method of metal electrode |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113423189A CN113423189A (en) | 2021-09-21 |
| CN113423189B true CN113423189B (en) | 2022-11-25 |
Family
ID=77789498
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110685010.3A Active CN113423189B (en) | 2021-06-21 | 2021-06-21 | Preparation method of metal electrode |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113423189B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114703536B (en) * | 2021-09-24 | 2023-12-05 | 南京大学 | Micro-region electroplating device and application thereof in preparation of surface acoustic wave phonon crystal |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201630492A (en) * | 2015-02-09 | 2016-08-16 | Ecocera Optronics Co Ltd | Method for manufacturing wiring board |
| CN107454740A (en) * | 2016-05-27 | 2017-12-08 | Lg伊诺特有限公司 | Printed circuit board and manufacturing methods |
| CN108624922A (en) * | 2018-05-14 | 2018-10-09 | 中国电子科技集团公司第十四研究所 | The method that electroformed layer uniformity is improved in metal microdevices LIGA forming processes |
| CN109786355A (en) * | 2017-11-13 | 2019-05-21 | 亚德诺半导体无限责任公司 | Galvanic metallization structure |
| CN210984309U (en) * | 2019-10-18 | 2020-07-10 | 福懋兴业股份有限公司 | Conductive cloth and article containing same |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6890413B2 (en) * | 2002-12-11 | 2005-05-10 | International Business Machines Corporation | Method and apparatus for controlling local current to achieve uniform plating thickness |
| US9758893B2 (en) * | 2014-02-07 | 2017-09-12 | Applied Materials, Inc. | Electroplating methods for semiconductor substrates |
| JP6381997B2 (en) * | 2014-06-30 | 2018-08-29 | 京セラ株式会社 | Method for manufacturing printed wiring board |
| CN110400756B (en) * | 2019-04-29 | 2020-10-13 | 深超光电（深圳）有限公司 | Method for preparing redistribution circuit structure |
-
2021
- 2021-06-21 CN CN202110685010.3A patent/CN113423189B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201630492A (en) * | 2015-02-09 | 2016-08-16 | Ecocera Optronics Co Ltd | Method for manufacturing wiring board |
| CN107454740A (en) * | 2016-05-27 | 2017-12-08 | Lg伊诺特有限公司 | Printed circuit board and manufacturing methods |
| CN109786355A (en) * | 2017-11-13 | 2019-05-21 | 亚德诺半导体无限责任公司 | Galvanic metallization structure |
| CN108624922A (en) * | 2018-05-14 | 2018-10-09 | 中国电子科技集团公司第十四研究所 | The method that electroformed layer uniformity is improved in metal microdevices LIGA forming processes |
| CN210984309U (en) * | 2019-10-18 | 2020-07-10 | 福懋兴业股份有限公司 | Conductive cloth and article containing same |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113423189A (en) | 2021-09-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108281261B (en) | Inductor and method of manufacturing the same | |
| CN113416988B (en) | Electroplating method | |
| US20080105557A1 (en) | Methods of and Apparatus for Forming Three-Dimensional Structures Integral with Semiconductor Based Circuitry | |
| US20100136851A1 (en) | Fabrication Process for Co-Fabricating a Multilayer Probe Array and a Space Transformer | |
| CN106783120B (en) | The preparation method and electronic component of a kind of electrodes of electronic components | |
| KR20130029021A (en) | Manufacturing method of substrate and manufacturing method of wiring substrate | |
| CN113403657A (en) | Electroplating method for accurately controlling thickness of coating | |
| CN113423189B (en) | Preparation method of metal electrode | |
| KR101871956B1 (en) | Mother plate and producing method of the same, and producing method of the same | |
| WO2011158731A1 (en) | Substrate for mounting semiconductor element and method for manufacturing the substrate | |
| CN104582321A (en) | Printed circuit board and method for manufacturing same | |
| KR101843035B1 (en) | Producing methods of the mother plate and mask | |
| JP2526586B2 (en) | Wiring board manufacturing method | |
| CN113948841B (en) | Micro-coaxial transmission structure, preparation method thereof and electronic equipment | |
| KR101832988B1 (en) | Mother plate and producing method of the same, and producing method of the same | |
| JP3349656B2 (en) | Bump and manufacturing method thereof | |
| KR20180081475A (en) | Inductor | |
| CN106252315B (en) | Encapsulating structure and its manufacturing method | |
| KR101861702B1 (en) | Mother plate and producing method of the same, and producing method of the same | |
| CN113267912A (en) | Preparation method of metal electrode | |
| CN107706091B (en) | Thin film circuit and method for manufacturing the same | |
| JP2021080505A (en) | Production method of circuit board, and circuit board | |
| CN111129305B (en) | Inductance manufacturing method for increasing inductance and inductance structure | |
| JP7367722B2 (en) | Coil parts and their manufacturing method | |
| US20230411067A1 (en) | Electronic component, coil component, and method for manufacturing electronic component |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |