CN113407592B - PCB production line fault positioning method and equipment - Google Patents
PCB production line fault positioning method and equipment Download PDFInfo
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Abstract
The application discloses a fault positioning method and equipment for a PCB production line. The method comprises the following steps: acquiring SPI error information and stokehold error information corresponding to at least one element on a PCB from SPI equipment and stokehold AOI equipment according to the post-furnace error information of the at least one element on the PCB output by post-furnace AOI equipment; generating a plurality of error rule records according to the furnace back error information, the SPI error information and the furnace front error information and preset error generation rules; and classifying and counting each error rule record according to each fault type, determining a fault position according to the fault type when the statistics result of one fault type accords with the identification standard corresponding to the fault type, and outputting the fault position and the fault type. By adopting the method, the fault position and the fault type can be rapidly and accurately positioned, so that the product quality and the automation level of the PCB production line are improved.
Description
Technical Field
The application relates to the field of fault detection of production lines, in particular to a fault positioning method and equipment for a PCB production line.
Background
There are many automation devices on a complete PCB production line, and the operation state of these devices directly affects the quality of the produced PCB board. In the process of assembling the PCB, when a defect of the PCB is found, if the device with the problem can be rapidly and accurately positioned, the product quality and the automation level of the PCB production line can be improved.
In the prior art, the problem is generally located through the fault code of the equipment, and for the problem which is hidden, special maintenance personnel are often required to overhaul after the line is stopped, and time and labor are wasted. As equipment increases, problems tend to be more difficult to locate, and the normal operating conditions of the production line are also more difficult to maintain.
Disclosure of Invention
The embodiment of the application aims to provide a fault positioning method and equipment for a PCB production line, which can quickly and accurately position equipment with problems, thereby improving the product quality and the automation level of the PCB production line.
In order to solve the technical problems, the embodiment of the application provides the following technical scheme:
according to an aspect of the present application, there is provided a fault locating method for a PCB production line, the method comprising:
acquiring SPI error information corresponding to at least one element of a PCB from SPI equipment according to furnace error information of at least one element on the PCB output by furnace AOI equipment, and acquiring furnace error information corresponding to the element of the PCB from furnace AOI equipment;
generating an error rule record according to the furnace back error information, the SPI error information and the furnace front error information and a preset error generation rule;
classifying and counting each error rule record according to each fault type;
and when the statistical result of a fault type accords with the identification standard corresponding to the fault type, determining a fault position according to the fault type, and outputting the fault position and the fault type.
Optionally, the post-furnace error information includes a post-furnace error type, the SPI error information includes an SPI error type, and the stokehole error information includes a stokehole error type; the generating a plurality of error rule records according to the furnace back error information, the SPI error information and the furnace front error information and the preset error generation rule comprises the following steps:
matching each post-furnace error type with each SPI error type according to a preset post-furnace-SPI error mapping rule;
if the matching is successful, generating an SPI error rule record according to the PCB, the element, the successfully matched furnace back error type and the SPI error type;
if the matching is failed, matching each furnace back error type with each furnace front error type according to a preset furnace back-furnace front error mapping rule, if the matching is successful, generating a furnace front error rule record according to the PCB, the element, the furnace back error type and the furnace front error type which are successfully matched, and if the matching is failed, generating a furnace back error rule record according to the furnace back error type which is failed to be matched in the PCB, the element and the furnace back error information.
Optionally, the type of furnace fault includes any of offset, open weld, low tin, missing piece, high tin, turned piece, reverse, short circuit, wrong piece, side stand, and breakage.
Optionally, each fault type corresponds to an error type combination including a first error type and a second error type, the first error type being the post-furnace error type, the second error type being the SPI error type, or the pre-furnace error type, or null.
Optionally, the classifying and counting each error rule record according to each fault type includes:
aiming at each fault type, obtaining an error type combination and a statistical mode corresponding to the fault type;
screening each error rule record according to the error type combination, and screening each error rule record matched with the fault type;
and counting the screened error rule records by adopting the counting mode.
Optionally, the counting the screened error rule records by adopting the statistical mode includes:
counting the occurrence frequency of the fault type by taking the PCB as a unit for each screened error rule record; or alternatively, the process may be performed,
counting the occurrence frequency of the fault type by taking the PCB as a unit based on the position element for each screened error rule record; or alternatively, the process may be performed,
counting the occurrence frequency of the fault type by taking a PCB (printed Circuit Board) as a unit based on the condition that the position elements continuously appear in each screened error rule record; or alternatively, the process may be performed,
acquiring station positions corresponding to elements in each screened error rule record, and counting the occurrence frequency of the fault type of each screened error rule record based on the same station position by taking a PCB (printed circuit board) as a unit; or alternatively, the process may be performed,
acquiring station positions corresponding to elements in each screened error rule record, and counting the occurrence frequency of the fault type of each screened error rule record based on the condition that the same station positions continuously appear by taking a PCB as a unit; or alternatively, the process may be performed,
and the number of the error elements of the fault type in each PCB based on the number of the error elements in each screened error rule record.
Optionally, the statistics of the fault types conform to corresponding identification criteria includes:
the frequency of occurrence of the fault type reaches a frequency threshold in the qualification criteria, or,
the number of error elements of one PCB in each PCB corresponding to the fault type is larger than or equal to the upper threshold value of the number of error elements in the identification standard, or,
and the number of error elements of one PCB in each PCB corresponding to the fault type is smaller than or equal to the lower threshold value of the number of error elements in the identification standard.
Optionally, the method further comprises:
and when the statistical result of one fault type accords with the identification standard corresponding to the fault type, acquiring a corresponding improvement suggestion according to the fault type, and outputting the improvement suggestion.
According to another aspect of the present application there is provided a fault locating device comprising a processor and a memory having stored therein a computer program which when executed by the processor implements the method of any of the above.
According to another aspect of the present application there is provided a readable storage medium storing a computer program which, when executed by a processor, performs any of the methods described above.
The embodiment of the application has the beneficial effects that: in the embodiment of the application, firstly, according to the post-furnace error information of at least one element on a PCB output by post-furnace AOI equipment, SPI error information and pre-furnace error information corresponding to the element of the PCB are obtained from SPI equipment and pre-furnace AOI equipment; secondly, generating a plurality of error rule records according to the furnace back error information, the SPI error information and the furnace front error information and preset error generation rules; and finally, classifying and counting each error rule record according to each fault type, determining a fault position according to the fault type when the statistics result of one fault type accords with the identification standard corresponding to the fault type, and outputting the fault position and the fault type. By adopting the method, the fault position and the fault type can be rapidly and accurately positioned, so that the product quality and the automation level of the PCB production line are improved.
Drawings
Fig. 1 is a schematic structural diagram of a fault location system of a PCB production line according to an embodiment of the present application;
fig. 2 is a flowchart of a fault locating method for a PCB production line according to an embodiment of the present application;
FIG. 3 is a flow chart of a method for generating error rule records according to an embodiment of the present application;
FIG. 4 is a flowchart of a method for classifying and counting error rule records based on each fault type according to an embodiment of the present application;
FIG. 5 is a schematic diagram of possible fault types corresponding to a post-furnace offset error provided by an embodiment of the present application;
FIG. 6 is a schematic diagram of possible fault types corresponding to a post-furnace open weld error provided by an embodiment of the present application;
FIG. 7 is a schematic diagram of possible fault types corresponding to a furnace back part missing error provided by an embodiment of the present application.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
In addition, the technical features of the embodiments of the present application described below may be combined with each other as long as they do not collide with each other.
Fig. 1 is a schematic structural diagram of a fault locating system of a PCB production line according to an embodiment of the present application. The system includes a fault location device 10, a post-furnace AOI (Automated Optical Inspection, automatic optical inspection) device 20, a pre-furnace AOI device 30, and an SPI (Solder Paste Inspection ) device 40, wherein the fault location device 10 is communicatively connected to the post-furnace AOI device 20, the pre-furnace AOI device 30, and the SPI device 40, respectively.
The main equipment on the PCB production line adopting SMT (Surface Mount Technology, surface mounting technology) comprises a printer, a chip mounter, reflow soldering, a plug-in unit, a wave crest furnace and test packaging. The process of one PCB board generally includes a plurality of chip mounters, which mount different components.
SPI device 40 is used to detect whether there are problems with solder paste printing of the printer, such as low tin, high tin, offset, etc.
The stokehold AOI equipment 30 is used for detecting whether offset, missing parts, reverse and other problems exist in the attached elements of the chip mounter.
The post-oven AOI device 20 is used for detecting solder paste problems and patch problems on the finally produced PCB.
The fault locating device 10 is configured to obtain, from the SPI device 40, SPI error information corresponding to at least one component on a PCB, and obtain, from the stokehold AOI device 30, stokehold error information corresponding to the component of the PCB, according to post-fire error information, SPI error information, and stokehold error information output by the post-fire AOI device, and generate an error rule record according to a preset error generation rule; classifying and counting each error rule record according to each fault type; and when the statistical result of one fault type accords with the corresponding identification standard, determining the fault position according to the fault type, and outputting the fault position and the fault type. The fault types include printing offset of solder paste of a printer, steel mesh blocking, small holes of the steel mesh, mounting coordinate offset of a chip mounter, false identification of MARK points and the like.
In some embodiments, each fault type corresponds to an improvement suggestion, and the fault location device 10 is further configured to obtain the improvement suggestion for that fault type for output so that the corresponding engineer may make adjustments based on the improvement suggestion.
In some embodiments, fault locating device 20 includes a processor and a memory having a computer program stored therein that when executed by the processor implements a PCB production line fault locating method as described in any of the following.
As shown in fig. 2, a flowchart of a fault locating method for a PCB production line according to an embodiment of the present application is provided, and the method may be applied to the fault locating device 20 described above. The method comprises the following steps:
step S201, according to the furnace error information of at least one element on a PCB output by the furnace AOI equipment, acquiring SPI error information corresponding to the element of the PCB from the SPI equipment, and acquiring furnace error information corresponding to the element of the PCB from the furnace AOI equipment.
Specifically, the after-furnace AOI equipment detects each PCB after passing through the crest furnace and outputs the after-furnace test result of each PCB. And outputting a qualified post-furnace test result of the PCB when the post-furnace AOI equipment detects that the solder paste printing or the paster of each element on the PCB meets the standard. When the post-furnace AOI equipment detects that a PCB has a solder paste printing or patch error component, outputting unqualified components on the PCB and post-furnace error information corresponding to the components. And when the furnace back error information is monitored, backtracking is carried out according to the element, and SPI error information and furnace front error information corresponding to the element are searched. It should be noted that the found SPI error information and the stokehole error information may be empty.
Step S202, generating an error rule record according to the furnace back error information, the SPI error information and the furnace front error information and a preset error generation rule.
The post-fire error information for a component includes at least one post-fire error type including offset, open weld, low tin, missing part, high tin, flipped part, reversed, shorted, misdirected, sideways, broken, etc. The SPI error information for a component includes at least one SPI error type including offset, low tin, high tin, and the like. The forehearth error information for a component includes at least one forehearth error type including offset, missing part, flipped part, reversed, missing part, broken, etc.
Step S202 is described in detail below in conjunction with fig. 3. As shown in fig. 3, a flowchart of a method for generating an error rule record according to an embodiment of the present application is provided, where the method includes:
step S2021, matching each post-furnace error type with each SPI error type according to a preset post-furnace-SPI error mapping rule.
Specifically, the post-furnace error information includes a post-furnace error type, the SPI error information includes an SPI error type, and the stokehole error information includes a stokehole error type. Assuming that the post-fire error information of a component includes two types of post-fire errors, namely offset and open-weld, the SPI error information of the component includes two types of SPI errors, namely offset and tin-free. According to a preset post-furnace-SPI error mapping rule, mapping relations exist between the post-furnace offset and the SPI offset and between the post-furnace offset and the SPI solder, and mapping relations between the post-furnace offset and the SPI solder are also respectively formed between the post-furnace offset and the SPI solder, namely, mapping relations of four successful matching are obtained through matching, namely, the post-furnace offset-SPI solder, the post-furnace solder-SPI offset and the post-furnace solder-SPI solder.
In some embodiments, when the SPI error message is empty, then go to step S2024.
Step S2022, determine whether the matching is successful, if so, go to step S2023, and if not, go to step S2024.
Specifically, when at least one mapping relationship for successful matching exists in step S2021, it is determined that the matching is successful.
Step S2023 generates an SPI error rule record according to the PCB, the component, the successfully matched post-furnace error type, and the SPI error type.
Specifically, an SPI error rule record is generated for each mapping relationship successfully matched in step S2021.
Step S2024, matching each of the post-furnace error types with each of the pre-furnace error types according to a preset post-furnace-to-furnace error mapping rule.
Specifically, it is assumed that the post-furnace error information of a component includes two types of post-furnace error, namely offset and open-welding, and the pre-furnace error information of the component includes offset of one type of pre-furnace error. According to a preset furnace-back furnace-front error mapping rule, a mapping relation exists between the furnace-back offset and the furnace-front offset, and the furnace-back open welding and the furnace-front offset are also mapped, namely, the mapping relation between the furnace-back offset, the furnace-front offset and the furnace-back open welding and the furnace-front offset, which are successfully matched, is obtained through matching.
In some embodiments, when the forehearth error message is empty, then go to step S2027.
Step S2025, determining whether the matching is successful, if so, proceeding to step S2026, and if not, proceeding to step S2027.
Specifically, when at least one mapping relationship for successful matching exists in step S2024, it is determined that the matching is successful.
Step S2026, generating a forehearth error rule record according to the PCB, the component, the successfully matched type of the forehearth error and the forehearth error type.
Specifically, a forehearth error rule record is generated for each successfully matched mapping in step S2024.
Step S2027 generates a post-furnace error rule record according to the post-furnace error type of the failed match in the PCB, the component, and the post-furnace error information.
In some embodiments, both the SPI error information and the stokehole error information of an element are empty, i.e., the element's failure only occurs after the fire, and the likely type of failure can be deduced from the type of post-fire error of the element. For example, if the type of the furnace error of a component is offset, the SPI error message and the front error message are both empty, and the cause of the furnace offset of the component may be poor single-sided tin feeding. When the PCB passes through the wave crest furnace, if the element is poor in unilateral tin feeding, the wave crest furnace can pull the element, so that the element is offset behind the furnace.
In generating the error rule record, an error rule record is generated for each type of error after the furnace, or each type of error after the furnace, and each type of SPI error, or each type of error before the furnace.
Step S203, each error rule is classified and counted according to each fault type.
Specifically, at least one fault type is preset in the fault positioning device, a mapping relation between the fault type and an error type combination is established for each fault type, and error rule records matched with the fault types can be screened out according to the error type combination. The error type combination includes a first error type that is a post-furnace error type and a second error type that is an SPI error type, or a pre-furnace error type, or null.
From the foregoing description, each error rule record includes a post-furnace error type, or includes a post-furnace error type and, an SPI error type or a pre-furnace error type. It should be noted that one error type combination may correspond to one or more fault types, and one fault type corresponds to one error type combination.
As shown in fig. 5, the "post-oven offset-SPI offset" error type combination corresponds to one failure type, i.e., "print offset", while the "post-oven offset-SPI tin-less" error type combination corresponds to two failure types, respectively, "steel mesh blocking" and "steel mesh open hole small".
Step S203 is described in detail below with reference to fig. 4. As shown in fig. 4, a flowchart of a method for classifying and counting error rule records based on each fault type is provided in an embodiment of the present application, where the method includes:
step S2031, for each fault type, obtains an error type combination and a statistical manner corresponding to the fault type.
Different fault types correspond to different error type combinations and statistical modes, and some fault types are based on the whole PCB, such as a printing offset fault type, the corresponding fault type is a printer offset, and when the printer offset occurs, the printing of each element on the whole PCB is offset; the fault types are based on the same position, such as the same element continuously deviates, and the station for mounting the element can be found in the discharging surface by the element, so that the chip mounter with the problem is found.
Step S2032, screening the error rule records according to the error type combination, and screening out error rule records matched with the fault type.
Specifically, a first error type and a second error type can be obtained according to the error type combination, and each error rule record is screened according to the first error type and the second error type to obtain each error rule record matched with the fault type.
Step S2033, counting the error rule records screened by adopting the statistical method.
Depending on the type of fault, the monitoring pattern will be different for each type of fault, i.e. the statistical pattern will be different for each type of fault. For example, the "open after furnace-SPI low tin" error type combination corresponds to three types of failures (respectively, "doctor blade pressure is too high", "steel mesh is blocked", "solder paste printing is demolded"), and the statistical manners corresponding to the three types of failures are different. Wherein, for the type of faults that the scraper pressure is too large, whether large-area faults exist on the PCB or not needs to be counted; for the type of 'steel mesh blockage', whether the same-position element continuously generates the 'open welding after furnace-SPI tin-less' problem needs to be counted; for the "solder paste print demolding" failure type, it is necessary to count whether only some components on one PCB have the "open after oven-SPI low tin" problem.
The inventor obtains the following six statistical modes by analyzing various fault types:
(1) And counting the occurrence frequency of the fault type by taking the PCB as a unit for each screened error rule record.
(2) And counting the occurrence frequency of the fault type by taking the PCB as a unit based on the position element for each screened error rule record.
(3) And counting the occurrence frequency of the fault type by taking the PCB as a unit based on the condition that the position elements continuously appear in each screened error rule record.
(4) And acquiring station positions corresponding to elements in each screened error rule record, and counting the occurrence frequency of the fault type of each screened error rule record based on the same station position by taking the PCB as a unit.
(5) And acquiring the station positions corresponding to the elements in the screened error rule records, and counting the occurrence frequency of the fault type of the screened error rule records based on the condition that the same station positions continuously occur by taking the PCB as a unit.
(6) And the number of the error elements of the fault type in each PCB based on the number of the error elements in each screened error rule record.
As shown in fig. 5, 6 and 7, the fault type "print offset" corresponding to the "post-oven offset-SPI offset" error type combination may be counted in the (1) th mode; the statistics of the mounting height setting improper throwing of one of the fault types corresponding to the error type combination of the furnace rear part missing-furnace front part missing can be carried out by adopting the (2) th mode; the fault types 'steel mesh blocking' and 'small steel mesh opening' corresponding to the 'post-furnace offset-SPI tin-less' error type combination can be counted in the (3) mode; the statistics of one of the fault types of the furnace back part missing-furnace front part missing error type combination, namely nozzle blockage or nozzle failure, can be carried out in the (4) th mode; one of the fault types corresponding to the error type combination of open-empty after furnace is "feed oxidation" can be counted in the (5) th mode; the "after-furnace open-SPI low tin" error type combination corresponds to the failure type "doctor blade pressure too high" and "solder paste print release" can be counted in the (6) th mode.
Step S204, when the statistical result of a fault type accords with the identification standard corresponding to the fault type, determining the fault position according to the fault type, and outputting the fault position and the fault type.
Specifically, the statistical result of each fault type is monitored, and whether the statistical result of each fault type accords with the identification standard corresponding to the fault type is monitored.
In some embodiments, the statistics of the fault types conform to corresponding qualification criteria comprising: the occurrence frequency of the fault type reaches a frequency threshold value in the identification standard, or the number of error elements of the fault type is concentrated and is larger than or equal to an upper limit threshold value of the number of error elements in the identification standard, or the number of error elements of the corresponding PCB in each fault type is smaller than or equal to a lower limit threshold value of the number of error elements in the identification standard.
It will be appreciated that the frequency threshold, or upper number of false elements threshold, or lower number of false elements threshold in the qualification criteria corresponding to each fault type may be different.
When the fault type is caused by a defect of a non-same position and a non-same station type (the same position is the same element, the same station is the same patch device), the fault position can be directly determined according to the fault type, for example, the fault type is 'printing offset', and the fault position is the printer. The failure type is "machine mounting offset", and the failure position is "component mounting data table". When the fault type is caused by defects of the same position or the same station type, the surface mounting equipment corresponding to the element needs to be found through the discharge table. Typically, one station corresponds to one patch device. For example, if the failure type is "machine mounting coordinate shift (position continuation)", the failure position is the mounting device corresponding to the shifted component.
In some embodiments, the method further comprises: and when the statistical result of one fault type accords with the identification standard corresponding to the fault type, acquiring an improvement suggestion according to the fault type, and outputting the improvement suggestion. For example, an improvement for the fault type "steel mesh blocking (position continuation)" is suggested as "cleaning steel mesh".
According to the method, firstly, SPI error information and/or stokehold error information corresponding to at least one element on a PCB are obtained from SPI equipment and stokehold AOI equipment according to post-furnace error information of the at least one element on the PCB output by post-furnace AOI equipment; secondly, generating a plurality of error rule records according to the furnace back error information, the SPI error information and the furnace front error information and preset error generation rules; and finally, classifying and counting each error rule record according to each fault type, determining a fault position according to the fault type when the statistics result of one fault type accords with the identification standard corresponding to the fault type, and outputting the fault position and the fault type. By adopting the method of the application, the fault position and the fault type can be rapidly and accurately positioned, thereby improving the product quality and the automation level of the PCB production line.
According to an embodiment of the present application, there is provided a readable storage medium storing a computer program which, when executed by a processor, performs the method steps of any of the embodiments of the present application.
From the above description of embodiments, it will be apparent to those skilled in the art that the embodiments may be implemented by means of software plus a general purpose hardware platform, or may be implemented by hardware. Based on such understanding, the foregoing technical solution may be embodied essentially or in a part contributing to the related art in the form of a software product, which may be stored in a readable storage medium, such as ROM/RAM, a magnetic disk, an optical disk, etc., and includes several instructions for up to a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method described in the respective embodiments or some parts of the embodiments.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and are not limiting; the technical features of the above embodiments or in the different embodiments may also be combined within the idea of the application, the steps may be implemented in any order, and there are many other variations of the different aspects of the application as described above, which are not provided in detail for the sake of brevity; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the application.
Claims (10)
1. A method for locating faults in a PCB production line, the method comprising:
acquiring SPI error information corresponding to at least one element of a PCB from SPI equipment according to furnace error information of at least one element on the PCB output by furnace AOI equipment, and acquiring furnace error information corresponding to the element of the PCB from furnace AOI equipment;
generating an error rule record according to the furnace back error information, the SPI error information and the furnace front error information and a preset error generation rule, wherein the error rule record comprises error type combinations;
classifying and counting each error rule record according to each preset fault type, wherein each fault type corresponds to an error type combination;
when the statistical result of a fault type accords with the identification standard corresponding to the fault type, determining a fault position according to the fault type, and outputting the fault position and the fault type, wherein the fault type comprises a non-co-located type, a co-located type and a co-located type.
2. The method of claim 1, wherein the post-furnace error information comprises a post-furnace error type, the SPI error information comprises an SPI error type, and the pre-furnace error information comprises a pre-furnace error type; the generating a plurality of error rule records according to the furnace back error information, the SPI error information and the furnace front error information and the preset error generation rule comprises the following steps:
matching each post-furnace error type with each SPI error type according to a preset post-furnace-SPI error mapping rule;
if the matching is successful, generating an SPI error rule record according to the PCB, the element, the successfully matched furnace back error type and the SPI error type;
if the matching is failed, matching each furnace back error type with each furnace front error type according to a preset furnace back-furnace front error mapping rule, if the matching is successful, generating a furnace front error rule record according to the PCB, the element, the furnace back error type and the furnace front error type which are successfully matched, and if the matching is failed, generating a furnace back error rule record according to the furnace back error type which is failed to be matched in the PCB, the element and the furnace back error information.
3. The method of claim 2, wherein the type of furnace breeze error comprises at least one of offset, open weld, low tin, missing piece, multi-tin, turned piece, reverse, short circuit, wrong piece, side stand, and breakage.
4. The method of any of claims 2, wherein the error type combination comprises a first error type and a second error type, the first error type being the post-furnace error type, the second error type being the SPI error type, or the pre-furnace error type, or null.
5. The method of claim 4, wherein classifying each error rule record by each fault type comprises:
aiming at each fault type, obtaining an error type combination and a statistical mode corresponding to the fault type;
screening each error rule record according to the error type combination, and screening each error rule record matched with the fault type;
and counting the screened error rule records by adopting the counting mode.
6. The method of claim 5, wherein said statistically taking statistics of each error rule record screened out comprises:
counting the occurrence frequency of the fault type by taking the PCB as a unit for each screened error rule record; or alternatively, the process may be performed,
counting the screened error rule records based on the position elements by taking the PCB as a unit, wherein the occurrence frequency of the fault type is recorded; or alternatively, the process may be performed,
counting the occurrence frequency of the fault type by taking a PCB (printed Circuit Board) as a unit based on the condition that the position elements continuously appear in each screened error rule record; or alternatively, the process may be performed,
acquiring station positions corresponding to elements in each screened error rule record, and counting the occurrence frequency of the fault type of each screened error rule record based on the same station position by taking a PCB (printed circuit board) as a unit; or alternatively, the process may be performed,
acquiring station positions corresponding to elements in each screened error rule record, and counting the occurrence frequency of the fault type of each screened error rule record based on the condition that the same station positions continuously appear by taking a PCB as a unit; or alternatively, the process may be performed,
and the number of the error elements of the fault type in each PCB based on the number of the error elements in each screened error rule record.
7. The method of claim 6, wherein the statistics of the fault types conform to corresponding qualification criteria comprises:
the frequency of occurrence of the fault type reaches a frequency threshold in the qualification criteria, or,
the number of error elements of one PCB in each PCB corresponding to the fault type is larger than or equal to the upper threshold value of the number of error elements in the identification standard, or,
and the number of error elements of one PCB in each PCB corresponding to the fault type is smaller than or equal to the lower threshold value of the number of error elements in the identification standard.
8. The method according to claim 4, wherein the method further comprises:
and when the statistical result of one fault type accords with the identification standard corresponding to the fault type, acquiring a corresponding improvement suggestion according to the fault type, and outputting the improvement suggestion.
9. A fault locating device comprising a processor and a memory, the memory having stored therein a computer program which, when executed by the processor, implements the method of any of claims 1-8.
10. A readable storage medium, characterized in that the readable storage medium stores a computer program which, when executed by a processor, performs the method according to any of claims 1-8.
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