CN113363241B - Test structure and test method - Google Patents
Test structure and test method Download PDFInfo
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- CN113363241B CN113363241B CN202110524223.8A CN202110524223A CN113363241B CN 113363241 B CN113363241 B CN 113363241B CN 202110524223 A CN202110524223 A CN 202110524223A CN 113363241 B CN113363241 B CN 113363241B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
Abstract
In the test structure and the test method provided by the invention, the first conductor structure and the second conductor structure are utilized to realize that at least the insulating layer between the second conductor structure and the substrate can be broken down, so that the second conductor structure is conducted with the substrate. Compared with the prior art that the substrate voltage is easy to rise due to the coupling effect between the conductor structure and the substrate, the test structure in the invention directly connects the second conductor structure and the substrate, so that the substrate voltage is the same as the voltage of the second conductor structure, and the substrate voltage can be more accurately obtained through the second conductor structure. Therefore, when voltage is applied to the second conductor structure and the third conductor structure to further measure the leakage current and/or the breakdown voltage of the insulating layer, the substrate voltage can be accurately obtained, and the obtained measurement result is more accurate.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a test structure and a test method.
Background
In a semiconductor manufacturing process, a TSV (through silicon via) is an important structure in a 3D-IC process. In the TSV process, a TSV (through silicon via) is separated from a silicon substrate by an insulating layer, and the breakdown voltage and the leakage of the insulating layer are important parameters for measuring the reliability of the TSV. To detect these parameters, a test structure is typically used for monitoring.
Fig. 1 is a schematic structural diagram of a semiconductor test structure in the prior art, and referring to fig. 1, the test structure in the prior art includes a substrate 1, a first conductor 2 and a second conductor 3 at least partially formed in the substrate 1, and an insulating layer (not shown) formed between the first conductor 2 and the second conductor 3 and the substrate 1. In measuring the breakdown voltage and the leakage current of the insulating layer (not shown in the figure), it is common to apply a test voltage to the first conductor 2 and the second conductor 3, measure the leakage current of the insulating layer between the first conductor 2 and the second conductor 3 at different voltages before the insulating layer breaks down, and determine the breakdown voltage of the insulating layer when the current abruptly changes. Thus, the reliability of the TSV (through silicon via) is measured. However, when the current test structure is used for measurement, the actual voltage of the substrate 1 is increased by the pull-up of the first conductor 2 or the second conductor 3, which may cause the final detection result to be inaccurate.
Disclosure of Invention
The invention aims to provide a test structure and a test method, which aim to solve the problem that the test result is not accurate in the test process of the conventional semiconductor test structure and the conventional semiconductor test method.
To solve the above technical problem, the present invention provides a test structure, including: the device comprises a substrate, and a first conductor structure, a second conductor structure and a third conductor structure which are formed on the substrate, wherein the first conductor structure, the second conductor structure and the third conductor structure are sequentially arranged on the surface of the substrate at intervals, and insulating layers are arranged among the first conductor structure, the second conductor structure, the third conductor structure and the substrate;
wherein the first conductor structure and the second conductor structure are configured to be applied with a voltage to at least break down an insulating layer located between the second conductor structure and the substrate;
and the second conductor structure and the third conductor structure are used for applying a variable voltage to the third conductor structure after the insulating layer between the second conductor structure and the substrate is broken down so as to obtain the leakage current and/or the breakdown voltage of the insulating layer between the third conductor structure and the substrate.
Optionally, the second conductive structure is located between the first conductive structure and the third conductive structure.
Optionally, the second conductor structure is disposed around the third conductor structure, and the first conductor structure surrounds the second conductor structure in accordance with an extending direction of the second conductor structure.
Optionally, the second conductor structure extends towards and folds and wraps the other end of the third conductor structure with one end of the third conductor structure as a starting point, and extends to one end of the third conductor structure as a starting point.
Optionally, the third conductor structure is comb-shaped or serpentine in shape.
Optionally, the first conductor structure, the second conductor structure, and the third conductor structure each include a first metal layer, a plug layer, and a second metal layer that are connected in sequence, where the first metal layer includes a plurality of first metal strips that are buried in the substrate and are disposed at intervals on the same layer, the second metal layer includes a plurality of second metal strips that are formed on the substrate on a different layer from the first metal strips and are disposed at intervals on the same layer, and the adjacent first metal strips and the adjacent second metal strips are electrically connected by a conductive plug in the plug layer, so that the plurality of first metal strips and the plurality of second metal strips are connected in series in sequence.
Optionally, insulating layers are formed between the first metal layer and the substrate, between the second metal layer and the substrate, and between the conductive plugs and the substrate, and thicknesses of the insulating layers corresponding to the conductive plugs are all thinner than thicknesses of the insulating layers corresponding to the first metal layer and the second metal layer.
Optionally, the width of the conductive plug is 0.5nm to 10nm.
Optionally, the thickness of the insulating layer corresponding to the conductive plug is: 50 nm-300 nm.
Optionally, the distance between the first conductor structure and the second conductor structure is 0.5 um-10 um.
In order to solve the above problem, the present invention further provides a semiconductor structure, which includes the test structure as described in any one of the above, wherein the test structure is formed in the scribe line region of the substrate.
In order to solve the above problem, the present invention further provides a testing method, including:
step S10: providing a test structure as described in any of the above;
step S20: applying a voltage to the first conductor structure and the second conductor structure to at least break down an insulating layer located between the second conductor structure and the substrate;
step S30: applying a varying voltage to the third conductor structure to detect a leakage current and/or breakdown voltage of an insulating layer located between the third conductor structure and the substrate.
Optionally, in step S20, a voltage of 0V is applied to the first conductor structure, and a voltage of 50V to 200V is applied to the second conductor structure.
Optionally, in step S30, a voltage of 0V is applied to the second conductor structure, and a voltage of 50V to 200V is applied to the third conductor structure.
In the test structure, the first conductor structure and the second conductor structure are utilized to realize that at least an insulating layer between the second conductor structure and the substrate can be broken down, so that the second conductor structure is conducted with the substrate. Compared with the prior art that the substrate voltage is easy to rise due to the coupling effect between the conductor structure and the substrate, the test structure in the invention directly connects the second conductor structure and the substrate, so that the substrate voltage is the same as the voltage of the second conductor structure, and the substrate voltage can be more accurately obtained through the second conductor structure. Therefore, when voltage is applied to the second conductor structure and the third conductor structure to further measure the leakage current and/or the breakdown voltage of the insulating layer, the substrate voltage can be accurately obtained, and the obtained measurement result is more accurate.
Drawings
FIG. 1 is a schematic diagram of a prior art test structure;
FIG. 2 is a schematic structural diagram of a test structure according to an embodiment of the present invention;
FIG. 3 is a schematic cross-sectional view taken along A1A2 of FIG. 2;
FIG. 4 is a schematic diagram of another exemplary test structure according to the present invention;
FIG. 5 is a flowchart of a method of testing a device according to an embodiment of the invention.
Wherein the reference numbers are as follows:
1-a substrate;
2-a first conductor;
3-a second conductor;
10-a substrate;
11-a first substrate; 12-a first dielectric layer;
13-a bonding layer; 14-a second substrate;
15-a third dielectric layer;
20-a first conductor structure;
30-a second conductor structure;
40-a third conductor structure;
50-an insulating layer;
60-a first metal strip;
70-a conductive plug;
80-second metal strip.
Detailed Description
The following describes a test structure and a test method according to the present invention in further detail with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention. Further, the structures illustrated in the drawings are intended to be part of actual structures. In particular, the drawings may have different emphasis points and may sometimes be scaled differently.
FIG. 2 is a schematic diagram of a test structure according to an embodiment of the present invention; fig. 3 is a schematic sectional view along a direction A1A2 in fig. 2. As shown in fig. 2 to 3, the present embodiment discloses a test structure, which includes: the semiconductor device includes a substrate 10, a first conductor structure 20, a second conductor structure 30 and a third conductor structure 40 formed on the substrate 10. The first conductor structure 20, the second conductor structure 30 and the third conductor structure 40 are sequentially arranged on the substrate 10 at intervals, and insulating layers 50 are arranged among the first conductor structure 20, the second conductor structure 30, the third conductor structure 40 and the substrate 10.
Wherein the first conductor structure 20 and the second conductor structure 30 are adapted to be applied with a voltage for breaking down at least an insulating layer 50 located between the second conductor structure 30 and the substrate 10. At this time, the second conductor structure 30 can be conducted to the substrate 10.
And the second conductor structure 30 and the third conductor structure 40 are used for applying a variable voltage to the third semiconductor structure 40 after the insulating layer 50 between the second conductor structure 30 and the substrate 10 is broken down so as to obtain a leakage current and/or a breakdown voltage of the insulating layer between the third semiconductor structure and the substrate 10.
Specifically, after the insulating layer 50 between the second conductor structure 30 and the substrate 10 is broken down, the second conductor structure 30 is conducted with the substrate 10, so that the voltages of the second conductor structure 30 and the substrate 10 are the same, and thus the voltage of the substrate can be accurately obtained, and accurate measurement of the leakage current and/or the breakdown voltage can be improved.
In addition, in the present embodiment, the first conductor structure 20, the second conductor structure 30, and the third conductor structure 40 are formed on the surface of the substrate 10 and at least partially protrude into the substrate 10. And first conductor structure 20 the second conductor structure 30 the third conductor structure 40 and the insulating layer 50 that the basement 10 set up each other can not only make first conductor structure 20 the second conductor structure 30 the third conductor structure 40 respectively with basement 10 is insulating each other, and can make first conductor structure 20 the second conductor structure 30 with the third conductor structure 40 is insulating each other.
Further, with continued reference to fig. 2, in the present embodiment the second conductor structure 30 is located between the first conductor structure 20 and the third conductor structure 40. Optionally, the second conductor structure 30 is disposed around the third conductor structure 40, and the first conductor structure 20 surrounds the second conductor structure 20 along the extending direction of the second conductor structure 30, so as to make the electric field uniform and the test result more accurate.
Specifically, as shown in fig. 2, the second conductor structure 30 extends from one end of the third conductor structure 40 toward the other end of the third conductor structure 40, bends and wraps the other end of the third conductor structure 40, and then extends to one end of the third conductor structure 40. That is, in the present embodiment, the first conductor structure 20 and the second conductor structure 30 completely surround the third conductor structure 40, and the first conductor structure 20 surrounds the second conductor structure 30, so that the electric field is uniform and the test result is more accurate.
In addition, as shown in fig. 2 and fig. 3, in the present embodiment, each of the first conductor structure 20, the second conductor structure 30 and the third conductor structure 40 includes a first metal layer, a plug layer and a second metal layer connected in sequence, the first metal layer includes a plurality of first metal strips 60 buried in the substrate 10 and disposed at intervals in the same layer, the second metal layer includes a plurality of second metal strips 80 formed on the substrate 10 in a different layer from the first metal strips 60 and disposed at intervals in the same layer, optionally, the second metal layer may be formed on a top surface of the substrate 10, and the adjacent first metal strips 60 and the adjacent second metal strips 80 are electrically connected by conductive plugs 70 in the plug layer, so that the plurality of first metal strips 60 and the plurality of second metal strips 80 are connected in series in sequence. Optionally, the first metal strip 60 and the second metal strip 80 are arranged in parallel, and the conductive plugs 70 in the plug layer respectively form a certain included angle with the first metal strip 60 and the second metal strip 80. The base 10 may include a substrate and a dielectric layer formed on the substrate, and the conductive plug 70 in the plug layer penetrates through the substrate in the base 10.
In addition, in this embodiment, insulating layers 50 are formed between the first metal layer and the substrate 10, between the second metal layer and the substrate 10, and between the conductive plugs and the substrate 10, and the thickness of the insulating layer 50 corresponding to the conductive plugs is thinner than the thickness of the insulating layer 50 corresponding to the first metal layer and the second metal layer.
Specifically, with continued reference to fig. 2 and 3, the test structure of the present embodiment includes a plurality of metal layers from bottom to top in a direction perpendicular to the substrate; wherein the first conductor structure 20, the second conductor structure 30 and the third conductor structure 40 all comprise a plurality of metal layers in a direction perpendicular to the substrate. The plurality of metal layers may be, for example, a first metal layer, a second metal layer, a third metal layer, to an nth metal layer from bottom to top in a direction perpendicular to the substrate.
In the present embodiment, two metal layers are taken as an example, as shown in fig. 2 and 3, the first metal layers are filled in a grid pattern in fig. 2 and 3, and each first metal layer includes a plurality of first metal strips 60; the dotted filling is second metal layers, and each second metal layer comprises a plurality of second metal strips 80; the black squares are conductive plugs 70, and the adjacent first metal strips 60 and the second metal strips 80 are electrically connected by the conductive plugs 70 in the plug layer.
With continued reference to fig. 3, in this embodiment, the base 10 includes an upper wafer and a lower wafer bonded to each other, the lower wafer includes a first substrate 11 and a first dielectric layer 12 formed on the first substrate 11, and the upper wafer includes a second substrate 14 and a second dielectric layer (not shown) formed on the second substrate 14. And the first metal layer is deposited on the surface of the lower wafer, and a third dielectric layer (not shown) is formed on the first metal layer, and the third dielectric layer (not shown) and the second dielectric layer (not shown) are bonded to each other to form a bonding layer 13, so that the upper wafer and the lower wafer are bonded to each other. And the third dielectric layer 15 is further deposited on the surface of the second substrate 14 away from the first wafer, the conductive plug 42 penetrates through the second wafer and then is connected with the first metal layer, and the second metal layer is formed on the third dielectric layer 15 and is connected with the conductive plug 42.
In the present embodiment, the material forming the substrate 1 may include a semiconductor material, a conductor material, or any combination thereof; the substrate 1 may have a single-layer structure or a multi-layer structure. For example, the substrate 1 may be a semiconductor material such as Si, siGe, siGeC, siC, gaAs, inAs, inP, and other III/V or II/VI compound semiconductors; layered substrates such as, for example, si/SiGe, si/SiC, silicon-on-insulator (SOI), or silicon germanium-on-insulator may also be included.
Further, with continued reference to fig. 2, in the present embodiment, the third conductor structure 40 has a comb shape. Alternatively, the third conductor structure 40 may also have a serpentine shape. When the third conductor structure 40 has a comb-like or serpentine shape, the third conductor structure 40 can detect more conductive plugs 42, so as to reduce the area of the third conductor structure 40.
Optionally, the width of the conductive plug 42 is 0.5nm to 10nm. The thickness of the insulating layer 50 corresponding to the conductive plug 42 is: 50 nm-300 nm. And the distance between the first conductor structure and the second conductor structure is 0.5 um-10 um.
FIG. 4 is a schematic structural diagram of another test structure according to an embodiment of the present invention. As shown in fig. 4, in the present embodiment, the first conductor structure 20, the second conductor structure 30, and the third conductor structure 40 are disposed parallel to each other. This reduces the area of the first conductor structure 20 and the second conductor structure 30 on the substrate 10, which in turn reduces the volume of the test structure.
Further, referring to fig. 2 in combination, this embodiment further discloses a semiconductor structure, where the semiconductor structure includes: the test structure as described above, wherein the test structure is formed in the scribe line region of the substrate 10. In this embodiment, the structure and size of the test structure are the same as the structure and size of the metal interconnection structure in the device region of the substrate 10. In this way, the leakage current and/or the breakdown voltage of the insulating layer 50 between the third conductor structure 40 and the substrate 10 in the test structure can be obtained, so as to obtain the leakage current and/or the breakdown voltage of the insulating layer in the metal interconnection structure in the device region.
Fig. 5 is a flowchart illustrating a testing method according to an embodiment of the invention. Referring to fig. 5 in conjunction with fig. 2, a testing method is further provided in the present embodiment, and the testing method includes the following steps.
In step S10: providing the test structure described above.
In step S20: a voltage is applied to the first conductor structure 20 and the second conductor structure 30, respectively, to break down at least the insulating layer 50 between the second conductor structure 30 and the substrate 10. In this way, the voltages of the second conductor structure 30 and the substrate 10 are made the same. In this step, a voltage of 0V is applied to the first conductor structure 20, and a voltage of 50V to 200V is applied to the second conductor structure 30.
Step S30: a varying voltage is applied to the third conductor structure 40 to detect a leakage current and/or a breakdown voltage of the insulating layer 50 located between the third conductor structure 40 and the substrate 10. In this step, the second semiconductor structure 30 may be grounded, i.e. the second conductor structure 20 is applied with a voltage of 0V. Or a lower voltage is applied to the second semiconductor structure 30. And applying a varying voltage to the third semiconductor structure 40 to detect a leakage current of the insulating layer 50 between the third semiconductor structure 40 and the substrate 10 at different voltage differences. The gradually increasing voltage applied to the third semiconductor structure 40 indicates that the insulating layer 50 between the third semiconductor structure 40 and the substrate 10 is broken down when the current between the second semiconductor structure 30 and the third semiconductor structure 40 jumps, i.e., suddenly increases, and the voltage applied to the third semiconductor structure 40 is the breakdown voltage corresponding to the insulating layer 50 between the third semiconductor structure 40 and the substrate 10. Optionally, a voltage of 50V to 200V is applied to the third conductor structure 30.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.
Claims (13)
1. A test structure, comprising: the semiconductor device comprises a substrate, and a first conductor structure, a second conductor structure and a third conductor structure which are formed on the substrate, wherein the first conductor structure, the second conductor structure and the third conductor structure are sequentially arranged on the substrate at intervals, and insulating layers are arranged among the first conductor structure, the second conductor structure, the third conductor structure and the substrate;
wherein the first conductor structure and the second conductor structure are configured to be applied with a voltage to at least break down an insulating layer located between the second conductor structure and the substrate;
the second conductor structure and the third conductor structure are used for applying a variable voltage to the third conductor structure after an insulating layer between the second conductor structure and the substrate is broken down so as to obtain a leakage current and/or a breakdown voltage of the insulating layer between the third conductor structure and the substrate;
the first conductor structure, the second conductor structure and the third conductor structure respectively comprise a first metal layer, a plug layer and a second metal layer which are sequentially connected, the first metal layer comprises a plurality of first metal strips which are buried in the substrate and are arranged at intervals on the same layer, the second metal layer comprises a plurality of second metal strips which are formed on the substrate on the different layer from the first metal strips and are arranged at intervals on the same layer, and the adjacent first metal strips and the adjacent second metal strips are electrically connected by conductive plugs in the plug layer, so that the plurality of first metal strips and the plurality of second metal strips are sequentially connected in series; the base comprises a substrate and a dielectric layer formed on the substrate, and the conductive plug in the plug layer penetrates through the substrate in the base;
insulating layers are formed between the first metal layer and the substrate, between the second metal layer and the substrate, and between the conductive plug and the substrate.
2. The test structure of claim 1, wherein the second conductor structure is located between the first conductor structure and the third conductor structure.
3. The test structure of claim 1, wherein the second conductor structure is disposed around the third conductor structure, and wherein the first conductor structure surrounds the second conductor structure in conformity with a direction of extension of the second conductor structure.
4. The test structure of claim 3, wherein the second conductor structure starts from one end of the third conductor structure, extends toward and folds around the other end of the third conductor structure, and extends to the end of the third conductor structure.
5. The test structure of claim 1, wherein the third conductor structure is comb-like or serpentine in shape.
6. The test structure of claim 1, wherein the thickness of the insulating layer corresponding to the conductive plug is thinner than the thickness of the insulating layer corresponding to the first metal layer and the second metal layer.
7. The test structure of claim 1, wherein the width of the conductive plug is between 0.5nm and 10nm.
8. The test structure of claim 1, wherein the thickness of the insulating layer corresponding to the conductive plug is: 50 nm-300 nm.
9. The test structure of claim 1, wherein a distance between the first conductor structure and the second conductor structure is between 0.5um and 10um.
10. A semiconductor structure comprising a test structure according to any of claims 1-9, the test structure being formed in a scribe lane region of the substrate.
11. A method of testing, comprising:
step S10: providing a test structure according to any one of claims 1 to 9;
step S20: applying a voltage to the first conductor structure and the second conductor structure to at least break down an insulating layer located between the second conductor structure and the substrate;
step S30: applying a varying voltage to the third conductor structure to detect a leakage current and/or breakdown voltage of an insulating layer located between the third conductor structure and the substrate.
12. The test method according to claim 11, wherein in step S20, a voltage of 0V is applied to the first conductor structure and a voltage of 50V to 200V is applied to the second conductor structure.
13. The test method of claim 11, wherein in step S30, a voltage of 0V is applied to the second conductor structure and a voltage of 50V to 200V is applied to the third conductor structure.
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| TW201239350A (en) * | 2011-03-30 | 2012-10-01 | Ind Tech Res Inst | Test key structure and measurement method thereof |
| CN104183574B (en) * | 2013-05-22 | 2017-02-08 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor testing structure and a semiconductor testing method |
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