CN113359396A - High-speed photoetching method based on synchronous control of light source and pattern generator - Google Patents
High-speed photoetching method based on synchronous control of light source and pattern generator Download PDFInfo
- Publication number
- CN113359396A CN113359396A CN202110604017.8A CN202110604017A CN113359396A CN 113359396 A CN113359396 A CN 113359396A CN 202110604017 A CN202110604017 A CN 202110604017A CN 113359396 A CN113359396 A CN 113359396A
- Authority
- CN
- China
- Prior art keywords
- synchronous
- synchronizer
- clock
- pattern generator
- light source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/7055—Exposure light control in all parts of the microlithographic apparatus, e.g. pulse length control or light interruption
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
Abstract
The invention relates to maskless lithography, in particular to a high-speed lithography method based on synchronous control of a light source and a pattern generator, which comprises the steps of inputting a first clock into a phase-locked loop to obtain a second clock with stable phase difference, carrying out phase adjustment on the second clock, adjusting the output time of a synchronous pulse control signal according to the final phase of the second clock, respectively sending the synchronous pulse control signal to the light source and the pattern generator by the second clock, determining a main synchronizer and an auxiliary synchronizer in the pattern generator, sending a synchronous data packet to the auxiliary synchronizer by the main synchronizer, and synchronously carrying out pattern conversion by the auxiliary synchronizer and the main synchronizer; the technical scheme provided by the invention can effectively overcome the defect that the light source and the pattern generator cannot be effectively and synchronously controlled in the prior art.
Description
Technical Field
The invention relates to maskless photoetching, in particular to a high-speed photoetching method based on synchronous control of a light source and a pattern generator.
Background
Photolithography is an important part of the mainstream planar processing technology of the current semiconductor, and is used for forming a feature pattern of a specific structure on the surface of a substrate. The maskless photoetching technology is a branch of the photoetching technology, and compared with the traditional mask photoetching technology, a photomask does not need to be prepared additionally to be used as a master exposure, and a pattern generator is used for replacing the master. Maskless lithography directly utilizes a pattern generator to generate a pattern of features consistent with a design and performs projection exposure to a substrate surface coated with a photosensitive material by optical projection techniques.
At present, the pattern generator commonly used in maskless lithography is mainly a spatial light modulator of a reflective device, the pattern generator is a pixel array which can be independently addressed and controlled, and the array used by the system is a rectangular area.
In the exposure process of maskless photoetching, the pattern generator is in a state of changing the characteristic pattern at any time, and the light source is required to carry out the matched exposure at the moment, namely, after the pattern generator finishes the characteristic pattern changing action, the light source is immediately started to carry out the exposure, and is closed before the next characteristic pattern changing action is started, and the steps are repeated. In the process, if the on and off of the light source cannot be synchronously matched with the pattern generator to finish the characteristic pattern transformation action, the exposed surface of the base material generates certain degree of shadow, so that the quality of the produced product is obviously reduced.
Disclosure of Invention
Technical problem to be solved
Aiming at the defects in the prior art, the invention provides a high-speed photoetching method based on synchronous control of a light source and a pattern generator, which can effectively overcome the defect that the light source and the pattern generator cannot be effectively and synchronously controlled in the prior art.
(II) technical scheme
In order to achieve the purpose, the invention is realized by the following technical scheme:
a high-speed photoetching method based on synchronous control of a light source and a pattern generator comprises the following steps:
s1, inputting the first clock into a phase-locked loop to obtain a second clock with stable phase difference;
s2, adjusting the phase of the second clock, and adjusting the output time of the synchronous pulse control signal according to the final phase of the second clock;
s3, the second clock sends synchronous pulse control signals to the light source and the pattern generator respectively;
and S4, determining a main synchronizer and a secondary synchronizer in the pattern generator, wherein the main synchronizer sends a synchronous data packet to the secondary synchronizer, and the secondary synchronizer and the main synchronizer synchronously perform pattern conversion.
Preferably, the phase adjusting of the second clock in S2 includes:
according to the current phase value p of the second clock1Obtaining the adjusted phase value p by comparing the adjusted phase value Δ p2And will adjust the post phase value p2As the final phase of the second clock.
Preferably, said adjusted phase value p2Calculated according to the following formula:
adjusted phase value p2Current phase value p1+ the phase value Δ p is adjusted,
wherein the adjustment phase value Δ p comprises a positive sign and a negative sign.
Preferably, adjusting the output time of the synchronization pulse control signal according to the final phase of the second clock in S2 includes:
comparing the final phase of the second clock with a preset phase range, and not adjusting the output time of the synchronous pulse control signal when the final phase of the second clock is within the preset phase range; otherwise, correspondingly adjusting the output time of the synchronous pulse control signal.
Preferably, the correspondingly adjusting the output time of the synchronization pulse control signal includes:
when the final phase of the second clock is larger than the maximum value in the preset phase range, correspondingly prolonging the output time of the synchronous pulse control signal;
and when the final phase of the second clock is smaller than the minimum value in the preset phase range, correspondingly shortening the output time of the synchronous pulse control signal.
Preferably, the step S3, the step S of sending the synchronization pulse control signal to the light source and the pattern generator respectively includes:
and synchronizing the output time of the synchronous pulse control signal with the initial time of a new timing period in the timing module, and respectively sending the synchronous pulse control signal to the light source and the pattern generator by the two second clocks.
Preferably, the determining of the primary synchronizer and the secondary synchronizer in the pattern generator in S4 includes:
the pattern generator receiving the synchronizing pulse control signal is used as a main synchronizer, and the pattern generators except the main synchronizer are used as a secondary synchronizer.
Preferably, when the secondary synchronizer still does not receive the synchronous data packet after the timing period of the n timing modules, the secondary synchronizer judges that the original primary synchronizer fails and selects a new primary synchronizer;
wherein n is a positive integer selected according to the user requirement.
Preferably, the determining that the original master synchronous machine fails and selecting a new master synchronous machine includes:
and selecting the secondary synchronizer closest to the IP address of the original primary synchronizer as a new primary synchronizer, and simultaneously sending a synchronous pulse control signal to the new primary synchronizer by the second clock.
Preferably, the synchronization packet includes a running time, a timing period of the timing module, a current graphic sequence number and a next graphic sequence number to be transformed.
(III) advantageous effects
Compared with the prior art, the high-speed photoetching method based on the synchronous control of the light source and the pattern generator obtains the second clock with stable phase difference through the phase-locked loop, adjusts the phase of the second clock, and adjusts the output time of the synchronous pulse control signal according to the final phase of the second clock, so that the second clock respectively sends the synchronous pulse control signal to the light source and the pattern generator, and the effective synchronous control of the light source and the pattern generator is realized; the synchronous control between the light source and the pattern generator cluster is realized by arranging the main synchronizer and the auxiliary synchronizer in the pattern generator and realizing the synchronous pattern transformation of the main synchronizer and the auxiliary synchronizer by utilizing the synchronous data packet.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below. It is obvious that the drawings in the following description are only some embodiments of the invention, and that for a person skilled in the art, other drawings can be derived from them without inventive effort.
FIG. 1 is a schematic flow chart of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
A high-speed lithography method based on synchronous control of a light source and a pattern generator is disclosed, as shown in FIG. 1, and comprises the following steps:
s1, inputting the first clock into a phase-locked loop to obtain a second clock with stable phase difference;
s2, adjusting the phase of the second clock, and adjusting the output time of the synchronous pulse control signal according to the final phase of the second clock;
s3, the second clock sends synchronous pulse control signals to the light source and the pattern generator respectively;
and S4, determining a main synchronizer and a secondary synchronizer in the pattern generator, wherein the main synchronizer sends a synchronous data packet to the secondary synchronizer, and the secondary synchronizer and the main synchronizer synchronously perform pattern conversion.
The phase adjustment of the second clock in S2 includes:
according to the current phase value p of the second clock1Adjusted phase with the adjusted phase value Δ pBit value p2And will adjust the post phase value p2As the final phase of the second clock.
Adjusted phase value p2Calculated according to the following formula:
adjusted phase value p2Current phase value p1+ the phase value Δ p is adjusted,
the adjusting phase value Δ p is set by a technician according to actual production conditions and comprises a positive sign and a negative sign.
Adjusting the output time of the sync pulse control signal according to the final phase of the second clock in S2 includes:
comparing the final phase of the second clock with a preset phase range, and not adjusting the output time of the synchronous pulse control signal when the final phase of the second clock is within the preset phase range; otherwise, correspondingly adjusting the output time of the synchronous pulse control signal.
Correspondingly adjusting the output time of the synchronous pulse control signal, comprising:
when the final phase of the second clock is larger than the maximum value in the preset phase range, correspondingly prolonging the output time of the synchronous pulse control signal;
and when the final phase of the second clock is smaller than the minimum value in the preset phase range, correspondingly shortening the output time of the synchronous pulse control signal.
In S3, the second clock sends out control signals of synchronous pulses to the light source and the pattern generator respectively, including:
and synchronizing the output time of the synchronous pulse control signal with the initial time of a new timing period in the timing module, and respectively sending the synchronous pulse control signal to the light source and the pattern generator by the two second clocks.
The two second clocks use the initial time of a new timing period in the timing module as the output time of the synchronous pulse control signal, simultaneously send the synchronous pulse control signal to the light source and the pattern generator, and can use the integral multiple of the timing period in the timing module as the time basis for controlling the light source to be turned off, controlling the light source to be turned on at intervals and controlling the pattern generator to maintain the characteristic pattern, thereby realizing the effective synchronous control of the light source and the pattern generator.
In the technical scheme of the application, the synchronous data packet comprises running time, a timing period of a timing module, a current graphic serial number and a next graphic serial number to be converted.
Determining a primary synchronizer and a secondary synchronizer in the pattern generator in S4, including:
the pattern generator receiving the synchronizing pulse control signal is used as a main synchronizer, and the pattern generators except the main synchronizer are used as a secondary synchronizer.
When the secondary synchronizer still does not receive the synchronous data packet after the timing period of the n timing modules, judging that the original primary synchronizer fails, and selecting a new primary synchronizer;
wherein n is a positive integer selected according to the user requirement.
Judging the original main synchronous machine to be in fault, and selecting a new main synchronous machine, comprising the following steps:
and selecting the secondary synchronizer closest to the IP address of the original primary synchronizer as a new primary synchronizer, and simultaneously sending a synchronous pulse control signal to the new primary synchronizer by the second clock.
In the technical scheme of the application, the synchronous graph transformation of the main synchronizer and the auxiliary synchronizer is realized by arranging the main synchronizer and the auxiliary synchronizer in the graph generator and utilizing the synchronous data packet, so that the synchronous control between the light source and the graph generator cluster is realized; meanwhile, a fault rapid judgment mechanism is established, and the system can rapidly respond when the main synchronous machine fails, rapidly reselect the main synchronous machine and ensure that other pattern generators in the system work smoothly.
In the technical scheme, aiming at the synchronous control between the light source and the pattern generator cluster, a position pulse can be output to one of the pattern generators through the precision motion platform, and the position pulse is generated after being captured by the pattern generator and is sent to other pattern generators. In addition, the first clock in the technical scheme of the application can also be generated by the precision motion platform.
The above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the corresponding technical solutions.
Claims (10)
1. A high-speed photoetching method based on synchronous control of a light source and a pattern generator is characterized in that: the method comprises the following steps:
s1, inputting the first clock into a phase-locked loop to obtain a second clock with stable phase difference;
s2, adjusting the phase of the second clock, and adjusting the output time of the synchronous pulse control signal according to the final phase of the second clock;
s3, the second clock sends synchronous pulse control signals to the light source and the pattern generator respectively;
and S4, determining a main synchronizer and a secondary synchronizer in the pattern generator, wherein the main synchronizer sends a synchronous data packet to the secondary synchronizer, and the secondary synchronizer and the main synchronizer synchronously perform pattern conversion.
2. The high-speed photolithography method based on the synchronous control of the light source and the pattern generator according to claim 1, wherein: the phase adjustment of the second clock in S2 includes:
according to the current phase value p of the second clock1Obtaining the adjusted phase value p by comparing the adjusted phase value Δ p2And will adjust the post phase value p2As the final phase of the second clock.
3. The high-speed photolithography method based on the synchronous control of the light source and the pattern generator according to claim 2, wherein: the adjusted phase value p2Calculated according to the following formula:
adjusted phase value p2Current phase value p1+ the phase value Δ p is adjusted,
wherein the adjustment phase value Δ p comprises a positive sign and a negative sign.
4. The high-speed photolithography method based on the synchronous control of the light source and the pattern generator according to claim 2, wherein: adjusting the output time of the sync pulse control signal according to the final phase of the second clock in S2 includes:
comparing the final phase of the second clock with a preset phase range, and not adjusting the output time of the synchronous pulse control signal when the final phase of the second clock is within the preset phase range; otherwise, correspondingly adjusting the output time of the synchronous pulse control signal.
5. The high-speed photolithography method based on the synchronous control of the light source and the pattern generator according to claim 4, wherein: the correspondingly adjusting the output time of the synchronous pulse control signal comprises:
when the final phase of the second clock is larger than the maximum value in the preset phase range, correspondingly prolonging the output time of the synchronous pulse control signal;
and when the final phase of the second clock is smaller than the minimum value in the preset phase range, correspondingly shortening the output time of the synchronous pulse control signal.
6. The high-speed photolithography method based on the synchronous control of the light source and the pattern generator according to claim 4, wherein: in S3, the second clock sends out control signals of synchronous pulses to the light source and the pattern generator respectively, including:
and synchronizing the output time of the synchronous pulse control signal with the initial time of a new timing period in the timing module, and respectively sending the synchronous pulse control signal to the light source and the pattern generator by the two second clocks.
7. The high-speed photolithography method based on the synchronous control of the light source and the pattern generator according to claim 6, wherein: determining a primary synchronizer and a secondary synchronizer in the pattern generator in S4, including:
the pattern generator receiving the synchronizing pulse control signal is used as a main synchronizer, and the pattern generators except the main synchronizer are used as a secondary synchronizer.
8. The high-speed photolithography method based on the synchronous control of the light source and the pattern generator according to claim 7, wherein: when the auxiliary synchronizer still does not receive the synchronous data packet after the timing period of the n timing modules, judging that the original main synchronizer has a fault, and selecting a new main synchronizer;
wherein n is a positive integer selected according to the user requirement.
9. The high-speed photolithography method based on the synchronous control of the light source and the pattern generator according to claim 8, wherein: the judging that the original main synchronous machine fails and selecting a new main synchronous machine comprises the following steps:
and selecting the secondary synchronizer closest to the IP address of the original primary synchronizer as a new primary synchronizer, and simultaneously sending a synchronous pulse control signal to the new primary synchronizer by the second clock.
10. A high-speed lithography method based on the synchronized control of a light source and a pattern generator according to any one of claims 6 to 9, characterized in that: the synchronous data packet comprises running time, a timing period of a timing module, a current graphic serial number and a next graphic serial number to be converted.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110604017.8A CN113359396A (en) | 2021-05-31 | 2021-05-31 | High-speed photoetching method based on synchronous control of light source and pattern generator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110604017.8A CN113359396A (en) | 2021-05-31 | 2021-05-31 | High-speed photoetching method based on synchronous control of light source and pattern generator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN113359396A true CN113359396A (en) | 2021-09-07 |
Family
ID=77530536
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110604017.8A Pending CN113359396A (en) | 2021-05-31 | 2021-05-31 | High-speed photoetching method based on synchronous control of light source and pattern generator |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113359396A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107870756A (en) * | 2017-10-26 | 2018-04-03 | 武汉精测电子集团股份有限公司 | A kind of method and system of more figure signal generators of Synchronization Control |
| CN110289851A (en) * | 2019-06-21 | 2019-09-27 | 武汉星旗科技有限公司 | A kind of output method of synchronization pulse, device, equipment and computer media |
| CN112771736A (en) * | 2018-09-26 | 2021-05-07 | Asml荷兰有限公司 | Apparatus and method for providing high precision delay in lithography system |
-
2021
- 2021-05-31 CN CN202110604017.8A patent/CN113359396A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107870756A (en) * | 2017-10-26 | 2018-04-03 | 武汉精测电子集团股份有限公司 | A kind of method and system of more figure signal generators of Synchronization Control |
| CN112771736A (en) * | 2018-09-26 | 2021-05-07 | Asml荷兰有限公司 | Apparatus and method for providing high precision delay in lithography system |
| CN110289851A (en) * | 2019-06-21 | 2019-09-27 | 武汉星旗科技有限公司 | A kind of output method of synchronization pulse, device, equipment and computer media |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3245715B2 (en) | Improved laser pattern generator | |
| TWI425319B (en) | Illumination optics for a microlithographic projection exposure apparatus | |
| JP5043910B2 (en) | Lithographic apparatus and device manufacturing method | |
| CN100456136C (en) | Method for controlling multi bus time and sequence synchronization of advanced scanning projecting photoetching machine | |
| JP5015187B2 (en) | Lithographic apparatus and device manufacturing method | |
| JP2001237169A (en) | Exposure control method, device manufacturing method and aligner | |
| KR101692265B1 (en) | Maskless exposure apparatus and pattern compensating method using the same | |
| JP2001135562A (en) | Lithography system | |
| JP5534540B2 (en) | Illumination optical system for microlithographic projection exposure apparatus | |
| JP2908099B2 (en) | Substrate alignment method | |
| CN113359396A (en) | High-speed photoetching method based on synchronous control of light source and pattern generator | |
| JP2002057082A (en) | Light receiving apparatus | |
| US6930755B2 (en) | Lithographic apparatus and device manufacturing method | |
| KR100482019B1 (en) | Scanning exposure apparatus and method | |
| CN108073045A (en) | A kind of double story board write-through exposure machine systems | |
| KR100481756B1 (en) | Scanning exposure method and scanning exposure apparatus | |
| CN108873620B (en) | Method for improving energy uniformity in direct-writing photoetching machine | |
| JP2001326159A (en) | Laser, aligner, and device manufacturing method using the same aligner | |
| KR101437692B1 (en) | Maskless exposure apparatus using a plurality of spatial light modultor and method for forming pattern using the same | |
| TWI253545B (en) | Imaging apparatus | |
| JP3779141B2 (en) | Reference phase synchronization method in ring communication network | |
| JP2002134400A (en) | Image-processing unit, mark-measuring device and apparatus for manufacturing semiconductor | |
| JPS61176118A (en) | Exposing device | |
| JPH10223513A (en) | Scan-type aligner | |
| JP2003077809A (en) | Exposure method and exposure light feeder |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20210907 |