CN113325636A - Display panel, display device and manufacturing method of display panel - Google Patents

Display panel, display device and manufacturing method of display panel Download PDF

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Publication number
CN113325636A
CN113325636A CN202110592231.6A CN202110592231A CN113325636A CN 113325636 A CN113325636 A CN 113325636A CN 202110592231 A CN202110592231 A CN 202110592231A CN 113325636 A CN113325636 A CN 113325636A
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electrode
display panel
alloy
metal
pixel
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CN113325636B (en
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董水浪
胡合合
薛大鹏
王利忠
姚念琦
宁策
雷利平
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Geometry (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Thin Film Transistor (AREA)

Abstract

The embodiment of the disclosure provides a display panel, a display device and a manufacturing method of the display panel, wherein the display panel comprises a substrate and a plurality of pixel units which are distributed in a matrix and are positioned on the substrate; each pixel unit comprises a transistor, a pixel electrode connected with the transistor and a common electrode arranged opposite to the pixel electrode; the transistor comprises a grid electrode, a grid electrode insulating layer, a source electrode, a drain electrode and a semiconductor active layer; the pixel electrode is connected with the drain electrode through a first through hole; the drain electrode comprises metal or alloy, the pixel electrode is made of transparent metal oxide, the drain electrode made of the metal or alloy is in direct contact connection with the pixel electrode made of the transparent metal oxide, and an oxide film layer made of the metal or alloy is not arranged in a contact area.

Description

Display panel, display device and manufacturing method of display panel
Technical Field
The present disclosure relates to the field of display technologies, and in particular, to a display panel, a display device, and a method for manufacturing the display panel.
Background
Because of the advantages of large area, high integration level, high resolution, low power consumption, and the like, TFT-LCD (Thin Film Transistor-Liquid Crystal Display) devices are receiving more and more attention as the basis of the new generation of Display devices. In the related art, a pixel unit of a TFT-LCD display panel includes a transistor, a pixel electrode, and a common electrode. When the drain of the transistor and the pixel electrode are connected, the connection is likely to be poor due to an excessive resistance, and display failure of the display panel is likely to occur.
Disclosure of Invention
An object of the present disclosure is to provide a display panel, a display device and a method for manufacturing the display panel, so as to reduce the probability of poor display of the display panel. The specific technical scheme is as follows:
embodiments of a first aspect of the present disclosure provide a display panel, including:
the pixel unit comprises a substrate base plate and a plurality of pixel units which are distributed in a matrix and are positioned on the substrate base plate;
each pixel unit comprises a transistor, a pixel electrode connected with the transistor and a common electrode arranged opposite to the pixel electrode;
the transistor comprises a grid electrode, a grid electrode insulating layer, a source electrode, a drain electrode and a semiconductor active layer;
the pixel electrode is connected with the drain electrode through a first through hole;
the drain electrode comprises metal or alloy, the pixel electrode is made of transparent metal oxide, the drain electrode made of the metal or alloy is in direct contact connection with the pixel electrode made of the transparent metal oxide, and an oxide film layer made of the metal or alloy is not arranged in a contact area.
In some embodiments, the common electrodes in some of the pixel units are also connected with the common electrodes in the adjacent pixel units through auxiliary electrode lines;
the common electrodes in the partial pixel units are connected with the auxiliary electrode wire through second via holes, and the common electrodes in the adjacent pixel units are connected with the auxiliary electrode wire through third via holes.
In some embodiments, the common electrode is a transparent metal oxide, the auxiliary electrode line includes a metal or an alloy, the auxiliary electrode line formed of the metal or the alloy is in direct contact with the common electrode formed of the transparent metal oxide, and the contact area is free of an oxide film layer of the metal or the alloy.
In some embodiments, a first etching region is formed on a surface of the drain electrode, the first etching region is formed by etching a thin layer with a first predetermined thickness on the surface of the metal or the alloy, the first predetermined thickness is 5nm to 15nm, and the pixel electrode is in contact connection with the first etching region.
In some embodiments, the first predetermined thickness is 10 nm.
In some embodiments, a second etching region is formed on a surface of the auxiliary electrode line, the second etching region is formed by etching a thin layer with a second predetermined thickness on the surface of the metal or the alloy, the second predetermined thickness is 5nm to 15nm, and the common electrode is in contact connection with the second etching region.
In some embodiments, the second predetermined thickness is 10 nm.
In some embodiments, the second via is disposed at a corner position of the common electrode of the partial pixel unit close to the adjacent pixel unit, and the third via is disposed at a corner position of the common electrode of the adjacent pixel unit close to the second via;
unfilled corners are formed at two corner positions of the pixel electrode and are used for avoiding the auxiliary electrode wire.
In some embodiments, the pixel unit further includes a first insulating layer disposed over the source electrode and the drain electrode, and a second insulating layer disposed over the first insulating layer, the common electrode is disposed over the first insulating layer, the pixel electrode is disposed over the second insulating layer, the pixel electrode and the common electrode are separated by the second insulating layer, and the first via is disposed through the first insulating layer and the second insulating layer.
In some embodiments, the auxiliary electrode line and the gate electrode are disposed on the same layer, and the second via hole and the third via hole penetrate through the first insulating layer and the gate insulating layer.
An embodiment of a second aspect of the present disclosure provides a manufacturing method of a display panel, including:
providing a substrate base plate;
forming a transistor on the substrate, wherein a drain of the transistor comprises a metal or an alloy;
forming a first insulating layer;
forming a first through hole on the first insulating layer at a position corresponding to the drain of the transistor;
etching the metal or the alloy of the drain electrode to remove the oxide film layer of the metal or the alloy;
and forming a pixel electrode, wherein one part of the pixel electrode is positioned in the first through hole to be in contact connection with the etched region of the drain electrode.
An embodiment of a third aspect of the present disclosure provides a display device including the display panel in any of the above embodiments.
The embodiment of the disclosure has the following beneficial effects:
according to the display panel, the display device and the manufacturing method of the display panel, the pixel electrode of the display panel is connected with the drain electrode of the transistor through the first through hole, the drain electrode comprises metal or alloy, the drain electrode formed by the metal or alloy is directly connected with the pixel electrode in a contact mode, and the contact area is free of the oxide film layer of the metal or alloy. Thus, the problem of excessive resistance between the drain of the transistor and the pixel electrode does not occur, and connection failure due to excessive resistance does not occur. Therefore, the probability of display defects of the display panel can be reduced.
Of course, not all advantages described above need to be achieved at the same time to practice any one product or method of the present disclosure.
Drawings
In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and other embodiments can be obtained by those skilled in the art according to the drawings.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the disclosure;
FIG. 2 is a schematic diagram of a cross section A-A of a display panel according to an embodiment of the present disclosure;
FIG. 3 is a schematic view of a cross-section B-B of a display panel according to an embodiment of the present disclosure;
fig. 4 is a schematic flow chart illustrating a manufacturing method of a display panel according to an embodiment of the disclosure.
Detailed Description
The technical solutions in the embodiments of the present disclosure will be clearly and completely described below with reference to the drawings in the embodiments of the present disclosure, and it is obvious that the described embodiments are only a part of the embodiments of the present disclosure, and not all of the embodiments. All other embodiments that can be derived from the disclosure by one of ordinary skill in the art based on the embodiments in the disclosure are intended to be within the scope of the disclosure.
As shown in fig. 1 and 2, an embodiment of the first aspect of the present disclosure provides a display panel including a substrate 900 and a plurality of pixel units 1 disposed on the substrate 900 in a matrix distribution. Each pixel cell 1 includes one transistor 100, a pixel electrode 200 connected to the transistor 100, and a common electrode 300 disposed opposite to the pixel electrode 200. The transistor 100 includes a gate 110, a gate insulating layer 120, a source 130, a drain 140, and a semiconductor active layer 150. The pixel electrode 200 is connected to the drain electrode 140 through the first via hole 400. The drain electrode 140 includes metal or alloy, the pixel electrode 200 is made of transparent metal oxide, the drain electrode 140 made of metal or alloy is directly contacted and connected with the pixel electrode 200 made of transparent metal oxide, and the contact area has no oxide film layer made of metal or alloy.
According to the display panel of the embodiment of the present disclosure, the pixel electrode 200 is connected to the drain electrode 140 of the transistor 100 through the first via 400, the drain electrode 140 includes a metal or an alloy, and the drain electrode 140 formed of the metal or the alloy is directly connected to the pixel electrode 200 in a contact manner, and the contact region has no oxide film layer of the metal or the alloy. Thus, there is no problem of an excessive resistance between the drain 140 of the transistor 100 and the pixel electrode 200, and a connection failure due to the excessive resistance does not occur. Therefore, the probability of display defects of the display panel can be reduced.
Further, the substrate board 900 may be a flexible substrate, and the material of the substrate board 900 may be polyimide or the like.
In some embodiments, as shown in fig. 1, 2 and 3, the common electrode 300 in some of the pixel units 1 is also connected to the common electrode 300 in the adjacent pixel unit 1 through an auxiliary electrode line 500. Specifically, the common electrode 300 in the partial pixel unit 1 is connected to the auxiliary electrode line 500 through the second via 600, and the common electrode 300 in the adjacent pixel unit 1 is connected to the auxiliary electrode line 500 through the third via 1100. In the related art, in the pixel units 1 distributed in the matrix, the common electrodes 300 in the pixel units 1 in the same row are connected together, and the common electrodes 300 in the pixel units 1 in different rows are not connected. After a lot of experiments and verifications, the applicant of the present application finds that if the common electrodes 300 of the pixel units 1 in different rows are also connected together, the green phenomenon of the display panel can be improved, and thus the display effect is improved. In this embodiment, the common electrode 300 in some of the pixel units 1 is connected to the auxiliary electrode line 500 through the second via 600, and the common electrode 300 in an adjacent pixel unit 1 is connected to the auxiliary electrode line 500 through the third via 1100, so that the common electrodes 300 in two pixel units 1 in different rows are connected through the auxiliary electrode line 500, and the common electrodes 300 of all the pixel units 1 in different rows can be connected.
Further, the common electrode 300 of the pixel unit 1 is made of a transparent metal oxide, the auxiliary electrode line 500 includes a metal or an alloy, the auxiliary electrode line 500 made of the metal or the alloy is directly connected to the common electrode 300 made of the transparent metal oxide in a contact manner, and the contact area is free of an oxide film layer made of the metal or the alloy. In this embodiment, the auxiliary electrode line 500 includes a metal or an alloy, the auxiliary electrode line 500 formed by the metal or the alloy is directly connected to the common electrode 300 in a contact manner, and the contact area does not have an oxide film layer of the metal or the alloy, so that the problem of excessive resistance between the common electrode 300 and the auxiliary electrode line 500 is not generated, and the connection failure due to the excessive resistance is avoided. This can further reduce the probability of display defects occurring in the display panel.
In some embodiments, a first etching region is formed on the surface of the drain electrode 140, the first etching region is formed by etching a thin layer with a first predetermined thickness on the surface of the metal or the alloy, the first predetermined thickness is 5nm to 15nm, and the pixel electrode 200 is in contact connection with the first etching region. When the metal or the alloy is exposed to the air for a long time, an oxide film is easily formed on the surface, and therefore, the oxide film can be removed by etching a thin layer with a first preset thickness on the surface of the metal or the alloy, so that the problem of excessive resistance is avoided after the drain electrode 140 and the pixel electrode 200 are connected.
Further, the first predetermined thickness may be 5nm to 15nm, that is, the oxide film layer may be removed by etching the surface of the metal or alloy of the drain electrode 140 by 5nm to 15 nm.
Furthermore, the first predetermined thickness is 10nm, so that the oxide film can be removed completely, and the structural strength of the drain electrode 140 is not significantly reduced due to the excessive etching of the drain electrode.
In some embodiments, a second etching region is formed on the surface of the auxiliary electrode line 500, the second etching region is formed by etching a thin layer with a second predetermined thickness on the surface of the metal or the alloy, the second predetermined thickness is 5nm to 15nm, and the common electrode 300 is in contact connection with the second etching region.
Further, the second predetermined thickness may be 5nm to 15nm, that is, the surface of the metal or alloy of the auxiliary electrode line 500 is etched by 5nm to 15nm, so that the oxide film layer is ensured to be removed.
Furthermore, the predetermined thickness is 10nm, so that the oxide film layer can be completely removed, and the structural strength of the auxiliary electrode line 500 is not significantly reduced due to excessive etching of the auxiliary electrode line.
In some embodiments, the second via 600 is disposed at a corner position of one of the common electrodes 300 in the partial pixel unit 1, which is close to the adjacent pixel unit 1, and the third via 1100 is disposed at a corner position of the common electrode 300 of the adjacent pixel unit 1, which is close to the second via 600, so that the auxiliary electrode line 500 does not need to be disposed too long. In addition, unfilled corners 210 are formed at two corner positions of the pixel electrode 200, and the unfilled corners 210 are used for avoiding the auxiliary electrode line 500. It can be understood that, since the pixel electrodes 200 in the pixel units 1 need to maintain a uniform shape and size, even for those pixel units 1 that are not connected to the auxiliary connection line 500, the pixel electrodes 200 therein are formed with the unfilled corners 210 at the two corresponding corner positions.
In some embodiments, the pixel unit 1 further includes a first insulating layer 700 disposed over the source electrode 130 and the drain electrode 140, and a second insulating layer 800 disposed over the first insulating layer 700, the common electrode 300 is disposed over the first insulating layer 700, the pixel electrode 200 is disposed over the second insulating layer 800, the pixel electrode 200 and the common electrode 300 are separated by the second insulating layer 800, and the first via 400 is disposed through the first insulating layer 700 and the second insulating layer 800, such that a portion of the structure of the pixel electrode 200 may extend into the first via 400 to be connected with the drain electrode 140 located under the first insulating layer 700 through the first via 400. Specifically, a first insulating layer 700 and a second insulating layer800 may include SiN, SiO2And the like, and embodiments of the present disclosure are not particularly limited thereto.
Further, the auxiliary electrode line 500 is disposed on the same layer as the gate electrode 110, and specifically, both the gate electrode 110 and the auxiliary electrode line 500 may be disposed on the substrate 900. The second and third vias 600 and 1100 are disposed through the first and gate insulating layers 700 and 120, so that the common electrode 300 may extend into the second or third via 600 or 1100 to be connected with the auxiliary electrode line 500 disposed at the same layer as the gate electrode 110.
It is understood that when etching a metal or an alloy, the etching solution used may be an acidic etching solution, such as a hydrogen peroxide solution, a mixed solution of water and sulfuric acid and nitric acid, and the like. Alternatively, the etching solution may also be a solution having fluorine ions, which is not specifically limited in this disclosure. Specifically, when the etching solution is a mixed solution of water, sulfuric acid and nitric acid, the ratio of water, sulfuric acid and nitric acid in the mixed solution can be 8:1:1, wherein the etching rate of the mixed solution to the oxidation structure can reach 100-200 nm/min.
In some embodiments, the gate electrode 110 may include a copper layer and a molybdenum niobium layer for protecting the copper layer. That is, the gate electrode 110 may have a laminated structure of a copper layer and a molybdenum niobium layer, and the molybdenum niobium layer protects the copper layer to prevent the copper layer from being corroded.
In some embodiments, the source 130 and the drain 140 may each also include a copper layer and a molybdenum niobium layer for protecting the copper layer, and similarly, the molybdenum niobium layer has a protective effect on the copper layer to prevent the copper layer from being corroded.
Embodiments of the second aspect of the present disclosure further provide a method for manufacturing a display panel, as shown in fig. 4, the method includes the following steps:
providing a substrate base 900;
forming a transistor 100 on a substrate 900, a drain 140 of the transistor 100 comprising a metal or an alloy;
forming a first insulating layer 700;
forming a first via 400 on the first insulating layer 700 at a position corresponding to the drain 140 of the transistor 100;
etching the metal or alloy of the drain electrode 140 to remove the oxide film layer of the metal or alloy;
a pixel electrode 200 is formed, and a portion of the pixel electrode 200 is positioned in the first via hole 400 to be in contact connection with the etched region of the drain electrode 140. According to the manufacturing method of the display panel of the embodiment of the disclosure, after the first via hole 400 is formed, the surface of the metal or alloy of the drain electrode 140 is etched to remove the oxide film layer formed on the surface of the metal or alloy due to the fact that the metal or alloy is remained in the air for a long time, and then the pixel electrode 200 is in contact connection with the etched region of the drain electrode 140 through the first via hole 400. Thus, it is ensured that the problem of excessive resistance does not occur between the drain 140 of the transistor 100 and the pixel electrode 200, and thus, poor connection due to excessive resistance is not caused. Therefore, the probability of display defects of the display panel can be reduced.
In some embodiments, the oxide film may be removed by etching a thin layer of a first predetermined thickness on the surface of the metal or alloy of the drain electrode 140. This ensures that the drain electrode 140 and the pixel electrode 200 are connected without causing an excessive resistance problem.
Further, the first predetermined thickness may be 5nm to 15nm, that is, the oxide film layer may be removed by etching the surface of the metal or alloy of the drain electrode 140 by 5nm to 15 nm.
Furthermore, the first predetermined thickness is 10nm, so that the oxide film can be removed completely, and the structural strength of the drain electrode 140 is not significantly reduced due to the excessive etching of the drain electrode.
Embodiments of a third aspect of the present disclosure provide a display device including the display panel in any of the above embodiments. The display device includes, but is not limited to, a computer, a mobile phone, a television, and the like.
According to the display device of the embodiment of the present disclosure, the pixel electrode 200 of the display panel is connected to the drain electrode 140 of the transistor 100 through the first via 400, the drain electrode 140 includes a metal or an alloy, and the drain electrode 140 formed of the metal or the alloy is directly connected to the pixel electrode 200 in a contact manner, and the contact region has no oxide film layer of the metal or the alloy. Thus, there is no problem of an excessive resistance between the drain 140 of the transistor 100 and the pixel electrode 200, and a connection failure due to the excessive resistance does not occur. Therefore, the probability of display defects of the display panel can be reduced.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The above description is only for the preferred embodiment of the present disclosure, and is not intended to limit the scope of the present disclosure. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure are included in the scope of protection of the present disclosure.

Claims (12)

1. A display panel, comprising:
the pixel unit comprises a substrate base plate and a plurality of pixel units which are distributed in a matrix and are positioned on the substrate base plate;
each pixel unit comprises a transistor, a pixel electrode connected with the transistor and a common electrode arranged opposite to the pixel electrode;
the transistor comprises a grid electrode, a grid electrode insulating layer, a source electrode, a drain electrode and a semiconductor active layer;
the pixel electrode is connected with the drain electrode through a first through hole;
the drain electrode comprises metal or alloy, the pixel electrode is made of transparent metal oxide, the drain electrode made of the metal or alloy is in direct contact connection with the pixel electrode made of the transparent metal oxide, and an oxide film layer made of the metal or alloy is not arranged in a contact area.
2. The display panel according to claim 1, wherein the common electrodes in some of the pixel units are further connected to the common electrodes in the adjacent pixel units by auxiliary electrode lines;
the common electrodes in the partial pixel units are connected with the auxiliary electrode wire through second via holes, and the common electrodes in the adjacent pixel units are connected with the auxiliary electrode wire through third via holes.
3. The display panel according to claim 2, wherein the common electrode is a transparent metal oxide, the auxiliary electrode line comprises a metal or an alloy, the auxiliary electrode line formed by the metal or the alloy is in direct contact with the common electrode formed by the transparent metal oxide, and a contact area is free of an oxide film layer of the metal or the alloy.
4. The display panel according to claim 1, wherein a first etching region is formed on a surface of the drain electrode, the first etching region is formed by etching a thin layer with a first predetermined thickness on a surface of the metal or the alloy, the first predetermined thickness is 5nm to 15nm, and the pixel electrode is in contact with the first etching region.
5. The display panel according to claim 4, wherein the first predetermined thickness is 10 nm.
6. The display panel according to claim 3, wherein a second etching region is formed on a surface of the auxiliary electrode line, the second etching region is formed by etching a thin layer with a second predetermined thickness on a surface of the metal or the alloy, the second predetermined thickness is 5nm to 15nm, and the common electrode is in contact connection with the second etching region.
7. The display panel according to claim 6, wherein the second predetermined thickness is 10 nm.
8. The display panel according to claim 2, wherein the second via hole is disposed at a corner position of the common electrode in the partial pixel unit, which is close to the adjacent pixel unit, and the third via hole is disposed at a corner position of the common electrode in the adjacent pixel unit, which is close to the second via hole;
unfilled corners are formed at two corner positions of the pixel electrode and are used for avoiding the auxiliary electrode wire.
9. The display panel according to claim 2, wherein the pixel unit further comprises a first insulating layer disposed over the source electrode and the drain electrode and a second insulating layer disposed over the first insulating layer, wherein the common electrode is disposed over the first insulating layer, wherein the pixel electrode is disposed over the second insulating layer, wherein the pixel electrode and the common electrode are separated by the second insulating layer, and wherein the first via hole is disposed through the first insulating layer and the second insulating layer.
10. The display panel according to claim 9, wherein the auxiliary electrode lines are disposed on the same layer as the gate electrode, and the second via hole and the third via hole penetrate the first insulating layer and the gate insulating layer.
11. A method for manufacturing a display panel is characterized by comprising the following steps:
providing a substrate base plate;
forming a transistor on the substrate, wherein a drain of the transistor comprises a metal or an alloy;
forming a first insulating layer;
forming a first through hole on the first insulating layer at a position corresponding to the drain of the transistor;
etching the metal or the alloy of the drain electrode to remove the oxide film layer of the metal or the alloy;
and forming a pixel electrode, wherein one part of the pixel electrode is positioned in the first through hole to be in contact connection with the etched region of the drain electrode.
12. A display device characterized by comprising the display panel according to any one of claims 1 to 10.
CN202110592231.6A 2021-05-28 2021-05-28 Display panel, display device and manufacturing method of display panel Active CN113325636B (en)

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