CN113325636B - Display panel, display device and manufacturing method of display panel - Google Patents

Display panel, display device and manufacturing method of display panel Download PDF

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Publication number
CN113325636B
CN113325636B CN202110592231.6A CN202110592231A CN113325636B CN 113325636 B CN113325636 B CN 113325636B CN 202110592231 A CN202110592231 A CN 202110592231A CN 113325636 B CN113325636 B CN 113325636B
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electrode
pixel
display panel
alloy
metal
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CN113325636A (en
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董水浪
胡合合
薛大鹏
王利忠
姚念琦
宁策
雷利平
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Geometry (AREA)
  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The embodiment of the disclosure provides a display panel, a display device and a manufacturing method of the display panel, wherein the display panel comprises a substrate and a plurality of pixel units which are distributed in a matrix and are positioned on the substrate; each pixel unit comprises a transistor, a pixel electrode connected with the transistor and a common electrode arranged opposite to the pixel electrode; the transistor comprises a grid electrode, a grid electrode insulating layer, a source electrode, a drain electrode and a semiconductor active layer; the pixel electrode is connected with the drain electrode through a first via hole; the drain electrode comprises metal or alloy, the pixel electrode is transparent metal oxide, the drain electrode formed by the metal or alloy is in direct contact connection with the pixel electrode formed by the transparent metal oxide, and the contact area is free of an oxide film layer of the metal or alloy.

Description

Display panel, display device and manufacturing method of display panel
Technical Field
The disclosure relates to the technical field of display, and in particular relates to a display panel, a display device and a manufacturing method of the display panel.
Background
The TFT-LCD (Thin Film Transistor-Liquid Crystal Display, thin film transistor liquid crystal display) device has been attracting more and more attention as a basis for a new generation of display devices because of its advantages of large area, high integration, high resolution, low power consumption, and the like. In the related art, a pixel unit of a TFT-LCD display panel includes a transistor, a pixel electrode, and a common electrode. When the drain electrode of the transistor and the pixel electrode are connected, connection failure is likely to occur due to excessive resistance, and display failure of the display panel is likely to occur.
Disclosure of Invention
An object of an embodiment of the present disclosure is to provide a display panel, a display device, and a method for manufacturing the display panel, so as to reduce the probability of poor display of the display panel. The specific technical scheme is as follows:
embodiments of a first aspect of the present disclosure provide a display panel including:
a substrate and a plurality of pixel units distributed in a matrix on the substrate;
each pixel unit comprises a transistor, a pixel electrode connected with the transistor and a common electrode arranged opposite to the pixel electrode;
the transistor comprises a grid electrode, a grid electrode insulating layer, a source electrode, a drain electrode and a semiconductor active layer;
the pixel electrode is connected with the drain electrode through a first via hole;
the drain electrode comprises metal or alloy, the pixel electrode is transparent metal oxide, the drain electrode formed by the metal or alloy is in direct contact connection with the pixel electrode formed by the transparent metal oxide, and the contact area is free of an oxide film layer of the metal or alloy.
In some embodiments, the common electrode in a part of the pixel units is also connected with the common electrode in an adjacent pixel unit through an auxiliary electrode line;
the common electrode in the partial pixel units is connected with the auxiliary electrode line through a second via hole, and the common electrode in the adjacent pixel units is connected with the auxiliary electrode line through a third via hole.
In some embodiments, the common electrode is a transparent metal oxide, the auxiliary electrode line comprises a metal or an alloy, the auxiliary electrode line formed by the metal or the alloy is directly contacted and connected with the common electrode formed by the transparent metal oxide, and the contact area is free of an oxide film layer of the metal or the alloy.
In some embodiments, a first etching region is formed on the surface of the drain electrode, the first etching region is formed by etching a thin layer with a first preset thickness on the surface of the metal or alloy, the first preset thickness is 5nm to 15nm, and the pixel electrode is in contact connection with the first etching region.
In some embodiments, the first predetermined thickness is 10nm.
In some embodiments, a second etching area is formed on the surface of the auxiliary electrode wire, the second etching area is formed by etching a thin layer with a second preset thickness on the surface of the metal or alloy, the second preset thickness is 5nm to 15nm, and the common electrode is in contact connection with the second etching area.
In some embodiments, the second predetermined thickness is 10nm.
In some embodiments, the second via is disposed at a corner position of the common electrode in the partial pixel unit, which is close to the adjacent pixel unit, and the third via is disposed at a corner position of the common electrode in the adjacent pixel unit, which is close to the second via;
and unfilled corners are formed at two corner positions of the pixel electrode and are used for avoiding the auxiliary electrode wires.
In some embodiments, the pixel unit further includes a first insulating layer disposed over the source and the drain, and a second insulating layer disposed over the first insulating layer, the common electrode is disposed over the first insulating layer, the pixel electrode is disposed over the second insulating layer, the pixel electrode and the common electrode are separated by the second insulating layer, and the first via hole is disposed through the first insulating layer and the second insulating layer.
In some embodiments, the auxiliary electrode line is disposed in the same layer as the gate electrode, and the second via hole and the third via hole penetrate through the first insulating layer and the gate insulating layer.
An embodiment of a second aspect of the present disclosure provides a method for manufacturing a display panel, including:
providing a substrate base plate;
forming a transistor on the substrate base plate, wherein a drain electrode of the transistor comprises metal or alloy;
forming a first insulating layer;
forming a first via hole on the first insulating layer at a position corresponding to the drain electrode of the transistor;
etching the metal or alloy of the drain electrode to remove the oxide film layer of the metal or alloy;
and forming a pixel electrode, wherein a part of the pixel electrode is positioned in the first via hole so as to be in contact connection with the etched region of the drain electrode.
An embodiment of a third aspect of the present disclosure provides a display device including the display panel in any one of the above embodiments.
The beneficial effects of the embodiment of the disclosure are that:
according to the display panel, the display device and the manufacturing method of the display panel, the pixel electrode of the display panel is connected with the drain electrode of the transistor through the first via hole, the drain electrode comprises metal or alloy, the drain electrode formed by the metal or alloy is directly contacted and connected with the pixel electrode, and the contact area is free of an oxide film layer of the metal or alloy. Thus, the problem of excessive resistance between the drain electrode of the transistor and the pixel electrode is avoided, and poor connection caused by excessive resistance is avoided. Thus, the probability of occurrence of defective display on the display panel can be reduced.
Of course, not all of the above-described advantages need be achieved simultaneously in practicing any one of the products or methods of the present disclosure.
Drawings
In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, the following description will briefly introduce the drawings that are required to be used in the embodiments or the description of the prior art, and it is apparent that the drawings in the following description are only some embodiments of the present disclosure, and other embodiments may be obtained according to these drawings to those of ordinary skill in the art.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the disclosure;
FIG. 2 is a schematic view of a section A-A of a display panel according to one embodiment of the present disclosure;
FIG. 3 is a schematic view of a B-B cross section of a display panel according to an embodiment of the present disclosure;
fig. 4 is a flowchart illustrating a method for manufacturing a display panel according to an embodiment of the disclosure.
Detailed Description
The following description of the technical solutions in the embodiments of the present disclosure will be made clearly and completely with reference to the accompanying drawings in the embodiments of the present disclosure, and it is apparent that the described embodiments are only some embodiments of the present disclosure, not all embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by one of ordinary skill in the art based on the present disclosure are within the scope of the present disclosure.
As shown in fig. 1 and 2, an embodiment of the first aspect of the present disclosure provides a display panel including a substrate base 900 and a plurality of pixel units 1 distributed in a matrix on the substrate base 900. Each pixel unit 1 includes one transistor 100, a pixel electrode 200 connected to the transistor 100, and a common electrode 300 disposed opposite to the pixel electrode 200. The transistor 100 includes a gate electrode 110, a gate insulating layer 120, a source electrode 130, a drain electrode 140, and a semiconductor active layer 150. The pixel electrode 200 is connected to the drain electrode 140 through the first via hole 400. The drain electrode 140 includes a metal or an alloy, the pixel electrode 200 is a transparent metal oxide, and the drain electrode 140 formed of the metal or the alloy is directly connected to the pixel electrode 200 formed of the transparent metal oxide, and the contact area is free of an oxide film layer of the metal or the alloy.
According to the display panel of the embodiment of the present disclosure, the pixel electrode 200 is connected to the drain electrode 140 of the transistor 100 through the first via 400, the drain electrode 140 includes a metal or an alloy, and the drain electrode 140 formed of the metal or the alloy is directly in contact with the pixel electrode 200, and the contact region has no oxide film layer of the metal or the alloy. In this way, the problem of excessive resistance between the drain electrode 140 of the transistor 100 and the pixel electrode 200 is not generated, and poor connection due to excessive resistance is not caused. Thus, the probability of occurrence of defective display on the display panel can be reduced.
Further, the substrate 900 may be a flexible substrate, and the material of the substrate 900 may be polyimide or the like.
In some embodiments, as shown in fig. 1, 2 and 3, the common electrode 300 in a part of the pixel cells 1 is also connected to the common electrode 300 in an adjacent pixel cell 1 through an auxiliary electrode line 500. Specifically, the common electrode 300 in the partial pixel unit 1 is connected to the auxiliary electrode line 500 through the second via hole 600, and the common electrode 300 in the adjacent pixel unit 1 is connected to the auxiliary electrode line 500 through the third via hole 1100. In the related art, in the pixel units 1 distributed in a matrix, the common electrodes 300 in the pixel units 1 in the same row are connected together, and the common electrodes 300 in the pixel units 1 in different rows are not connected. The applicant of the present application has found after a lot of experimental verification that if the common electrodes 300 of the pixel units 1 in different rows are also connected together, the greening phenomenon of the display panel can be improved, thereby improving the display effect. In this embodiment, the common electrode 300 in the partial pixel units 1 is connected to the auxiliary electrode line 500 through the second via hole 600, and the common electrode 300 in the adjacent pixel units 1 is connected to the auxiliary electrode line 500 through the third via hole 1100, so that the common electrodes 300 in two pixel units 1 in different rows are connected through the auxiliary electrode line 500, and thus the common electrodes 300 of all the pixel units 1 in different rows can be connected.
Further, the common electrode 300 of the pixel unit 1 is a transparent metal oxide, the auxiliary electrode line 500 includes a metal or alloy, the auxiliary electrode line 500 formed of the metal or alloy is directly connected to the common electrode 300 formed of the transparent metal oxide in a contact manner, and the contact area is free of an oxide film layer of the metal or alloy. In this embodiment, the auxiliary electrode line 500 includes a metal or alloy, and the auxiliary electrode line 500 formed of the metal or alloy is directly connected to the common electrode 300, and the contact area is free of an oxide film layer of the metal or alloy, so that an excessive resistance problem is not generated between the common electrode 300 and the auxiliary electrode line 500, and poor connection due to the excessive resistance is not caused. Thus, the probability of occurrence of defective display on the display panel can be further reduced.
In some embodiments, the surface of the drain electrode 140 is formed with a first etching region, which is formed by etching a thin layer of a first predetermined thickness on the surface of the metal or alloy, the first predetermined thickness being 5nm to 15nm, and the pixel electrode 200 is in contact connection with the first etching region. When the metal or alloy is exposed to the air for a long time, the oxide film is easily formed on the surface, and thus, the oxide film may be removed by etching a thin layer of a first preset thickness on the surface of the metal or alloy, thereby ensuring that the drain electrode 140 and the pixel electrode 200 are connected without having an excessively large resistance.
Further, the first preset thickness may be 5nm to 15nm, that is, the surface of the metal or alloy of the drain electrode 140 is etched away by 5nm to 15nm, so as to ensure that the oxide film layer is removed.
Furthermore, the first preset thickness is 10nm, so that the oxide film layer can be removed thoroughly, and the drain 140 cannot be reduced in structural strength obviously due to excessive etched portions.
In some embodiments, the surface of the auxiliary electrode line 500 is formed with a second etched region formed by etching a thin layer of a second preset thickness of 5nm to 15nm on the surface of the metal or alloy, and the common electrode 300 is in contact connection with the second etched region.
Further, the second preset thickness may be 5nm to 15nm, that is, the surface of the metal or alloy of the auxiliary electrode line 500 is etched away by 5nm to 15nm, so that the oxide film layer can be removed.
Furthermore, the preset thickness is 10nm, so that the oxide film layer can be removed thoroughly, and the structural strength of the auxiliary electrode wire 500 is not obviously reduced due to excessive etched portions.
In some embodiments, the second via hole 600 is disposed at a corner position of the common electrode 300 in the partial pixel unit 1 near the adjacent pixel unit 1, and the third via hole 1100 is disposed at a corner position of the common electrode 300 in the adjacent pixel unit 1 near the second via hole 600, so that the auxiliary electrode line 500 does not need to be excessively long. In addition, the pixel electrode 200 is formed with a unfilled corner 210 at two corner positions, and the unfilled corner 210 is used for avoiding the auxiliary electrode line 500. It will be appreciated that since the pixel electrode 200 in each pixel unit 1 needs to maintain a uniform shape and size, even for those pixel units 1 that do not have a connection relationship with the auxiliary connection line 500, the pixel electrode 200 therein is formed with the unfilled corner 210 at the corresponding two corner positions.
In some embodiments, the pixel unit 1 further includes a first insulating layer 700 disposed over the source electrode 130 and the drain electrode 140, and a second insulating layer 800 disposed over the first insulating layer 700, the common electrode 300 is disposed over the first insulating layer 700, the pixel electrode 200 is disposed over the second insulating layer 800, the pixel electrode 200 and the common electrode 300 are separated by the second insulating layer 800, and the first via 400 is disposed through the first insulating layer 700 and the second insulating layer 800, such that a portion of the structure of the pixel electrode 200 may extend into the first via 400 to be connected with the drain electrode 140 under the first insulating layer 700 through the first via 400. Specifically, the materials of the first insulating layer 700 and the second insulating layer 800 may include SiN, siO, siO 2 Etc., to which embodiments of the present disclosure are not particularly limited.
Further, the auxiliary electrode line 500 is disposed in the same layer as the gate electrode 110, and in particular, both the gate electrode 110 and the auxiliary electrode line 500 may be disposed on the substrate 900. The second and third vias 600 and 1100 are disposed through the first and gate insulating layers 700 and 120 such that the common electrode 300 may extend into the second or third vias 600 or 1100 to be connected to the auxiliary electrode line 500 disposed in the same layer as the gate electrode 110.
It is understood that in etching a metal or alloy, the etching solution used may be an acidic etching solution, such as a hydrogen peroxide solution, a mixed solution of water and sulfuric acid and nitric acid, or the like. Alternatively, the etching solution may be a solution having fluoride ions, which is not particularly limited in the embodiments of the present disclosure. Specifically, when the etching solution is a mixed solution of water, sulfuric acid and nitric acid, the ratio of water, sulfuric acid and nitric acid in the mixed solution can be 8:1:1, wherein the etching rate of the mixed solution on the oxidized structure can reach 100-200nm/min.
In some embodiments, the gate 110 may include a copper layer and a molybdenum niobium layer for protecting the copper layer. That is, the gate electrode 110 may have a stacked structure of a copper layer and a molybdenum-niobium layer, and the molybdenum-niobium layer has a protective effect on the copper layer to prevent the copper layer from being corroded.
In some embodiments, the source electrode 130 and the drain electrode 140 may also each include a copper layer and a molybdenum-niobium layer for protecting the copper layer, and similarly, the molybdenum-niobium layer has a protective effect on the copper layer to prevent the copper layer from being corroded.
An embodiment of the second aspect of the present disclosure further provides a method for manufacturing a display panel, as shown in fig. 4, including the steps of:
providing a substrate base 900;
forming a transistor 100 on a substrate 900, the drain 140 of the transistor 100 comprising a metal or alloy;
forming a first insulating layer 700;
forming a first via 400 on the first insulating layer 700 at a position corresponding to the drain 140 of the transistor 100;
etching the metal or alloy of the drain electrode 140 to remove the oxide film of the metal or alloy;
the pixel electrode 200 is formed, and a portion of the pixel electrode 200 is located in the first via hole 400 to be in contact connection with the etched region of the drain electrode 140. According to the method for manufacturing the display panel of the embodiment of the disclosure, after the first via 400 is formed, the surface of the metal or alloy of the drain electrode 140 is etched to remove the oxide film layer formed on the surface of the metal or alloy due to the metal or alloy remaining in the air for a long time, and then the pixel electrode 200 is in contact connection with the etched region of the drain electrode 140 through the first via 400. In this way, it is ensured that an excessive resistance problem does not occur between the drain electrode 140 of the transistor 100 and the pixel electrode 200, and thus a connection failure due to an excessive resistance is not caused. Thus, the probability of occurrence of defective display on the display panel can be reduced.
In some embodiments, the oxide film layer may be removed by etching a thin layer of a first preset thickness on the surface of the metal or alloy of the drain electrode 140. This ensures that the drain electrode 140 and the pixel electrode 200 are connected without causing excessive resistance.
Further, the first preset thickness may be 5nm to 15nm, that is, the surface of the metal or alloy of the drain electrode 140 is etched away by 5nm to 15nm, so as to ensure that the oxide film layer is removed.
Furthermore, the first preset thickness is 10nm, so that the oxide film layer can be removed thoroughly, and the drain 140 cannot be reduced in structural strength obviously due to excessive etched portions.
An embodiment of a third aspect of the present disclosure provides a display device including the display panel of any one of the above embodiments. Wherein the display device includes, but is not limited to, a computer, a mobile phone, a television, etc.
According to the display device of the embodiment of the disclosure, the pixel electrode 200 of the display panel is connected with the drain electrode 140 of the transistor 100 through the first via 400, the drain electrode 140 includes a metal or an alloy, and the drain electrode 140 formed of the metal or the alloy is directly connected with the pixel electrode 200 in contact, and the contact area has no oxide film layer of the metal or the alloy. In this way, the problem of excessive resistance between the drain electrode 140 of the transistor 100 and the pixel electrode 200 is not generated, and poor connection due to excessive resistance is not caused. Thus, the probability of occurrence of defective display on the display panel can be reduced.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The foregoing description is only of the preferred embodiments of the present disclosure, and is not intended to limit the scope of the present disclosure. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present disclosure are included in the protection scope of the present disclosure.

Claims (9)

1. A display panel, comprising:
a substrate and a plurality of pixel units distributed in a matrix on the substrate;
each pixel unit comprises a transistor, a pixel electrode connected with the transistor and a common electrode arranged opposite to the pixel electrode;
the transistor comprises a grid electrode, a grid electrode insulating layer, a source electrode, a drain electrode and a semiconductor active layer;
the pixel electrode is connected with the drain electrode through a first via hole;
the drain electrode comprises metal or alloy, the pixel electrode is transparent metal oxide, the drain electrode formed by the metal or alloy is in direct contact connection with the pixel electrode formed by the transparent metal oxide, and the contact area is free of an oxide film layer of the metal or alloy;
the common electrodes in part of the pixel units are also connected with the common electrodes in the adjacent pixel units through auxiliary electrode wires;
the common electrode in the part of pixel units is connected with the auxiliary electrode line through a second via hole, and the common electrode in the adjacent pixel units is connected with the auxiliary electrode line through a third via hole;
the second via hole is arranged at a corner position of one of the common electrodes in the partial pixel units, which is close to the adjacent pixel unit, and the third via hole is arranged at a corner position of the common electrode of the adjacent pixel unit, which is close to the second via hole;
the unfilled corners formed at two corner positions of the pixel electrodes in the partial pixel units are used for avoiding the auxiliary electrode wires; the pixel electrodes in all the pixel units have a uniform shape and size.
2. The display panel according to claim 1, wherein the common electrode is a transparent metal oxide, the auxiliary electrode line includes a metal or an alloy, the auxiliary electrode line formed of the metal or the alloy is directly connected in contact with the common electrode formed of the transparent metal oxide, and a contact area is free of an oxide film layer of the metal or the alloy.
3. The display panel according to claim 1, wherein a first etching region is formed on a surface of the drain electrode, the first etching region is formed by etching a thin layer of a first predetermined thickness on a surface of the metal or alloy, the first predetermined thickness is 5nm to 15nm, and the pixel electrode is in contact connection with the first etching region.
4. A display panel according to claim 3, wherein the first predetermined thickness is 10nm.
5. The display panel according to claim 2, wherein a second etching region is formed on a surface of the auxiliary electrode line, the second etching region is formed by etching a thin layer of a second preset thickness on a surface of the metal or alloy, the second preset thickness is 5nm to 15nm, and the common electrode is in contact connection with the second etching region.
6. The display panel of claim 5, wherein the second predetermined thickness is 10nm.
7. The display panel of claim 1, wherein the pixel cell further comprises a first insulating layer disposed over the source and the drain, and a second insulating layer disposed over the first insulating layer, the common electrode is disposed over the first insulating layer, the pixel electrode is disposed over the second insulating layer, the pixel electrode and the common electrode are separated by the second insulating layer, and the first via is disposed through the first insulating layer and the second insulating layer.
8. The display panel of claim 7, wherein the auxiliary electrode line is disposed in the same layer as the gate electrode, and the second and third vias penetrate the first and gate insulating layers.
9. A display device comprising the display panel according to any one of claims 1 to 8.
CN202110592231.6A 2021-05-28 2021-05-28 Display panel, display device and manufacturing method of display panel Active CN113325636B (en)

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