CN113300679A - Digital predistortion circuit, digital predistortion coefficient acquisition method and related device - Google Patents
Digital predistortion circuit, digital predistortion coefficient acquisition method and related device Download PDFInfo
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Abstract
The application discloses a digital predistortion circuit, a digital predistortion coefficient obtaining method and a related device, wherein the circuit comprises: the digital pre-distortion DPD module comprises a digital pre-distortion DPD module, a power amplifier, a signal recovery circuit and a band-limited DPD coefficient extraction circuit, wherein an output signal of the DPD module is input into the power amplifier, an output signal of the power amplifier is input into the signal recovery circuit, an output signal of the signal recovery circuit is input into the band-limited DPD coefficient extraction circuit, and an output signal of the band-limited DPD coefficient extraction circuit is input into the DPD module; the band-limited DPD coefficient extraction circuit is used for determining a DPD coefficient according to an output signal of the signal recovery circuit and a first input signal, wherein the first input signal comprises an input signal of a DPD module or an output signal of the DPD module, and the DPD coefficient can be extracted through the band-limited DPD coefficient extraction circuit, so that the bandwidth of the DPD coefficient during extraction is reduced, and the power consumption of the DPD coefficient during extraction is reduced.
Description
Technical Field
The present disclosure relates to the field of communications, and in particular, to a digital predistortion circuit, a digital predistortion coefficient obtaining method, and a related apparatus.
Background
With the rapid development of the 5G technology, the frequency band thereof is extended to millimeter waves, and when a signal is transmitted, the power amplifier operates in a nonlinear region, which causes nonlinear distortion of an in-band signal, and when the nonlinear distortion of the in-band signal is solved, digital predistortion processing is usually performed on the signal to adjust the nonlinear distortion of the in-band signal. In an existing Digital Pre-distortion (DPD) system, a feedback channel usually needs a bandwidth more than 5 times of an output signal of a power amplifier for signal recovery, and when a DPD coefficient is extracted, the feedback channel usually consumes the bandwidth more than 5 times of the output signal of the power amplifier, which results in large power consumption during extraction of the DPD coefficient.
Disclosure of Invention
The embodiment of the application provides a digital predistortion circuit, a digital predistortion coefficient acquisition method and a related device, which can extract a DPD coefficient through a band-limited DPD coefficient extraction circuit, reduce the bandwidth during DPD coefficient extraction and further reduce the power consumption during DPD coefficient extraction.
In a first aspect, an embodiment of the present application provides a digital predistortion circuit, including: a digital pre-distortion DPD module, a power amplifier, a signal recovery circuit and a band-limited DPD coefficient extraction circuit, wherein,
the output signal of the digital pre-distortion DPD module is input to a power amplifier, the output signal of the power amplifier is input to a signal recovery circuit, the output signal of the signal recovery circuit is input to a band-limited DPD coefficient extraction circuit, and the output signal of the band-limited DPD coefficient extraction circuit is input to the digital pre-distortion DPD module;
and the band-limited DPD coefficient extraction circuit is used for determining the DPD coefficient according to the output signal of the signal recovery circuit and a first input signal, wherein the first input signal comprises an input signal of the digital pre-distortion DPD module or an output signal of the digital pre-distortion DPD module.
In the embodiment of the application, the band-limited DPD coefficient extracting circuit performs DPD coefficient extraction according to the output signal of the signal restoring circuit, the input signal of the digital predistortion DPD module, and the output signal of the digital predistortion DPD module, so that, compared with performing DPD coefficient extraction by using a bandwidth 5 times or more of the output signal of the power amplifier in the conventional scheme, the band-limited DPD coefficient extracting circuit can perform band-limited extraction on the DPD coefficient, thereby reducing power consumption during DPD coefficient extraction.
With reference to the first aspect, in one possible implementation manner, the signal recovery circuit includes a multiplier, a spread spectrum signal generator, a pre-band limiting filter, and a signal recoverer, wherein,
the input signal of the multiplier comprises the output signal of the power amplifier and the output signal of the spread spectrum signal generator, the output signal of the multiplier is input to the pre-band limiting filter, the output signal of the pre-band limiting filter is input to the signal restorer, and the output signal of the signal restorer is input to the band-limited DPD coefficient extraction circuit.
In this example, the spread spectrum signal may be filtered by the pre-band-limited filter to obtain a filtered band-limited signal, and when the signal restorer adopts the band-limited signal to restore the signal, the signal restorer does not need to restore the signal with a bandwidth several times as large as that of the output signal of the power amplifier, thereby reducing energy consumption during signal restoration.
With reference to the first aspect, in a possible implementation manner, the circuit further includes an analog-to-digital converter, and an output signal of the pre-band limiting filter is input to the signal recoverer through the analog-to-digital converter.
With reference to the first aspect, in one possible implementation manner, the band-limited DPD coefficient extraction circuit includes an adder and a band-limited DPD coefficient extractor, wherein,
the input signal of the adder comprises an output signal of a Digital Predistortion (DPD) module and a first output signal of a band-limited DPD coefficient extractor, the output signal of the adder is input to the band-limited DPD coefficient extractor, a second output signal of the band-limited DPD coefficient extractor is input to the Digital Predistortion (DPD) module, and the output signal of the signal restorer is input to the band-limited DPD coefficient extractor;
and the band-limited DPD coefficient extractor is used for determining the DPD coefficient according to the output signal of the adder and the output signal of the signal restorer.
With reference to the first aspect, in one possible implementation manner, the band-limited DPD coefficient extraction circuit includes an adder and a band-limited DPD coefficient extractor, wherein,
the input signal of the adder comprises an input signal of a digital pre-distortion DPD module and an output signal of a signal restorer, the output signal of the adder is input to a band-limited DPD coefficient extractor, and the output signal of the band-limited DPD coefficient extractor is input to the digital pre-distortion DPD module;
and the band-limited DPD coefficient extractor is used for determining the DPD coefficient according to the output signal of the adder.
With reference to the first aspect, in one possible implementation manner, the analog-to-digital converter includes a low-speed analog-to-digital converter.
In this example, by using the low-speed analog-to-digital converter, compared with the prior art in which a high-speed analog-to-digital converter is used for signal sampling, the difficulty in circuit implementation can be reduced, and the energy consumption required for sampling can also be reduced.
With reference to the first aspect, in one possible implementation manner, the pre-band limiting filter includes a low-pass filter, a high-pass filter, or a band-pass filter.
With reference to the first aspect, in a possible implementation manner, the circuit further includes a coupler, and the output signal of the power amplifier is input to the signal recovery circuit through the coupler.
In this example, when the output signal of the power amplifier is input to the signal recovery circuit through the coupler, part of the energy can be coupled to the signal recovery circuit, so that signal coupling can be performed according to the requirement of the signal recovery circuit, and the practicability of the digital predistortion circuit is improved.
With reference to the first aspect, in a possible implementation manner, the circuit further includes a digital-to-analog converter, and an output signal of the digital predistortion DPD module is input to the power amplifier through the digital-to-analog converter.
In a second aspect, an embodiment of the present application provides a method for acquiring a digital predistortion coefficient, where the method is applied to a digital predistortion circuit, the circuit includes a digital predistortion DPD module, a power amplifier, a signal recovery circuit, and a band-limited DPD coefficient extraction circuit, and the method includes:
the digital pre-distortion DPD module performs nonlinear correction on the input signal to obtain an output signal of the digital pre-distortion DPD module;
the power amplifier amplifies an output signal of the digital pre-distortion DPD module to obtain an output signal of the power amplifier;
the signal recovery signal circuit recovers the output signal of the power amplifier to obtain the output signal of the signal recovery signal circuit;
the band-limited DPD coefficient extraction circuit determines a DPD coefficient according to an output signal of the signal recovery signal circuit and a first input signal, and inputs the output signal including the DPD coefficient to the digital pre-distortion DPD module, wherein the first input signal includes an input signal of the digital pre-distortion DPD module or an output signal of the digital pre-distortion DPD module.
With reference to the second aspect, in one possible implementation manner, the signal recovery circuit includes a multiplier, a spread spectrum signal generator, a pre-band limiting filter, and a signal recoverer, and the recovering the output signal of the power amplifier by the signal recovery circuit to obtain the output signal of the signal recovery circuit includes:
the multiplier multiplies the output signal of the power amplifier and the output signal of the spread spectrum signal generator to obtain an output signal of the multiplier;
the output signal of the multiplier is filtered by the pre-band-limiting filter to obtain a narrow-band signal;
the signal restorer restores according to the narrowband signal to obtain a restored signal, and inputs the restored signal to the band-limited DPD coefficient extraction circuit.
With reference to the second aspect, in a possible implementation manner, the circuit further includes an analog-to-digital converter, where the analog-to-digital converter performs analog-to-digital conversion on the narrowband signal to obtain a digital signal, and inputs the digital signal to the signal restorer.
With reference to the second aspect, in a possible implementation manner, the band-limited DPD coefficient extracting circuit includes an adder and a band-limited DPD coefficient extractor, where the first input signal is an output signal of the digital predistortion DPD module, and the determining the DPD coefficient by the band-limited DPD coefficient extracting circuit according to the output signal of the signal restoring signal circuit and the first input signal includes:
the adder carries out addition operation according to the output signal of the Digital Predistortion (DPD) module and the first output signal of the band-limited DPD coefficient extractor so as to obtain an output signal of the adder;
the band-limited DPD coefficient extractor determines the DPD coefficient according to the output signal of the adder and the output signal of the signal restorer.
With reference to the second aspect, in a possible implementation manner, the band-limited DPD coefficient extracting circuit includes an adder and a band-limited DPD coefficient extractor, where the first input signal is an input signal of the digital predistortion DPD module, and the band-limited DPD coefficient extracting circuit determines the DPD coefficient according to an output signal of the signal recovery signal circuit and the first input signal, and includes:
the adder carries out addition operation according to the input signal of the Digital Predistortion (DPD) module and the first output signal of the band-limited DPD coefficient extractor to obtain an output signal of the adder;
the band-limited DPD coefficient extractor determines the DPD coefficient according to the output signal of the adder.
With reference to the second aspect, in one possible implementation manner, the analog-to-digital converter includes a low-speed analog-to-digital converter.
With reference to the second aspect, in one possible implementation manner, the pre-band limiting filter includes a low-pass filter, a high-pass filter, or a band-pass filter.
With reference to the second aspect, in one possible implementation manner, the circuit further includes a coupler, and the output signal of the power amplifier is input to the signal recovery circuit through the coupler.
With reference to the second aspect, in a possible implementation manner, the circuit further includes a digital-to-analog converter, and an output signal of the digital predistortion DPD module is input to the power amplifier through the digital-to-analog converter.
In a third aspect, embodiments of the present application provide a transmitter including an antenna and a digital predistortion circuit as in any of the first aspect above.
In a fourth aspect, an embodiment of the present application provides a chip system, where the chip system includes a processor for supporting a digital predistortion circuit to implement the method according to any one of the second aspects.
In a fifth aspect, the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and the computer program includes program instructions, which, when executed by a processor, cause the processor to execute the method according to any one of the second aspect.
These and other aspects of the present application will be more readily apparent from the following description of the embodiments.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a digital predistortion circuit according to an embodiment of the present application;
fig. 2A is a schematic diagram of another digital predistortion circuit according to an embodiment of the present application;
fig. 2B is a schematic diagram of another digital predistortion circuit according to an embodiment of the present application;
fig. 3A is a schematic diagram of another digital predistortion circuit according to an embodiment of the present application;
fig. 3B is a schematic diagram of another digital predistortion circuit according to an embodiment of the present application;
fig. 4A is a schematic diagram of another digital predistortion circuit according to an embodiment of the present application;
fig. 4B is a schematic diagram of another digital predistortion circuit according to an embodiment of the present application;
fig. 5 is a schematic flowchart of a digital predistortion coefficient obtaining method according to an embodiment of the present application;
fig. 6 is a schematic structural diagram of a chip system provided in the present application according to an embodiment of the present application.
Detailed Description
Embodiments of the present application are described below with reference to the drawings.
The specific structure of the digital predistortion circuit is described in detail below. The application provides a digital predistortion circuit, aims at solving the problem that the DPD coefficient needs the bandwidth several times of the output signal of a power amplifier when extracting, causing the power consumption of the digital predistortion circuit to be larger in the existing scheme, extracts the DPD coefficient through the band-limited DPD coefficient extraction circuit in the digital predistortion circuit, does not need the bandwidth several times of the output signal of the power amplifier, so as to reduce the power consumption of the digital predistortion circuit.
Fig. 1 is a schematic structural diagram of a digital predistortion circuit according to an embodiment of the present application. As shown in fig. 1, the digital predistortion circuit includes: digital predistortion DPD module 110, power amplifier PA120, signal recovery circuit 130, and band-limited DPD coefficient extraction circuit 140, wherein,
an output signal of the digital pre-distortion DPD module 110 is input to the power amplifier PA120, an output signal of the power amplifier PA120 is input to the signal recovery circuit 130, an output signal of the signal recovery circuit 130 is input to the band-limited DPD coefficient extraction circuit 140, and an output signal of the band-limited DPD coefficient extraction circuit 140 is input to the digital pre-distortion DPD module 110;
the band-limited DPD coefficient extracting circuit 140 is configured to determine a DPD coefficient according to the output signal of the signal recovery circuit 130 and a first input signal, where the first input signal includes an input signal of the digital pre-distortion DPD module 110 or an output signal of the digital pre-distortion DPD module 110.
The signal recovery circuit 130 is configured to perform signal recovery according to the output signal of the power amplifier to obtain a recovered signal, where the recovered signal is a digital signal.
After the digital pre-distortion DPD module 110 receives the DPD coefficients output from the band-limited DPD coefficient extracting circuit 140, nonlinear pre-correction is performed in the digital domain.
The signal recovery circuit 130 and band-limited DPD coefficient extraction circuit 140 described above may also be referred to as a feedback channel.
In one possible embodiment, as shown in fig. 2A, the signal recovery circuit 130 includes a multiplier 131, a spread spectrum signal generator 132, a pre-band-limiting filter 133, and a signal recoverer 134, wherein,
the input signal of the multiplier 131 includes the output signal of the power amplifier PA120 and the output signal of the spread signal generator 132, the output signal of the multiplier 131 is input to the pre-band limiting filter 133, the output signal of the pre-band limiting filter 133 is input to the signal restorer 134, and the output signal of the signal restorer 134 is input to the band-limited DPD coefficient extraction circuit 140.
A multiplier 131 for mixing the output signal of the power amplifier and the output signal of the spread-spectrum signal generator to obtain a spread-spectrum signal;
and the pre-band-limiting filter 133 is configured to filter the spread spectrum signal output by the multiplier 131 to obtain a narrowband signal with a preset bandwidth. The preset bandwidth may be set according to a performance requirement when the DPD coefficient is extracted, for example, when the performance requirement is accuracy, the accuracy may also be understood as accuracy, and the larger the preset bandwidth is, the higher the accuracy is, and the smaller the preset bandwidth is, the lower the accuracy is. The narrowband signal is a sub-segment of the spread-spectrum wideband signal in the frequency domain, and the frequency spectrum of the sub-segment can reflect the information characteristics of the output signal of the power amplifier PA 120.
The signal recovery circuit 134 is configured to perform signal recovery on the narrowband signal output by the pre-band limiting filter 133 to obtain a recovered signal, where the recovered signal is a digital signal.
In one possible embodiment, the pre-band limiting filter comprises a low pass filter, a high pass filter or a band pass filter.
In one possible embodiment, the power amplifier may be a digital power amplifier or an analog power amplifier, and if the power amplifier is a digital power amplifier, the signal recovery circuit recovers the digital signal, and if the power amplifier is an analog power amplifier, the signal recovery circuit recovers the analog signal.
When the power amplifier is an analog power amplifier, the digital predistortion circuit may further include an analog-to-digital converter, and an output signal of the pre-band limiting filter is input to the signal restorer through the analog-to-digital converter, which may specifically be: the analog-to-digital converter is used for performing analog-to-digital conversion on the output signal of the pre-band limiting filter to obtain an analog signal, and inputting the analog signal to the signal restorer. The analog-to-digital converter may be a low speed analog-to-digital converter, which may be understood as a lower sampling rate analog-to-digital converter. Adopt low-speed adc to carry out analog-to-digital conversion to the signal, then can adopt lower sampling rate to sample the signal to need not several times and adopt with the bandwidth of power amplifier output signal, reduced the energy consumption, reduced the degree of difficulty of realizing, promoted the practicality.
The digital predistortion circuit may further include a digital-to-analog converter, and the digital-to-analog converter is configured to convert an output signal of the digital predistortion DPD module into an analog signal and input the analog signal to the power amplifier. As shown in fig. 2B, the setting manner of the digital-to-analog converter and the analog-to-digital converter can be that an input signal of the digital-to-analog converter 150 in fig. 2B is an output signal of the DPD module 110, and an output signal of the digital-to-analog converter 150 is input to the power amplifier PA 120; the input signal of the analog-to-digital converter 135 is the output signal of the pre-band limiting filter 133, and the output signal of the analog-to-digital converter 135 is input to the signal restorer 134.
In one possible embodiment, the output signal of the spread spectrum signal generator 132 may also be output to the signal recoverer 134 for the signal recoverer 134 to recover the signal. The signal restorer can carry out signal restoration according to the input signal through a signal restoration algorithm or a spectrum extrapolation algorithm in a compressed sensing algorithm, and obtain a restored signal.
In one possible embodiment, as shown in fig. 3A, band-limited DPD coefficient extraction circuit 140 includes an adder 141 and a band-limited DPD coefficient extractor 142, wherein,
the input signal of the adder 141 includes the output signal of the digital predistortion DPD module 110 and the first output signal of the band-limited DPD coefficient extractor 142, the output signal of the adder 141 is input to the band-limited DPD coefficient extractor 142, the second output signal of the band-limited DPD coefficient extractor 142 is input to the digital predistortion DPD module 110, and the output signal of the signal restorer 130 is input to the band-limited DPD coefficient extractor 142;
a band-limited DPD coefficient extractor 142 for determining a DPD coefficient according to the output signal of the adder 141 and the output signal of the signal restorer 130.
In one possible embodiment, as shown in fig. 3B, band-limited DPD coefficient extraction circuit 140 includes an adder 141 and a band-limited DPD coefficient extractor 142, wherein,
the input signal of the adder 141 includes the input signal of the digital predistortion DPD module 110 and the output signal of the signal restorer 130, the output signal of the adder 141 is input to the band-limited DPD coefficient extractor 142, and the output signal of the band-limited DPD coefficient extractor 142 is input to the digital predistortion DPD module 110;
a band-limited DPD coefficient extractor 142 for determining a DPD coefficient according to the output signal of the adder 141.
In one possible embodiment, as shown in fig. 4A and 4B, the digital predistortion circuit further includes a coupler 160, and the output signal of the power amplifier PA120 is input to the signal recovery circuit 130 through the coupler 160, specifically, the output signal of the power amplifier PA120 is coupled to the coupling port according to a preset ratio, that is: the output signal of the power amplifier PA120 is coupled with part of the energy to the signal recovery circuit 130.
The modules or circuits included in the signal recovery circuit and the band-limited DPD coefficient extraction circuit in the above embodiments may also be divided in other forms, which are only exemplified here, for example, the spread-spectrum signal generator in the signal recovery circuit may be a sub-device in the band-limited DPD coefficient extraction circuit, and when the spread-spectrum signal generator is a sub-device of the band-limited DPD coefficient extraction circuit, it cannot be a sub-device in the signal recovery circuit.
Referring to fig. 5, fig. 5 is a flowchart illustrating a method for obtaining a digital predistortion coefficient. As shown in fig. 5, the method for obtaining digital predistortion coefficients is applied to a digital predistortion circuit, where the digital predistortion circuit is a circuit shown in any one of the embodiments in fig. 1 to fig. 4B, the digital predistortion circuit includes a digital predistortion DPD module, a power amplifier, a signal recovery circuit, and a band-limited DPD coefficient extraction circuit, and the method for obtaining digital predistortion coefficients includes the following steps:
and S510, the digital pre-distortion DPD module performs nonlinear correction on the input signal to obtain an output signal of the digital pre-distortion DPD module.
When the digital predistortion DPD module corrects the input signal, the input signal needs to be corrected by the DPD coefficient, that is, after the DPD coefficient is determined by the digital predistortion circuit, the input signal is subjected to nonlinear correction.
S502, the power amplifier amplifies the output signal of the digital pre-distortion DPD module to obtain the output signal of the power amplifier.
When the power amplifier amplifies the output signal of the digital pre-distortion DPD module, the power amplifier can work in a nonlinear region.
The power amplifier may be an analog power amplifier or a digital power amplifier.
And S503, the signal recovery signal circuit recovers the output signal of the power amplifier to obtain the output signal of the signal recovery signal circuit.
The output signal of the signal recovery circuit comprises a digital signal.
S504, the band-limited DPD coefficient extraction circuit determines a DPD coefficient according to the output signal of the signal recovery signal circuit and a first input signal, and inputs the output signal including the DPD coefficient to the digital pre-distortion DPD module, wherein the first input signal includes the input signal of the digital pre-distortion DPD module or the output signal of the digital pre-distortion DPD module.
After receiving the DPD coefficient, the DPD module corrects the input signal according to the DPD coefficient to obtain a corrected signal, wherein the nonlinear distortion of the corrected signal is lower than that of the output signal amplified by the power amplifier.
In one possible embodiment, the signal recovery circuit includes a multiplier, a spread spectrum signal generator, a pre-band limiting filter, and a signal recoverer, and when the signal recovery signal circuit recovers the output signal of the power amplifier to obtain the output signal of the signal recovery signal circuit, the following method may be specifically adopted:
a1, multiplying the output signal of the power amplifier and the output signal of the spread spectrum signal generator by the multiplier to obtain the output signal of the multiplier;
the output signal of the multiplier obtained by multiplying the output signal of the power amplifier by the output signal of the spread signal generator may be mixed with the output signal of the power amplifier. The output signal of the multiplier is a broadband signal.
A2, filtering the output signal of the multiplier by a pre-band-limiting filter to obtain a narrow-band signal;
the bandwidth of the narrowband signal may be set according to a performance requirement when the DPD coefficient is extracted, for example, when the performance requirement is accuracy, the accuracy may also be understood as accuracy, and the greater the preset bandwidth is, the higher the accuracy is, and the smaller the preset bandwidth is, the lower the accuracy is.
And A3, the signal restorer restores according to the narrow-band signal to obtain a restored signal, and the restored signal is input to the band-limited DPD coefficient extraction circuit.
The signal restorer can carry out signal restoration according to the input signal through a signal restoration algorithm or a spectrum extrapolation algorithm in a compressed sensing algorithm, and obtain a restored signal.
In one possible embodiment, the circuit further comprises an analog-to-digital converter that analog-to-digital converts the narrowband signal to obtain a digital signal, and inputs the digital signal to the signal recoverer.
In one possible embodiment, the band-limited DPD coefficient extracting circuit includes an adder and a band-limited DPD coefficient extractor, and when the first input signal is an output signal of the digital predistortion DPD module, the method for determining the DPD coefficient may be:
b1, the adder carries out addition operation according to the output signal of the Digital Predistortion (DPD) module and the first output signal of the band-limited DPD coefficient extractor to obtain the output signal of the adder;
b2, band-limited DPD coefficient extractor determines DPD coefficients according to the output signal of the adder and the output signal of the signal restorer.
When the band-limited DPD coefficient extractor determines the DPD coefficient, the DPD coefficient may be determined by an algorithm according to a preset non-linear model. For example, the power amplifier is modeled by a polynomial, and the mathematical model is as follows:
wherein，akmIs a DPD coefficient (also referred to as a non-linearity parameter), K is a non-linearity, K is an order of the non-linearity on which the power amplifier is modeled, M is a memory depth value, and M is a maximum value of the memory depth of the power amplifier model.
In one possible embodiment, the band-limited DPD coefficient extracting circuit includes an adder and a band-limited DPD coefficient extractor, the first input signal is an input signal of a digital predistortion DPD module, and the method of determining the DPD coefficient includes:
c1, the adder carries out addition operation according to the input signal of the Digital Predistortion (DPD) module and the first output signal of the band-limited DPD coefficient extractor to obtain an output signal of the adder;
c2, the band-limited DPD coefficient extractor determines DPD coefficients according to the output signal of the adder.
When determining the DPD coefficient according to the output signal of the adder, a value corresponding to minimization of an error value between input signals of the first output signal digital predistortion DPD module of the band-limited DPD coefficient extractor may be specifically used. The error minimization may be determined according to different requirements, which may correspond to different error minimization values.
In one possible embodiment, the analog-to-digital converter comprises a low-speed analog-to-digital converter.
In one possible embodiment, the pre-band limiting filter comprises a low pass filter, a high pass filter or a band pass filter.
In one possible embodiment, the digital predistortion circuit further comprises a coupler through which the output signal of the power amplifier is input to the signal recovery circuit.
In one possible embodiment, the circuit further comprises a digital-to-analog converter, and the output signal of the digital pre-distortion DPD module is input to the power amplifier through the digital-to-analog converter.
The specific circuit structure of the digital predistortion circuit in the above method is as shown in any one of the embodiments in fig. 1 to fig. 4B in the foregoing embodiments, and is not described herein again.
Referring to fig. 6, fig. 6 is a schematic structural diagram of a chip system provided in the present application according to an embodiment of the present application. As shown in fig. 6, the chip system 600 may include: a processor 610, and one or more interfaces 620 coupled to the processor 610. The following are exemplary:
the processor 610 may be configured to read and execute computer readable instructions. In particular implementations, processor 610 may include primarily a controller, an operator, and registers. Illustratively, the controller is mainly responsible for instruction decoding and sending out control signals for operations corresponding to the instructions. The arithmetic unit is mainly responsible for executing fixed-point or floating-point arithmetic operation, shift operation, logic operation and the like, and can also execute address operation and conversion. The register is mainly responsible for storing register operands, intermediate operation results and the like temporarily stored in the instruction execution process. In a specific implementation, the hardware architecture of the processor 610 may be an Application Specific Integrated Circuit (ASIC) architecture, a microprocessor without interlocked pipeline stage architecture (MIPS) architecture, an advanced reduced instruction set machine (ARM) architecture, or an NP architecture. The processors 610 may be single core or multicore.
Illustratively, the interface 620 may be used to input data to be processed to the processor 610 and may output a processing result of the processor 610 to the outside. In a specific implementation, the interface 620 may be a General Purpose Input Output (GPIO) interface. The interface 620 is coupled to the processor 610 by a bus 630.
In a possible implementation manner, the processor 610 may be configured to call, from the memory, an implementation program or data of the digital predistortion coefficient acquisition method provided in one or more embodiments of the present application in the digital predistortion circuit, so that the chip may implement the method shown in fig. 6. The memory may be integrated with the processor 610 or coupled to the communication chip 600 via the interface 620, i.e. the memory may be a part of the communication chip 600 or may be independent of the communication chip 600. The interface 620 may be used to output the results of the execution by the processor 610. In this application, the interface 620 may be specifically configured to output the decoding result of the processor 610. For the digital predistortion coefficient obtaining method provided in one or more embodiments of the present application, reference may be made to the foregoing embodiments, and details are not repeated here.
It should be noted that the functions corresponding to the processor 610 and the interface 620 may be implemented by hardware design, software design, or a combination of hardware and software, which is not limited herein.
It will also be appreciated that the memory referred to in the embodiments of the application may be either volatile memory or nonvolatile memory, or may include both volatile and nonvolatile memory. The non-volatile Memory may be a Read-Only Memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an Electrically Erasable PROM (EEPROM), or a flash Memory. Volatile Memory can be Random Access Memory (RAM), which acts as external cache Memory. By way of example, but not limitation, many forms of RAM are available, such as Static random access memory (Static RAM, SRAM), Dynamic Random Access Memory (DRAM), Synchronous Dynamic random access memory (Synchronous DRAM, SDRAM), Double Data Rate Synchronous Dynamic random access memory (DDR SDRAM), Enhanced Synchronous SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), and Direct Rambus RAM (DR RAM).
It should be noted that when the processor is a general-purpose processor, a DSP, an ASIC, an FPGA or other programmable logic device, a transistor logic device, or a discrete hardware component, the memory (storage module) is integrated in the processor.
Embodiments of the present application further provide a transmitter, where the transmitter includes an antenna and a digital predistortion circuit as shown in any one of the embodiments of fig. 1 to 4B.
The present application further provides a computer storage medium, where the computer storage medium may store a program, and the program includes some or all of the steps of any one of the digital predistortion coefficient acquisition methods described in the above method embodiments when executed.
It should be noted that, for simplicity of description, the above-mentioned method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present application is not limited by the order of acts described, as some steps may occur in other orders or concurrently depending on the application. Further, those skilled in the art should also appreciate that the embodiments described in the specification are preferred embodiments and that the acts and modules referred to are not necessarily required in this application.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the above-described embodiments of the apparatus are merely illustrative, and for example, a division of a unit is merely a logical division, and an actual implementation may have another division, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of some interfaces, devices or units, and may be an electric or other form.
Units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable memory. Based on such understanding, the technical solution of the present application may be substantially implemented or a part of or all or part of the technical solution contributing to the prior art may be embodied in the form of a software product stored in a memory, and including several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method of the embodiments of the present application. And the aforementioned memory comprises: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.
Those skilled in the art will appreciate that all or part of the steps in the various methods of the above embodiments may be performed by associated hardware as instructed by a program, which may be stored in a computer-readable memory, which may include: flash Memory disks, Read-Only memories (ROMs), Random Access Memories (RAMs), magnetic or optical disks, and the like.
The foregoing detailed description of the embodiments of the present application has been presented to illustrate the principles and implementations of the present application, and the above description of the embodiments is only provided to help understand the method and the core concept of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in view of the above, the content of the present specification should not be construed as a limitation to the present application.
Claims (17)
1. A digital predistortion circuit, characterized in that the circuit comprises: a digital pre-distortion DPD module, a power amplifier, a signal recovery circuit and a band-limited DPD coefficient extraction circuit, wherein,
the output signal of the digital pre-distortion DPD module is input to the power amplifier, the output signal of the power amplifier is input to the signal recovery circuit, the output signal of the signal recovery circuit is input to the band-limited DPD coefficient extraction circuit, and the output signal of the band-limited DPD coefficient extraction circuit is input to the digital pre-distortion DPD module;
the band-limited DPD coefficient extracting circuit is configured to determine a DPD coefficient according to an output signal of the signal restoring circuit and a first input signal, where the first input signal includes an input signal of the digital pre-distortion DPD module or an output signal of the digital pre-distortion DPD module.
2. The digital predistortion circuit of claim 1, wherein the signal recovery circuit comprises a multiplier, a spread spectrum signal generator, a pre-band limiting filter and a signal recoverer, wherein,
the input signal of the multiplier comprises the output signal of the power amplifier and the output signal of the spread spectrum signal generator, the output signal of the multiplier is input to the pre-band limiting filter, the output signal of the pre-band limiting filter is input to the signal restorer, and the output signal of the signal restorer is input to the band-limited DPD coefficient extraction circuit.
3. The digital predistortion circuit of claim 2, further comprising an analog-to-digital converter through which the output signal of the pre-band limiting filter is input to the signal recoverer.
4. The digital predistortion circuit of claim 2 or 3, wherein the band-limited DPD coefficient extraction circuit comprises an adder and a band-limited DPD coefficient extractor, wherein,
the input signal of the adder includes the output signal of the digital predistortion DPD module and the first output signal of the band-limited DPD coefficient extractor, the output signal of the adder is input to the band-limited DPD coefficient extractor, the second output signal of the band-limited DPD coefficient extractor is input to the digital predistortion DPD module, and the output signal of the signal restorer is input to the band-limited DPD coefficient extractor;
and the band-limited DPD coefficient extractor is used for determining the DPD coefficient according to the output signal of the adder and the output signal of the signal restorer.
5. The digital predistortion circuit of claim 2 or 3, wherein the band-limited DPD coefficient extraction circuit comprises an adder and a band-limited DPD coefficient extractor, wherein,
the input signal of the adder comprises the input signal of the digital predistortion DPD module and the output signal of the signal restorer, the output signal of the adder is input to the band-limited DPD coefficient extractor, and the output signal of the band-limited DPD coefficient extractor is input to the digital predistortion DPD module;
and the band-limited DPD coefficient extractor is used for determining the DPD coefficient according to the output signal of the adder.
6. The digital predistortion circuit of any of claims 3 to 5, wherein the analog to digital converter comprises a low speed analog to digital converter.
7. The digital predistortion circuit of any of claims 2 to 6, wherein the pre-band limiting filter comprises a low pass filter, a high pass filter or a band pass filter.
8. The digital predistortion circuit according to any one of claims 1 to 7, wherein the circuit further comprises a coupler through which the output signal of the power amplifier is input to the signal recovery circuit.
9. The digital predistortion circuit according to any of claims 1 to 8, characterized in that the circuit further comprises a digital-to-analog converter, through which the output signal of the digital predistortion DPD module is input to the power amplifier.
10. A method for obtaining digital predistortion coefficients is applied to a digital predistortion circuit, the circuit comprises a digital predistortion DPD module, a power amplifier, a signal recovery circuit and a band-limited DPD coefficient extraction circuit, and the method comprises the following steps:
the digital pre-distortion DPD module performs nonlinear correction on an input signal to obtain an output signal of the digital pre-distortion DPD module;
the power amplifier amplifies an output signal of the digital pre-distortion DPD module to obtain an output signal of the power amplifier;
the signal recovery signal circuit recovers the output signal of the power amplifier to obtain the output signal of the signal recovery signal circuit;
the band-limited DPD coefficient extracting circuit determines a DPD coefficient according to an output signal of the signal restoring signal circuit and a first input signal, and inputs the output signal including the DPD coefficient to the digital pre-distortion DPD module, where the first input signal includes an input signal of the digital pre-distortion DPD module or an output signal of the digital pre-distortion DPD module.
11. The method of claim 10, wherein the signal recovery circuit comprises a multiplier, a spread spectrum signal generator, a pre-band limiting filter, and a signal recoverer, and wherein the recovering the output signal of the power amplifier by the signal recovery circuit to obtain the output signal of the signal recovery circuit comprises:
the multiplier multiplies the output signal of the power amplifier and the output signal of the spread spectrum signal generator to obtain an output signal of the multiplier;
the pre-band limiting filter filters an output signal of the multiplier to obtain a narrow-band signal;
and the signal restorer restores according to the narrow-band signal to obtain a restored signal, and inputs the restored signal to the band-limited DPD coefficient extraction circuit.
12. The method of claim 11, wherein the circuit further comprises an analog-to-digital converter that analog-to-digital converts the narrowband signal to obtain a digital signal, and inputs the digital signal to the signal restorer.
13. The method of claim 11 or 12, wherein the band-limited DPD coefficient extracting circuit includes an adder and a band-limited DPD coefficient extractor, the first input signal is an output signal of the digital pre-distortion DPD module, and the band-limited DPD coefficient extracting circuit determines the DPD coefficient according to the output signal of the signal restoring signal circuit and the first input signal includes:
the adder carries out addition operation according to the output signal of the Digital Predistortion (DPD) module and the first output signal of the band-limited DPD coefficient extractor so as to obtain an output signal of the adder;
and the band-limited DPD coefficient extractor determines the DPD coefficient according to the output signal of the adder and the output signal of the signal restorer.
14. The method of claim 11 or 12, wherein the band-limited DPD coefficient extracting circuit includes an adder and a band-limited DPD coefficient extractor, the first input signal is an input signal of the digital pre-distortion DPD module, and the band-limited DPD coefficient extracting circuit determines the DPD coefficient according to the output signal of the signal restoring signal circuit and the first input signal, including:
the adder carries out addition operation according to the input signal of the Digital Predistortion (DPD) module and the first output signal of the band-limited DPD coefficient extractor so as to obtain an output signal of the adder;
and the band-limited DPD coefficient extractor determines the DPD coefficient according to the output signal of the adder.
15. A transmitter, characterized in that the transmitter comprises an antenna and a digital predistortion circuit as claimed in any of claims 1 to 9.
16. A chip system, characterized in that the chip system comprises a processor for supporting a digital predistortion circuit for implementing the method according to any of the claims 10 to 14.
17. A computer-readable storage medium, characterized in that the computer-readable storage medium stores a computer program comprising program instructions that, when executed by a processor, cause the processor to carry out the method according to any one of claims 10 to 14.
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| CN202010115969.9A CN113300679B (en) | 2020-02-24 | 2020-02-24 | Digital predistortion circuit, digital predistortion coefficient acquisition method and related device |
| PCT/CN2021/077667 WO2021169997A1 (en) | 2020-02-24 | 2021-02-24 | Digital pre-distortion circuit, digital pre-distortion coefficient acquisition method and related device |
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