CN115766356B - Predistorter coefficient configuration method, predistorter coefficient configuration device, predistorter coefficient configuration equipment and predistorter coefficient configuration medium - Google Patents
Predistorter coefficient configuration method, predistorter coefficient configuration device, predistorter coefficient configuration equipment and predistorter coefficient configuration medium Download PDFInfo
- Publication number
- CN115766356B CN115766356B CN202211417652.6A CN202211417652A CN115766356B CN 115766356 B CN115766356 B CN 115766356B CN 202211417652 A CN202211417652 A CN 202211417652A CN 115766356 B CN115766356 B CN 115766356B
- Authority
- CN
- China
- Prior art keywords
- predistorter
- time window
- coefficient
- condition
- baseband signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 70
- 238000004891 communication Methods 0.000 claims description 19
- 230000015654 memory Effects 0.000 claims description 19
- 230000003139 buffering effect Effects 0.000 claims description 16
- 238000012544 monitoring process Methods 0.000 claims description 15
- 238000004590 computer program Methods 0.000 claims description 11
- 238000006243 chemical reaction Methods 0.000 claims description 9
- 238000001514 detection method Methods 0.000 claims description 3
- 230000008569 process Effects 0.000 description 24
- 238000010586 diagram Methods 0.000 description 9
- 238000004364 calculation method Methods 0.000 description 6
- 230000006870 function Effects 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000000977 initiatory effect Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 238000013515 script Methods 0.000 description 2
- 238000001228 spectrum Methods 0.000 description 2
- 238000004422 calculation algorithm Methods 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 230000001131 transforming effect Effects 0.000 description 1
- 238000010200 validation analysis Methods 0.000 description 1
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Landscapes
- Amplifiers (AREA)
Abstract
The application discloses a predistorter coefficient configuration method, device, equipment and medium, and relates to the technical field of predistorter coefficient configuration. The method comprises the following steps: under the condition that the completion of the pre-distorter coefficient caching is detected, carrying out back-off time window searching on the baseband signal to obtain a target indication signal; the predistorter coefficients are used for configuring a target predistorter; the target indication signal is a signal corresponding to a time window meeting a power condition and a time condition; the power condition comprises the condition that the peak power of the baseband signal in the time window is smaller than a preset power threshold; switching a DPD bypass mode and a DPD channel mode of the baseband signal based on the target indication signal of the time window; and carrying out coefficient configuration on the target predistorter based on the cached predistorter coefficient. Thus, the adaptability to the predistorter coefficient configuration can be greatly improved, and the application range of the predistorter coefficient configuration is further expanded.
Description
Technical Field
The present application relates to the technical field of predistorter coefficient configuration, and in particular, to a predistorter coefficient configuration method, device, equipment and medium.
Background
The digital predistortion technology (DPD) is the most commonly used technology in signal linearization of the wireless system at present, and the linearization performance, implementation complexity and resource consumption of the DPD can reach a better balance, and the DPD is often adopted in wireless communication products, and the predistorter coefficient needs to be updated and adapted in time according to the working environment and state change of the product so as to reach the real-time optimal linearization performance.
In the prior art, a predistorter generally adopts a lookup table to realize predistortion calculation, and coefficient updating is realized by rewriting data in the lookup table. In the prior art, the predistorter coefficient configuration has poor adaptability, so that the range of the predistorter coefficient configuration is affected.
Disclosure of Invention
The application mainly aims to provide a predistorter coefficient configuration method, device, equipment and medium, and aims to solve the technical problem that the predistorter coefficient configuration adaptability is poor in the prior art, so that the predistorter coefficient configuration range is affected.
To achieve the above object, a first aspect of the present application provides a predistorter coefficient configuration method, which includes:
Under the condition that the completion of the pre-distorter coefficient caching is detected, carrying out back-off time window searching on the baseband signal to obtain a target indication signal; the predistorter coefficients are used for configuring a target predistorter; the target indication signal is a signal corresponding to a time window meeting a power condition and a time condition; the power condition comprises the condition that the peak power of the baseband signal in the time window is smaller than a preset power threshold; the time condition comprises the condition that the duration of the time window under the condition of meeting the power is longer than the preset time of the predistorter coefficient configuration;
switching a DPD bypass mode and a DPD channel mode of the baseband signal based on the target indication signal of the time window;
and carrying out coefficient configuration on the target predistorter based on the cached predistorter coefficient.
Optionally, before the step of searching the back-off time window for the baseband signal to obtain the target indication signal when the completion of the predistorter coefficient buffering is detected, the method further includes:
acquiring a plurality of predistorter coefficients of a target predistorter;
Transmitting the predistorter coefficients to a buffer module; the buffer module is used for buffering the predistorter coefficients, and if the predistorter coefficients are buffered in the buffer module, the buffer module displays setting state information; if the predistorter coefficient does not exist in the buffer module, the buffer module displays reset state information;
And under the condition that the completion of the predistorter coefficient buffering is detected, performing back-off time window searching on the baseband signal to obtain a target indication signal, wherein the method comprises the following steps:
And under the condition that the setting state information of the buffer module is detected, carrying out back-off time window search on the baseband signal to obtain a target indication signal.
Optionally, the switching between the DPD bypass mode and the DPD path mode of the baseband signal based on the target indication signal of the time window includes:
and when the target indication signal of the time window is in a high level state, switching the baseband signal into a DPD bypass mode.
Optionally, the performing coefficient configuration on the target predistorter based on the cached predistorter coefficient includes:
when the baseband signal is in a DPD bypass mode, carrying out coefficient configuration on the target predistorter;
After the step of performing coefficient configuration on the target predistorter based on the cached predistorter coefficient, the method further comprises:
And after completing the coefficient configuration of the target predistorter, switching the baseband signal into a DPD (digital pre-distortion) path mode.
Optionally, the performing a back-off time window search on the baseband signal to obtain the target indication signal when the completion of the predistorter coefficient buffering is detected includes:
if the peak power of the baseband signal in any time window is smaller than a preset power threshold, the duration of the time window meets preset back-off condition information; the baseband signal comprises a baseband signal at a digital up-conversion inlet; the duration of the time window meeting the preset rollback condition information is smaller than the processing delay from the digital up-conversion entrance to the predistorter entrance;
And under the condition that the length of the time window meets the preset rollback condition information, if the length of the time window is longer than the preset time configured by the predistorter coefficient, acquiring a target indication signal.
Optionally, the performing a back-off time window search on the baseband signal to obtain the target indication signal when the completion of the predistorter coefficient buffering is detected includes:
Calculating the envelope amplitude of the baseband signal in any time window;
Comparing the envelope amplitude of the baseband signal with a preset power threshold to output a comparison result; the comparison result is a result that the peak power of the baseband signal in any time window is smaller than a preset power threshold;
And detecting the comparison result in real time to obtain a target indication signal when the duration of a time window corresponding to the comparison result is longer than the preset time of the coefficient configuration.
In a second aspect, the present application provides a predistorter coefficient configuration apparatus, comprising:
The detection module is used for searching a back-off time window for the baseband signal under the condition that the completion of the caching of the predistorter coefficient is detected, so as to obtain a target indication signal; the predistorter coefficients are used for configuring a target predistorter; the target indication signal is a signal corresponding to a time window meeting a power condition and a time condition; the power condition comprises the condition that the peak power of the baseband signal in the time window is smaller than a preset power threshold; the time condition comprises the condition that the duration of the time window under the condition of meeting the power is longer than the preset time of the predistorter coefficient configuration;
a switching module, configured to switch a DPD bypass mode and a DPD path mode of the baseband signal based on a target indication signal of the time window;
And the configuration module is used for carrying out coefficient configuration on the target predistorter based on the cached predistorter coefficient.
Optionally, the apparatus further comprises:
The acquisition module is used for acquiring a plurality of predistorter coefficients of the target predistorter calculated by the embedded processor;
the caching module is used for caching the predistorter coefficients in the acquisition module;
The state monitoring module is used for detecting whether the predistorter coefficient exists in the buffer module; if the predistorter coefficient exists in the cache module, the state monitoring module displays a setting state; if the predistorter coefficient does not exist in the buffer module, the state monitoring module displays a reset state;
And the delay module is used for carrying out delay processing on the baseband signal so as to align the signal passing through the delay module with the signal passing through the target predistorter.
In a third aspect, the present application provides a communication device comprising a memory in which a computer program is stored and a processor executing the computer program to implement the method described in the embodiments.
In a fourth aspect, the present application provides a computer readable storage medium having a computer program stored thereon, the computer program being executed by a processor to implement the method described in the embodiments.
Through the technical scheme, the application has at least the following beneficial effects:
the application provides a predistorter coefficient configuration method, a predistorter coefficient configuration device, predistorter coefficient configuration equipment and a predistorter coefficient configuration medium, wherein the predistorter coefficient configuration method comprises the following steps: under the condition that the completion of the pre-distorter coefficient caching is detected, carrying out back-off time window searching on the baseband signal to obtain a target indication signal; the predistorter coefficients are used for configuring a target predistorter; the target indication signal is a signal corresponding to a time window meeting a power condition and a time condition; the power condition comprises the condition that the peak power of the baseband signal in the time window is smaller than a preset power threshold; the time condition comprises the condition that the duration of the time window under the condition of meeting the power is longer than the preset time of the predistorter coefficient configuration; switching a DPD bypass mode and a DPD channel mode of the baseband signal based on the target indication signal of the time window; and carrying out coefficient configuration on the target predistorter based on the cached predistorter coefficient.
Firstly detecting whether the predistorter coefficient of a target predistorter is cached when the predistorter coefficient needs to be configured, and searching a back-off time window for a baseband signal if the predistorter coefficient of the target predistorter is cached; in the process of searching the back-off time window, if the peak power of the baseband signal in a certain time window is smaller than the preset power threshold in advance and the duration of the time window is longer than the preset time configured by the predistorter coefficient, that is, if the time window simultaneously meets the power condition and the time condition, the fact that the time window meeting the back-off of the baseband signal is searched is indicated, and the target indication signal corresponding to the time window meeting the condition is obtained; and switching a DPD bypass mode and a DPD channel mode of the baseband signal according to the target indication signal corresponding to the time window, reading the cached predistorter coefficient, and carrying out coefficient configuration on the target predistorter.
Namely, according to the application, under the target indication signal of the time window meeting the conditions, the DPD bypass mode and the DPD channel mode are switched on the baseband signal, the time window simultaneously meets the condition that the peak power of the corresponding baseband signal is smaller than the preset power threshold, and the duration of the time window is longer than the preset time of the predistorter coefficient configuration. Therefore, the DPD bypass mode and the DPD access mode are both suitable for coefficient configuration of the predistorter, when coefficient configuration is carried out on the target predistorter, the baseband signal does not need to be closed, the GP time slot is not occupied, and the lossless predistorter coefficient switching of the signal is completed under the conditions of not consuming twice of the predistorter resource, so that the adaptability to the coefficient configuration of the predistorter is greatly improved, and the application range of the coefficient configuration of the predistorter is further expanded.
Drawings
FIG. 1 is a schematic diagram of a communication device in a hardware operating environment according to an embodiment of the present application;
Fig. 2 is a flowchart of a predistorter coefficient configuration method according to an embodiment of the present application;
fig. 3 is a time flowchart of a predistorter coefficient configuration process provided in the present embodiment;
FIG. 4 is a flowchart of a method for implementing the step S10 according to the present embodiment;
FIG. 5 is a flowchart of another implementation method of step S10 provided in the present embodiment;
fig. 6 is a schematic diagram of a predistorter coefficient configuration device according to an embodiment of the present application;
FIG. 7 is a schematic diagram of another predistorter coefficient configuration apparatus according to an embodiment of the present application;
fig. 8 is a schematic diagram of a signal back-off search module according to an embodiment of the present application;
FIG. 9 is a schematic diagram of a coefficient configuration control module according to an embodiment of the present application;
FIG. 10 is a schematic diagram of a predistorter coefficient buffer module according to an embodiment of the present application;
fig. 11 is a schematic diagram of a signal flow switching module according to an embodiment of the present application.
The achievement of the objects, functional features and advantages of the present application will be further described with reference to the accompanying drawings, in conjunction with the embodiments.
Detailed Description
It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
Digital Predistortion (DPD) is currently the most commonly used technique for linearizing wireless signals, and has a better balance of linearization performance, implementation complexity and resource consumption, and is often used in wireless communication products. The predistorter coefficient needs to be updated and adapted in time according to the working environment and state change of the product so as to achieve real-time optimal linearization performance, the predistorter generally adopts a lookup table to achieve predistortion calculation, coefficient updating is achieved by rewriting data in the lookup table, and in the process of rewriting the coefficients in the lookup table, it is required to ensure that downlink signal indexes are not deteriorated. Currently, the update methods commonly used in the industry are mainly two types: firstly, occupying GP time slot or uplink time slot to update coefficients; and secondly, realizing coefficient updating by adopting ping-pong operation. Since no downlink signal is sent in the GP time slot and the uplink time slot, the time slot can be occupied to complete the coefficient update, but the method is only specific to the TDD system, and for the FDD system, since the downlink direction is a common state, the method cannot be adopted. Implementing coefficient updates with ping-pong operation is applicable to both TDD and FDD systems, but has the disadvantage of requiring twice the consumption of predistorter resources to implement a "ping-pong" handoff, which is not acceptable for predistorter applications of some complex algorithms. In summary, the present configuration of predistorter coefficients is poorly adapted, thereby affecting the range of predistorter coefficient configurations.
In order to solve the technical problems, the application provides a predistorter coefficient configuration method, a predistorter coefficient configuration device, predistorter coefficient configuration equipment and a predistorter coefficient configuration medium.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a communication device in a hardware running environment according to an embodiment of the present application.
As shown in fig. 1, the communication device may include: a processor 1001, such as a central processing unit (Central Processing Unit, CPU), a communication bus 1002, a user interface 1003, a network interface 1004, a memory 1005. Wherein the communication bus 1002 is used to enable connected communication between these components. The user interface 1003 may include a Display, an input unit such as a Keyboard (Keyboard), and the optional user interface 1003 may further include a standard wired interface, a wireless interface. The network interface 1004 may optionally include a standard wired interface, a wireless interface (e.g., a wireless FIdelity (WI-FI) interface). The Memory 1005 may be a high-speed random access Memory (Random Access Memory, RAM) Memory or a stable Non-Volatile Memory (NVM), such as a disk Memory. The memory 1005 may also optionally be a storage device separate from the processor 1001 described above.
Those skilled in the art will appreciate that the structure shown in fig. 1 is not limiting of the communication device and may include more or fewer components than shown, or may combine certain components, or a different arrangement of components.
As shown in fig. 1, an operating system, a data storage module, a network communication module, a user interface module, and an electronic program may be included in the memory 1005 as one type of storage medium.
In the communication device shown in fig. 1, the network interface 1004 is mainly used for data communication with a network server; the user interface 1003 is mainly used for data interaction with a user; the processor 1001 and the memory 1005 in the communication apparatus of the present application may be provided in the communication apparatus, and the communication apparatus invokes the predistorter coefficient configuration means stored in the memory 1005 through the processor 1001 and executes the predistorter coefficient configuration method provided by the embodiment of the present application.
Referring to fig. 2-3, based on the hardware environment of the foregoing embodiment, an embodiment of the present application provides a predistorter coefficient configuration method, which includes:
S10: under the condition that the completion of the pre-distorter coefficient caching is detected, carrying out back-off time window searching on the baseband signal to obtain a target indication signal; the predistorter coefficients are used for configuring a target predistorter; the target indication signal is a signal corresponding to a time window meeting a power condition and a time condition; the power condition comprises the condition that the peak power of the baseband signal in the time window is smaller than a preset power threshold; the time condition includes a condition that a duration of the time window under a power condition is greater than a preset time of predistorter coefficient configuration.
In the implementation process, the baseband signal refers to an original electric signal which is sent by an information source (also called a sending terminal) and is not modulated (frequency spectrum shifting and transforming), and is characterized by lower frequency, and the signal spectrum starts from the vicinity of zero frequency and has a low-pass form. The baseband signal may be divided into a digital baseband signal and an analog baseband signal (and accordingly, the source is also divided into a digital source and an analog source) according to the characteristics of the original electrical signal. In short, the baseband signal is a signal that directly expresses information to be transmitted, for example, sound waves that we speak of are baseband signals. The back-off time window search refers to searching for a time window of the back-off baseband signal in order to find a time window satisfying corresponding conditions (i.e., power condition and time condition). The preset power threshold is a digital domain power threshold which is calculated according to actual products and mainly comprises downlink gain, power amplifier P1 index and the like and meets the power amplifier back-off state. The preset time refers to the time required for predistorter coefficient configuration of the target predistorter, which refers to the predistorter required for predistorter coefficient configuration. When the coefficient configuration is needed to be carried out on the target predistorter, firstly detecting whether the predistorter coefficient of the target predistorter is cached, and if so, carrying out back-off time window search on the baseband signal; in the process of searching the back-off time window, if the peak power of the baseband signal in a certain time window is smaller than the power threshold preset in advance and the duration of the time window is longer than the preset time of the predistorter coefficient configuration, that is, the time window meets the power condition and the time condition at the same time, the fact that the time window meeting the back-off of the baseband signal is searched is indicated, and the target indication signal corresponding to the time window meeting the condition is obtained.
S11: and switching a DPD bypass mode and a DPD channel mode of the baseband signal based on the target indication signal of the time window.
In the implementation process, according to step S10, an indication signal corresponding to a time window satisfying the power condition and the time condition is found, the time window indication signal outputted by the search result is characterized as a gating signal, the signal is in a high level state to indicate that the time window is valid, and the signal is in a low level state to indicate that the time window is invalid. Specifically, when the indication signal of the time window is in a high level state, the baseband signal is switched to a DPD bypass mode, and when the baseband signal is in the DPD bypass mode, the target predistorter is subjected to coefficient configuration, that is, the indication signal is switched to the DPD bypass mode in the time period of coefficient configuration of the predistorter, and after the coefficient configuration of the target predistorter is completed, the baseband signal is switched to a DPD channel mode.
S12: and carrying out coefficient configuration on the target predistorter based on the cached predistorter coefficient.
In the specific implementation process, when the coefficient configuration is carried out on the target predistorter, the baseband signal is switched to a DPD bypass mode, the predistorter coefficient which is cached in advance is read, and the coefficient configuration is carried out on the target predistorter by the predistorter coefficient which is cached in advance.
In summary, when coefficient configuration is required to be performed on the predistorter, firstly detecting whether the predistorter coefficient of the target predistorter is cached, and if so, performing back-off time window search on the baseband signal; in the process of searching the back-off time window, if the peak power of the baseband signal in a certain time window is smaller than the preset power threshold in advance and the duration of the time window is longer than the preset time configured by the predistorter coefficient, that is, if the time window simultaneously meets the power condition and the time condition, the fact that the time window meeting the back-off of the baseband signal is searched is indicated, and the target indication signal corresponding to the time window meeting the condition is obtained; and switching a DPD bypass mode and a DPD channel mode of the baseband signal according to the target indication signal corresponding to the time window, reading the cached predistorter coefficient, and carrying out coefficient configuration on the target predistorter. Namely, according to the application, under the target indication signal of the time window meeting the conditions, the DPD bypass mode and the DPD channel mode are switched on the baseband signal, the time window simultaneously meets the condition that the peak power of the corresponding baseband signal is smaller than the preset power threshold, and the duration of the time window is longer than the preset time of the predistorter coefficient configuration. Therefore, the DPD bypass mode and the DPD access mode are both suitable for coefficient configuration of the predistorter, when coefficient configuration is carried out on the target predistorter, the baseband signal does not need to be closed, the GP time slot is not occupied, and the lossless predistorter coefficient switching of the signal is completed under the conditions of not consuming twice of the predistorter resource, so that the adaptability to the coefficient configuration of the predistorter is greatly improved, and the application range of the coefficient configuration of the predistorter is further expanded.
In order to more efficiently and conveniently detect that the predistorter coefficient is cached, in some embodiments, before the step of searching the baseband signal for a back-off time window to obtain the target indication signal, the method further includes:
Acquiring a plurality of predistorter coefficients of a target predistorter; transmitting the predistorter coefficients to a buffer module; the buffer module is used for buffering the predistorter coefficients, and if the predistorter coefficients are buffered in the buffer module, the buffer module displays setting state information; if the predistorter coefficient does not exist in the buffer module, the buffer module displays reset state information;
The step of searching the back-off time window for the baseband signal to obtain the target indication signal under the condition that the completion of the predistorter coefficient buffering is detected comprises the following steps: and under the condition that the setting state information of the buffer module is detected, carrying out back-off time window search on the baseband signal to obtain a target indication signal.
In this embodiment, before the target predistorter is configured, a plurality of predistorter coefficients of the target predistorter are obtained first, and the predistorter coefficients are transmitted to a buffer module for buffering. After the predistorter coefficient is cached, the caching module displays setting state information, and when the predistorter coefficient does not exist in the caching module, the caching module displays resetting state information. Therefore, when the state of the buffer module is detected to be in a set state, the fact that the coefficient of the predistorter is buffered is indicated, and the baseband signal can be searched for a rollback time window, so that the efficiency of detecting whether the predistorter is buffered is greatly improved, the efficiency of obtaining a target indicating signal is improved, and the coefficient configuration efficiency of the target predistorter is improved.
In order to more efficiently and conveniently search the target indication information, in another embodiment, as shown in fig. 4, the step of searching the back-off time window for the baseband signal to obtain the target indication signal in the case that the completion of the predistorter coefficient buffering is detected includes:
s20: if the peak power of the baseband signal in any time window is smaller than a preset power threshold, the duration of the time window meets preset back-off condition information; the baseband signal comprises a baseband signal at a digital up-conversion inlet; the duration of the time window satisfying the preset rollback condition information is less than the processing delay from the digital up-conversion entrance to the predistorter entrance.
In the implementation process, when the target indication signal is searched, a time window meeting the withdrawal condition (namely preset withdrawal condition information) is searched first, and the time length of the time window meeting the withdrawal condition is smaller than the processing delay from the digital up-conversion entrance to the predistorter entrance, so that the time window meeting the withdrawal condition is easier to obtain because the processing delay from the digital up-conversion entrance to the predistorter entrance is easier to obtain, and the target indication information is more beneficial to searching.
S21: and under the condition that the length of the time window meets the preset rollback condition information, if the length of the time window is longer than the preset time configured by the predistorter coefficient, acquiring a target indication signal.
In the implementation process, after a time window meeting the rollback condition is searched, if the duration of the time window meeting the rollback condition is longer than the preset time configured by the predistorter coefficient, the indication signal corresponding to the time window is the target indication signal to be searched. In this embodiment, since the back-off condition is set in advance, the time window satisfying the back-off condition can be more easily and efficiently searched, so that the target indication signal corresponding to the time window satisfying the preset time can be more efficiently searched.
In order to more efficiently and conveniently search the target indication information, in another embodiment, as shown in fig. 5, the step of searching the back-off time window for the baseband signal to obtain the target indication signal when the completion of the predistorter coefficient buffering is detected includes:
S30: an envelope magnitude of the baseband signal within any one of the time windows is calculated.
In a specific implementation process, the calculation of the envelope amplitude of the baseband signal can be completed by the following formula: y (n) =sqrt (I 2(n)+q2 (n)), where I (n) and Q (n) are respectively the I/Q paths of the baseband signal, n is a time index, and y (n) is the envelope amplitude of the baseband signal.
S31: comparing the envelope amplitude of the baseband signal with a preset power threshold to output a comparison result; the comparison result is a result that the peak power of the baseband signal in any time window is smaller than a preset power threshold.
In the specific implementation process, after the envelope amplitude of each time window is calculated, the envelope amplitudes are compared with a preset power threshold, and the time window in which the peak power of the baseband signal is smaller than the preset power threshold is selected as a comparison result after comparison, so that the comparison result can be obtained more efficiently.
S32: and detecting the comparison result in real time to obtain a target indication signal when the duration of a time window corresponding to the comparison result is longer than the preset time of the coefficient configuration.
In the implementation process, under the condition that the comparison result is taken as a basis, if the duration of the time window corresponding to a certain comparison result is longer than the preset time of the coefficient configuration, the time window corresponding to the comparison result is the time window to be searched, and the indication signal corresponding to the time window is the target indication signal to be searched. Therefore, the comparison result is detected in real time, so that the target indication signal can be searched more efficiently, and the target predistorter can be configured more efficiently.
In summary, the baseband signal in the searched time window is amplified by the power amplifier and still in the signal rollback state of the power amplifier, and the signal in the time window can still ensure the linear output of the signal without passing through the predistorter, so that the time period can be used in the configuration process of the predistorter coefficient. And the baseband data stream can be switched between DPD (digital predistortion) bypass state and DPD channel state, and can be completed in one clock cycle of a digital processing device, so that the coefficient updating can be completed quickly, and in FDD (frequency division duplex) mode, the coefficient configuration method does not influence the signal transmission, does not deteriorate the signal index, and can avoid the resource consumption loss caused by ping-pong operation.
In another embodiment, as shown in fig. 6, based on the same inventive concept as the previous embodiment, an embodiment of the present application further provides a predistorter coefficient configuration device, which includes:
The detection module is used for searching a back-off time window for the baseband signal under the condition that the completion of the caching of the predistorter coefficient is detected, so as to obtain a target indication signal; the predistorter coefficients are used for configuring a target predistorter; the target indication signal is a signal corresponding to a time window meeting a power condition and a time condition; the power condition comprises the condition that the peak power of the baseband signal in the time window is smaller than a preset power threshold; the time condition comprises the condition that the duration of the time window under the condition of meeting the power is longer than the preset time of the predistorter coefficient configuration;
a switching module, configured to switch a DPD bypass mode and a DPD path mode of the baseband signal based on a target indication signal of the time window;
And the configuration module is used for carrying out coefficient configuration on the target predistorter based on the cached predistorter coefficient.
Further, the device further comprises:
The acquisition module is used for acquiring a plurality of predistorter coefficients of the target predistorter calculated by the embedded processor;
the caching module is used for caching the predistorter coefficients in the acquisition module;
The state monitoring module is used for detecting whether the predistorter coefficient exists in the buffer module; if the predistorter coefficient exists in the cache module, the state monitoring module displays a setting state; if the predistorter coefficient does not exist in the buffer module, the state monitoring module displays a reset state;
And the delay module is used for carrying out delay processing on the baseband signal so as to align the signal passing through the delay module with the signal passing through the target predistorter.
In some embodiments, based on the inventive concept of the above-mentioned predistorter coefficient configuration method, as shown in fig. 7, another predistorter coefficient configuration device capable of implementing the above-mentioned predistorter coefficient configuration method is also provided, where the device includes a signal back-off search module 100, a coefficient configuration control module 200, a predistorter coefficient buffer module 300, a delay module 400 of a signal link, and a signal stream switching module 500. The input signal of the signal back-off search module 100 is a baseband IQ signal of the digital up-conversion inlet, and outputs a time window indication signal meeting the search requirement and the time-length requirement.
As shown in fig. 8, the signal back-off search module 100 includes a peak calculation unit 101, a peak comparison unit 102, and a time window determination output unit 103. The peak value calculating unit 101 performs the amplitude calculation of the baseband IQ signal, where the calculation formula is: y (n) =sqrt (I 2(n)+q2 (n)), where I (n) and Q (n) are I/Q paths that distinguish baseband signals, n is a time index, and y (n) is a signal envelope amplitude. The peak value comparing unit 102 compares the signal envelope amplitude with a set power threshold, and outputs a comparison result. The time window determination output unit 103 monitors the comparison result in real time, and if the comparison result continuously continues to be lower than the threshold configuration for more than Tcfg _min, the time window outputs an instruction. Wherein parameter Tcfg _min is the minimum time required for predistorter coefficient configuration.
The coefficient configuration control module 200 serves as a central module connected with the other modules, and completes the central control functions of the functions of coefficient configuration request, time window search initiation, coefficient configuration, signal stream switching and the like.
As shown in fig. 9, the coefficient configuration control block 200 includes a buffer monitoring unit 201, a coefficient read-write control unit 202, and a data stream switching control unit 203. The buffer monitoring unit 201 monitors the state of the predistortion coefficient buffer module in real time, and when the buffer output indicates that a new coefficient configuration requirement exists, the buffer monitoring unit 201 responds in real time to start a subsequent process. After the coefficient read-write control unit 202 completes the response of the monitoring module, it starts the time window search and waits for the search time window indication signal to be output. The control predistortion coefficients are read from the coefficient buffer and then written to the predistorter module within the time window indication period. At the same time, the data stream switching control unit 203 completes the instruction signal output of the data stream switching control.
The predistorter coefficient buffer module 300 is configured to buffer predistorter coefficients calculated at the embedded processor side. As shown in fig. 10, the predistorter coefficient buffer module 300 includes a coefficient buffer unit 301 and a state monitoring unit 302. The coefficient buffer unit 301 is configured to store the predistorter model coefficient that is required to be updated and is embedded in the predistorter model coefficient calculated by the processor. The state monitoring unit 302 waits for the buffer coefficient storage to be completed and then outputs a new coefficient update request.
The delay module 400 of the signal link is used for implementing delay processing of the baseband signal, so as to ensure that the signal passing through the delay module is aligned with the signal passing through the predistorter in time, and further ensure that the signal cannot be deteriorated in the switching process of the signal flow of the later stage.
As shown in fig. 11, the signal flow switching module 500 determines the signal output mode according to the signal flow switching control instruction signal from the coefficient configuration control module 200: DPD bypass mode and DPD path mode. The DDP bypass mode is to output the output signal of the delay module as the signal of the device; the DPD path mode outputs the predistorter output signal as the device signal.
A complete predistorter coefficient configuration process, the key process and schematic time flow diagram refer to fig. 3, and the specific process is as follows:
And (3) the embedded type starts to write the coefficients into the buffer area at the time t1, and completes the writing of the coefficients into the buffer area at the time t 2.
At time t2, it is monitored that the buffer coefficient preparation is completed, and an update request instruction is output.
In response to the update request at time t3, a time window search initiation is initiated at time t 4.
And the time interval from t4 to t5 is the time window searching time, the searching is completed at the moment of t5, and the time window indication is output.
The time interval t 5-t 7 is the time window validation time, where t 5-t 6 are the time the coefficients are read out of the buffer and configured into the predistorter.
And after the time T7, completing the coefficient configuration process.
Wherein the time intervals [ - ≡t5] and [ t7], ++ infinity ] is DPD the mode of the path is set to be a channel, the time interval t5, t7 is the DPD bypass mode.
Note that, each module in the predistorter coefficient configuration device in this embodiment corresponds to each step in the predistorter coefficient configuration method in the foregoing embodiment. For example, the signal back-off search module 100 correspondingly performs the technical scheme of "performing back-off time window search on baseband signal to obtain the target indication signal" in the above step S10; the coefficient configuration control module 200 correspondingly executes the technical scheme of detecting that the predistorter coefficient buffering is completed in the step S10 and step S12; the predistorter coefficient buffer module 300 correspondingly executes the technical schemes of 'acquiring a plurality of predistorter coefficients of a target predistorter', 'transmitting the plurality of predistorter coefficients to a buffer module', and the like in the scheme; the delay module 400 of the signal link functions similarly to the delay module of the previous embodiment; the signal flow switching module 500 correspondingly executes the technical scheme of step S11 and the like. Therefore, the specific implementation manner and the achieved technical effects of this embodiment may refer to the implementation manner of the predistorter coefficient configuration method, and are not described herein.
Furthermore, in an embodiment, the application also provides a communication device comprising a processor, a memory and a computer program stored in the memory, which when executed by the processor, implements the method of the previous embodiments.
Furthermore, in an embodiment, the present application also provides a computer storage medium, on which a computer program is stored, which computer program, when being executed by a processor, implements the method in the previous embodiment.
In some embodiments, the computer readable storage medium may be FRAM, ROM, PROM, EPROM, EEPROM, flash memory, magnetic surface memory, optical disk, or CD-ROM; but may be a variety of devices including one or any combination of the above memories. The computer may be a variety of computing devices including smart terminals and servers.
In some embodiments, the executable instructions may be in the form of programs, software modules, scripts, or code, written in any form of programming language (including compiled or interpreted languages, or declarative or procedural languages), and they may be deployed in any form, including as stand-alone programs or as modules, components, subroutines, or other units suitable for use in a computing environment.
As an example, executable instructions may, but need not, correspond to files in a file system, may be stored as part of a file that holds other programs or data, such as in one or more scripts in a hypertext markup language (HTML, hyper Text Markup Language) document, in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub-programs, or portions of code).
As an example, executable instructions may be deployed to be executed on one computing device or on multiple computing devices located at one site or distributed across multiple sites and interconnected by a communication network.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The foregoing embodiment numbers of the present application are merely for the purpose of description, and do not represent the advantages or disadvantages of the embodiments.
From the above description of the embodiments, it will be clear to those skilled in the art that the above-described embodiment method may be implemented by means of software plus a necessary general hardware platform, but of course may also be implemented by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (e.g. read-only memory/random-access memory, magnetic disk, optical disk), comprising instructions for causing a multimedia terminal device (which may be a mobile phone, a computer, a television receiver, or a network device, etc.) to perform the method according to the embodiments of the present application.
The foregoing description is only of the preferred embodiments of the present application, and is not intended to limit the scope of the application, but rather is intended to cover any equivalents of the structures or equivalent processes disclosed herein or in the alternative, which may be employed directly or indirectly in other related arts.
Claims (9)
1. A method of predistorter coefficient configuration, the method comprising:
Under the condition that the completion of the pre-distorter coefficient caching is detected, carrying out back-off time window searching on the baseband signal to obtain a target indication signal; the predistorter coefficients are used for configuring a target predistorter; the target indication signal is a signal corresponding to a time window meeting a power condition and a time condition; the power condition comprises the condition that the peak power of the baseband signal in the time window is smaller than a preset power threshold; the time condition comprises the condition that the duration of the time window under the condition of meeting the power is longer than the preset time of the predistorter coefficient configuration;
switching a DPD bypass mode and a DPD channel mode of the baseband signal based on the target indication signal of the time window;
When the baseband signal is in a DPD bypass mode, carrying out coefficient configuration on the target predistorter; and after completing the coefficient configuration of the target predistorter, switching the baseband signal into a DPD (digital pre-distortion) path mode.
2. The predistorter coefficient configuration method as set out in claim 1, wherein, before said step of searching for a back-off time window for the baseband signal to obtain the target indication signal if it is detected that the predistorter coefficient buffering is complete, further comprising:
acquiring a plurality of predistorter coefficients of a target predistorter;
Transmitting the predistorter coefficients to a buffer module; the buffer module is used for buffering the predistorter coefficients, and if the predistorter coefficients are buffered in the buffer module, the buffer module displays setting state information; if the predistorter coefficient does not exist in the buffer module, the buffer module displays reset state information;
And under the condition that the completion of the predistorter coefficient buffering is detected, performing back-off time window searching on the baseband signal to obtain a target indication signal, wherein the method comprises the following steps:
And under the condition that the setting state information of the buffer module is detected, carrying out back-off time window search on the baseband signal to obtain a target indication signal.
3. The predistorter coefficient configuration method of claim 1, wherein said switching of DPD bypass mode and DPD path mode of said baseband signal based on said target indication signal for said time window comprises:
and when the target indication signal of the time window is in a high level state, switching the baseband signal into a DPD bypass mode.
4. The predistorter coefficient configuration method as set out in claim 1, wherein said performing a back-off time window search on the baseband signal to obtain the target indication signal if it is detected that the predistorter coefficient buffering is complete comprises:
if the peak power of the baseband signal in any time window is smaller than a preset power threshold, the duration of the time window meets preset back-off condition information; the baseband signal comprises a baseband signal at a digital up-conversion inlet; the duration of the time window meeting the preset rollback condition information is smaller than the processing delay from the digital up-conversion entrance to the predistorter entrance;
And under the condition that the length of the time window meets the preset rollback condition information, if the length of the time window is longer than the preset time configured by the predistorter coefficient, acquiring a target indication signal.
5. The predistorter coefficient configuration method as set out in claim 1, wherein said performing a back-off time window search on the baseband signal to obtain the target indication signal if it is detected that the predistorter coefficient buffering is complete comprises:
Calculating the envelope amplitude of the baseband signal in any time window;
Comparing the envelope amplitude of the baseband signal with a preset power threshold to output a comparison result; the comparison result is a result that the peak power of the baseband signal in any time window is smaller than a preset power threshold;
And detecting the comparison result in real time to obtain a target indication signal when the duration of a time window corresponding to the comparison result is longer than the preset time of the coefficient configuration.
6. A predistorter coefficient configuration apparatus, the apparatus comprising:
The detection module is used for searching a back-off time window for the baseband signal under the condition that the completion of the caching of the predistorter coefficient is detected, so as to obtain a target indication signal; the predistorter coefficients are used for configuring a target predistorter; the target indication signal is a signal corresponding to a time window meeting a power condition and a time condition; the power condition comprises the condition that the peak power of the baseband signal in the time window is smaller than a preset power threshold; the time condition comprises the condition that the duration of the time window under the condition of meeting the power is longer than the preset time of the predistorter coefficient configuration;
a switching module, configured to switch a DPD bypass mode and a DPD path mode of the baseband signal based on a target indication signal of the time window;
The configuration module is used for carrying out coefficient configuration on the target predistorter when the baseband signal is in a DPD bypass mode; and after completing the coefficient configuration of the target predistorter, switching the baseband signal into a DPD (digital pre-distortion) path mode.
7. The predistorter coefficient configuration device of claim 6, further comprising:
The acquisition module is used for acquiring a plurality of predistorter coefficients of the target predistorter calculated by the embedded processor;
the caching module is used for caching the predistorter coefficients in the acquisition module;
The state monitoring module is used for detecting whether the predistorter coefficient exists in the buffer module; if the predistorter coefficient exists in the cache module, the state monitoring module displays a setting state; if the predistorter coefficient does not exist in the buffer module, the state monitoring module displays a reset state;
And the delay module is used for carrying out delay processing on the baseband signal so as to align the signal passing through the delay module with the signal passing through the target predistorter.
8. A communication device comprising a memory and a processor, the memory having stored therein a computer program, the processor executing the computer program to implement the method of any of claims 1-5.
9. A computer readable storage medium, having stored thereon a computer program, the computer program being executable by a processor to implement the method of any of claims 1-5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211417652.6A CN115766356B (en) | 2022-11-11 | 2022-11-11 | Predistorter coefficient configuration method, predistorter coefficient configuration device, predistorter coefficient configuration equipment and predistorter coefficient configuration medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211417652.6A CN115766356B (en) | 2022-11-11 | 2022-11-11 | Predistorter coefficient configuration method, predistorter coefficient configuration device, predistorter coefficient configuration equipment and predistorter coefficient configuration medium |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN115766356A CN115766356A (en) | 2023-03-07 |
| CN115766356B true CN115766356B (en) | 2024-06-07 |
Family
ID=85370564
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211417652.6A Active CN115766356B (en) | 2022-11-11 | 2022-11-11 | Predistorter coefficient configuration method, predistorter coefficient configuration device, predistorter coefficient configuration equipment and predistorter coefficient configuration medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115766356B (en) |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103379067A (en) * | 2012-04-26 | 2013-10-30 | 京信通信系统（中国）有限公司 | Digital pre-distortion method and device during power fluctuation |
| WO2014114170A1 (en) * | 2013-01-25 | 2014-07-31 | 大唐移动通信设备有限公司 | Method and system for updating predistortion coefficient |
| CN105516051A (en) * | 2015-11-26 | 2016-04-20 | 西安电子科技大学 | Digital pre-distortion fractional delay estimation and signal alignment algorithm and system |
| CN106330802A (en) * | 2015-06-30 | 2017-01-11 | 天津创融科技有限公司 | Digital pre-distortion processing apparatus and method of mobile communication system |
| CN110572341A (en) * | 2019-09-19 | 2019-12-13 | 三维通信股份有限公司 | Digital predistortion technology DPD processing method and device |
| CN113079119A (en) * | 2021-03-30 | 2021-07-06 | 辽宁工程技术大学 | Blind multi-band signal predistortion method based on compressive sampling structure |
| WO2021169997A1 (en) * | 2020-02-24 | 2021-09-02 | 华为技术有限公司 | Digital pre-distortion circuit, digital pre-distortion coefficient acquisition method and related device |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102480450B (en) * | 2010-11-30 | 2014-12-10 | 富士通株式会社 | Predistorter control device and method as well as power control state detection method |
| US11671130B2 (en) * | 2020-12-10 | 2023-06-06 | Analog Devices International Unlimited Company | Obtaining reliable and specific data for adaptive digital predistortion |
-
2022
- 2022-11-11 CN CN202211417652.6A patent/CN115766356B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103379067A (en) * | 2012-04-26 | 2013-10-30 | 京信通信系统（中国）有限公司 | Digital pre-distortion method and device during power fluctuation |
| WO2014114170A1 (en) * | 2013-01-25 | 2014-07-31 | 大唐移动通信设备有限公司 | Method and system for updating predistortion coefficient |
| CN106330802A (en) * | 2015-06-30 | 2017-01-11 | 天津创融科技有限公司 | Digital pre-distortion processing apparatus and method of mobile communication system |
| CN105516051A (en) * | 2015-11-26 | 2016-04-20 | 西安电子科技大学 | Digital pre-distortion fractional delay estimation and signal alignment algorithm and system |
| CN110572341A (en) * | 2019-09-19 | 2019-12-13 | 三维通信股份有限公司 | Digital predistortion technology DPD processing method and device |
| WO2021052459A1 (en) * | 2019-09-19 | 2021-03-25 | 三维通信股份有限公司 | Digital pre-distortion processing method and device, computer apparatus, and readable storage medium |
| WO2021169997A1 (en) * | 2020-02-24 | 2021-09-02 | 华为技术有限公司 | Digital pre-distortion circuit, digital pre-distortion coefficient acquisition method and related device |
| CN113079119A (en) * | 2021-03-30 | 2021-07-06 | 辽宁工程技术大学 | Blind multi-band signal predistortion method based on compressive sampling structure |
Also Published As
| Publication number | Publication date |
|---|---|
| CN115766356A (en) | 2023-03-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108280014B (en) | Method and device for monitoring browser page and computer equipment | |
| US8558615B2 (en) | Apparatus for and method of controlling a predistorter, and method of detecting power control state | |
| US7514996B2 (en) | Distortion compensation amplifying apparatus | |
| CN107393548B (en) | Method and device for processing voice information collected by multiple voice assistant devices | |
| CN101287013B (en) | Method for updating Webpage and Web proxy device | |
| US20140105327A1 (en) | Method and apparatus for predicting signal characteristics for a nonlinear power amplifier | |
| US9754113B2 (en) | Method, apparatus, terminal and media for detecting document object model-based cross-site scripting attack vulnerability | |
| CN101753105B (en) | Distortion compensation apparatus and method | |
| US8412721B2 (en) | Efficient data extraction by a remote application | |
| US8095673B2 (en) | Generic format for efficient transfer of data | |
| US20120081178A1 (en) | Power amplification device and method for acquiring power adjusting coefficient | |
| EP0951139B1 (en) | Fast adaptive wideband power amplifier feed forward linearizer using a RLS parameter tracking alogrithm | |
| CN104022922A (en) | Mobile terminal, heartbeat forwarding server and heartbeat information transmitting method and system | |
| US8831135B2 (en) | Address controller, transmitter, and address control method | |
| CN115766356B (en) | Predistorter coefficient configuration method, predistorter coefficient configuration device, predistorter coefficient configuration equipment and predistorter coefficient configuration medium | |
| CN110943947A (en) | Digital predistortion control method and electronic equipment | |
| US10346611B1 (en) | Detecting malicious software | |
| US12021571B2 (en) | Digital pre-distortion processing method and electronic device | |
| JP4939281B2 (en) | Amplifier | |
| CN115529212A (en) | Open-loop-based short-wave communication method, device, equipment and readable storage medium | |
| US8417193B2 (en) | Transmitting device and method for determining target predistortion setting value | |
| US7948310B2 (en) | System and a method for signal processing | |
| CN112905491B (en) | Software test effectiveness analysis method and device | |
| CN115550118A (en) | Digital signal processing method and related equipment | |
| KR20130113719A (en) | Method and apparatus for controlling movement of asynchronous communication type web page |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant |