CN115766356A - Method, device, equipment and medium for configuring predistorter coefficients - Google Patents
Method, device, equipment and medium for configuring predistorter coefficients Download PDFInfo
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Abstract
The application discloses a method, a device, equipment and a medium for coefficient configuration of a predistorter, and relates to the technical field of coefficient configuration of predistorters. The method comprises the following steps: under the condition that the completion of the caching of the coefficient of the predistorter is detected, carrying out backspacing time window searching on the baseband signal to obtain a target indication signal; the predistorter coefficients are used to configure a target predistorter; the target indication signal is a signal corresponding to a time window meeting a power condition and a time condition; the power condition comprises a condition that the peak power of the baseband signals in the time window is smaller than a preset power threshold; switching a DPD bypass mode and a DPD access mode of the baseband signal based on the target indication signal of the time window; and performing coefficient configuration on the target predistorter based on the cached predistorter coefficients. Therefore, the adaptability of the configuration of the coefficients of the predistorter can be greatly improved, and the application range of the configuration of the coefficients of the predistorter is expanded.
Description
Technical Field
The present application relates to the field of predistorter coefficient configuration technologies, and in particular, to a method, an apparatus, a device, and a medium for predistorter coefficient configuration.
Background
Digital Predistortion (DPD) is the most commonly used technique in signal linearization of wireless systems at present, and its linearization performance, implementation complexity and resource consumption can reach a better balance, and is often used in wireless communication products, and predistorter coefficients need to be updated and adapted in time according to the environment and state changes of the products working to achieve the real-time optimal linearization performance.
In the prior art, a predistorter generally adopts a lookup table to realize predistortion calculation, and updates coefficients by rewriting data in the lookup table. In the prior art, the configuration adaptability of the predistorter coefficient is poor, so that the range of the configuration of the predistorter coefficient is influenced.
Disclosure of Invention
The present application mainly aims to provide a method, an apparatus, a device and a medium for configuring predistorter coefficients, and aims to solve the technical problem that the configuration adaptability of predistorter coefficients in the prior art is poor, so that the configuration range of the predistorter coefficients is affected.
To achieve the above object, a first aspect of the present application provides a method for configuring coefficients of a predistorter, the method comprising:
under the condition that the completion of the caching of the coefficient of the predistorter is detected, carrying out backspacing time window searching on the baseband signal to obtain a target indication signal; the predistorter coefficients are used to configure a target predistorter; the target indication signal is a signal corresponding to a time window meeting a power condition and a time condition; the power condition comprises a condition that the peak power of the baseband signals in the time window is smaller than a preset power threshold; the time condition comprises the condition that the duration of the time window under the condition of meeting the power condition is greater than the preset time of the configuration of the predistorter coefficient;
switching a DPD bypass mode and a DPD access mode of the baseband signal based on the target indication signal of the time window;
and performing coefficient configuration on the target predistorter based on the cached predistorter coefficients.
Optionally, before the step of performing a back-off time window search on the baseband signal to obtain the target indication signal when it is detected that the pre-distorter coefficient buffering is completed, the method further includes:
acquiring a plurality of predistorter coefficients of a target predistorter;
transmitting the predistorter coefficients to a caching module; the cache module is used for caching the plurality of predistorter coefficients, and if the predistorter coefficients are cached in the cache module completely, the cache module displays setting state information; if the predistorter coefficient does not exist in the cache module, the cache module displays reset state information;
the performing a back-off time window search on the baseband signal to obtain a target indication signal when it is detected that the pre-distorter coefficient buffering is completed includes:
and under the condition that the setting state information of the cache module is detected, carrying out backspacing time window search on the baseband signal to obtain a target indication signal.
Optionally, the switching the DPD bypass mode and the DPD path mode of the baseband signal based on the target indication signal of the time window includes:
and when the target indication signal of the time window is in a high level state, switching the baseband signal to a DPD bypass mode.
Optionally, the coefficient configuring, performed on the target predistorter based on the cached predistorter coefficients, includes:
when the baseband signal is in a DPD bypass mode, configuring coefficients of the target predistorter;
after the step of configuring the coefficients of the target predistorter based on the cached predistorter coefficients, the method further includes:
and after the configuration of the coefficients of the target predistorter is finished, switching the baseband signal into a DPD channel mode.
Optionally, when it is detected that buffering of the predistorter coefficient is completed, performing backoff time window search on the baseband signal to obtain the target indication signal includes:
if the peak power of the baseband signal in any time window is smaller than a preset power threshold, the duration of the time window meets preset backspacing condition information; the baseband signal comprises a baseband signal at a digital up-conversion inlet; the time length of the time window meeting the preset backspacing condition information is less than the processing delay from the digital up-conversion entrance to the entrance of a predistorter;
and under the condition that the length of the time window meets the preset backspacing condition information, if the duration of the time window is longer than the preset time configured by the coefficient of the predistorter, obtaining a target indication signal.
Optionally, when it is detected that buffering of the predistorter coefficient is completed, performing backoff time window search on the baseband signal to obtain the target indication signal includes:
calculating the envelope amplitude of the baseband signal in any time window;
comparing the envelope amplitude of the baseband signal with a preset power threshold to output a comparison result; the comparison result is that the peak power of the baseband signal in any time window is smaller than a preset power threshold;
and detecting the comparison result in real time to obtain a target indication signal under the condition that the duration of a time window corresponding to the comparison result is greater than the preset time configured by the coefficient.
In a second aspect, the present application provides a predistorter coefficient configuration apparatus, the apparatus comprising:
the detection module is used for searching a backoff time window for the baseband signal to obtain a target indication signal under the condition that the completion of the caching of the coefficient of the predistorter is detected; the predistorter coefficients are used to configure a target predistorter; the target indication signal is a signal corresponding to a time window meeting a power condition and a time condition; the power condition comprises a condition that the peak power of the baseband signals in the time window is smaller than a preset power threshold; the time condition comprises the condition that the duration of the time window under the condition of meeting the power condition is greater than the preset time of the configuration of the predistorter coefficient;
a switching module, configured to switch a DPD bypass mode and a DPD access mode of the baseband signal based on the target indication signal of the time window;
and the configuration module is used for carrying out coefficient configuration on the target predistorter based on the cached predistorter coefficients.
Optionally, the apparatus further comprises:
the acquisition module is used for acquiring a plurality of predistorter coefficients of the target predistorter calculated by the embedded processor;
the cache module is used for caching the plurality of predistorter coefficients in the acquisition module;
the state monitoring module is used for detecting whether the pre-distorter coefficient exists in the cache module; if the pre-distorter coefficient exists in the cache module, the state monitoring module displays a setting state; if the predistorter coefficient does not exist in the cache module, the state monitoring module displays a reset state;
and the delay module is used for carrying out delay processing on the baseband signal so as to align the signal passing through the delay module with the signal passing through the target predistorter.
In a third aspect, the present application provides a communication device, which includes a memory and a processor, where the memory stores a computer program, and the processor executes the computer program to implement the method described in the embodiment.
In a fourth aspect, the present application provides a computer-readable storage medium having a computer program stored thereon, wherein a processor executes the computer program to implement the method described in the embodiments.
Through above-mentioned technical scheme, this application has following beneficial effect at least:
the embodiment of the application provides a method, a device, equipment and a medium for configuring coefficients of a predistorter, wherein the method comprises the following steps: under the condition that the completion of the pre-distorter coefficient caching is detected, carrying out back-off time window searching on the baseband signal to obtain a target indication signal; the predistorter coefficients are used to configure a target predistorter; the target indication signal is a signal corresponding to a time window meeting a power condition and a time condition; the power condition comprises a condition that the peak power of the baseband signals in the time window is smaller than a preset power threshold; the time condition comprises the condition that the duration of the time window under the condition of meeting the power condition is greater than the preset time of the configuration of the predistorter coefficient; switching a DPD bypass mode and a DPD access mode of the baseband signal based on the target indication signal of the time window; and performing coefficient configuration on the target predistorter based on the cached predistorter coefficients.
That is, when the coefficient configuration of the predistorter is required, whether the caching of the predistorter coefficient of the target predistorter is completed is detected first, and if the caching of the predistorter coefficient of the target predistorter is detected to be completed, a backoff time window search is performed on the baseband signal; in the process of searching a backoff time window, if the peak power of a baseband signal in a certain time window is smaller than a preset power threshold, and the duration of the time window is greater than the preset time configured by a predistorter coefficient, that is, under the condition that the time window simultaneously meets a power condition and a time condition, the time window meeting the baseband signal backoff is searched, that is, a target indication signal corresponding to the time window meeting the condition is obtained; and switching the DPD bypass mode and the DPD access mode of the baseband signal according to the target indication signal corresponding to the time window, reading the cached predistorter coefficient, and performing coefficient configuration on the target predistorter.
That is, according to the present application, under a target indication signal of a time window satisfying a condition, a DPD bypass mode and a DPD access mode are performed on a baseband signal, and the time window satisfies that peak powers of corresponding baseband signals are both smaller than a preset power threshold, and a duration of the time window is longer than a preset time of coefficient configuration of a predistorter. Therefore, both the DPD bypass mode and the DPD access mode are suitable for coefficient configuration of the predistorter, and when the coefficient configuration of the target predistorter is carried out, the switching of predistorter coefficients without signal loss is completed under the conditions that a baseband signal does not need to be closed, GP time slots are not occupied, and twice predistorter resources are not consumed, so that the adaptability of the coefficient configuration of the predistorter is greatly improved, and the application range of the coefficient configuration of the predistorter is expanded.
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Fig. 1 is a schematic structural diagram of a communication device in a hardware operating environment according to an embodiment of the present application;
fig. 2 is a flowchart of a method for configuring coefficients of a predistorter according to an embodiment of the present application;
fig. 3 is a time flow diagram of a predistorter coefficient configuration process provided by the present embodiment;
fig. 4 is a flowchart of an implementation method of step S10 provided in this embodiment;
fig. 5 is a flowchart of another implementation method of step S10 provided in this embodiment;
fig. 6 is a schematic diagram of a predistorter coefficient configuration apparatus according to an embodiment of the present application;
fig. 7 is a schematic diagram of another predistorter coefficient configuration apparatus according to an embodiment of the present application;
fig. 8 is a schematic diagram of a signal back-off search module according to an embodiment of the present application;
FIG. 9 is a schematic diagram of a coefficient configuration control module according to an embodiment of the present application;
fig. 10 is a schematic diagram of a predistorter coefficient buffer module according to an embodiment of the present application;
fig. 11 is a schematic diagram of a signal stream switching module according to an embodiment of the present application.
The implementation, functional features and advantages of the object of the present application will be further explained with reference to the embodiments, and with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of and not restrictive on the broad application.
Digital Predistortion (DPD) is the most commonly used technique in signal linearization of wireless systems, and its linearization performance, implementation complexity and resource consumption can be well balanced, and is often used in wireless communication products. The coefficient of the predistorter needs to be updated and adapted in time according to the working environment and state change of a product to achieve real-time optimal linearization performance, the predistorter generally adopts a lookup table to achieve predistortion calculation, coefficient updating is achieved by rewriting data in the lookup table, and downlink signal indexes need to be guaranteed not to be deteriorated in the process of rewriting the coefficient in the lookup table. At present, the updating methods commonly used in the industry are mainly two types: firstly, occupying GP time slots or uplink time slots to update coefficients; and secondly, updating the coefficient by adopting ping-pong operation. Because no downlink signal is sent in the GP time slot and the uplink time slot, the time slot can be occupied to complete coefficient updating, but the method is only for the TDD system, and for the FDD system, because the downlink direction is a common state, the method cannot be adopted. The method for realizing coefficient updating by adopting ping-pong operation is suitable for TDD and FDD systems, but has the defects that twice of predistorter resources are required to realize 'ping-pong' switching, and twice of resource consumption is unacceptable for the application of the predistorter of some complex algorithms. In summary, the configuration adaptability of the predistorter coefficients is poor, so that the range of the configuration of the predistorter coefficients is affected.
In order to solve the above technical problems, the present application provides a method, an apparatus, a device, and a medium for configuring coefficients of a predistorter, and before introducing a specific technical solution of the present application, a hardware operating environment related to a scheme of an embodiment of the present application is introduced first.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a communication device in a hardware operating environment according to an embodiment of the present application.
As shown in fig. 1, the communication device may include: a processor 1001, such as a Central Processing Unit (CPU), a communication bus 1002, a user interface 1003, a network interface 1004, and a memory 1005. The communication bus 1002 is used to implement connection communication among these components. The user interface 1003 may include a Display screen (Display), an input unit such as a Keyboard (Keyboard), and the optional user interface 1003 may also include a standard wired interface, a wireless interface. The network interface 1004 may optionally include a standard wired interface, a WIreless interface (e.g., a WIreless-FIdelity (WI-FI) interface). The Memory 1005 may be a Random Access Memory (RAM) Memory, or may be a Non-Volatile Memory (NVM), such as a disk Memory. The memory 1005 may alternatively be a storage device separate from the processor 1001.
Those skilled in the art will appreciate that the configuration shown in fig. 1 does not constitute a limitation of the communication device and may include more or fewer components than those shown, or some components may be combined, or a different arrangement of components.
As shown in fig. 1, the memory 1005, which is a storage medium, may include therein an operating system, a data storage module, a network communication module, a user interface module, and an electronic program.
In the communication device shown in fig. 1, the network interface 1004 is mainly used for data communication with a network server; the user interface 1003 is mainly used for data interaction with a user; the processor 1001 and the memory 1005 in the communication device of the present application may be provided in the communication device, and the communication device invokes the predistorter coefficient configuration apparatus stored in the memory 1005 through the processor 1001 and executes the predistorter coefficient configuration method provided in the embodiment of the present application.
Referring to fig. 2 to 3, based on the hardware environment of the foregoing embodiment, an embodiment of the present application provides a predistorter coefficient configuration method, including:
s10: under the condition that the completion of the caching of the coefficient of the predistorter is detected, carrying out backspacing time window searching on the baseband signal to obtain a target indication signal; the predistorter coefficients are used to configure a target predistorter; the target indication signal is a signal corresponding to a time window meeting a power condition and a time condition; the power condition comprises a condition that the peak power of the baseband signals in the time window is smaller than a preset power threshold; the time condition comprises a condition that the duration of the time window under the condition that the power condition is met is greater than the preset time of the configuration of the predistorter coefficient.
In the specific implementation process, the baseband signal refers to an original electrical signal sent by a source (information source, also called a sending terminal) without modulation (performing spectrum shifting and conversion), and is characterized by a low frequency, and the signal spectrum starts from near a zero frequency and has a low-pass form. The baseband signal can be divided into a digital baseband signal and an analog baseband signal according to the characteristics of the original electrical signal (accordingly, the source is also divided into a digital source and an analog source). Simply speaking, a baseband signal is a signal that is emitted to directly express information to be transmitted, for example, the sound wave that we speak is the baseband signal. The back-off time window search refers to searching a time window of a back-off baseband signal, and the purpose of searching is to find a time window satisfying corresponding conditions (i.e., power conditions and time conditions). The preset power threshold is a digital domain power threshold which is calculated according to actual products and mainly comprises downlink gain, power amplifier P1 indexes and the like and meets the power amplifier backspacing state. The preset time is the time required for configuring the coefficients of the predistorter for the target predistorter, and the target predistorter is the predistorter requiring the configuration of the coefficients of the predistorter. When the coefficient configuration of a target predistorter is needed, firstly detecting whether the caching of the predistorter coefficient of the target predistorter is finished or not, and if the completion of the caching of the predistorter coefficient of the target predistorter is detected, carrying out backspacing time window search on a baseband signal; in the process of searching the backoff time window, if the peak power of the baseband signal in a certain time window is smaller than a preset power threshold and the duration of the time window is greater than the preset time configured by the predistorter coefficient, that is, under the condition that the time window simultaneously satisfies the power condition and the time condition, it is indicated that the time window satisfying the baseband signal backoff is searched, that is, the target indication signal corresponding to the time window satisfying the condition is obtained.
S11: and switching the DPD bypass mode and the DPD access mode of the baseband signal based on the target indication signal of the time window.
In a specific implementation process, an indication signal corresponding to a time window meeting the power condition and the time condition is found according to step S10, the time window indication signal output by the search result is characterized as a gating signal, a signal in a high level state indicates that the time window is valid, and a signal in a low level state indicates that the time window is invalid. Specifically, when the indication signal of the time window is in a high level state, the baseband signal is switched to the DPD bypass mode, when the baseband signal is in the DPD bypass mode, the target predistorter is configured with coefficients, that is, the baseband signal is switched to the DPD bypass mode within a time period in which the predistorter is configured with coefficients, and after the configuration of the coefficients of the target predistorter is completed, the baseband signal is switched to the DPD path mode.
S12: and configuring the coefficients of the target predistorter based on the cached predistorter coefficients.
In a specific implementation process, when configuring coefficients for a target predistorter, a baseband signal is switched to a DPD bypass mode, and coefficients of the predistorter which is cached in advance are read, and the coefficients of the predistorter which is cached in advance are configured for the target predistorter.
In summary, when the coefficient configuration needs to be performed on the predistorter, it is first detected whether the coefficient caching of the predistorter of the target predistorter is completed, and if it is detected that the coefficient caching of the predistorter of the target predistorter is completed, a backoff time window search is performed on the baseband signal; in the process of searching a backoff time window, if the peak power of a baseband signal in a certain time window is smaller than a preset power threshold, and the duration of the time window is greater than the preset time configured by a predistorter coefficient, that is, under the condition that the time window simultaneously meets a power condition and a time condition, the time window meeting the baseband signal backoff is searched, that is, a target indication signal corresponding to the time window meeting the condition is obtained; and switching the DPD bypass mode and the DPD access mode of the baseband signal according to the target indication signal corresponding to the time window, reading the cached predistorter coefficient, and performing coefficient configuration on the target predistorter. That is, according to the present application, under the target indication signal of the time window satisfying the condition, the DPD bypass mode and the DPD access mode are switched to the baseband signal, and the time window satisfies that the peak powers of the corresponding baseband signals are both smaller than the preset power threshold, and the duration of the time window is longer than the preset time of the configuration of the predistorter coefficients. Therefore, both the DPD bypass mode and the DPD access mode are suitable for coefficient configuration of the predistorter, and when the coefficient configuration of the target predistorter is carried out, the switching of predistorter coefficients without signal loss is completed under the conditions that a baseband signal does not need to be closed, GP time slots are not occupied, and twice predistorter resources are not consumed, so that the adaptability of the coefficient configuration of the predistorter is greatly improved, and the application range of the coefficient configuration of the predistorter is expanded.
In order to more efficiently and conveniently detect completion of the buffering of the predistorter coefficient, in some embodiments, in the case that completion of the buffering of the predistorter coefficient is detected, the step of performing a back-off time window search on the baseband signal to obtain the target indication signal further includes:
acquiring a plurality of predistorter coefficients of a target predistorter; transmitting the predistorter coefficients to a caching module; the cache module is used for caching the plurality of predistorter coefficients, and if the predistorter coefficients are cached in the cache module completely, the cache module displays setting state information; if the predistorter coefficient does not exist in the cache module, the cache module displays reset state information;
the step of performing backoff time window search on the baseband signal to obtain the target indication signal when it is detected that the pre-distorter coefficient buffering is completed includes: and under the condition that the set state information of the cache module is detected, carrying out back time window search on the baseband signal to obtain a target indication signal.
In this embodiment, before performing predistorter coefficient configuration on a target predistorter, a plurality of predistorter coefficients of the target predistorter are obtained first, and the predistorter coefficients are transmitted to a cache module for caching. And after the pre-distorter coefficient is cached, the caching module displays the set state information, and when the pre-distorter coefficient does not exist in the caching module, the caching module displays the reset state information. Therefore, only when the state of the cache module is detected to be a set state, that is, the cache of the coefficient of the predistorter is completed is detected, and the backoff time window search can be performed on the baseband signal, so that the efficiency of detecting whether the cache of the predistorter is completed or not can be greatly improved, the efficiency of obtaining a target indication signal can be improved, and the coefficient configuration efficiency of the target predistorter can be improved.
In order to more efficiently and conveniently search the target indication information, in another embodiment, as shown in fig. 4, the step of performing a back-off time window search on the baseband signal to obtain the target indication signal in the case that completion of buffering of the predistorter coefficient is detected includes:
s20: if the peak power of the baseband signal in any time window is smaller than a preset power threshold, the duration of the time window meets preset backspacing condition information; the baseband signal comprises a baseband signal at a digital up-conversion inlet; the time duration of the time window meeting the preset backspacing condition information is less than the processing delay from the digital up-conversion entrance to the entrance of the predistorter.
In a specific implementation process, when a target indication signal is searched, a time window meeting a withdrawal condition (namely, preset withdrawal condition information) is searched first, and the duration of the time window meeting the withdrawal condition is smaller than the processing delay from a digital up-conversion inlet to an inlet of a pre-distorter.
S21: and under the condition that the length of the time window meets the preset backspacing condition information, if the duration of the time window is greater than the preset time configured by the coefficient of the predistorter, obtaining a target indication signal.
In a specific implementation process, after a time window meeting a backoff condition is searched, if the duration of the time window meeting the backoff condition is greater than preset time configured by a predistorter coefficient, it indicates that an indication signal corresponding to the time window is a target indication signal to be searched. In this embodiment, since the backoff condition is set in advance, the time window meeting the backoff condition can be searched more easily and efficiently, and thus the target indication signal corresponding to the time window meeting the preset time can be searched more efficiently.
In order to more efficiently and conveniently search the target indication information, in another embodiment, as shown in fig. 5, the step of performing a back-off time window search on the baseband signal to obtain the target indication signal when it is detected that the buffering of the predistorter coefficient is completed includes:
s30: the envelope magnitude of the baseband signal within any time window is calculated.
In a specific implementation process, the calculation of the envelope amplitude of the baseband signal may be accomplished by the following formula: y (n) = sqrt (i) 2 (n)+q 2 (n)), wherein I (n) and Q (n) are I/Q paths of the baseband signal, n is a time index, and y (n) is an envelope amplitude of the baseband signal.
S31: comparing the envelope amplitude of the baseband signal with a preset power threshold to output a comparison result; and the comparison result is that the peak power of the baseband signal in any time window is smaller than a preset power threshold.
In the specific implementation process, after the envelope amplitude of each time window is calculated, the envelope amplitudes are compared with a preset power threshold, and the time windows in which the peak power of the baseband signals is smaller than the preset power threshold are selected as comparison results after comparison, so that the comparison results can be obtained more efficiently.
S32: and detecting the comparison result in real time to obtain a target indication signal under the condition that the duration of a time window corresponding to the comparison result is greater than the preset time configured by the coefficient.
In a specific implementation process, under the condition that the comparison result is used as a basis, if the duration of a time window corresponding to a certain comparison result is greater than the preset time of the coefficient configuration, it is indicated that the time window corresponding to the comparison result is the time window needing to be searched, and the indication signal corresponding to the time window is the target indication signal needing to be searched. In this way, since the comparison result is detected in real time, the target indication signal can be more efficiently searched, and thus the target predistorter can be more efficiently configured.
In summary, the searched baseband signal in the time window is amplified by the power amplifier and still in the signal rollback state of the power amplifier, and the signal in the time window can still ensure the linear output of the signal without passing through the predistorter, so that the time period can be used in the configuration process of the coefficient of the predistorter. Moreover, the baseband data stream is switched between a DPD (digital predistortion) bypass state and a DPD channel state, the coefficient updating can be completed in one clock cycle of a digital processing device, the coefficient updating is completed quickly, the coefficient configuration method does not affect the signal transmission and deteriorate the signal index in an FDD (frequency division duplex) mode, the resource consumption loss caused by ping-pong operation can be avoided, and the method is also suitable for a TDD (time division duplex) mode.
In another embodiment, as shown in fig. 6, based on the same inventive concept as the foregoing embodiments, an embodiment of the present application further provides a predistorter coefficient configuration apparatus, including:
the detection module is used for searching a back-off time window for the baseband signal to obtain a target indication signal under the condition that the completion of the caching of the coefficient of the predistorter is detected; the predistorter coefficients are used to configure a target predistorter; the target indication signal is a signal corresponding to a time window meeting a power condition and a time condition; the power condition comprises a condition that the peak power of the baseband signals in the time window is smaller than a preset power threshold; the time condition comprises a condition that the duration of the time window under the condition of meeting the power condition is greater than the preset time of the configuration of the predistorter coefficient;
a switching module, configured to switch a DPD bypass mode and a DPD access mode of the baseband signal based on the target indication signal of the time window;
and the configuration module is used for carrying out coefficient configuration on the target predistorter based on the cached predistorter coefficients.
Further, the apparatus further comprises:
the acquisition module is used for acquiring a plurality of predistorter coefficients of the target predistorter calculated by the embedded processor;
the cache module is used for caching the plurality of predistorter coefficients in the acquisition module;
the state monitoring module is used for detecting whether the pre-distorter coefficient exists in the cache module; if the pre-distorter coefficient exists in the cache module, the state monitoring module displays a setting state; if the predistorter coefficient does not exist in the cache module, the state monitoring module displays a reset state;
and the delay module is used for carrying out delay processing on the baseband signal so as to align the signal passing through the delay module with the signal passing through the target predistorter.
In some embodiments, based on the inventive idea of the above-mentioned predistorter coefficient configuration method, as shown in fig. 7, another predistorter coefficient configuration apparatus capable of implementing the above-mentioned predistorter coefficient configuration method is further provided, and the apparatus includes a signal back-off search module 100, a coefficient configuration control module 200, a predistorter coefficient buffer module 300, a delay module 400 of a signal link, and a signal stream switching module 500. The input signal of the signal back-off search module 100 is a baseband IQ signal at the digital up-conversion entry, and the output signal is a time window indication signal meeting the search requirement and the duration requirement.
As shown in fig. 8, the signal back-off search module 100 includes a peak value calculation unit 101, a peak value comparison unit 102, and a time window decision output unit 103. The peak value calculating unit 101 completes the amplitude calculation of the baseband IQ signal, and the calculation formula is as follows: y (n) = sqrt (i) 2 (n)+q 2 (n)), wherein I (n) and Q (n) are I/Q paths of the respective baseband signals, n is a time index, and y (n) is a signal envelope magnitude. The peak value comparing unit 102 compares the signal envelope amplitude with a set power threshold, and outputs a comparison result. The time window determination output unit 103 monitors the comparison result in real time, and outputs an instruction if the comparison result is continuously lower than the threshold configuration for a time exceeding Tcfg _ min. Wherein, the parameter Tcfg _ min is the minimum time required for the configuration of the predistorter coefficient.
The coefficient configuration control module 200 serves as a central control module for connecting the other modules, and performs central control functions of coefficient configuration request, time window search initiation, coefficient configuration, signal stream switching, and the like.
As shown in fig. 9, the coefficient configuration control module 200 includes a buffer monitoring unit 201, a coefficient read-write control unit 202, and a data stream switching control unit 203. The buffer monitoring unit 201 monitors the state of the predistortion coefficient buffer module in real time, and when the buffer output indicates that a new coefficient configuration is required, the buffer monitoring unit 201 responds in real time to start a subsequent process. After the coefficient read-write control unit 202 completes the response of the monitoring module, it starts the time window search and waits for the output of the search time window indication signal. And finishing controlling the read-out of the predistortion coefficients from the coefficient buffer and then writing the predistortion coefficients into the predistorter module within the time window indication time period. Meanwhile, the data stream switching control unit 203 completes the output of the indication signal of the data stream switching control.
The predistorter coefficient buffer module 300 is configured to buffer predistorter coefficients calculated by the embedded processor. As shown in fig. 10, the predistorter coefficient buffer module 300 includes a coefficient buffering unit 301 and a state monitoring unit 302. The coefficient buffer unit 301 is used to store the predistorter model coefficients that need to be updated and are calculated by the processor embedded therein. After waiting for the buffer coefficients to be completely stored, the state monitoring unit 302 outputs a new coefficient update request.
The delay module 400 of the signal link is configured to implement delay processing of the baseband signal, and ensure that a signal passing through the delay module is aligned with a signal passing through the predistorter in time, so as to ensure that the signal is not degraded in the switching process of the subsequent signal stream.
As shown in fig. 11, the signal flow switching module 500 determines the signal output mode according to the signal flow switching control indication signal from the coefficient configuration control module 200: DPD bypass mode and DPD access mode. The DDP bypass mode is to output the output signal of the delay module as the signal of the device; the DPD path mode is to output the predistorter output signal as the device signal.
Referring to fig. 3, a complete predistorter coefficient configuration process, a key process and a schematic time flow diagram are shown, and the specific process is as follows:
and the embedded type starts to write the coefficients into the buffer at the time t1, and finishes writing the coefficients into the buffer at the time t 2.
And at the time t2, when the buffer area coefficient preparation is completed, outputting an updating request instruction.
In response to the update request at time t3, a time window search initiation is initiated at time t 4.
And (5) time interval from t4 to t5 is time window searching time, searching is completed at the time t5, and time window indication is output.
The time interval from t5 to t7 is the time window effective time, wherein t5 to t6 are the time for reading out the coefficients from the buffer and configuring the coefficients into the predistorter.
And after the time T7, completing the coefficient configuration process.
Wherein, the time intervals [ - ∞, t5] and [ t7, + ∞ ] are the DPD access mode, and the time interval [ t5, t7] is the DPD bypass mode.
It should be noted that, each module in the predistorter coefficient configuration apparatus in this embodiment corresponds to each step in the predistorter coefficient configuration method in the foregoing embodiment. For example, the signal back-off searching module 100 correspondingly executes the technical solution of "performing back-off time window search on the baseband signal to obtain the target indication signal" in the step S10; the coefficient configuration control module 200 correspondingly executes the technical solutions of "detecting the completion of the coefficient caching of the predistorter" in step S10 and step S12; the predistorter coefficient buffer module 300 correspondingly executes the technical solutions of "obtaining a plurality of predistorter coefficients of a target predistorter", "transmitting the plurality of predistorter coefficients to a buffer module" and the like in the above solutions; the delay block 400 of the signal link functions similarly to the delay block of the previous embodiment; the signal stream switching module 500 correspondingly executes the technical solution of the step S11. Therefore, the specific implementation manner and the achieved technical effects of the present embodiment may refer to the implementation manner of the predistorter coefficient configuration method, which is not described herein again.
Furthermore, in an embodiment, the present application also provides a communication device comprising a processor, a memory and a computer program stored in the memory, which when executed by the processor implements the method in the foregoing embodiments.
Furthermore, in an embodiment, the present application further provides a computer storage medium having a computer program stored thereon, where the computer program is executed by a processor to implement the method in the foregoing embodiment.
In some embodiments, the computer-readable storage medium may be memory such as FRAM, ROM, PROM, EPROM, EEPROM, flash, magnetic surface memory, optical disk, or CD-ROM; or may be various devices including one or any combination of the above memories. The computer may be a variety of computing devices including intelligent terminals and servers.
In some embodiments, executable instructions may be written in any form of programming language (including compiled or interpreted languages), in the form of programs, software modules, scripts or code, and may be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment.
By way of example, executable instructions may, but need not, correspond to files in a file system, and may be stored in a portion of a file that holds other programs or data, such as in one or more scripts in a hypertext Markup Language (HTML) document, in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub-programs, or portions of code).
By way of example, executable instructions may be deployed to be executed on one computing device or on multiple computing devices at one site or distributed across multiple sites and interconnected by a communication network.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrases "comprising one of 8230; \8230;" 8230; "does not exclude the presence of additional like elements in a process, method, article, or system that comprises the element.
The above-mentioned serial numbers of the embodiments of the present application are merely for description, and do not represent the advantages and disadvantages of the embodiments.
Through the description of the foregoing embodiments, it is clear to those skilled in the art that the method of the foregoing embodiments may be implemented by software plus a necessary general hardware platform, and certainly may also be implemented by hardware, but in many cases, the former is a better implementation. Based on such understanding, the technical solutions of the present application may be embodied in the form of a software product, which is stored in a storage medium (e.g., a rom/ram, a magnetic disk, an optical disk) and includes instructions for enabling a multimedia terminal (e.g., a mobile phone, a computer, a television receiver, or a network device) to execute the method according to the embodiments of the present application.
The above description is only a preferred embodiment of the present application, and not intended to limit the scope of the present application, and all the equivalent structures or equivalent processes that can be directly or indirectly applied to other related technical fields by using the contents of the specification and the drawings of the present application are also included in the scope of the present application.
Claims (10)
1. A method for predistorter coefficient configuration, the method comprising:
under the condition that the completion of the caching of the coefficient of the predistorter is detected, carrying out backspacing time window searching on the baseband signal to obtain a target indication signal; the predistorter coefficients are used to configure a target predistorter; the target indication signal is a signal corresponding to a time window meeting a power condition and a time condition; the power condition comprises a condition that the peak power of the baseband signals in the time window is smaller than a preset power threshold; the time condition comprises the condition that the duration of the time window under the condition of meeting the power condition is greater than the preset time of the configuration of the predistorter coefficient;
switching a DPD bypass mode and a DPD access mode of the baseband signal based on a target indication signal of the time window;
and performing coefficient configuration on the target predistorter based on the cached predistorter coefficients.
2. The method of claim 1, wherein before the step of performing a back-off time window search on the baseband signal to obtain the target indication signal when completion of the buffering of the predistorter coefficients is detected, the method further comprises:
acquiring a plurality of predistorter coefficients of a target predistorter;
transmitting the predistorter coefficients to a caching module; the cache module is used for caching the plurality of predistorter coefficients, and if the cache module finishes caching the predistorter coefficients, the cache module displays setting state information; if the predistorter coefficient does not exist in the cache module, the cache module displays reset state information;
the performing back-off time window search on the baseband signal to obtain a target indication signal when it is detected that the pre-distorter coefficient buffering is completed includes:
and under the condition that the setting state information of the cache module is detected, carrying out backspacing time window search on the baseband signal to obtain a target indication signal.
3. The method of claim 1, wherein the switching the DPD bypass mode and the DPD path mode of the baseband signal based on the target indication signal of the time window comprises:
and when the target indication signal of the time window is in a high level state, switching the baseband signal to a DPD bypass mode.
4. The method of claim 3 wherein the coefficient configuring the target predistorter based on the buffered predistorter coefficients comprises:
when the baseband signal is in a DPD bypass mode, configuring coefficients of the target predistorter;
after the step of configuring the coefficients of the target predistorter based on the cached predistorter coefficients, the method further includes:
and after the configuration of the coefficients of the target predistorter is finished, switching the baseband signal into a DPD channel mode.
5. The method for configuring predistorter coefficients according to claim 1, wherein said performing a back-off time window search on a baseband signal to obtain a target indication signal when completion of buffering of predistorter coefficients is detected comprises:
if the peak power of the baseband signal in any time window is smaller than a preset power threshold, the duration of the time window meets preset backspacing condition information; the baseband signal comprises a baseband signal at a digital up-conversion inlet; the time length of the time window meeting the preset backspacing condition information is less than the processing delay from the digital up-conversion entrance to the entrance of a predistorter;
and under the condition that the length of the time window meets the preset backspacing condition information, if the duration of the time window is longer than the preset time configured by the coefficient of the predistorter, obtaining a target indication signal.
6. The method as claimed in claim 1, wherein the step of performing a back-off time window search on the baseband signal to obtain a target indication signal when the completion of the pre-distorter coefficient buffering is detected comprises:
calculating the envelope amplitude of the baseband signal in any time window;
comparing the envelope amplitude of the baseband signal with a preset power threshold to output a comparison result; the comparison result is that the peak power of the baseband signal in any time window is smaller than a preset power threshold;
and detecting the comparison result in real time to obtain a target indication signal under the condition that the duration of a time window corresponding to the comparison result is greater than the preset time of coefficient configuration.
7. A predistorter coefficient configuration apparatus, characterized in that the apparatus comprises:
the detection module is used for searching a back-off time window for the baseband signal to obtain a target indication signal under the condition that the completion of the caching of the coefficient of the predistorter is detected; the predistorter coefficients are used to configure a target predistorter; the target indication signal is a signal corresponding to a time window meeting a power condition and a time condition; the power condition comprises a condition that the peak power of the baseband signals in the time window is smaller than a preset power threshold; the time condition comprises the condition that the duration of the time window under the condition of meeting the power condition is greater than the preset time of the configuration of the predistorter coefficient;
a switching module, configured to switch a DPD bypass mode and a DPD access mode of the baseband signal based on the target indication signal of the time window;
and the configuration module is used for carrying out coefficient configuration on the target predistorter based on the cached predistorter coefficients.
8. The predistorter coefficient configuration arrangement according to claim 7, characterized in that said arrangement further comprises:
the acquisition module is used for acquiring a plurality of predistorter coefficients of the target predistorter calculated by the embedded processor;
the cache module is used for caching the plurality of predistorter coefficients in the acquisition module;
the state monitoring module is used for detecting whether the predistorter coefficient exists in the cache module; if the pre-distorter coefficient exists in the cache module, the state monitoring module displays a setting state; if the predistorter coefficient does not exist in the cache module, the state monitoring module displays a reset state;
and the delay module is used for carrying out delay processing on the baseband signal so as to align the signal passing through the delay module with the signal passing through the target predistorter.
9. A communication device, characterized in that it comprises a memory in which a computer program is stored and a processor which executes the computer program to implement the method according to any of claims 1-6.
10. A computer-readable storage medium, having a computer program stored thereon, which, when executed by a processor, performs the method of any one of claims 1-6.
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