CN113281640B - Self-diagnosis system and method for direct current chopping acquisition for rail transit - Google Patents

Self-diagnosis system and method for direct current chopping acquisition for rail transit Download PDF

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CN113281640B
CN113281640B CN202110818618.9A CN202110818618A CN113281640B CN 113281640 B CN113281640 B CN 113281640B CN 202110818618 A CN202110818618 A CN 202110818618A CN 113281640 B CN113281640 B CN 113281640B
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chopping
acquisition
diode
self
diagnosis
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CN113281640A (en
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佘清勇
胡丰伟
刘超
杜新
顾明龙
李翼
张旭
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Changzhou Jinchuang Electric Co ltd
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
    • G01R31/2836—Fault-finding or characterising
    • G01R31/2843—In-circuit-testing
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R35/00—Testing or calibrating of apparatus covered by the other groups of this subclass

Abstract

The invention discloses a direct current chopping acquisition self-diagnosis system and a direct current chopping acquisition self-diagnosis method for rail transit, which mainly comprise an isolation sampling circuit, a chopping control circuit and an FPGA (field programmable gate array) main controller, wherein the negative end of the chopping acquisition circuit realizes periodic sampling by adopting a PWM (pulse-width modulation) chopping mode based on the FPGA synchronization performance during operation, and meanwhile, a parallel processing chip FPGA realizes real-time diagnosis self-detection of the sampling system while finishing data acquisition through logic time sequence comprehensive proofreading according to self control time sequence and acquisition feedback results. Through the mode, the technical problem of rail transit relay heavy current sampling temperature control can be effectively solved, the relay heavy current loop with high current requirement can be accurately acquired on the premise of ensuring that the temperature rise of the acquisition loop is not changed through the control of detection time in a period, and meanwhile, real-time self-diagnosis can be carried out, the state of the detection loop is monitored, and the reliability of the acquisition loop is ensured.

Description

Self-diagnosis system and method for direct current chopping acquisition for rail transit
Technical Field
The invention relates to the technical field of rail transit, in particular to a direct-current chopping acquisition self-diagnosis system and a direct-current chopping acquisition self-diagnosis method for rail transit.
Background
The new era compendium of advanced planning of strong national railways of traffic (8.13.8) is published, and development targets and main tasks of the railways in China in 2035 and 2050 are determined. The high-speed rail network and the ordinary speed rail network which take eight longitudinal and eight transverse channels as main channels are further optimized and perfected. The outline is clear, and the national railway network operation mileage reaches about 20 kilometers by 2035 years, wherein the high-speed railway is about 7 kilometers. The railway coverage is realized in cities with more than 20 million people, and the high-speed rail access is realized in cities with more than 50 million people. At present, the operating mileage of the Chinese high-speed rail reaches 3.6 kilometers, the China is the first to live in the world, and the coverage rate of the urban high-speed rail with more than 100 million urban population reaches 94.7%.
China railway is moving forward towards digitization, intellectualization and intellectualization development direction continuously technically, aiming at the intellectualization demand, the collection of digital quantity and analog quantity of various devices on board becomes the premise of data convergence, in the current practical application, when the collection of state digital quantity in a large-capacity relay and a contactor is related, the long-term use and aging of a contact can cause a layer of oxidation film to be formed at the contact, the possibility of abnormal circulation of micro current (less than 6 mA) exists, and the good collection of the contact state of the large-capacity relay and the contactor is generally ensured by the collection current of about 10 mA.
The increase of acquisition current is basically realized by reducing the resistive load of an acquisition loop in the conventional scheme, but the scheme has certain disadvantage in acquisition channel power and temperature rise control, and for the direct current (110V) voltage of rail transit, the acquisition power of a single loop reaches 1.1W, so that the energy consumption is increased by thousands of acquisition points, and the service lives of devices such as semiconductors and capacitors are greatly shortened due to the increase of heat and temperature of acquisition boards.
In addition, the digital sampling technique also needs to be equipped with a self-checking loop to ensure the integrity of the sampling channel and the accuracy of the sampled data. Therefore, constructing a large-current loop direct-current chopping sampling and diagnosis technology for rail transit to solve the problems of channel power and temperature rise and simultaneously having the function of realizing full-period real-time self-checking is a key problem to be solved urgently in the current rail transit intelligent development.
Disclosure of Invention
The invention mainly solves the technical problem of providing a direct current chopping acquisition self-diagnosis system and a direct current chopping acquisition self-diagnosis method for rail transit, which adopt a high-current loop direct current chopping sampling and self-diagnosis technology, can effectively solve the technical problem of temperature control of rail transit relay high-current sampling, and realize accurate acquisition of relay high-current loops with high current requirements on the premise of ensuring constant temperature rise of the acquisition loop by controlling detection time in a period; when data acquisition is completed, real-time diagnosis self-inspection of the sampling system can be realized.
In order to solve the technical problems, the invention adopts a technical scheme that: the utility model provides a self-diagnosis system is gathered to direct current chopper for track traffic, includes: an isolation sampling circuit, a chopping control circuit and an FPGA main controller,
the output end D of the isolation sampling circuit is connected with the signal input end DI-i of the FPGA main controller, the signal output end Ctrl of the FPGA main controller is connected with the input end C of the chopping control circuit, and the A, B conduction control point of the negative end DI-of the isolation sampling circuit is interconnected with the A, B conduction control point of the chopping control circuit to serve as the control output end of the chopping control circuit.
In a preferred embodiment of the present invention, the isolation sampling circuit includes a TVS transistor, a current limiting resistor R1 disposed at the rear stage of the TVS transistor, a filter capacitor C1 disposed at the rear stage of the current limiting resistor R1, an anti-reverse diode D1 disposed at the rear stage of the filter capacitor C1, a zener diode ZD1 disposed at the rear stage of the anti-reverse diode D1, a diode optocoupler isolator PC1 disposed at the rear stage of the zener diode ZD1, a pull-up resistor R2 disposed at the rear stage of the diode optocoupler isolator PC1, and a buffer IC1 disposed at the rear stage of the pull-up resistor R2:
the TVS tube is connected in parallel between a positive terminal DI + and a negative terminal DI-of the isolation sampling circuit and is connected with one end of a current limiting resistor R1;
the other end of the current-limiting resistor R1 is connected with the anode of the anti-reverse diode D1, the other end of the current-limiting resistor R1 is simultaneously connected with the anode of the filter capacitor C1, the cathode of the filter capacitor C1 is connected with the negative end DI-of the isolation sampling circuit, the cathode of the filter capacitor C1 is simultaneously connected with the A end of the chopping control circuit, and the cathode of the anti-reverse diode D1 is connected with the cathode of the zener diode ZD 1;
the anode of the voltage-stabilizing diode ZD1 is connected with pin 1 of a diode optocoupler isolator PC1, pin 2 of the diode optocoupler isolator PC1 is connected with the B end of the chopper control circuit, pin 3 of the diode optocoupler isolator PC1 is connected with one end of a pull-up resistor R2, and pin 4 of the diode optocoupler isolator PC1 is connected with GND;
the other end of the pull-up resistor R2 is connected with a digital power supply VCC, the input end of the buffer IC1 is connected with the pin 3 of the diode optical coupling isolator PC1, and the output end of the buffer IC1 is connected with the signal input end DI-i of the FPGA main controller.
In a preferred embodiment of the invention, the chopper control circuit comprises a buffer IC2, a pull-up resistor R3, a diode optical coupling isolator PC2, a driving resistor R4, a voltage stabilizing diode ZD4, a voltage stabilizing diode ZD3 and a field effect transistor Q1,
the 1 end of the buffer IC2 is connected with the Ctrl end of the FPGA master controller, the 2 end of the buffer IC2 is connected with one end of a pull-up resistor R3, the 2 end of the buffer IC2 is connected with the 1 pin of a diode optical coupling isolator PC2, and the other end of the pull-up resistor R3 is connected with a digital power supply VCC;
a pin 3 of the diode optocoupler isolator PC2 is connected with GND, a pin 2 of the diode optocoupler isolator PC2 is connected with one end of a driving resistor R4, and a pin 4 of the diode optocoupler isolator PC2 is connected with the anode of a voltage stabilizing diode ZD4 and the S pole of a field effect transistor Q1 to serve as an output point at the A end of the chopper control circuit;
the other end of the driving resistor R4 is connected with the anode of the zener diode ZD3 and the G pole of the field effect transistor Q1, and the cathode of the zener diode ZD3 is connected with the cathode of the zener diode ZD 4.
In order to solve the technical problem, the invention adopts another technical scheme that: the DC chopper acquisition self-diagnosis system for the rail transit is adopted, a DC chopper acquisition self-diagnosis circuit is formed by an isolation sampling circuit and a chopper control circuit, the periodic sampling is realized by adopting a PWM chopper mode according to the synchronism of the negative end of the chopper acquisition circuit based on an FPGA main controller,
meanwhile, the FPGA main controller comprehensively corrects the logic time sequence according to the self control time sequence and the collection feedback result, and realizes real-time diagnosis self-check of the sampling system while finishing data collection.
In a preferred embodiment of the present invention, the step of determining that the dc chopping acquisition self-diagnostic circuit performs dc chopping acquisition is:
a1, connecting collection points DI + and DI-to the positive end and the negative end of the tested point respectively;
a2, generating chopped wave control waveform by FPGA master controllerThe Ctrl pin outputs 1kHz square wave, and controls V of a field effect transistor Q1 through a diode optical coupling isolator PC2 combined with a pull-up resistor R2GSHigh and low level output, and is at VGSAnd carrying out acquisition judgment when the voltage is high level.
In a preferred embodiment of the present invention, the self-checking for faults includes:
the sampling result is always high level due to loop abnormality, and the self-diagnosis criterion is that the acquired data is always high level when the PWM chopping wave is at low level;
the sampling result is always low level due to loop abnormality, and at the moment, the self-diagnosis criterion needs two paths of simultaneous acquisition, and the fault cause is formed after the correction.
In a preferred embodiment of the present invention, the specific process of the dc chopper acquisition self-diagnosis circuit for fault self-diagnosis includes:
the FPGA master controller performs chopping control to ensure that V of the field effect transistor Q1GSWhen the signal is at a high level and the collected point is at the high level, the signal collected by the system is judged to be at the high level;
the FPGA master controller performs chopping control to ensure that V of the field effect transistor Q1GSWhen the power is low level and the collected point is high level, the system does not make collection judgment;
the FPGA master controller performs chopping control to ensure that V of the field effect transistor Q1GSWhen the signal is at a high level and the collected point is at a low level, judging that the signal collected by the system is at a low level;
the FPGA master controller performs chopping control to ensure that V of the field effect transistor Q1GSWhen the power is low level and the collected point is low level, the system does not make collection judgment.
In a preferred embodiment of the present invention, the calculation formula of the current I in the chopper acquisition circuit is: i = (V)I-VD1-VZD1-VPC1-VDS）/R1，VIFor inputting voltages across DI + and DI-, VD1Voltage drop, V, of the anti-flyback diode D1ZD1For voltage drop voltage, V, of zener diode ZD1PC1Voltage drop, V, of diode optocoupler isolator PC1DSIs the drain voltage of a field effect transistor Q1, wherein the current I is more than or equal to 10 mA.
The invention has the beneficial effects that: the direct-current chopping acquisition self-diagnosis system and method for rail transit can effectively solve the technical problem of rail transit relay heavy-current sampling temperature control, and realize accurate acquisition of relay heavy-current loops with high current requirements on the premise of ensuring constant temperature rise of the acquisition loops by controlling detection time in a period; when data acquisition is completed, real-time diagnosis self-inspection of the sampling system can be realized.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without inventive efforts, wherein:
FIG. 1 is a circuit diagram of a DC chopper acquisition self-diagnostic system for rail traffic of the present invention;
FIG. 2 is a circuit diagram of a dual system application of the DC chopper acquisition self-diagnosis system for rail traffic of the present invention;
FIG. 3 is a timing diagram of the DC chopper acquisition self-diagnostic system for rail traffic of the present invention;
FIG. 4 is a measured waveform diagram of the DC chopper acquisition self-diagnosis system for rail transit of the present invention;
fig. 5 is an actual input waveform diagram of the dc chopper acquisition self-diagnosis system for rail transit of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1 to 5, an embodiment of the present invention includes:
a DC chopping acquisition self-diagnosis system for rail transit comprises an isolation sampling circuit, a chopping control circuit and an FPGA main controller, wherein the output end D of the isolation sampling circuit is connected with the signal input end DI-i of the FPGA main controller, the signal output end Ctrl of the FPGA main controller is connected with the input end C of the chopping control circuit, and the A, B conduction control point of the negative end DI-of the isolation sampling circuit and the A, B conduction control point of the chopping control circuit are interconnected to serve as the control output end of the chopping control circuit.
When the system runs, the isolation sampling circuit and the chopping control circuit form a direct-current chopping acquisition self-diagnosis circuit, periodic sampling is realized in a PWM (pulse-width modulation) chopping mode according to the synchronism of the negative end of the chopping acquisition circuit based on the FPGA main controller, meanwhile, the FPGA main controller of the parallel processing chip comprehensively corrects the time sequence and the acquisition feedback result according to the self control time sequence, and real-time diagnosis self-check of the sampling system is realized while data acquisition is finished.
Wherein, self-checking trouble includes: the loop abnormality causes the sampling result to be always at a high level, and the loop abnormality causes the sampling result to be always at a low level. The former self-diagnosis criterion is as follows: when the PWM chopping wave is at a low level, the collected data is often at a high level, namely the abnormity is judged; the latter self-diagnosis criterion needs two paths of simultaneous acquisition, and a fault cause is formed after proofreading.
Specifically, the isolation sampling circuit comprises a TVS tube, a current-limiting resistor R1 arranged at the rear stage of the TVS tube, a filter capacitor C1 arranged at the rear stage of the current-limiting resistor R1, an anti-reverse diode D1 arranged at the rear stage of the filter capacitor C1, a zener diode ZD1 arranged at the rear stage of the anti-reverse diode D1, a diode optocoupler isolator PC1 arranged at the rear stage of the zener diode ZD1, a pull-up resistor R2 arranged at the rear stage of the diode optocoupler isolator PC1, and a buffer IC1 arranged at the rear stage of the pull-up resistor R2:
the TVS tube is connected in parallel between a positive terminal DI + and a negative terminal DI-of the isolation sampling circuit and is connected with one end of a current limiting resistor R1;
the other end of the current-limiting resistor R1 is connected with the anode of the anti-reverse diode D1, the other end of the current-limiting resistor R1 is simultaneously connected with the anode of the filter capacitor C1, the cathode of the filter capacitor C1 is connected with the negative end DI-of the isolation sampling circuit, the cathode of the filter capacitor C1 is simultaneously connected with the A end of the chopping control circuit, and the cathode of the anti-reverse diode D1 is connected with the cathode of the zener diode ZD 1;
the anode of the voltage-stabilizing diode ZD1 is connected with pin 1 of a diode optocoupler isolator PC1, pin 2 of the diode optocoupler isolator PC1 is connected with the B end of the chopper control circuit, pin 3 of the diode optocoupler isolator PC1 is connected with one end of a pull-up resistor R2, and pin 4 of the diode optocoupler isolator PC1 is connected with GND;
the other end of the pull-up resistor R2 is connected with a digital power supply VCC, the input end of the buffer IC1 is connected with the pin 3 of the diode optical coupling isolator PC1, and the output end of the buffer IC1 is connected with the signal input end DI-i of the FPGA main controller.
Specifically, the chopper control circuit includes a buffer IC2, a pull-up resistor R3, a diode photo-isolator PC2, a driving resistor R4, a zener diode ZD4, a zener diode ZD3, and a field-effect transistor Q1:
the 1 end of the buffer IC2 is connected with the Ctrl end of the FPGA master controller, the 2 end of the buffer IC2 is connected with one end of a pull-up resistor R3, the 2 end of the buffer IC2 is connected with the 1 pin of a diode optical coupling isolator PC2, and the other end of the pull-up resistor R3 is connected with a digital power supply VCC;
a pin 3 of the diode optocoupler isolator PC2 is connected with GND, a pin 2 of the diode optocoupler isolator PC2 is connected with one end of a driving resistor R4, and a pin 4 of the diode optocoupler isolator PC2 is connected with the anode of a voltage stabilizing diode ZD4 and the S pole of a field effect transistor Q1 to serve as an output point at the A end of the chopper control circuit;
the other end of the driving resistor R4 is connected with the anode of the zener diode ZD3 and the G pole of the field effect transistor Q1, and the cathode of the zener diode ZD3 is connected with the cathode of the zener diode ZD 4.
As shown in fig. 1, the working principle of dc chopping acquisition is as follows: the DI + and DI-acquisition points are respectively connected with the positive end and the negative end of a tested point, an FPGA main controller generates a chopped wave control waveform, a 1kHz square wave is output from a Ctrl pin, and the V of a field effect transistor Q1 is controlled by combining a diode optical coupling isolator PC2 with a pull-up resistor R2GSHigh and low level output, and is at VGSAnd carrying out acquisition judgment when the voltage is high level.
The specific process of fault self-diagnosis of the chopping acquisition circuit comprises the following steps:
(1) the FPGA master controller performs chopping control to ensure that V of the field effect transistor Q1GSWhen the current is high level and the collected point is high level, the current passes through the current-limiting resistor R1 and flows through the anti-reverse diode D1 and the voltage-stabilizing diode ZD1, flows to the 2 pin through the 1 pin of the diode optical coupling isolator PC1, and flows to the DI-pole through the field effect transistor Q1; at the moment, the pin 3 and the pin 4 of the diode optocoupler isolator PC1 are conducted, and the DI-i collected signals are at a low level. If the self-checking loop does not report the abnormity, judging that the signal acquired by the system is at a high level;
(2) chopping control to make V of field effect transistor Q1GSWhen the current is low level and the collected point is high level, the field effect transistor Q1 is not conducted, the current I is 0, and the system does not make collection judgment at the moment;
(3) chopping control to make V of field effect transistor Q1GSWhen the signal is high level and the sampled point is low level, the field effect transistor Q1 is turned on, but because there is no voltage difference between DI + and DI-, the current I is 0, and the DI-I sampled signal is high level. If the self-checking loop does not report the abnormity, judging that the signal acquired by the system is at a low level;
(4) chopping control to make V of field effect transistor Q1GSWhen the voltage is low level and the collected point is low level, the field effect transistor Q1 is not conducted, no voltage difference exists between DI + and DI-, the current I is 0, and the system does not make collection judgment.
In conclusion, the direct-current chopping acquisition self-diagnosis circuit is only at VGSCarrying out acquisition judgment for a high level, and judging that the acquisition signal of the system is the high level when the DI-i acquisition signal is the low level and the self-checking loop does not report the abnormality; and when the DI-i acquisition signal is at a high level and the self-checking loop does not report the abnormality, judging that the system acquisition signal is at a low level.
In fig. 1, the calculation formula of the current I in the dc chopper acquisition self-diagnostic circuit is as follows:
I=（VI-VD1-VZD1-VPC1-VDS）/R1； （1）
in order to ensure that the value of the current I meets the requirement of not less than 10mA, parameters need to be set,wherein, VI=VDI+-VDI- =110V，VD1 =0.58V，VZD1 =30V，VPC1 ≈0.3V，VDS0.2V, so to ensure that the current I ≧ 10mA, it is required:
R1≤（VI-VD1-VZD1-VPC1-VDS）/ I； （2）
above VIFor inputting voltages across DI + and DI-, VD1Voltage drop, V, of the anti-flyback diode D1ZD1For voltage drop voltage, V, of zener diode ZD1PC1Voltage drop, V, of diode optocoupler isolator PC1DSIs the drain voltage of the fet Q1.
As shown in fig. 2 and fig. 3, the principle of realizing self-diagnosis by the acquisition loop is described as follows: two sets of chopped wave acquisition circuits are arranged in the circuit diagram of FIG. 2 and are respectively connected to the same FPGA main controller; in fig. 3, DI is a waveform actually required to be acquired, Ctrl is a chopping control waveform, DI-i is an acquisition level, and DI-i-err is a fault simulation waveform:
if only the waveforms of sequence (r) and sequence (c) and sequence (r) in table 1 appear in the cycle collection, the following results are shown: the system acquisition loop has no fault;
if other combinations occur, fault alarm is triggered, but due to the adoption of a dual-system acquisition system, small probability factors of simultaneous faults of an A-system sampling circuit and a B-system sampling circuit need to be ignored, diagnosis and self-inspection are only carried out on single-system faults at present, and the established fault situations mainly relate to chopper circuit abnormity, A-system sampling circuit abnormity and B-system sampling circuit abnormity, and are as follows:
(1) and Ctrl outputs waveforms by adopting 1kHz PWM control signals, and is particularly shown in figure 3, wherein the duty ratio of the system is 15 percent, namely, the FPGA main controller carries out acquisition operation processing at 15 percent of high level, which is called chopping acquisition.
(2) The DI-i waveform and the DI actual waveform have a collection response period, specifically, as ^ T1 and ^ T2 in FIG. 3, because the frequency of collecting Ctrl is 1kHz, the response period of ^ T1 and ^ T2 is not more than 1ms, and because the response periods of the relay and the contactor are both more than 5ms, the response period not more than 1ms meets the system requirements, and meanwhile, the response period can be adjusted by revising the Ctrl period.
(3) And DI-i-err is a fault simulation waveform, and in the real-time self-diagnosis of the system fault, two types of fault situations exist, which are respectively explained as follows:
failure scenario err 1: the failure of the acquisition loop causes the operation value of the acquired signal to be continuously high level;
for example, short circuit of the rear stage 3 and 4 pins of the diode optocoupler isolator PC1 or internal short circuit of the buffer IC1 in fig. 1 is induced, and in this situation, the fault determination is completed by the internal part of the FPGA master controller through correcting the values of Ctrl and DI-i;
the fault scenario err1 determination method is:
if Ctrl still collects external input as high level when low level, there are 2 kinds of collection triggering conditions when specific fault occurs:
combining sequences two and eight, wherein the A system fault is formed;
combining the sequence III and the sequence III, wherein the failure is a B-system failure;
then it is determined that this channel has a fault scenario err1 and the system will not trust the faulty channel, trust the other channel without fault, and perform a system alarm prompt.
Failure scenario err 2: the failure of the acquisition loop causes the operation value of the acquired signal to be continuously low level;
for example, the diode optocoupler isolator PC1 is broken by the rear 1 and 2 pins or the internal break of the buffer IC1 in fig. 1, and the like, under this situation, the fault determination can be completed by the internal part of the FPGA master controller through checking the A, B system Ctrl, DI-i-a, DI-i-B values;
the fault scenario err2 determination method is:
if Ctrl still collects high external input as high level when low level, and triggers condition:
combining sequences I and II, wherein the failure of the A system is present;
combining sequences I and III, wherein B is a fault;
then the determination is made that this channel is in the failure scenario err2 and the system will not trust this channel and trust another channel that is not in failure.
Table 1: combine the situation analysis table for fault scenarios:
Figure 369869DEST_PATH_IMAGE001
the fault situation combinations are more, not one row is taken, and only used as self-checking and feasibility description.
The direct-current chopping acquisition self-diagnosis system for the track traffic is mainly applied to acquisition of digital quantity of contacts of a large-capacity relay and a contactor in the track traffic, and can also be applied to other fields of similar application scenes in an analogy manner.
When the circuit operates, the negative end of the chopper acquisition circuit adopts a PWM (pulse-width modulation) chopping mode to realize periodic sampling based on FPGA (field programmable gate array) synchronization performance, and the power consumption of a sampling loop is realized by shortening the conduction time;
meanwhile, the FPGA of the parallel processing chip comprehensively corrects the logic time sequence according to the self control time sequence and the collection feedback result, and can realize real-time diagnosis self-check of the sampling system while finishing data collection; a complete large-current loop direct-current chopping sampling and diagnosis technology for rail transit is formed.
The DC chopper acquisition self-diagnosis system and method for the rail transit have the beneficial effects that:
the technical problem of rail transit relay heavy current sampling temperature control can be effectively solved, and the relay heavy current loop with high current requirement can be accurately acquired on the premise of ensuring that the temperature rise of the acquisition loop is not changed by controlling the detection time in a period;
when data acquisition is completed, real-time diagnosis self-check of a sampling system can be realized, the state of a detection loop is monitored, the reliability of the acquisition loop is ensured, and a complete direct-current chopping sampling and diagnosis technology for a large-current loop for rail transit is formed.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by the present specification, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.

Claims (7)

1. The utility model provides a self-diagnosis system is gathered with direct current chopping for track traffic which characterized in that includes: the output end D of the isolation sampling circuit is connected with the signal input end DI-i of the FPGA main controller, the signal output end Ctrl of the FPGA main controller is connected with the input end C of the chopping control circuit, the A, B conduction control point of the negative end DI-of the isolation sampling circuit and the A, B conduction control point of the chopping control circuit are interconnected to be used as the control output end of the chopping control circuit,
wherein the chopper control circuit comprises a buffer IC2, a pull-up resistor R3, a diode optocoupler isolator PC2, a driving resistor R4, a voltage stabilizing diode ZD4, a voltage stabilizing diode ZD3 and a field effect tube Q1,
the 1 end of the buffer IC2 is connected with the Ctrl end of the FPGA master controller, the 2 end of the buffer IC2 is connected with one end of a pull-up resistor R3, the 2 end of the buffer IC2 is connected with the 1 pin of a diode optical coupling isolator PC2, and the other end of the pull-up resistor R3 is connected with a digital power supply VCC;
a pin 3 of the diode optocoupler isolator PC2 is connected with GND, a pin 2 of the diode optocoupler isolator PC2 is connected with one end of a driving resistor R4, and a pin 4 of the diode optocoupler isolator PC2 is connected with the anode of a voltage stabilizing diode ZD4 and the S pole of a field effect transistor Q1 to serve as an output point at the A end of the chopper control circuit;
the other end of the driving resistor R4 is connected with the anode of the zener diode ZD3 and the G pole of the field effect transistor Q1, and the cathode of the zener diode ZD3 is connected with the cathode of the zener diode ZD 4.
2. The direct-current chopping acquisition self-diagnosis system for rail transit according to claim 1, wherein the isolation sampling circuit comprises a TVS tube, a current-limiting resistor R1 arranged at the rear stage of the TVS tube, a filter capacitor C1 arranged at the rear stage of the current-limiting resistor R1, an anti-reverse diode D1 arranged at the rear stage of the filter capacitor C1, a zener diode ZD1 arranged at the rear stage of the anti-reverse diode D1, a diode optocoupler isolator PC1 arranged at the rear stage of the zener diode ZD1, a pull-up resistor R2 arranged at the rear stage of the diode optocoupler isolator PC1, and a buffer IC1 arranged at the rear stage of the pull-up resistor R2:
the TVS tube is connected in parallel between a positive terminal DI + and a negative terminal DI-of the isolation sampling circuit and is connected with one end of a current limiting resistor R1;
the other end of the current-limiting resistor R1 is connected with the anode of the anti-reverse diode D1, the other end of the current-limiting resistor R1 is simultaneously connected with the anode of the filter capacitor C1, the cathode of the filter capacitor C1 is connected with the negative end DI-of the isolation sampling circuit, the cathode of the filter capacitor C1 is simultaneously connected with the A end of the chopping control circuit, and the cathode of the anti-reverse diode D1 is connected with the cathode of the zener diode ZD 1;
the anode of the voltage-stabilizing diode ZD1 is connected with pin 1 of a diode optocoupler isolator PC1, pin 2 of the diode optocoupler isolator PC1 is connected with the B end of the chopper control circuit, pin 3 of the diode optocoupler isolator PC1 is connected with one end of a pull-up resistor R2, and pin 4 of the diode optocoupler isolator PC1 is connected with GND;
the other end of the pull-up resistor R2 is connected with a digital power supply VCC, the input end of the buffer IC1 is connected with the pin 3 of the diode optical coupling isolator PC1, and the output end of the buffer IC1 is connected with the signal input end DI-i of the FPGA main controller.
3. A DC chopping acquisition self-diagnosis method for rail transit is characterized in that a DC chopping acquisition self-diagnosis system for rail transit according to any one of claims 1 to 2 is adopted, a DC chopping acquisition self-diagnosis circuit is formed by an isolation sampling circuit and a chopping control circuit, periodic sampling is realized by a PWM chopping mode according to the synchronism of a negative end terminal of the chopping acquisition circuit based on an FPGA main controller,
meanwhile, the FPGA main controller comprehensively corrects the logic time sequence according to the self control time sequence and the collection feedback result, and realizes real-time diagnosis self-check of the sampling system while finishing data collection.
4. The direct-current chopping acquisition self-diagnosis method for the track traffic as claimed in claim 3, wherein the step of determining that the direct-current chopping acquisition self-diagnosis circuit performs direct-current chopping acquisition is as follows:
a1, connecting collection points DI + and DI-to the positive end and the negative end of the tested point respectively;
a2, generating chopping control waveform by an FPGA main controller, outputting 1kHz square wave from a Ctrl pin, and controlling V of a field effect transistor Q1 by combining a diode optocoupler isolator PC2 with a pull-up resistor R2GSHigh and low level output, and is at VGSAnd carrying out acquisition judgment when the voltage is high level.
5. The track traffic direct-current chopping acquisition self-diagnosis method according to claim 4, wherein the self-checking of the fault comprises:
the sampling result is always high level due to loop abnormality, and the self-diagnosis criterion is that the acquired data is always high level when the PWM chopping wave is at low level;
the sampling result is always low level due to loop abnormality, and at the moment, the self-diagnosis criterion needs two paths of simultaneous acquisition, and the fault cause is formed after the correction.
6. The method for the track traffic direct-current chopping acquisition self-diagnosis as claimed in claim 5, wherein the specific process of the direct-current chopping acquisition self-diagnosis circuit for performing the fault self-diagnosis comprises the following steps:
the FPGA master controller performs chopping control to ensure that V of the field effect transistor Q1GSWhen the signal is at a high level and the collected point is at the high level, the signal collected by the system is judged to be at the high level;
the FPGA master controller performs chopping control to ensure that V of the field effect transistor Q1GSWhen the power is low level and the collected point is high level, the system does not make collection judgment;
the FPGA master controller performs chopping control to ensure that V of the field effect transistor Q1GSWhen the signal is at a high level and the collected point is at a low level, judging that the signal collected by the system is at a low level;
the FPGA master controller performs chopping control to ensure that V of the field effect transistor Q1GSAt a low level, while being collected at points ofAnd when the level is low, the system does not perform acquisition judgment.
7. The direct-current chopping acquisition self-diagnosis method for the track traffic as claimed in claim 6, wherein a calculation formula of the current I in the chopping acquisition circuit is as follows: i = (V)I-VD1-VZD1-VPC1-VDS）/R1，VIFor inputting voltages across DI + and DI-, VD1Voltage drop, V, of the anti-flyback diode D1ZD1For voltage drop voltage, V, of zener diode ZD1PC1Voltage drop, V, of diode optocoupler isolator PC1DSIs the drain voltage of a field effect transistor Q1, wherein the current I is more than or equal to 10 mA.
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CN2523107Y (en) * 2001-11-19 2002-11-27 顺德市华傲电子有限公司 Voltage sampling device of DC high-tension power source
CN105337263A (en) * 2015-11-13 2016-02-17 华南理工大学 Output overvoltage protection circuit and method for DC/DC converter
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