CN113261976A

CN113261976A - Electroencephalogram high-frequency oscillation signal acquisition system

Info

Publication number: CN113261976A
Application number: CN202110495142.XA
Authority: CN
Inventors: 刘铁军; 王爱健; 阳杰宏; 陈绅城; 郜东瑞; 谢佳欣; 应少飞; 任俊如; 尧德中
Original assignee: University of Electronic Science and Technology of China
Current assignee: University of Electronic Science and Technology of China
Priority date: 2021-05-07
Filing date: 2021-05-07
Publication date: 2021-08-17

Abstract

The invention discloses an electroencephalogram high-frequency oscillation signal acquisition system which comprises a Power.Schdoc power supply module, an Analog & ADC.Schdoc front-end Analog signal acquisition Analog-to-digital conversion module, an FPGA.Schdoc logic control module, a USB.Schdoc data transmission module and a marker.Schdoc external marking level conversion module, wherein the Power.Schdoc power supply module is internally and electrically connected with a lithium battery charging module and a voltage conversion module, the lithium battery charging module is internally and electrically connected with a lithium battery charging and discharging control module, the voltage conversion module is internally and electrically connected with a boosting module, and a Power.Schdoc power supply part is electrically connected with a 5V isolation power supply module; the invention can collect high-frequency brain electrical signals and simultaneously reserve the characteristic of collecting traditional low-frequency brain electrical signals; the pulse electrical stimulation device can be combined with pulse electrical stimulation equipment to collect low-frequency and high-frequency somatosensory evoked potentials; the invention can reserve various external Marker interfaces and can be applied to acquisition of all kinds of electroencephalogram high-frequency oscillation signals.

Description

Electroencephalogram high-frequency oscillation signal acquisition system

Technical Field

The invention relates to the technical field of medical instruments, in particular to an electroencephalogram high-frequency oscillation signal acquisition system.

Background

The brain is one of the most important and complex organs of the human body, is the most advanced part of the nervous system, and governs all the advanced nerve activities of the human body. The cerebral cortex is composed of 100 billion neurons, and electroencephalogram signals are discharge activities of thousands of neuronal cells synchronously occurring in the same spatial orientation. Originating from excitatory or inhibitory postsynaptic potentials. The electric potential recorded from the surface of the cortex layer is the sum of electric fields generated when a plurality of neurons simultaneously move, namely the electroencephalogram signal.

The brain electrical signal is used as a biological electrical signal which is generated by the human brain and can reflect the brain activity characteristics, the contained brain activity information is very rich, and the research on the brain electrical signal has been paid extensive attention internationally. The brain electrical activity can be divided into two types, one is spontaneous brain electrical activity and the other is induced brain electrical activity. The spontaneous electroencephalogram is the electroencephalogram naturally formed in different parts of the brain without external stimulation; the induced brain electricity is the brain electricity formed in the brain by means of external stimulation (light, electricity, direct stimulation of the cerebral cortex, etc.). The recording frequency of the traditional electroencephalogram signals is less than 100Hz, the research on the electroencephalogram signals with the frequency higher than 100Hz is still in the process of groping, and no clear classification exists at present. According to the literature reading research, part of researchers refer to the brain electrical signals above 30Hz as high-frequency oscillation brain electrical activity. The high frequency oscillations mentioned in the literature include: high frequency oscillations of less than 100Hz, recorded during the sleep phase of the human slow wave and in the state of waking silence, are mainly present in the olfactory cortex, the amygdala part, of the hippocampus. The high-frequency oscillations are consistent with the occurrence time of sleep spindle waves and apical waves, so that the information transmission between the hippocampus and the neocortex in the sleep period is realized; also visual evoked high frequency oscillatory activity in the visual cortex of the occipital lobe of the brain at approximately 80-300Hz, and somatosensory evoked high frequency oscillatory activity in the parietal lobe of the brain at approximately 200-800 Hz; high-frequency oscillation in the brain of an epileptic patient is also the most studied at present, and the high-frequency oscillation in the frequency range of 250-600Hz is considered to have a remarkable correlation with an epileptogenic focus of the epileptic, and the high-frequency oscillation can reflect the basic activity of neurons in the epileptogenic focus. At present, spontaneous electroencephalogram, the frequency exceeding 200Hz is not recorded.

In order to better research the electroencephalogram high-frequency oscillation signals, the invention designs an eight-channel electroencephalogram signal amplifier which has high sampling rate, wide bandwidth and real-time transmission and display data. Meanwhile, in order to effectively collect electroencephalogram high-frequency oscillation without wound, the invention designs a pulse type electrical stimulation device by selecting and combining requirements of a somatosensory evoked potential experiment, and records brain high-frequency oscillation signals through stimulation and induction.

Disclosure of Invention

The invention aims to provide an electroencephalogram high-frequency oscillation signal acquisition system to solve the problems in the background technology.

In order to achieve the purpose, the invention provides the following technical scheme:

the utility model provides an electroencephalogram high-frequency oscillation signal collection system, includes power, Schdoc power module, Analog & ADC, Schdoc front end Analog signal collection Analog-to-digital conversion module, FPGA, Schdoc logic control module, USB, Schdoc data transmission module and marker, Schdoc external marking level conversion module, power, the inside electric connection of Schdoc power module has lithium battery charging module and voltage conversion module, the inside electric connection of lithium battery charging module has lithium battery charging and discharging control module, the inside electric connection of voltage conversion module has boost module, power, Schdoc power module electric connection has 5V to keep apart power module, Analog & ADC, Schdoc front end Analog signal collection Analog-to-digital conversion module inside electric connection has Analog front end signal amplification filter circuit and signal Analog-to-digital conversion circuit.

As a further scheme of the invention: the lithium battery charging and discharging control module is composed of resistors R47, R48, R50, R51 and R53, capacitors C74 and C75, an LED lamp LED2, an LED3 and a CN3065 lithium battery charging management chip.

As a still further scheme of the invention: the boosting module is a 3.7V-to-5V boosting module and consists of capacitors C70-C73, C76-C79, resistors R49, R52, R54 and R55, an inductor L1 and a TPS63020 buck/boost conversion chip.

As a still further scheme of the invention: the 5V isolation power supply module consists of capacitors Cz16, Cz17 and Cz18, resistors R59 and R60 and WRB0505S-3WR2 power supply isolation chips.

As a still further scheme of the invention: the analog front-end signal amplification filter circuit is composed of chips U1, U2A, U2B and U3, resistors R1-R14, tantalum capacitors CZ1, CZ2, CZ3 and CZ4 and capacitors C1-C12.

As a still further scheme of the invention: the signal analog-digital conversion circuit is composed of capacitors C21, C22, C25, C26, C29, C30, C31, Cz 7-Cz 12, resistors R24, R25, R26, R28, R29, R30, R32, R31, R33 and ADS1278 analog-digital converter chips.

Compared with the prior art, the invention has the beneficial effects that:

1. the invention can collect high-frequency brain electrical signals and simultaneously reserve the characteristic of collecting traditional low-frequency brain electrical signals;

2. the pulse electrical stimulation device can be combined with pulse electrical stimulation equipment to collect low-frequency and high-frequency somatosensory evoked potentials;

3. the invention can reserve various external Marker interfaces and can be applied to acquisition of all kinds of electroencephalogram high-frequency oscillation signals.

Drawings

FIG. 1 is a block diagram of the system of the present invention;

FIG. 2 is a schematic diagram of a lithium battery charging circuit of the present invention;

FIG. 3 is a schematic diagram of a 3.7V to 5V circuit of the present invention;

FIG. 4 is a schematic diagram of a 5V isolated power supply circuit of the present invention;

FIG. 5 is a schematic diagram of the 5V to 3.3V, 2.5V, 1.2V, 1.8V and-5V circuits of the present invention;

FIG. 6 is a schematic diagram of an analog front end signal amplification filter circuit of the present invention;

FIG. 7 is a schematic diagram of a signal analog-to-digital conversion circuit of the present invention;

FIG. 8 is a schematic diagram of an FPGA logic control circuit of the present invention;

FIG. 9 is a schematic diagram of a USB data transmission circuit according to the present invention;

FIG. 10 is a schematic diagram of the external marker level shifting of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to fig. 1 to 10, in an embodiment of the present invention, an electroencephalogram high-frequency oscillation signal acquisition system includes a power.schdoc power module, an Analog & adc.schdoc front-end Analog signal acquisition Analog-to-digital conversion module, an fpga.schdoc logic control module, a usb.schdoc data transmission module, and a marker.schdoc external mark level conversion module, where the power.schdoc power module is electrically connected with a lithium battery charging module and a voltage conversion module, the lithium battery charging module is electrically connected with a lithium battery charging and discharging control module, the voltage conversion module is electrically connected with a boosting module, the power.schdoc power module is electrically connected with a 5V isolation power module, and the Analog & adc.schdoc front-end Analog signal acquisition Analog-to-digital conversion module is electrically connected with an Analog front-end signal amplification filter circuit and a signal Analog-to-digital conversion circuit.

The working principle of the invention is as follows: as shown in fig. 1, the power.schdoc power module supplies power to the whole system; analog & ADC.Schdoc front-end Analog signal acquisition Analog-to-digital conversion module realizes amplification and filtering of signals and converts Analog signals into digital signals; the Schdoc logic control module performs logic time sequence control on the whole ADC signal acquisition data conversion; the SchDoc data transmission module transmits data to the PC end according to a USB transmission protocol; and a Marker and SchDoc external mark level conversion module carries out appropriate level conversion detection on external Marker input to mark data.

As shown in fig. 2-5, the lithium battery charging module and the voltage conversion module adopt a lithium battery to supply power in order to reduce power frequency interference as much as possible and improve system portability in consideration of the weak amplitude of the electroencephalogram signal. The embodiment of the present invention adopts a 3.7V polymer lithium battery with a protection plate for preventing overcharge/overdischarge/short circuit/overcurrent, a large capacity of 2000mAh, as a rechargeable lithium battery. Wherein the voltage of the lithium battery is boosted to 5V through the voltage conversion module. The whole voltage conversion module comprises a module for converting 3.7V into 5V, a module for converting 5V into 3.3V, 2.5V, 1.2V, 1.8V and-5V and a 5V isolation power supply module;

as shown in fig. 2, the lithium battery charging and discharging control module is composed of resistors R47, R48, R50, R51, R53, capacitors C74 and C75, an LED lamp LED2, an LED3 and a CN3065 lithium battery charging management chip. VBAT + and PGND are connected with the anode and cathode of the lithium battery. C74 and C75 are used as power supply filter stable voltages. The R50 resistor controls the charging current I to be 1800/R50 to be less than or equal to 1A. The

LEDs

2 and 3 are charge and discharge indicator lights, the indicator light LED3 is always on during charging, and the indicator light LED2 is on after full charging. The resistors R47 and R48 are matched with TEMP to detect the charging and discharging temperature.

As shown in fig. 3, a 3.7V to 5V boost module; the buck/boost conversion chip comprises capacitors C70-C73, C76-C79, resistors R49, R52, R54 and R55, an inductor L1 and a TPS63020 buck/boost conversion chip. The capacitance values of the capacitors C76-C79 are 22uF, the capacitance values of the capacitors C72-C73 are 10uF, power input and output filtering is realized, and the inductance L1 is 10uH for energy storage. The resistors R49 and R55 are in resistance matching with each other to control the voltage value of the buck-boost voltage. Rout is (R55/R49+1) × 0.5V. The module boosts the voltage of the lithium battery from 3.7V to 5V to provide a basis for later voltage conversion.

As shown in fig. 4, a 5V isolated power module; the chip is composed of capacitors Cz16, Cz17 and Cz18, resistors R59 and R60 and WRB0505S-3WR2 power isolation chips. The highest 1.5KV power supply isolation effect is achieved, isolation between systems such as human bodies is achieved, and human body safety is protected. The capacitance Cz16 is organized as 100uF, the capacitance Cz17 is 47uF in resistance, and the capacitance Cz18 is 10uF in resistance.

As shown in FIG. 5, the modules are 5V to 3.3V, 2.5V, 1.2V, 1.8V and-5V; the voltage regulator consists of capacitors C64-C69, C80-C89, C91, Cz 13-Cz 15, resistors R58 and R63, a chip ASM-1117 voltage regulator and a chip ADP151 linear voltage regulator. The capacitance values of the capacitors C64-C69 are 0.1uF, the capacitance values of the capacitors Cz 3-Cz 15 are 220uF, the capacitance values of the capacitors C80, C81, C84 and C85 are 4.7uF, the capacitance values of the capacitors C82, C83, C86 and C87 are 0.1uF, the capacitance value of the capacitor C91 is 2.2uF, power supply filtering is achieved, and the capacitance value of the capacitor C88 is 2.2uF, and the capacitor is used as a charge pump energy storage conversion capacitor to achieve negative voltage conversion.

As shown in fig. 6, the analog front end signal amplification filter circuit is composed of chips U1, U2A, U2B and U3, resistors R1 to R14, tantalum capacitors CZ1, CZ2, CZ3 and CZ4, and capacitors C1 to C12. The tantalum capacitors CZ1, CZ2, CZ3 and CZ4 and the capacitors C8, C9, C11, C12 and C2 play a role in filtering; the operational amplifier U3 AD8422 and the resistors R6, R11 and R13 form a differential operational amplifier amplifying circuit, the resistors R6 and R13 are matched resistors to offset the influence of offset voltage, and the resistor R11 is used as a variable resistor to adjust the amplification factor; the operational amplifier U2B and the resistors R12 and C7 form a high-pass filter, the lower limit frequency of electroencephalogram is set, and the cut-off frequency is determined by the values of R12 and C7; the resistors R10, R9, C4 and C5 form a second-order low-pass filter, the upper limit frequency of electroencephalogram is set, and the cut-off frequency is determined by the value of the resistor and the capacitor; the operational amplifier U2A, R2 and R3 form an in-phase proportional operational amplifier for amplifying and attenuating electroencephalogram signals, and the amplification factor is determined by R3 and R2; the operational amplifier U1THS4521 and the resistors R1, R4, R5, R7, R8, R14, the capacitors C1, C10 and C3 form a single-ended-to-differential operational amplifier circuit which is matched with a peripheral ADC.

As shown in fig. 7, the signal analog-to-digital conversion circuit is composed of capacitors C21, C22, C25, C26, C29, C30, C31, Cz7 to Cz12, and analog-to-digital converter chips of resistors R24, R25, R26, R28, R29, R30, R32, R31, R33, and ADS 1278. The capacitors play a role in power supply filtering, and the resistors are used as current-limiting resistors to realize high-low level logic selection. The VREFP external 2.5V reference voltage of the pin VREFP of the ADS1278 chip is used as an analog-to-digital conversion voltage reference, and VCOM is used as a feedback connection front-end analog circuit and is used as a reference for converting a single-end signal into a double-end signal. And the pin RDY is connected with an ADC _ RDY pin of the FPGA and is used as a sign for completing one-time data conversion of the ADC. And the pin SCLK is connected with a pin ADC _ SCLK of the FPGA to be used as a synchronous clock signal for transmitting data between the ADC and the FPGA. Pins SCLKAINN 1-AINN 7, RLN8, AINP 1-AINP 7, and RLP8 are used for differential analog signal input and receiving signals after front-end analog amplification and filtration. The pins DOUT 1-DOUT 8 are used as converted digital signal outputs and are connected to the ADOUT 1-ADOUT 8 pins of the FPGA module. The module is logically controlled by the FPGA to complete the process of converting the analog signal into the digital signal.

As shown in fig. 8, the FPGA logic control circuit uses EP4CE6E22C8 of the cycle _ IV series of the Alter company to control the FPGA chip logically. The clock of the FPGA is provided by an active crystal oscillator X2, and the clock frequency is 25 MHz. Because the FPGA chip does not have a ROM required by program curing, the U10 FLASH chip M25P16VMN is externally loaded to serve as a system for program curing, and the program required to be cured is stored. The FPGA program downloading uses a universal JTAG interface JA1, 4 lines are shared by removing power line interfaces A2V5 and D, and the clock line FTCK, the mode selection FTMS, the data input FTDI and the data output FTDO are respectively used. And (4) finishing the downloading and burning of the FPGA program by using a JTAG interface. Pins ADC _ RDY and ADC _ SCLK are connected with and control the analog-to-digital conversion ADC, the ADC _ RDY detects the data conversion condition of the ADC to judge whether the data conversion of the ADC is completed, and the ADC _ SCLK sends a clock to the ADC to serve as a reference to read the data after the data conversion of the ADC. The external pins ADOUT 1-ADOUT 8 are connected to the front-end analog-to-digital conversion ADC module, and transmit 8-bit data in parallel. The control interfaces F _ empty, F _ full, FIFOADR0, FIFOADR1, SLCS, SLOE, SLRD and SLWR are used for controlling different logic functions of the USB control pin corresponding to the USB module; the GPD 0-GPD 15 are connected with the GPD0-15 pin of the USB module to realize FIFO parallel data transmission. And the M _ TX, M _ RX and EXIT are externally connected with a Marker module and used for receiving and detecting an externally input Marker signal.

As shown in FIG. 9, the USB data transmission circuit takes a USB chip CY7C68013-100 of cypress company as a core, and an external 24LC01/02/64 data storage E2PROM chip realizes automatic program loading operation. Controlling the interfaces F _ empty and F _ full to realize FIFO data empty mark and full mark detection; FIFOADR0 and FIFOADR1 are internal FIFO address control pins; correspondingly selecting different FIFO blocks; SLCS and SLOE are enable control pins; SLRD and SLWR realize the read-write control of data to FIFO block; the pins GPD 0-GDP 15 are FIFO data pins, and FIFO16 bit data parallel transmission is realized. The USB _ N, USB _ P pin is externally connected with a USB interface to transmit data to the PC terminal.

As shown in fig. 10, the external Marker level conversion includes two types of external Marker detection; the pulse type single Marker signal is connected with an external power supply through a P3 interface, a pin 3 of a P3, a pin 2 is connected with a Marker level signal, a pin 3 is grounded, and a level conversion is transmitted to the FPAG module from a pin 6 of an ISO7310 through an ISO7310 isolation chip to be detected and marked. The multi-style Marker signal is connected to a chip ADM3251E through an external interface P2 for level conversion, and is output from

pins

8 and 9 and sent to the FPGA for serial port level detection. 232RX and M _ RX correspond to serial receive levels.

The invention comprises an electroencephalogram amplifier and pulse type electrical stimulation equipment, wherein the electroencephalogram amplifier signal acquisition equipment comprises an analog circuit, a digital circuit and computer-side acquisition software. The analog circuit comprises amplification, filtering, digitization and electrical isolation of signals, and has the characteristics of high input impedance, low noise, high sampling rate and electrical isolation safety. The digital circuit adopts an FPGA chip to control data conversion and real-time USB transmission of data. The computer side acquisition software utilizes Qt to compile, receive and store real-time transmitted USB data and carries out drawing display; somatosensory induction electric stimulation equipment mainly comprises an analog Howland current source part and a digital control part, wherein the stimulation mode is pulse type electric stimulation, and the stimulation frequency and the stimulation intensity are adjustable. The EEG signal acquisition equipment designed by the invention has 8 signal channels in total, the sampling rate is 20KHz, the bandwidth is 0.5Hz-1592Hz, the analog-to-digital conversion resolution is 24 bits, the signal reference ground short-circuit noise is less than 4uV, and the common mode rejection ratio of the system can reach more than 80dB (50 Hz).

It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.

Claims

1. The utility model provides a brain electricity high frequency oscillation signal collection system, its characterized in that, including power.Schdoc power module, Analog & ADC.Schdoc front end Analog signal collection Analog-to-digital conversion module, FPGA.Schdoc logic control module, USB.Schdoc data transmission module and marker.Schdoc external mark level conversion module, the inside electric connection of power.Schdoc power module has lithium battery charging module and voltage conversion module, the inside electric connection of lithium battery charging module has lithium battery charging and discharging control module, the inside electric connection of voltage conversion module has the module of stepping up, power.Schdoc power module electric connection has 5V to keep apart power module, the inside electric connection of Analog & ADC.Schdoc front end Analog signal collection Analog-to-digital conversion module has Analog front end signal amplification filter circuit and signal Analog-to-digital conversion circuit.

2. The electroencephalogram high-frequency oscillation signal acquisition system according to claim 1, wherein the lithium battery charging and discharging control module is composed of resistors R47, R48, R50, R51 and R53, capacitors C74 and C75, an LED lamp LED2, an LED3 and a CN3065 lithium battery charging management chip.

3. The electroencephalogram high-frequency oscillation signal acquisition system according to claim 1, wherein the boosting module is a 3.7V-to-5V boosting module, and the boosting module is composed of capacitors C70-C73, C76-C79, resistors R49, R52, R54, R55, an inductor L1 and a TPS63020 buck/boost conversion chip.

4. The electroencephalogram high-frequency oscillation signal acquisition system according to claim 1, wherein the 5V isolation power supply module is composed of capacitors Cz16, Cz17 and Cz18, and power isolation chips of resistors R59, R60 and WRB0505S-3WR 2.

5. The electroencephalogram high-frequency oscillation signal acquisition system according to claim 1, wherein the analog front-end signal amplification filter circuit is composed of chips U1, U2A, U2B and U3, resistors R1-R14, tantalum capacitors CZ1, CZ2, CZ3 and CZ4 and capacitors C1-C12.

6. The electroencephalogram high-frequency oscillation signal acquisition system according to claim 1, wherein the signal analog-to-digital conversion circuit is composed of capacitors C21, C22, C25, C26, C29, C30, C31, Cz 7-Cz 12, resistors R24, R25, R26, R28, R29, R30, R32, R31, R33 and ADS1278 analog-to-digital converter chips.