CN113257665B - Manufacturing method of microlens array and manufacturing method of image sensor - Google Patents
Manufacturing method of microlens array and manufacturing method of image sensor Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 60
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- 238000005530 etching Methods 0.000 claims abstract description 50
- 238000001312 dry etching Methods 0.000 claims abstract description 41
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- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14625—Optical elements or arrangements associated with the device
- H01L27/14627—Microlenses
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- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
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- H01L27/144—Devices controlled by radiation
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Abstract
The invention provides a manufacturing method of a micro lens array and a manufacturing method of an image sensor. The manufacturing method of the micro lens array comprises the following steps: providing a semiconductor substrate with a first dielectric layer formed on the surface; forming a plurality of mask units distributed in an array on the first dielectric layer; etching the first dielectric layer until the surface of the semiconductor substrate is exposed by taking the mask unit as a mask to form a plurality of bumps, and removing the mask unit, wherein the bumps are obtained by intermittently executing a dry etching process to etch the first dielectric layer for more than two times, and in the intermittent period, mask pattern reshaping is carried out to reduce the coverage of each mask unit; and forming a second dielectric layer on the semiconductor substrate to obtain the microlens array. By using the manufacturing method of the micro-lens array, the included angle between the side surface of the micro-lens and the surface of the substrate can be flexibly adjusted, and the outline of the micro-lens is smoother. The manufacturing method of the image sensor comprises the manufacturing method of the micro lens array.
Description
Technical Field
The present invention relates to the field of image sensors, and in particular, to a method for manufacturing a microlens array and a method for manufacturing an image sensor.
Background
At present, in the manufacturing process of the complementary metal oxide semiconductor image sensor (CMOS Image Sensor, CIS), the micro lens array (Micro lens arrays) is added above the Pixel (Pixel) area, so that the crosstalk between pixels can be effectively improved, the optical path is optimized, and the sensitivity of the image sensor is improved.
Fig. 1 to 3 are schematic cross-sectional views illustrating a plurality of steps in a conventional microlens manufacturing process. The conventional microlens fabrication process includes the steps of: as shown in fig. 1, an etching stop layer 101 and a first dielectric layer 102 are sequentially formed on a semiconductor substrate 100 in a superimposed manner, and a patterned photoresist layer 103 is formed on the first dielectric layer 102; as shown in fig. 2, the patterned photoresist layer 103 is used as a mask to etch the first dielectric layer 102, and the first dielectric layer is stopped on the upper surface of the etching stop layer 101, and the remaining first dielectric layer forms a plurality of bumps 102a, where the plurality of bumps 102a are arranged in an array; as shown in fig. 3, after the photoresist layer 103 is removed, a second dielectric layer 104 is deposited along the bump 102a and the surface of the semiconductor substrate 100, thereby obtaining a microlens array. When the first dielectric layer is etched, an included angle between the side surface of the bump and the surface of the semiconductor substrate needs to be adjusted by controlling a dry etching process, so that the radian of the surface of the micro lens is controlled, and therefore, the shape control of the bump is particularly important in the manufacturing process of the micro lens array.
In the dry etching process, the included angle of the bump side is generally controlled by adjusting the composition of the reaction gas. For example, in the dry etching process, a fluorocarbon compound containing hydrogen (H) and having a relatively large ratio of carbon atoms to fluorine atoms (C/F) in the molecule is used to easily form long-chain polymers (polymers) and simultaneously form passivation layers together with silicon products, and when these polymers are deposited on the side walls of the etched material layer (for example, the first dielectric layer) described above, the polymers can play a role in protecting the side walls, thereby realizing anisotropic etching, and further etching out bumps having a certain included angle between the side surfaces and the surface of the semiconductor substrate.
Fig. 4 is a cross-sectional view of a bump obtained using a conventional microlens fabrication process. As shown in fig. 4, the top of the bump obtained by the conventional microlens manufacturing process has a sharp corner, and the side surface of the bump has a large included angle with the surface of the semiconductor substrate. In addition, by adjusting the composition of the dry etching reaction gas, only the side surface of the boss can be formed into a certain inclination angle, and when the microlens is formed by adopting the conventional process due to the limitation of the flow range of the machine Mass Flow Controller (MFC), the adjustable range of the included angle between the side surface of the boss and the surface of the semiconductor substrate is smaller, and the included angle is difficult to adjust to 60 degrees or less, and when the included angle is larger than 60 degrees, the microlens which is nearly spherical is difficult to form after the second dielectric layer is deposited on the surface of the boss. When the outline of the micro lens is not good, the light collection of the image sensor is not facilitated, and the performance of the image sensor is affected. In addition, the conventional process is easy to generate excessive polymer in the process of forming the bump, which increases the risk of stripping (peeling effect) of the polymer in the cavity of the machine, and is not beneficial to the maintenance of the machine.
Disclosure of Invention
The invention provides a manufacturing method of a micro-lens array and a manufacturing method of an image sensor, which can flexibly adjust the included angle between the side surface of the micro-lens and the surface of a semiconductor substrate, and the outline of the micro-lens is smoother, thereby being beneficial to improving the performance of the image sensor.
In one aspect, the present invention provides a method for manufacturing a microlens array, including:
providing a semiconductor substrate, wherein a first dielectric layer is formed on the semiconductor substrate, and the first dielectric layer covers the surface of the semiconductor substrate;
forming a plurality of mask units arranged in an array on the first dielectric layer, wherein gaps among the mask units expose the first dielectric layer;
etching the first dielectric layer until the surface of the semiconductor substrate is exposed by taking the mask units as masks, forming a plurality of bumps corresponding to the mask units one by the rest first dielectric layer, and removing the mask units; and
forming a second dielectric layer on the semiconductor substrate, wherein the second dielectric layer conformally covers the bump surface and the semiconductor substrate surface, so as to obtain a micro lens array;
in the step of etching the first dielectric layer, the bump is obtained by intermittently performing a dry etching process for more than two times, and mask pattern reshaping is performed during the intermittent period to reduce the coverage of each mask unit.
Optionally, in the step of etching the first dielectric layer, the bump is formed by two, three or four discontinuous dry etching processes.
Optionally, the etching gas, the gas flow, the gas pressure and the bias voltage adopted by the dry etching process for more than two times are the same.
Optionally, the etching time of the dry etching process is the same for more than two times.
Optionally, the material of the mask unit is photoresist.
Optionally, the mask pattern remodelling uses a dry etching process, and the etching gas used includes C 4 F 8 And O 2 。
Optionally, the thickness of the first dielectric layer is 3000-5000 angstroms.
Optionally, an etching stop layer is formed on the semiconductor substrate, and the bump is formed on the surface of the etching stop layer.
Optionally, an included angle between the side surface of the bump and the surface of the semiconductor substrate is less than or equal to 60 degrees.
The invention also provides a manufacturing method of the image sensor, which comprises the manufacturing method of the micro lens array.
In the manufacturing method of the microlens array and the manufacturing method of the image sensor, the dry etching process is intermittently executed for more than two times to etch the first dielectric layer to form the convex blocks, and mask pattern reshaping is carried out in the intermittent period to reduce the coverage of each mask unit, so that the etched area of the first dielectric layer is gradually increased, the sharp angle at the top of the first dielectric layer exposed after the mask unit is reduced is easier to remove in the subsequent etching process, the included angle between the side surface of the convex blocks and the surface of the semiconductor substrate can be reduced, and the outline of the convex blocks is smoother, so that the included angle between the side surface of the microlens formed on the basis of the convex blocks and the surface of the semiconductor substrate is smaller, the microlens with smoother outline is facilitated to be obtained, and the nearly hemispherical microlens can be obtained in preference, and the performance of the image sensor is improved. In addition, by adjusting the execution times of the dry etching process to etch the first dielectric layer (i.e. the interruption times of etching the first dielectric layer), adjusting the etching time of the dry etching process for more than two times, namely, adjusting the execution time point of the mask pattern reshaping, and/or adjusting the shrinkage of the coverage area of the mask unit, the morphology of the obtained bump and the included angle between the side surface of the obtained bump and the surface of the semiconductor substrate can be flexibly adjusted, so that the morphology of the microlens and the included angle between the side surface of the microlens and the surface of the semiconductor substrate can be adjusted.
Drawings
Fig. 1 to 3 are schematic sectional views illustrating a plurality of steps in a conventional microlens manufacturing process.
Fig. 4 is a cross-sectional view of a bump obtained using a conventional microlens fabrication process.
Fig. 5 is a flowchart of a method for manufacturing a microlens array according to an embodiment of the invention.
Fig. 6 to 10 are schematic cross-sectional views illustrating a plurality of steps of a method for manufacturing a microlens array according to an embodiment of the invention.
Fig. 11 is a cross-sectional view of a mask unit and a first dielectric layer after mask pattern reshaping in accordance with an embodiment of the present invention.
Fig. 12 is a cross-sectional view of a bump obtained by a method for manufacturing a microlens array according to an embodiment of the present invention.
Fig. 13 to 19 are schematic cross-sectional views illustrating steps of a method for fabricating a microlens array according to another embodiment of the present invention.
Fig. 20 is a partial enlarged cross-sectional view of a bump obtained by a manufacturing method according to another embodiment of the present invention.
Detailed Description
The method for manufacturing the microlens array and the method for manufacturing the image sensor according to the present invention are described in further detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the invention.
Example 1
The embodiment provides a manufacturing method of a micro lens array. Fig. 5 is a flowchart of a method for manufacturing a microlens array according to an embodiment of the invention. As shown in fig. 5, the method for manufacturing the microlens array includes:
s1, providing a semiconductor substrate, wherein a first dielectric layer is formed on the semiconductor substrate, and the first dielectric layer covers the surface of the semiconductor substrate;
s2, forming a plurality of mask units which are arranged in an array on the first dielectric layer, wherein gaps among the mask units expose the first dielectric layer;
s3, taking the mask units as masks, etching the first dielectric layer until the surface of the semiconductor substrate is exposed, forming a plurality of bumps corresponding to each mask unit one by the rest first dielectric layer, and removing the mask units, wherein in the step of etching the first dielectric layer, the bumps are obtained by intermittently executing a dry etching process for more than two times, and mask pattern reshaping is carried out in an intermittent period so as to reduce the coverage of each mask unit; and
s4, forming a second dielectric layer on the semiconductor substrate, wherein the second dielectric layer conformally covers the bump surface and the semiconductor substrate surface, and therefore the microlens array is obtained.
Fig. 6 to 10 are schematic cross-sectional views illustrating a plurality of steps of a method for manufacturing a microlens array according to an embodiment of the invention. The method of manufacturing the microlens array of the present embodiment will be described below with reference to fig. 5 to 10.
As shown in fig. 6, a first dielectric layer 202 is formed on the semiconductor substrate 200, the first dielectric layer 202 covers the surface of the semiconductor substrate 200, a plurality of mask units 203 arranged in an array are formed on the first dielectric layer 202, and gaps between the mask units 203 expose the first dielectric layer 202.
Specifically, the material of the mask unit 203 may be photoresist. The step of forming the plurality of mask units 203 distributed in an array may include: coating photoresist on the first dielectric layer 202; the coated photoresist is exposed and developed to form a plurality of mask units 203 distributed in an array. In another embodiment, the material of the mask unit may be a hard mask material such as silicon nitride.
An etch stop layer 201 may also be formed between the semiconductor substrate 200 and the first dielectric layer 202 to protect the underlying semiconductor substrate 200 during the process of etching the first dielectric layer 202 to form the bump. The etch stop layer 201 may be silicon nitride. The first dielectric layer 202 may comprise silicon oxide. The thickness of the first dielectric layer 202 may be 3000 to 5000 angstroms, such as 3500 angstroms, 4000 angstroms, 4500 angstroms. The thickness of the first dielectric layer can be set according to the height of the bump which is required to be obtained.
Next, as shown in fig. 7 to 9, step S3 is performed, where the mask unit 203 is used as a mask, the first dielectric layer 202 is etched until the surface of the semiconductor substrate 200 is exposed, and the remaining first dielectric layer forms a plurality of bumps 202a corresponding to each of the mask units 203 one by one, so as to remove the mask unit 203. It should be understood that in this embodiment, the first dielectric layer 202 may be etched until the surface of the etching stop layer 201 is exposed, and the bump 202a may be formed on the surface of the etching stop layer 201.
In the step of etching the first dielectric layer 202, the bump 202a may be formed by two, three or four discontinuous dry etching processes. In this embodiment, the bump 202a is formed by two discontinuous dry etching processes.
Specifically, as shown in fig. 7, the mask unit 203 is used as a mask, a dry etching process is performed to etch the first dielectric layer 202, and when the first dielectric layer 202 is etched to remove 1/2 of the thickness, the etching of the first dielectric layer 202 is suspended, and at this time, the thickness of the first dielectric layer uncovered by the mask unit 203 is 1/2 of the original thickness.
As shown in fig. 8, mask pattern reshaping (PRreshape) is performed to reduce the coverage of each of the mask units 203. Fig. 11 is a cross-sectional view of a mask unit and a first dielectric layer after mask pattern reshaping in accordance with an embodiment of the present invention. As shown in fig. 8 and 11, after the mask pattern is reshaped, the sidewall of the mask unit 203 is shrunk inwards in a direction close to the center of the mask unit, and part of the first dielectric layer 202 covered by the mask unit 203 before is exposed, so that the etched area of the first dielectric layer in the subsequent dry etching process is enlarged, and the top sharp corner formed by etching the first dielectric layer is exposed.
In this embodiment, the mask pattern reshaping may be performed using a dry etching process. By controlling the time of performing the dry etching process on the mask unit 203, the shrinkage of the sidewall of the mask unit 203 can be controlled, and thus the expansion of the etched area of the subsequent first dielectric layer 202 can be controlled, which is helpful for controlling the included angle between the side surface of the bump and the surface of the semiconductor substrate and the morphology of the bump.
In this embodiment, the reaction gas used in etching the first dielectric layer by dry etching may include octafluorocyclobutane (C 4 F 8 ) Oxygen (O) 2 ) Argon (Ar) and carbon monoxide (CO). The flow rate of octafluorocyclobutane may be 25-35 sccm (e.g., 30 sccm), the flow rate of oxygen may be 8-12 sccm (e.g., 10 sccm), the flow rate of argon may be 500-700 sccm (e.g., 600 sccm), and the flow rate of carbon monoxide may be 150-250 sccm (e.g., 200 sccm).
The reactive gas used in the mask pattern reshaping by the dry etching process may include octafluorocyclobutane (C 4 F 8 ) Oxygen (O) 2 ) And argon (Ar). The flow rate of octafluorocyclobutane may be 25-35 sccm (e.g., 30 sccm), the flow rate of oxygen may be 8-12 sccm (e.g., 10 sccm), and the flow rate of argon may be 500-700 sccm (e.g., 600 sccm). When the mask pattern of the mask unit is remodeled, oxygen can be additionally introduced into the outer ring of the reaction gas so as to adjust the gas ratio of the central edge of the reaction gas.
In this embodiment, in the step of etching the first dielectric layer, etching gas, gas flow, gas pressure and bias voltage used in the dry etching process for at least two times may be the same. The etching time of the dry etching process may be the same for both or more than two times. But is not limited thereto, the number of times of performing the dry etching process and the conditions of the dry etching process may be adjusted according to actual needs.
As shown in fig. 9, the mask unit 203 after mask pattern reshaping is used as a mask, the first dielectric layer 202 is etched downward continuously until the first dielectric layer 202 is etched through and the surface of the etching stop layer 201 is exposed, a plurality of bumps 202a corresponding to the mask unit 203 one by one are formed, and then the mask unit 203 is removed.
In this embodiment, when the width of the top surface of the bump 202a is 500nm to 800nm, the mask pattern is reshaped so that the single-side shrinkage of the sidewall of the mask unit 203 is 1% to 10%. For example, when the top width of the bump 202a is 600nm, etching may be stopped when the first dielectric layer 202 is etched to remove 1/2 of the thickness, and mask pattern reshaping may be performed, so that the single-sided inward shrinkage of the sidewall of the mask unit 203 is 3%.
Fig. 12 is a cross-sectional view of a bump obtained by a method for manufacturing a microlens array according to an embodiment of the present invention. As shown in fig. 9 and fig. 12, after the first dielectric layer 202 is etched to remove a portion of the thickness of the first dielectric layer 202, for example, after removing 1/2 of the thickness of the first dielectric layer, etching of the first dielectric layer 202 is stopped, and one mask pattern reshaping is performed, so that the top of the bump is shrunk inwards (towards the center of the bump), and compared with fig. 3 and fig. 4 (i.e., compared with the bump obtained by adopting the conventional manufacturing method of the microlens array), the profile of the bump is smoother, and the included angle between the side surface of the bump and the surface of the semiconductor substrate is relatively smaller, which is favorable for obtaining a microlens with a smoother profile on the basis of the bump 202a in the following steps.
After the bump 202a is formed, as shown in fig. 10, step S4 is performed to form a second dielectric layer 204 on the semiconductor substrate 200, where the second dielectric layer 204 conformally covers the surface of the bump 202a and the surface of the semiconductor substrate 200, thereby obtaining a microlens array. It should be appreciated that in this embodiment, the microlens includes the bump 202a and the second dielectric layer 204 overlying the bump surface.
In this embodiment, the angle between the side surface of the obtained bump and the surface of the semiconductor substrate may be less than 60 degrees. The microlenses may be nearly hemispherical.
In the method for manufacturing the microlens array of the embodiment, the dry etching process is intermittently performed for more than two times to etch the first dielectric layer 202 to form the bump 202a, and in the period of interruption, mask pattern reshaping is performed to reduce the coverage of each mask unit 203, so that the etched area of the first dielectric layer 202 is gradually increased, and the top sharp angle of the first dielectric layer exposed after the mask unit 203 is reduced is more easily removed in the subsequent etching process, so that the included angle between the side surface of the bump 202a and the surface of the semiconductor substrate can be reduced, and the outline of the bump 202a is smoother, so that the included angle between the side surface of the microlens formed on the basis of the bump 202a and the surface of the semiconductor substrate is smaller, and the microlens with smoother outline is facilitated to be obtained. In addition, by adjusting the execution times of etching the first dielectric layer by the dry etching process, adjusting the etching time of the dry etching process for more than two times, namely adjusting the execution time point of the mask pattern remolding and/or adjusting the reduction of the coverage of the mask unit, the morphology of the obtained bump and the included angle between the side surface of the obtained bump and the surface of the semiconductor substrate can be flexibly adjusted, so that the morphology of the microlens and the included angle between the side surface of the microlens and the surface of the semiconductor substrate can be adjusted.
In the traditional manufacturing method of the micro lens array, the inclination angle of the formed protruding block is adjusted by adjusting the reaction gas component, and a fluorine carbon compound containing hydrogen (H) is needed to be used in the process of etching the first dielectric layer, so that excessive polymer is generated, the risk of stripping the polymer to pollute the cavity environment is increased, and the maintenance of a machine is not facilitated. In this embodiment, the bump is obtained by intermittently performing the dry etching process twice or more, and during the intermittent period, the mask pattern is reshaped to reduce the coverage of each mask unit, so that it is not necessary to adjust the included angle between the side of the bump and the surface of the semiconductor substrate obtained later by adjusting the composition of the reaction gas, for example, using a fluorocarbon compound containing hydrogen (H), and thus less polymer is generated, the peeling of the polymer in the machine can be reduced, the cavity cleanliness is reduced, the risk of influencing the product quality is reduced, and the maintenance of the machine is facilitated.
Example two
The embodiment provides a manufacturing method of a micro lens array. Unlike the above embodiment, in this embodiment, the bump is formed by three discontinuous dry etching processes, and the mask pattern is discontinuously reshaped twice during the etching interruption. Other points are the same as in the first embodiment, and will not be described here again.
Fig. 13 to 19 are schematic cross-sectional views illustrating steps of a method for fabricating a microlens array according to another embodiment of the present invention.
As shown in fig. 13, a semiconductor substrate 300 is provided, a first dielectric layer 302 is formed on the semiconductor substrate 300, the first dielectric layer 302 covers the surface of the semiconductor substrate 300, a plurality of mask units 303 arranged in an array are formed on the first dielectric layer 302, and gaps between the mask units 303 expose the first dielectric layer 302. Wherein an etch stop layer 301 may be formed between the semiconductor substrate 300 and the first dielectric layer 302.
As shown in fig. 14, the first dielectric layer 302 is etched by using the mask unit 303 as a mask, and a dry etching process is performed, and when the first dielectric layer is etched to remove 1/3 of the thickness, the etching of the first dielectric layer 302 is suspended.
As shown in fig. 15, mask pattern reshaping is performed, a portion of the mask unit 303 is removed, and the coverage area of each mask unit 303 is reduced, so that the etched area of the first dielectric layer 302 in the subsequent dry etching process is enlarged, and the top sharp corner formed by etching the first dielectric layer 302 is exposed.
As shown in fig. 16, the first dielectric layer 202 is etched downward continuously with the mask unit 303 after the mask pattern is reshaped once as a mask, and etching is suspended when the first dielectric layer 302 is etched to remove 2/3 of the thickness.
As shown in fig. 17, the mask pattern is reshaped again, so as to reduce the coverage of each mask unit 303, so that the etched area of the first dielectric layer 302 in the subsequent dry etching process is further enlarged, and the top sharp corner formed by etching the first dielectric layer 302 is exposed.
As shown in fig. 18, the mask unit 303 after the secondary mask pattern is reshaped is used as a mask, and the first dielectric layer 202 is etched downward until the upper surface of the etching stop layer 301 is exposed, a plurality of bumps 302a corresponding to the mask unit 303 one by one are formed, and the mask unit 303 is removed.
As shown in fig. 19, a second dielectric layer 304 is formed on the semiconductor substrate 300, and the second dielectric layer 304 conformally covers the surface of the bump 302a and the surface of the semiconductor substrate 300, thereby obtaining a microlens array. It should be appreciated that in this embodiment, the microlens includes the bump 302a and a second dielectric layer 304 overlying the bump surface.
In this embodiment, the bump is formed by three discontinuous dry etching processes, and during the etching interruption period, the mask pattern is discontinuously reshaped twice, so that compared with the process of only conducting one pattern reshaping on the mask unit, the obtained bump profile is smoother, and the included angle between the side surface of the bump and the surface of the semiconductor substrate is smaller (as shown in fig. 20). Therefore, under the conditions of allowing production cost and production time, the execution times of the dry etching process (namely the interruption times of etching the first dielectric layer) are increased in the process of etching the first dielectric layer to obtain the bump, and the times of mask pattern reshaping are increased, so that the obtained shape of the bump and the included angle between the side surface of the bump and the surface of the semiconductor substrate can be flexibly adjusted, the shape of the microlens and the included angle between the side surface of the microlens and the surface of the semiconductor substrate can be adjusted, and the performance of the image sensor can be improved.
Example III
The present embodiment provides a method for manufacturing an image sensor, including the method for manufacturing a microlens array in the first embodiment and the second embodiment.
In this embodiment, the image sensor may be a front-illuminated image sensor or a back-illuminated image sensor.
Taking a back-illuminated image sensor as an example, the method for manufacturing the image sensor may include: firstly, providing a semiconductor substrate, wherein a plurality of pixels distributed in an array are formed in the semiconductor substrate; then, thinning the back surface of the semiconductor substrate; and forming a microlens array on the back surface of the semiconductor substrate by using the manufacturing method of the microlens array in the embodiment, wherein each microlens corresponds to a pixel one by one.
The manufacturing method of the image sensor of the embodiment includes the manufacturing method of the microlens array of the embodiment, and the appearance of the microlens formed by the manufacturing method of the microlens array and the included angle between the side surface of the microlens and the surface of the semiconductor substrate are adjustable, so that the included angle between the side surface of the microlens and the surface of the semiconductor substrate is smaller, the appearance of the microlens is smoother, and the image sensor obtained by the manufacturing method of the image sensor is better in performance.
The foregoing description is only illustrative of the preferred embodiments of the present invention, and is not intended to limit the scope of the claims, and any person skilled in the art may make any possible variations and modifications to the technical solution of the present invention using the method and technical content disclosed above without departing from the spirit and scope of the invention, so any simple modification, equivalent variation and modification made to the above embodiments according to the technical matter of the present invention fall within the scope of the technical solution of the present invention.
Claims (10)
1. A method for manufacturing a microlens array, comprising:
providing a semiconductor substrate, wherein a first dielectric layer is formed on the semiconductor substrate, and the first dielectric layer covers the surface of the semiconductor substrate;
forming a plurality of mask units arranged in an array on the first dielectric layer, wherein gaps among the mask units expose the first dielectric layer;
etching the first dielectric layer until the surface of the semiconductor substrate is exposed by taking the mask units as masks, forming a plurality of bumps corresponding to the mask units one by the rest first dielectric layer, and removing the mask units; and
forming a second dielectric layer on the semiconductor substrate, wherein the second dielectric layer conformally covers the bump surface and the semiconductor substrate surface, so as to obtain a micro lens array;
in the step of etching the first dielectric layer, the bump is obtained by intermittently performing a dry etching process for more than two times, and mask pattern reshaping is performed during the intermittent period so as to reduce the coverage of each mask unit; when the width of the top surface of the bump is 500-800 nm, mask pattern reshaping is carried out each time so that the unilateral inward shrinkage of the side wall of the mask unit is 1-10%.
2. The method of claim 1, wherein in the step of etching the first dielectric layer, the bump is formed by two, three or four non-continuous dry etching processes.
3. The method of manufacturing a microlens array according to claim 1, wherein etching gas, gas flow, gas pressure and bias voltage used in the dry etching process are the same for the two or more times.
4. The method of manufacturing a microlens array according to claim 1, wherein etching times of the dry etching process are the same for the two or more times.
5. The method of manufacturing a microlens array according to claim 1, wherein the material of the mask unit is photoresist.
6. The method of claim 5, wherein the mask pattern reshaping uses a dry etching process using an etching gas comprising C 4 F 8 And O 2 。
7. The method of claim 1, wherein the first dielectric layer has a thickness of 3000 angstroms to 5000 angstroms.
8. The method of claim 1, wherein an etch stop layer is formed on the semiconductor substrate, and the bump is formed on a surface of the etch stop layer.
9. The method of manufacturing a microlens array according to any one of claims 1 to 8, wherein an angle between a side surface of the bump and the surface of the semiconductor substrate is 60 degrees or less.
10. A method of manufacturing an image sensor, comprising the method of manufacturing a microlens array according to any one of claims 1 to 9.
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| JPH05190508A (en) * | 1992-01-14 | 1993-07-30 | Matsushita Electric Ind Co Ltd | Thin film etching method and laminated thin film etching method |
| KR100745595B1 (en) * | 2004-11-29 | 2007-08-02 | 삼성전자주식회사 | Microlens of an image sensor and method for forming the same |
| KR20080062825A (en) * | 2006-12-29 | 2008-07-03 | 동부일렉트로닉스 주식회사 | Image sensor fabricating method |
| KR20090072317A (en) * | 2007-12-28 | 2009-07-02 | 매그나칩 반도체 유한회사 | Manufacturing method of cmos image sensor |
| JP6794308B2 (en) * | 2017-04-27 | 2020-12-02 | 富士フイルム株式会社 | Method for manufacturing molds for manufacturing microlens arrays |
| CN110416077A (en) * | 2019-07-12 | 2019-11-05 | 深圳市华星光电技术有限公司 | The dry etching method and film layer structure of film layer structure |
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