CN113238140B - Automatic detection system capable of positioning DDS internal fault - Google Patents
Automatic detection system capable of positioning DDS internal fault Download PDFInfo
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- CN113238140B CN113238140B CN202110499913.2A CN202110499913A CN113238140B CN 113238140 B CN113238140 B CN 113238140B CN 202110499913 A CN202110499913 A CN 202110499913A CN 113238140 B CN113238140 B CN 113238140B
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- 238000001514 detection method Methods 0.000 title claims abstract description 42
- 238000004891 communication Methods 0.000 claims abstract description 34
- 238000012360 testing method Methods 0.000 claims abstract description 33
- 238000004364 calculation method Methods 0.000 claims description 2
- 230000001934 delay Effects 0.000 claims description 2
- 230000002093 peripheral effect Effects 0.000 claims description 2
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- OIGNJSKKLXVSLS-VWUMJDOOSA-N prednisolone Chemical compound O=C1C=C[C@]2(C)[C@H]3[C@@H](O)C[C@](C)([C@@](CC4)(O)C(=O)CO)[C@@H]4[C@@H]3CCC2=C1 OIGNJSKKLXVSLS-VWUMJDOOSA-N 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 3
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Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
Abstract
The invention discloses an automatic detection system capable of positioning DDS internal faults, which belongs to the field of integrated circuit measurement and control and comprises an automatic detection system, a spectrometer, a signal source, a programmable voltage source and a DDS device minimum system; the DDS device minimum system is connected with the automatic detection system through an SPI interface, an output signal of the DDS device minimum system is connected with the spectrometer through a low attenuation cable, and an input clock interface is connected with a signal source through the low attenuation cable; the automatic detection system is connected with the programmable interface of the frequency spectrograph through a communication cable in a programmable common communication protocol, is connected with the programmable interface of the signal source through the communication cable in the programmable common communication protocol, and is connected with the programmable interface of the programmable voltage source through the communication cable in the programmable common communication protocol. The automatic detection system can complete DDS test of high-difficulty full-voltage threshold full-frequency band under limited test conditions, greatly improves test efficiency, ensures test effect, reduces test cost and has extremely high engineering value.
Description
Technical Field
The invention relates to the technical field of integrated circuit measurement and control, in particular to an automatic detection system capable of positioning DDS internal faults.
Background
The DDS (Direct Digital Synthesis, direct digital frequency synthesizer) is a device that processes a series of digital signals through a digital algorithm and converts the digital signals into analog signals through a digital-to-analog converter, and plays an important role in the fields of aerospace, national defense, scientific research, semiconductor testing and the like.
The DDS device has a digital function and an analog function, and full threshold scanning is required to be carried out on digital and analog power supply after the streaming sheet comes back; under different power supply conditions, full-frequency domain digital analog function traversal detection is required, so that a large number of screening tests can be statistically performed according to error phenomena caused by process deviation or design defects, thus huge workload exists, and meanwhile, some unavoidable measurement errors exist.
Disclosure of Invention
The invention aims to provide an automatic detection system capable of positioning internal faults of a DDS, so as to solve the problems of low detection efficiency, high labor intensity and poor accuracy of the existing DDS device.
In order to solve the technical problems, the invention provides an automatic detection system capable of positioning internal faults of a DDS, which comprises: the system comprises an automatic detection system, a spectrometer, a signal source, a programmable voltage source and a DDS device minimum system; wherein,
the DDS device minimum system is connected with the automatic detection system through an SPI interface, an output signal of the DDS device minimum system is connected with the spectrometer through a low attenuation cable, and an input clock interface of the DDS device minimum system is connected with the signal source through a low attenuation cable;
the automatic detection system is connected with the program control interface of the frequency spectrograph through a communication cable in a program control common communication protocol, the automatic detection system is connected with the program control interface of the signal source through the communication cable in the program control common communication protocol, and the automatic detection system is connected with the program control interface of the programmable voltage source through the communication cable in the program control common communication protocol.
Optionally, the automatic detection system comprises a general SPI configuration interface, a program control instruction data transceiver and a DSP operation module; the universal SPI configuration interface can be communicated with the DDS device; the program control instruction data transceiver has the functions of sending a plurality of program control instructions and reading back and receiving response data thereof; the DSP operation module has the function of floating point number calculation;
the general SPI configuration interface, the program control instruction data transceiver and the DSP operation module are realized by mixing and crossing an FPGA and an ARM.
Optionally, the general SPI configuration interface, the program control command data transceiver, and the DSP operation module are implemented by a hybrid crossbar of FPGA and ARM.
Optionally, the DDS device minimum system includes a chip socket of the DDS, a peripheral passive device, and an auxiliary circuit for providing a fixed signal thereto.
Optionally, the auxiliary circuit comprises a clock management circuit and a fixed signal level network; the clock management circuit is capable of dividing a single clock source into clock signals with variable delays, wherein the clock signals are configurable in multiple frequency division ratios; the fixed signal level network provides the DDS to be measured with the fixed level necessary for its normal operation.
Optionally, the SPI interface of the DDS device minimum system is connected to a general SPI configuration interface of the automatic detection system.
Optionally, the power supply of the automatic detection system is provided by the programmable voltage source.
Optionally, the programmable voltage source is connected with a digital power supply and an analog power supply socket led out by the DDS device minimum system through two low attenuation cables respectively, and the switch on-off signals of the digital power supply and the analog power supply led out by the DDS device minimum system through two low attenuation cables are provided by the automatic detection system.
Optionally, the programmed common communication protocol includes a TCP/IP network communication protocol and an RS232 serial communication protocol.
The automatic detection system capable of positioning the DDS internal faults comprises an automatic detection system, a spectrometer, a signal source, a programmable voltage source and a DDS device minimum system; the DDS device minimum system is connected with the automatic detection system through an SPI interface, an output signal of the DDS device minimum system is connected with the spectrometer through a low attenuation cable, and an input clock interface of the DDS device minimum system is connected with the signal source through a low attenuation cable; the automatic detection system is connected with the program control interface of the frequency spectrograph through a communication cable in a program control common communication protocol, the automatic detection system is connected with the program control interface of the signal source through the communication cable in the program control common communication protocol, and the automatic detection system is connected with the program control interface of the programmable voltage source through the communication cable in the program control common communication protocol. The automatic detection system can complete DDS test of high-difficulty full-voltage threshold full-frequency band under limited test conditions, greatly improves test efficiency, ensures test effect, reduces test cost and has extremely high engineering value.
Drawings
Fig. 1 is a schematic diagram of an automatic detection system capable of positioning internal faults of a DDS according to the present invention;
FIG. 2 is a schematic diagram of a test workflow of an automated inspection system.
Detailed Description
The following describes in further detail an automatic detection system capable of locating internal faults of a DDS according to the present invention with reference to the accompanying drawings and specific embodiments. Advantages and features of the invention will become more apparent from the following description and from the claims. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the invention.
Example 1
The invention provides an automatic detection system capable of positioning DDS internal faults, and the structure of the automatic detection system is shown in figure 1. Taking a typical process of outputting a full-threshold spectrum under full-threshold variation of DDS digital voltage as an example, the maximum input frequency of a DDS device of a test object is 1GHz, the maximum output bandwidth is 500MHz, when the output bandwidth is within 400MHz, the typical value of the output SFDR is about 60dBm, and after the output bandwidth reaches more than 400MHz, the output SFDR index decays by 2dBm; the range of the whole current value of normal operation is (1.1A, 1.5A); the digital voltage supply range is (2.5 v,3.3 v). The FPGA is connected with an ARM I through a parallel bus protocol, the ARM I is connected with a testing instrument such as a frequency spectrograph, a signal source, an external programmable voltage source and the like through a common communication cable through a common communication protocol, and the ARM I is connected with an ARM II through a parallel bus protocol; the DDS device minimum system is connected with the spectrometer and the signal source through the low attenuation cable, analog power supply and digital power supply of the DDS device minimum system are respectively connected with an output end A and an output end B of the programmable voltage source through the low attenuation cable, and the automatic detection system is also connected with an output end C of the programmable voltage source through the low attenuation cable.
The test flow is shown in fig. 2, and is specifically as follows:
(1) manually powering up the automatic detection system;
(2) an external programmable voltage source is used for powering up the minimum system of the DDS device, and the initial value of the voltage is V=V 0 ＝2.5v；
(3) After the system is started, the ARM program control signal source I sends out an output signal meeting the test requirement to the DDS device minimum system, and the FPGA starts to configure the enabling related functions of the DDS device minimum system;
(4) FPGA starts to configure the enabling related function of the minimum system of the DDS device, and the initial output frequency F=F of the DDS device is set 0 +ΔF, initial frequency F 0 If necessary, the difference Δf=500/250 mhz=2 MHz may be set within the (0, 498 MHz) range;
(5) SFDR performance parameter X in ARM read-back spectrometer judges whether the value is in characteristic value range X epsilon (X) min ,X max ) Within the range, a margin of about 2dBm can be left in the general test, so the lower limit X min ＝58-2dBm＝56dBm，X max If the result is within the range, the ARM II is calculated and sent to the PC end, and the step (4) is returned to continue the circulation until the end is reached after 250 times;
(6) if the read-back data exceeds the preset range, whether the current value I of the read-back power supply meets I epsilon (1.1A, 1.5A), and if the current value I meets the range, the voltage step is V=V 0 +Δv=2.5v+0.1v=2.6v, the number of steps is 8, and the step 2 is returned to continue the test; if not, the ARM II feeds back an error mark and outputs error information.
The automatic detection system capable of positioning the internal faults of the DDS can finish the DDS test of high-difficulty full-voltage threshold full-frequency band under limited test conditions, greatly improves the test efficiency, ensures the test effect, reduces the test cost and has extremely high engineering value.
The above description is only illustrative of the preferred embodiments of the present invention and is not intended to limit the scope of the present invention, and any alterations and modifications made by those skilled in the art based on the above disclosure shall fall within the scope of the appended claims.
Claims (5)
1. An automatic detection system capable of locating internal faults of a DDS, comprising: the system comprises an automatic test system, a spectrometer, a signal source, a programmable voltage source and a DDS device minimum system; wherein,
the DDS device minimum system is connected with the automatic test system through an SPI interface, an output signal of the DDS device minimum system is connected with the spectrometer through a low attenuation cable, and an input clock interface of the DDS device minimum system is connected with the signal source through a low attenuation cable;
the automatic test system is connected with the program control interface of the frequency spectrograph through a communication cable in a program control communication protocol, the automatic test system is connected with the program control interface of the signal source through the communication cable in a program control communication protocol, and the automatic test system is connected with the program control interface of the programmable voltage source through the communication cable in a program control communication protocol;
the automatic test system comprises a general SPI configuration interface, a program control instruction data transceiver and a DSP operation module; the universal SPI configuration interface can be communicated with the DDS device; the program control instruction data transceiver has the functions of sending a plurality of program control instructions and reading back and receiving response data thereof; the DSP operation module has the function of floating point number calculation;
the general SPI configuration interface, the program control instruction data transceiver and the DSP operation module are realized by mixing and crossing an FPGA and an ARM;
the FPGA is connected with the DDS device minimum system through a general SPI configuration interface, the FPGA is connected with the ARM I through a parallel bus protocol, the ARM I is connected with the spectrometer, the signal source and an external programmable voltage source through a common communication cable through a program control communication protocol, and the ARM I is connected with the ARM II through a parallel bus protocol;
the detection flow of the automatic detection system capable of positioning the DDS internal faults comprises the following steps:
(1) manually powering up the automatic test system;
(2) the programmable voltage source powers up the minimum system of the DDS device, and the initial value of the voltage is V=V 0 ＝2.5v；
(3) After the system is started, the ARM program control signal source I sends out an output signal meeting the test requirement to the DDS device minimum system, and the FPGA starts to configure the enabling related functions of the DDS device minimum system;
(4) FPGA starts to configure the enabling related function of the minimum system of the DDS device, and the initial output frequency F of the DDS device is set 0 Initial frequency F 0 Setting as required, within the (0, 498 MHz) range, the difference Δf=500/250 mhz=2 MHz;
(5) SFDR performance parameter X in ARM read-back spectrometer judges whether the value is in characteristic value range X epsilon (X) min ,X max ) In the range, if the result is obtained by ARM II, the result is sent to the PC end, the DDS output frequency is increased by delta F, and the step (5) is circulated until the step (5) is finished after 250 times;
(6) if the read-back value exceeds the value range, judging whether the current value I of the read-back power supply meets I epsilon (1.1A, 1.5A), if so, returning to the step (3) for continuous testing, wherein the step number is 8; if not, the ARM II feeds back an error mark and outputs error information.
2. The automated detection system of claim 1, wherein the DDS device minimization system comprises a chip socket of the DDS, peripheral passive devices, and an auxiliary circuit for providing a fixed signal thereto.
3. The automatic detection system for localizable DDS internal faults as claimed in claim 2, wherein the auxiliary circuit comprises a clock management circuit and a fixed signal level network; the clock management circuit is capable of dividing a single clock source into clock signals with variable delays, wherein the clock signals are configurable in multiple frequency division ratios; the fixed signal level network provides the DDS to be measured with the fixed level necessary for its normal operation.
4. The automatic detection system capable of positioning internal faults of a DDS (digital display) according to claim 1, wherein the programmable voltage source is respectively connected with a digital power supply and an analog power supply socket led out by a minimum system of the DDS device through two low-attenuation cables, and the programmable voltage source is provided by the automatic test system through two low-attenuation cables and on-off signals of the digital power supply and the analog power supply led out by the minimum system of the DDS device.
5. The automatic detection system for localizable DDS internal faults as claimed in claim 1, characterized in that the programmed communication protocols comprise TCP/IP network communication protocol and RS232 serial communication protocol.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106896318A (en) * | 2017-03-27 | 2017-06-27 | 中国电子科技集团公司第五十八研究所 | Direct Digital Frequency Synthesizers circuit dynamic parameter testing system and method |
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| CN111752202A (en) * | 2020-07-14 | 2020-10-09 | 华东师范大学 | Multifunctional signal processing platform based on FPGA and ARM |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106896318A (en) * | 2017-03-27 | 2017-06-27 | 中国电子科技集团公司第五十八研究所 | Direct Digital Frequency Synthesizers circuit dynamic parameter testing system and method |
| CN111025374A (en) * | 2019-12-13 | 2020-04-17 | 中国电子科技集团公司第五十八研究所 | DDS device neutron effect evaluation system |
| CN111752202A (en) * | 2020-07-14 | 2020-10-09 | 华东师范大学 | Multifunctional signal processing platform based on FPGA and ARM |
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| 周建斌 等.核信号数字分析与处理.中国原子能出版社,2017,(第1版),177. * |
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