CN104978265A - PCBA test method and PCBA test system - Google Patents
PCBA test method and PCBA test system Download PDFInfo
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- CN104978265A CN104978265A CN201410141043.1A CN201410141043A CN104978265A CN 104978265 A CN104978265 A CN 104978265A CN 201410141043 A CN201410141043 A CN 201410141043A CN 104978265 A CN104978265 A CN 104978265A
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Abstract
The invention discloses a PCBA (Printed Circuit Board Assembly) test method and a PCBA test system. All test requirements of a tested PCBA are included in a configuration file; a host computer sends the configuration file to a universal PCBA test platform main control board; and the PCBA test platform main control board executes configuration requirements in the configuration file one by one to complete the PCBA test. Therefore any test requirements of the tested PCBA only need to be written into the configuration file; the test process can be automatically completed by the PCBA test platform main control board according to the test requirements in the configuration file; the step of repeated dismounting from a whole machine is not needed; the repeated installing work procedure due to PCBA defection is effectively reduced; the test flow process is simplified; and the work efficiency is improved.
Description
Technical field
The present invention relates to PCBA technical field of measurement and test, more particularly, relate to a kind of PCBA method of testing and system.
Background technology
PCB(Printed Circuit Board), printed circuit board (PCB) is important electronic unit, is the supporter of electronic component, is the supplier of electronic devices and components connection.PCBA(Printed Circuit Board+Assembly) refer to PCB hollow plate part on surface mounting technology SMT, then through the whole processing procedure of plug-in unit DIP.Along with the development of electronic technology, PCB is upper, and to paste chips get many, the attainable function of PCBA also gets more and more, and this not only will test the q&r of PCB itself during test PCBA with regard to requiring, also must test the reliability of PCBA having pasted chip.
Current PCB test, mainly based on the electrical specification of PCBA board (paster) self, comprises path and out of circuit test, the testing impedance of track.For the functional test of PCBA board having been pasted chip as PCBA often will be installed on complete machine by micro-control unit MCU or the IO I/O test of on-site programmable gate array FPGA, these tests such as sampling test, communication function test of analog-digital conversion a/d digital-to-analog conversion D/A, by manually testing one by one according to various functions after complete machine powering, if when finding a certain item or a few dysfunctions in test process, need PCBA to disassemble maintenance, and then be installed on complete machine and test item by item.
Inventor finds through research, in above-mentioned test process, every block PCBA must be installed on complete machine when testing at every turn, remove investigation problem after measuring fault and keep in repair, and then be installed on complete machine and test, if problem is not repaired, maintenance must be removed again, repeated disassembled and assembled, until surveyed all functions.This considerably increases the duplication of labour time of producing lineman and doing, there is the problem that testing process is complicated, limited the production efficiency of product, the demand of technical development can not be met.
Summary of the invention
In view of this, the invention provides a kind of PCBA method of testing and system, achieve PCBA and automatically test, simplify testing process, improve testing efficiency.
The PCBA method of testing that the present invention proposes, comprises step:
Host computer receives configuration file, and described configuration file comprises one or more testing requirement of PCBA to be measured, and testing requirement is packaged into the form of communication protocol packet by described host computer one by one, is issued to the master control board of PCBA general-utility test platform by communication link;
The communication protocol packet received is resolved in described PCBA general-utility test platform master control board, control peripheral components according to the testing requirement parsed and test described tested PCB A, the test result obtained is packaged into the form of communication protocol packet, returns to described host computer by communication link;
Described host computer parses test result from the communication protocol packet returned.
Said method, preferably, described communication link is universal synchronous/asynchronous serial reception/transmitter USART link.
Said method, preferably, the form of described communication protocol packet comprises: 2 byte beginning flag positions, 1 byte command code, 1 byte response code, 1 byte data code length, random length numeric data code, 2 byte check codes and 2 byte end mark positions.
Said method, preferably, in described configuration file, every bar testing requirement comprises: the numeric data code of the command code of communication protocol packet, the numeric data code length of communication protocol packet and communication protocol packet.
Said method, preferably, in described configuration file, every bar testing requirement also comprises: sequence number, operation item, fault are ignored, allow not by carrying out needed for percentage of time, host computer prompting user next step operation remarks and/or delay time in loop test number of times, reference value MIN, reference value MAX, loop test.
Said method, preferably, described host computer also comprises after the communication protocol packet returned parses test result, not to be judged according to allowing in reference value MIN, the reference value MAX of this testing requirement in configuration file, loop test and shows by percentage of time to this test result.
Said method, preferably, described host computer also comprises after the communication protocol packet returned parses test result, ignores determine whether also to carry out next step test according to the fault of this testing requirement of configuration information.
Said method, preferably, described host computer also comprises after the communication protocol packet returned parses test result, when all testing requirements are finished, display final testing result.
The PCBA test macro that the present invention proposes, comprising:
Host computer and PCBA general-utility test platform;
General-utility test platform comprises general-utility test platform master control borad, test fixture and tested PCB A;
Host computer is used for receiving configuration file, testing requirement in configuration file is packaged into one by one the form of communication protocol packet, is issued to the master control board of PCBA general-utility test platform by communication link;
General-utility test platform master control borad is for resolving the communication protocol packet received, control peripheral components according to the testing requirement parsed and test described tested PCB A, and the test result obtained is packaged into the form of communication protocol packet, return to described host computer by communication link.
As can be seen from technique scheme, PCBA method of testing disclosed by the invention and system, the testing requirement of tested PCB A is all included in configuration file, configuration file is sent to the master control board of universal PC BA test platform by host computer, the master control board of PCBA test platform performs the configuration needs in configuration file one by one, completes PCBA test.As can be seen here, as long as any testing requirement write configuration file of tested PCB A, test process is completed according to the testing requirement in configuration file automatically by the master control board of PCBA test platform, there is not the step repeatedly dismantled from complete machine, the repetition installation procedure that effective minimizing causes because PCBA is bad, simplify testing process, improve work efficiency.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is a kind of PCBA method of testing process flow diagram disclosed in the embodiment of the present invention;
Fig. 2 is a kind of communications protocol format figure disclosed in the embodiment of the present invention;
Fig. 3 is a kind of configuration file format figure disclosed in the embodiment of the present invention;
Fig. 4 is a kind of PCBA test system structure figure disclosed in the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
The present invention is directed to every a tested PCB A and write different configuration files, by issuing configuration file, realize the mutual of host computer and the master control board of PCBA test platform, according to protocol conventions, according to the testing requirement one by one in configuration file, tested PCB A is tested.Achieve in the mode of configuration file like this and automatically test PCBA, simplify testing process, improve work efficiency.
Describe the present invention below in conjunction with accompanying drawing.
Shown in Figure 1, the PCBA method of testing that the present invention proposes comprises step:
S101: configuration file is imported host computer, after described host computer receives configuration file, testing requirement is packaged into the form of communication protocol packet by described host computer one by one, and is issued to the master control board of PCBA general-utility test platform by communication link.
Host computer has the testing software of complete set, can be used for resolving configuration file, mutual with general-utility test platform, process and show the test result that slave computer returns.Configuration file comprises tested PCB A testing requirement, and testing requirement includes but not limited to: the system testing of tested PCB A; The IO input/output test of micro-control unit MCU or on-site programmable gate array FPGA; Modulus AD digital-to-analogue DA system testing; Communication system is tested.Only can deposit a testing requirement in a configuration file, after having tested, import another one configuration file again; Also can have many testing requirements, host computer one by one order is issued to general-utility test platform master control board.Represent in configuration file that the unit of every bar testing requirement comprises: CMD(Hex): in test process, the command code of communication protocol packet, represent testing requirement order; Length(Hex): in test process, the numeric data code length of communication protocol packet, represents the length of related data in testing requirement; Data(Hex): in test process, the numeric data code of communication protocol packet, represents related data in testing requirement.After above-mentioned configuration file imports host computer, host computer will resolve testing requirement one by one, and these three unit of CMD, Length, Data are packaged into communication protocol packet format.
S102: the master control board of described PCBA general-utility test platform is to the communication protocol Packet analyzing received, control peripheral components according to the testing requirement parsed and test described tested PCB A, and the test result obtained is packaged into the form of communication protocol packet, return to described host computer by communication link.
S103: described host computer is resolved the communication protocol packet received, and obtains test result.
In the present embodiment, host computer uses the mode of configuration file and PCBA general-utility test platform to carry out the interactive controlling of test command, for the test needed for PCBA to be measured, no matter test any function, no matter have how many testing requirements, as long as write configuration file, back and forth from the process of dismounting complete machine when testing before eliminating, testing process is simple, and automaticity is high, thus accelerate test process, improve production efficiency.
In other embodiments of the invention, as preferably, host computer and general-utility test platform master control borad communication link alternately adopts universal synchronous/asynchronous serial reception/transmitter USART(UniversalSynchronous/Asynchronous Receiver/Transmitter), it is a full duplex universal synchronous/asynchronous serial transceiver module, can flexible configuration.USART can be configured to full duplex asynchronous system, can communicate with CRT terminal with peripheral hardwares such as personal computers; Also can be configured to half-duplex synchro system, can with A/D or D/A integrated circuit, and the external device such as Serial E PROM communicates, and is just being applicable to the communication of host computer and general-utility test platform when the present invention carries out several functions test.But being not limited only to alternately of this method host computer and general-utility test platform master control borad uses universal synchronous/asynchronous serial reception/transmitter USART, similarly, parallel port LPT communication, general-purpose serial bus USB communication etc. can also be adopted.
The communication protocol packet format of universal synchronous/asynchronous serial reception/transmitter USART that the present invention uses as shown in Figure 2, here communication protocol packet format is corresponding with partial content in configuration file, it is the serial communication protocol packet format that the present invention is directed to interaction content customization, simplicity of design, but with strong points.Described communication protocol packet format is specially:
2.1 opening flag position begin flag: take 2 bytes, be fixed as " 0x7E0x7E ";
With configuration file, 2.2 command word cmd: take 1 byte, represent that the unit CMD of testing requirement is corresponding;
2.3 response code ACK: take 1 byte, general-utility test platform returns inserts response code by test result;
With configuration file, the length length of 2.4 content of parameter: take 1 byte, represents that the unit Length of testing requirement is corresponding;
2.5 data data: take byte length and do not fix, concrete length is specified by length, represents that the cells D ate of testing requirement is corresponding with configuration file;
2.6 check code CRC: take 2 bytes, generator polynomial is the x16+x12+x5+1 (0x1021) of 16 that CCITT CCITT recommends.
2.7 end mark position end flag: take 2 bytes, be fixed as " 0x7F0x7F ";
Equally, in this method, the communication protocol packet format of universal synchronous/asynchronous serial reception/transmitter USART is not limited thereto, and can carry out personalized customization according to actual conditions.
In other embodiments of the invention, as preferably, the testing requirement in configuration file not only comprises function items to be measured, also comprises other information that function items to be measured with this is corresponding.These information play prompting, control, coordinate the effect of test, and make whole test process more intelligent, in test process, produced problem is very clear, is convenient to the problem points in assignment test process quickly.As indicated at 3, each location contents of configuration file is configuration file format:
3.1 sequence numbers: from 1, the sequence number increased progressively with 1;
3.2 operation items: for the current operation explanatory notes shown in host computer testing software, as " starting PCBA test ";
3.3 faults are ignored: when test result is obstructed out-of-date, whether also carry out next step test;
3.4 loop test number of times: the cycle index of repeated test needed for this project;
3.5 reference value MIN(mV): for when voltage tester, setting measured value judges whether satisfactory minimum test specification;
3.6 reference value MAX(mV): for when voltage tester, setting measured value judges whether satisfactory full test scope;
Allow not by percentage of time (%) in 3.7 loop tests: for exist a project need repetitive cycling to test time, if when the number of times do not passed through is greater than the project write in this, be judged as the foundation of test failure;
3.8CMD(Hex): in test process, the command code of communication protocol packet, represents testing requirement order;
3.9Length(Hex): in test process, the numeric data code length of communication protocol packet, represents the length of related data in testing requirement;
3.10Data(Hex): in test process, the numeric data code of communication protocol packet, represents related data in testing requirement;
3.11 remarks: point out next step operation carried out needed for user for upper computer software;
3.12 delay times: for the delay time of host computer delay sending communication instruction;
As can be seen from the content of above-mentioned configuration file, have a lot in a testing requirement is relevant, what some content rose is suggesting effect, as 3.1 sequence numbers, 3.2 operation items, 3.11 remarks; Some content is in order to checkout result, as allowed not pass through percentage of time in 3.5 reference value MIN, 3.6 reference value MAX, 3.7 loop tests; Some content is to control test process, as 3.3 faults ignore, 3.4 loop test number of times, 3.12 delay times; The test command that also some content representation is real, as 3.8CMD, 3.9Length, 3.10Data.Content in configuration file is not limited thereto, and can carry out additions and deletions adjustment according to actual testing requirement to content.
In addition, preferably, also comprise the judgement to this result and step display after said method step S103 obtains test result, increasing this step is surveyed process in order to perfect, is convenient to the problem points in assignment test process quickly.After host computer obtains this test result, if voltage tester, then whether correct according to 3.5 reference value MIN in configuration file and 3.6 reference value MAX judged results, and show result; If loop test, then allow not judged test result by percentage of time according to 3.7, and show result, also will judge whether that test completes according to 3.4 loop test number of times; If this test event is not passed through, then ignore according to 3.3 faults and determine whether also to carry out next step test.Like this, for different testing requirements, every bar test result is made and different to judge, draw and show result, for every bar test result, follow-up test process being controlled, complete, orderly, complete the test of every bar efficiently.Step before newly-increased step is same with the above-mentioned embodiment, repeats no more herein, and in addition, in the present embodiment, newly-increased step is equally applicable to other embodiments.
In addition, preferably, also comprise the step display to overall final testing result after said method step S103 obtains test result, increasing this step is surveyed process in order to perfect, is convenient to the quality distinguishing monoblock PCBA board fast.Comprise the situation of complete PCBA testing requirement for configuration file, host computer obtains test result one by one, treats that whole testing requirement is finished, the comprehensive all test results of host computer, show that whether this block PCBA to be measured is by test, and demonstrates net result.Like this, can know which block of PCBA tested has problem soon, and which block all functions is all normal, the PCBA board that quality reaches a standard can directly be put in storage stand-by, carries out next step test after problematic PCBA maintenance again, improves production efficiency.Step before newly-increased step is same with the above-mentioned embodiment, repeats no more herein, and in addition, in the present embodiment, newly-increased step is equally applicable to other embodiments.
Based on said method, next will be described in detail to realizing PCBA test macro of the present invention by reference to the accompanying drawings.
System principle schematic diagram shown in Figure 4, wherein, 100 is host computers, 200 is universal PC BA test platform systems, 300 is the master control boards of universal PC BA test platform, and 400 is test fixtures that universal PC BA test platform master control borad is connected with tested PCB A, and 500 is tested PCB A.Wherein universal PC BA test platform master control board 300 can only test the test cell control panel of single PCBA before being different from, and universal PC BA test platform master control board 300 is integrated with a series of peripheral circuit such as test I/O input/output function, AD modulus/DA digital-to-analogue function, communication function.
Below in conjunction with above-mentioned PCBA test macro, further illustrate the test process of this PCBA test macro: after host computer 100 opens testing software, first import the configuration file needed for a tested PCB A, configuration file needed for host computer testing software 100 couples of tested PCB A is resolved, by every bar testing requirement by communications protocol format packing, then universal PC BA test platform master control board 300 is issued to by USART communication link, the communication protocol packet received is resolved in the master control board 300 of universal PC BA test platform, corresponding action is carried out according to the test command operation peripheral components parsed, the test fixture 400 be connected with tested PCB A by test platform master control board tests tested PCB A500, the test result obtained is packaged into communications protocol format again, return to host computer testing software 100.As preferably, host computer testing software 100 can also judge test result according to the testing requirement in configuration file, shows the test result of this operation; When this test event exists situation about not passing through, judge whether to carry out next step test according to the testing requirement in configuration file; When all tests are all finished, show final test result, whole PCBA test process terminates.
Finally, also it should be noted that, in this article, the such as relational terms of first and second grades and so on is only used for an entity or operation to separate with another entity or operational zone, and not necessarily requires or imply the relation that there is any this reality between these entities or operation or sequentially.And, term " comprises ", " comprising " or its any other variant are intended to contain comprising of nonexcludability, thus make to comprise the process of a series of key element, method, article or equipment and not only comprise those key elements, but also comprise other key elements clearly do not listed, or also comprise by the intrinsic key element of this process, method, article or equipment.When not more restrictions, the key element limited by statement " comprising ... ", and be not precluded within process, method, article or the equipment comprising described key element and also there is other identical element.
In this instructions, each embodiment adopts the mode of going forward one by one to describe, and what each embodiment stressed is the difference with other embodiments, between each embodiment identical similar portion mutually see.
To the above-mentioned explanation of the disclosed embodiments, professional and technical personnel in the field are realized or uses the present invention.To be apparent for those skilled in the art to the multiple amendment of these embodiments, General Principle as defined herein can without departing from the spirit or scope of the present invention, realize in other embodiments.Therefore, the present invention can not be restricted to these embodiments shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.
Claims (9)
1.PCBA method of testing, is characterized in that, comprises step:
Host computer receives configuration file, and described configuration file comprises one or more testing requirement of PCBA to be measured, and testing requirement is packaged into the form of communication protocol packet by described host computer one by one, is issued to the master control board of PCBA general-utility test platform by communication link;
The communication protocol packet received is resolved in described PCBA general-utility test platform master control board, control peripheral components according to the testing requirement parsed and test described tested PCB A, the test result obtained is packaged into the form of communication protocol packet, returns to described host computer by communication link;
Described host computer parses test result from the communication protocol packet returned.
2. method according to claim 1, is characterized in that, described communication link is universal synchronous/asynchronous serial reception/transmitter USART.
3. method according to claim 1, it is characterized in that, the form of described communication protocol packet comprises: 2 byte beginning flag positions, 1 byte command code, 1 byte response code, 1 byte data code length, random length numeric data code, 2 byte check codes and 2 byte end mark positions.
4. method according to claim 1, is characterized in that, in described configuration file, every bar testing requirement comprises: the numeric data code of the command code of communication protocol packet, the numeric data code length of communication protocol packet and communication protocol packet.
5. method according to claim 1, it is characterized in that, in described configuration file, every bar testing requirement also comprises: sequence number, operation item, fault are ignored, allow not by carrying out needed for percentage of time, host computer prompting user next step operation remarks and/or delay time in loop test number of times, reference value MIN, reference value MAX, loop test.
6. method according to claim 5, it is characterized in that, described host computer also comprises after the communication protocol packet returned parses test result, not to be judged according to allowing in reference value MIN, the reference value MAX of this testing requirement in configuration file, loop test and shows by percentage of time to this test result.
7. method according to claim 5, is characterized in that, described host computer also comprises after the communication protocol packet returned parses test result, ignores determine whether also to carry out next step test according to the fault of this testing requirement of configuration information.
8. method according to claim 5, is characterized in that, described host computer also comprises after the communication protocol packet returned parses test result, when all testing requirements are finished, and display final testing result.
9.PCBA test macro, is characterized in that, described system comprises:
Host computer and PCBA general-utility test platform;
General-utility test platform comprises general-utility test platform master control borad, test fixture and tested PCB A;
Host computer is used for receiving configuration file, testing requirement in configuration file is packaged into one by one the form of communication protocol packet, is issued to the master control board of PCBA general-utility test platform by communication link;
General-utility test platform master control borad is for resolving the communication protocol packet received, control peripheral components according to the testing requirement parsed and test described tested PCB A, and the test result obtained is packaged into the form of communication protocol packet, return to described host computer by communication link.
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| CN201410141043.1A CN104978265A (en) | 2014-04-09 | 2014-04-09 | PCBA test method and PCBA test system |
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| CN106556794A (en) * | 2016-11-18 | 2017-04-05 | 广州视源电子科技股份有限公司 | Method and apparatus for realizing PCBA board detection |
| CN107621581A (en) * | 2017-09-12 | 2018-01-23 | 武汉合康智能电气有限公司 | Method of testing and device on charging pile complete machine line |
| CN109669872A (en) * | 2018-12-24 | 2019-04-23 | 郑州云海信息技术有限公司 | A kind of verification method and device |
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| CN109981399A (en) * | 2019-02-25 | 2019-07-05 | 中国科学院光电技术研究所 | A kind of general automation test software platform for common space communication |
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| CN112329273A (en) * | 2020-12-17 | 2021-02-05 | 深圳市芯天下技术有限公司 | Method and device for improving chip verification efficiency, storage medium and terminal |
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| CN107621581A (en) * | 2017-09-12 | 2018-01-23 | 武汉合康智能电气有限公司 | Method of testing and device on charging pile complete machine line |
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| CN109981399A (en) * | 2019-02-25 | 2019-07-05 | 中国科学院光电技术研究所 | A kind of general automation test software platform for common space communication |
| CN109783394A (en) * | 2019-03-14 | 2019-05-21 | 上海大学 | A kind of battery management system function test method and test hardware platform |
| CN110119353B (en) * | 2019-04-18 | 2023-10-10 | 上海蔚来汽车有限公司 | Test data generation method and device, controller and medium |
| CN110119353A (en) * | 2019-04-18 | 2019-08-13 | 上海蔚来汽车有限公司 | Test data generating method, device and controller and medium |
| CN111143150A (en) * | 2019-12-27 | 2020-05-12 | 深圳市越疆科技有限公司 | Method and system for testing PCBA (printed circuit board assembly), testing equipment and micro-control unit |
| WO2021129551A1 (en) * | 2019-12-27 | 2021-07-01 | 日照市越疆智能科技有限公司 | Method and system for testing pcba board, and test device and micro control unit |
| CN112329273A (en) * | 2020-12-17 | 2021-02-05 | 深圳市芯天下技术有限公司 | Method and device for improving chip verification efficiency, storage medium and terminal |
| CN112329273B (en) * | 2020-12-17 | 2023-10-24 | 芯天下技术股份有限公司 | Method and device for improving chip verification efficiency, storage medium and terminal |
| CN113163014A (en) * | 2021-04-28 | 2021-07-23 | 深圳市翔智达科技有限公司 | Data transmission method, server and data transmission system |
| CN113138888A (en) * | 2021-04-30 | 2021-07-20 | 北京市商汤科技开发有限公司 | Function detection method and device, electronic equipment and storage medium |
| CN114217209A (en) * | 2021-12-14 | 2022-03-22 | 厦门芯阳科技股份有限公司 | Multi-station PCBA board detection method |
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