CN206610099U - The configurable time synchronization test system in scene - Google Patents
The configurable time synchronization test system in scene Download PDFInfo
- Publication number
- CN206610099U CN206610099U CN201720364131.7U CN201720364131U CN206610099U CN 206610099 U CN206610099 U CN 206610099U CN 201720364131 U CN201720364131 U CN 201720364131U CN 206610099 U CN206610099 U CN 206610099U
- Authority
- CN
- China
- Prior art keywords
- signal
- general purpose
- test
- conditioning circuit
- fpga chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Debugging And Monitoring (AREA)
Abstract
The utility model discloses the time synchronization test system that a kind of scene is configurable, including tester platform, general purpose interface bus and some multifunctional signals detection card；The tester platform includes embeded processor, memory, LCD display, man-machine interface, high precision measurement reference cell and adjusts test cell；The embeded processor, the memory, the LCD display, the man-machine interface, the high precision measurement reference cell, described adjust test cell and some multifunctional signals detection card is hung on the general purpose interface bus；The multifunctional signal detection card includes fpga chip and signal conditioning circuit, the signal input part of the signal conditioning circuit is connected with input interface, the signal output part of the signal conditioning circuit is connected with the fpga chip, and the fpga chip is hung on the general purpose interface bus.The utility model has high flexibility and reusability, and operating efficiency is high, is easy to safeguard.
Description
Technical field
The utility model belongs to technical field of electric power, and in particular to a kind of configurable time synchronization test system in scene,
It is mainly used in the time synchronized of intelligent substation.
Background technology
With the construction and development of intelligent grid, intelligent substation proposes higher and higher want to clock synchronization system
Ask, to the properties of product on-site evaluation of clock synchronization system, finished product factory testing, synchronous regime monitoring, diagnosing, on-the-spot test point
Analysis etc. proposes new application requirement, i.e. time synchronous test system must possess live reconfigurable for specific test request
Ability, so as to quick changed test procedure and instrumental function at the scene, so as to conveniently and efficiently complete many using a tester
Plant Site Test Analysis task.
In the prior art, such as entitled " a kind of hand-held time synchronization tester " (application number 2014103114147.8)
Chinese utility model patent disclose a kind of hand-held time synchronization tester, including signal preprocessing unit, stipulations connect
Receipts verification unit, main control unit, measuring unit and human and machine interface unit, in addition to PPS/PPM/PPH pulse signals decoding unit,
IRIG-B (AC/DC) TTL/422 time signals decoding unit, RS232/485 frequency time signals decoding unit, by time service equipment
Warning information decoding unit, controllable synchronous signal output and the automatic resolution unit of message.Existing tester is specific according to one
Application scenarios and build, static system is belonged in itself：I.e. test system is pre-designed, solid after coming into operation
It is fixed constant, do not possess the ability according to different test objects and test assignment adjustment and dynamic restructuring, it is impossible to well adapt to
Dynamic need；In addition in traditional test system control flow, flow is to require single suitable according to predefined test assignment
The row of sequence gets off, under measurand, the requirement that test point is a lot, test parameter is complicated, may result in testing and control flow
Set abnormal cumbersome and repeated work many, it is difficult to realize structuring, modularized design, take time and effort and easily malfunction, add
Test assignment demand may change at any time, and detection parameter may increase, and test scope may be adjusted, then test system is controlled
Flow is accomplished by continuous change, and the maintenance of system is extremely difficult.
Utility model content
The purpose of this utility model is that provides a kind of scene configurable time synchronized to solve the above problems
Test system and implementation method.
The utility model is achieved through the following technical solutions above-mentioned purpose：
A kind of configurable time synchronization test system in scene, including tester platform, general purpose interface bus and some many
Function signal detection card；
The tester platform includes embeded processor, memory, LCD display, man-machine interface, high precision measurement base
Quasi- unit and adjust test cell；
The embeded processor, the memory, the LCD display, the man-machine interface, the high precision measurement
Reference cell, described adjust test cell and some multifunctional signals detection card is hung on the general purpose interface bus；
The multifunctional signal detection card includes fpga chip and signal conditioning circuit, the signal of the signal conditioning circuit
Input is connected with input interface, and the signal output part of the signal conditioning circuit is connected with the fpga chip, the FPGA
Chip is hung on the general purpose interface bus.
The beneficial effects of the utility model are：
The utility model is connected by multifunctional signal detection card by general purpose interface bus with embeded processor, is protected
The interchangeability of signal detection hardware module is demonstrate,proved, total has high flexibility and reusability, operating efficiency is high, just
In maintenance.
Brief description of the drawings
Fig. 1 is the structural schematic block diagram of the configurable time synchronization test system in scene described in the utility model；
Fig. 2 is the schematic diagram of designed system engine during the utility model implementation process；
Fig. 3 is the configurable time synchronization test implementation process figure in scene described in the utility model.
Embodiment
The utility model is described in further detail below in conjunction with the accompanying drawings：
As shown in figure 1, the utility model includes tester platform, general purpose interface bus and the detection of some multifunctional signals
Card；
Tester platform includes embeded processor, memory, LCD display, man-machine interface, high precision measurement benchmark list
Member and adjust test cell；
Embeded processor, memory, LCD display, man-machine interface, high precision measurement reference cell, to adjust test single
First and some multifunctional signal detection cards are hung on general purpose interface bus；
Multifunctional signal detection card includes fpga chip and signal conditioning circuit, and the signal input part of signal conditioning circuit connects
Input interface is connected to, the signal output part of signal conditioning circuit is connected with fpga chip, and fpga chip hangs over general purpose interface bus
On.
High precision measurement reference cell, for according to the satellite clock signal received or outside split-second precision benchmark letter
Number, realize to local time system calibration and synchronous, the time base source of formation test system, by general purpose interface bus,
Each component and board to the system provide the time reference signal that test is compared.
Adjust test cell and standard configuration script and time base source are obtained by general purpose interface bus, according to standard configuration
The parameter of script, the characteristic value of output time signal (information), and when the time signal after adjusting (information) is transmitted into tested
Between synchronization system (device), to test tested clock synchronization system (device) to adjusting the response condition of characteristic value.
Standard configuration script is provided and selected by man-machine interface and is deposited in memory, standard for embeded processor
Configuration script need to deliver to LCD display from memory by embeded processor and show, while embeded processor enters to it
Row processing.
With reference to shown in Fig. 2 and Fig. 3, system engine and bus control unit, system engine tool are provided with embeded processor
There are standard configuration script loading interface and functional unit standard dispatch interface, system engine manipulates general connect by bus control unit
Mouth bus, to respond and dispatch requirement of each functional unit to reading and writing data, realizes the data exchange between functional unit
Management.Functional unit is to follow the functional module that the standard interface specifications of system engine are write, and functional unit includes adjusting survey
Try functional module, time synchronizing signal detection functional module, data analysis and arbitration functions module, test result display function mould
Block and data management function module, when time synchronizing signal detection functional module includes normal signal detection functional module, network
Between packet check functional module and time synchronized status detection function module.System engine by loading standard configuration script item,
According to the requirement of the test parameter of standard configuration script, testing process, described data are manipulated by described bus control unit
Bus, the operation of testing process is carried out to dispatch described functional unit and described background data base.
Standard configuration script is the standard configuration pin that the system engine write using the cross-platform document languages of XML can be read
This, and standard configuration script one measurement procedure of correspondence, and the integrated all test parameters of the standard configuration script, survey
Try the relevant data message of flow and functional unit connected mode.
System engine framework is shown in Fig. 2, and the system engine shown in figure is matched somebody with somebody by the dispatch interface of standard to realize to standard
Put the standard loading interface and the data acquisition function module, analytical capabilities module, data conditioning work(to functional unit of script
Energy module, the scheduling feature of data analysis Function, analytical capabilities module is XML analytical capabilities moulds in this embodiment
System engine, for parsing standard configuration script, is so designed as the set of each submodule, these modules are collectively constituted by block
System engine operation support system, the system, which exposes an interface, to be used to support measurement task script.Under different platforms, collection
Into the test assignment of the system engine operation support system, by calling standard interface, the measurement task pin of user configuring is read
This, completes desired data acquisition and data analysis.
Control signal and the time that embeded processor is sent by general purpose interface bus are received in multifunctional signal detection clamping
A reference source, when detecting that the signal conditioning circuit of card carries out signaling interface level conversion, fpga chip completion by multifunctional signal
Between synchronizing signal parsing test and test data assembling, and the test data assembled is sent to by general purpose interface bus
Embeded processor is handled；Data/address bus is manipulated by bus control unit by system engine, carrys out scheduling feature component and deposits
Background data base in reservoir, each functional unit of testing results instrument platform.
Concrete methods of realizing comprises the following steps：
1) system engine option and installment script and is delivered to by man-machine interface on an lcd display；
2) system engine manipulate embeded processor parsed after selected configuration script, determine test object quantity, when
Between the type of synchronizing signal, the interface level of time synchronizing signal and solution deepness；
3) system engine configuration time synchronized adjusts testing process, reaches the ready state of detection；
4) system engine by read script parsing and come configuration information, pass through functional unit standard dispatch interface scheduling
Each functional unit, the functional unit that can work independently operationally is connected by bus control unit；
5) select to start detection program on an lcd display by man-machine interface and be sent to system engine；
6) embeded processor is manipulated by functional unit, multifunctional signal detection card is driven by general purpose interface bus
Detection configuration, and detect that the signal conditioning circuit of card carries out signaling interface level conversion by multifunctional signal, pass through FPGA cores
The parsing test of piece deadline synchronizing signal and test data assembling, and the data assembled are sent out by general purpose interface bus
Return system engine after embeded processor is handled is given, the detection work of signal is completed；
7) system engine scheduling data analysis manipulates the analysis that embeded processor performs data with arbitration functions module
And arbitration functions, and by the test data after analysis and test report file return system engine；
8) select display test data function on an lcd display by man-machine interface and send to system engine；
9) system engine returns to test data and shown on an lcd display；
10) select to preserve function on an lcd display by man-machine interface by test data and test report file storage
In background data base on to memory.
Preferred embodiment of the present utility model is these are only, it is all in this practicality not to limit the utility model
Any modifications, equivalent substitutions and improvements made within new spirit and principle etc., should be included in guarantor of the present utility model
In the range of shield.
Claims (1)
1. a kind of configurable time synchronization test system in scene, it is characterised in that：Including tester platform, general purpose interface bus
Detect and block with some multifunctional signals；
The tester platform includes embeded processor, memory, LCD display, man-machine interface, high precision measurement benchmark list
Member and adjust test cell；
The embeded processor, the memory, the LCD display, the man-machine interface, the high precision measurement benchmark
Unit, described adjust test cell and some multifunctional signals detection card is hung on the general purpose interface bus；
The multifunctional signal detection card includes fpga chip and signal conditioning circuit, the signal input of the signal conditioning circuit
End is connected with input interface, and the signal output part of the signal conditioning circuit is connected with the fpga chip, the fpga chip
Hang on the general purpose interface bus.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720364131.7U CN206610099U (en) | 2017-04-07 | 2017-04-07 | The configurable time synchronization test system in scene |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720364131.7U CN206610099U (en) | 2017-04-07 | 2017-04-07 | The configurable time synchronization test system in scene |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206610099U true CN206610099U (en) | 2017-11-03 |
Family
ID=60166903
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201720364131.7U Active CN206610099U (en) | 2017-04-07 | 2017-04-07 | The configurable time synchronization test system in scene |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN206610099U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106896710A (en) * | 2017-04-07 | 2017-06-27 | 成都府河电力自动化成套设备有限责任公司 | Scene configurable time synchronization test system and implementation method |
| CN115933356A (en) * | 2023-01-09 | 2023-04-07 | 北京航空航天大学 | High-precision time synchronization system and method of virtual atomic clock |
-
2017
- 2017-04-07 CN CN201720364131.7U patent/CN206610099U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106896710A (en) * | 2017-04-07 | 2017-06-27 | 成都府河电力自动化成套设备有限责任公司 | Scene configurable time synchronization test system and implementation method |
| CN115933356A (en) * | 2023-01-09 | 2023-04-07 | 北京航空航天大学 | High-precision time synchronization system and method of virtual atomic clock |
| CN115933356B (en) * | 2023-01-09 | 2023-08-22 | 北京航空航天大学 | High-precision time synchronization system and method for virtual atomic clock |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN201886095U (en) | Test device of merging unit | |
| CN102879661A (en) | Method and system for detecting distribution network automatic terminal | |
| CN204884160U (en) | Ammeter data collection station detecting system | |
| CN103067426A (en) | System and method of remote intelligent meter reading and instrument front-end collecting device | |
| CN108802547A (en) | A kind of relay protection device of intelligent substation Auto-Test System and method based on cloud storage | |
| CN103616560A (en) | Automatic power consumption parameter testing device and method applied to avionics device | |
| CN206610099U (en) | The configurable time synchronization test system in scene | |
| CN106896710A (en) | Scene configurable time synchronization test system and implementation method | |
| CN105446197B (en) | A kind of column control ground critical data detection device | |
| CN104392603B (en) | A kind of live power information collecting device intelligent diagnosis system | |
| CN202886567U (en) | Special motor test device based on networked virtual instrument | |
| CN105606922A (en) | Multi-frequency-converter aging test method and system based on LabVIEW | |
| CN102175983A (en) | Method for testing multifunctional watt-hour meter reading time of electric quantity collector for watt-hour meter | |
| CN103049994A (en) | Production quality detection system of acquisition unit | |
| CN103885097A (en) | Integrated test system of meteorological station | |
| CN109388529A (en) | A kind of relay protection cpu motherboard method for testing performance and system | |
| CN202563076U (en) | Communication digital multimeter automatic calibration system | |
| CN105529826B (en) | A kind of portable simulation intelligent cell based on PXI buses | |
| CN208334539U (en) | Family table checks and accepts anti-examination device of visiting one house after another | |
| CN204155074U (en) | A kind of time response verifying attachment for intelligent substation | |
| CN206074795U (en) | The online checking system of electric power meter networking | |
| CN2884656Y (en) | Simulator for testing power loading management terminal communication | |
| CN106546936B (en) | Virtual detection system and detection method for detecting energy efficiency monitoring equipment | |
| CN204855778U (en) | A 0. 02 grade of miniature standard electric energy meter for examineing and determine check during directly going into formula three -phase intelligent ammeter verification system | |
| CN108957215A (en) | Family table checks and accepts anti-examination device and the investigation method of visiting one house after another |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |