CN113238140A - Automatic detection system capable of positioning DDS internal fault - Google Patents
Automatic detection system capable of positioning DDS internal fault Download PDFInfo
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- CN113238140A CN113238140A CN202110499913.2A CN202110499913A CN113238140A CN 113238140 A CN113238140 A CN 113238140A CN 202110499913 A CN202110499913 A CN 202110499913A CN 113238140 A CN113238140 A CN 113238140A
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Abstract
The invention discloses an automatic detection system capable of positioning internal faults of a DDS (direct digital synthesizer), which belongs to the field of integrated circuit measurement and control and comprises an automatic detection system, a frequency spectrograph, a signal source, a programmable voltage source and a DDS device minimum system; the DDS device minimum system is connected with the automatic detection system through an SPI interface, an output signal of the DDS device minimum system is connected to the frequency spectrograph through a low-attenuation cable, and an input clock interface is connected with a signal source through the low-attenuation cable; the automatic detection system is connected with a program control interface of the frequency spectrograph through a communication cable according to a program control common communication protocol, is connected with a program control interface of a signal source through a communication cable according to the program control common communication protocol, and is connected with a program control interface of a programmable voltage source through the communication cable according to the program control common communication protocol. The automatic detection system can complete the full-voltage threshold full-frequency-band DDS test with higher difficulty under limited test conditions, greatly improves the test efficiency, ensures the test effect, reduces the test cost and has high engineering value.
Description
Technical Field
The invention relates to the technical field of integrated circuit measurement and control, in particular to an automatic detection system capable of positioning internal faults of a DDS.
Background
A DDS (Direct Digital Synthesis, Direct Digital frequency synthesizer) is a device that processes a series of Digital signals through a Digital algorithm and converts the Digital signals into analog signals through a Digital-to-analog converter, and plays an important role in the fields of aerospace, national defense, scientific research, semiconductor testing, and the like.
The DDS device has a digital function and an analog function, and needs to perform full-threshold scanning on digital and analog power supply after the current returns; the method is characterized in that the full-frequency-domain digital-analog function traversal detection is carried out under different power supply conditions, and a large number of screening tests are statistically carried out according to error phenomena caused by process deviation or design defects, so that a huge workload exists, and some unavoidable measurement errors also exist.
Disclosure of Invention
The invention aims to provide an automatic detection system capable of positioning internal faults of a DDS (direct digital synthesizer), and aims to solve the problems of low detection efficiency, high labor intensity and poor accuracy of the existing DDS device.
In order to solve the above technical problem, the present invention provides an automatic detection system capable of locating internal fault of DDS, comprising: the system comprises an automatic detection system, a frequency spectrograph, a signal source, a programmable voltage source and a DDS device minimum system; wherein the content of the first and second substances,
the DDS device minimum system is connected with the automatic detection system through an SPI interface, an output signal of the DDS device minimum system is connected to the frequency spectrograph through a low-attenuation cable, and an input clock interface of the DDS device minimum system is connected with the signal source through the low-attenuation cable;
the automatic detection system is connected with a program control interface of the frequency spectrograph through a communication cable according to a program control common communication protocol, the automatic detection system is connected with the program control interface of the signal source through the communication cable according to the program control common communication protocol, and the automatic detection system is connected with the program control interface of the programmable voltage source through the communication cable according to the program control common communication protocol.
Optionally, the automatic detection system includes a general SPI configuration interface, a program control command data transceiver, and a DSP operation module; the universal SPI configuration interface can be in butt joint with a DDS device for communication; the program control command data transceiver has the functions of sending a plurality of paths of program control commands and reading back and receiving response data of the program control commands; the DSP operation module has the function of floating point number calculation;
the general SPI configuration interface, the program control command data transceiver and the DSP operation module are realized by mixing and crossing an FPGA and an ARM.
Optionally, the general SPI configuration interface, the program control instruction data transceiver, and the DSP operation module are implemented by hybrid interleaving of an FPGA and an ARM.
Optionally, the DDS device minimum system includes a DDS chip socket, a peripheral passive device, and an auxiliary circuit for providing a fixed signal to the peripheral passive device.
Optionally, the auxiliary circuit includes a clock management circuit and a fixed signal level network; the clock management circuit can divide a single clock source into a plurality of clock signals with configurable frequency division ratios and variable time delay; the fixed signal level network provides fixed level necessary for the DDS to be tested to work normally.
Optionally, the SPI interface of the DDS device minimum system is connected to the general SPI configuration interface of the automatic detection system.
Optionally, the power supply of the automatic detection system is provided by the programmable voltage source.
Optionally, the programmable voltage source is connected to the digital power supply and the analog power supply socket led out from the DDS device minimum system through two low attenuation cables, and the programmable voltage source is provided by the automatic detection system through the two low attenuation cables and the switch on/off signals of the digital power supply and the analog power supply led out from the DDS device minimum system.
Optionally, the program-controlled common communication protocol includes a TCP/IP network communication protocol and an RS232 serial communication protocol.
The automatic detection system capable of positioning the internal fault of the DDS comprises an automatic detection system, a frequency spectrograph, a signal source, a programmable voltage source and a DDS device minimum system; the DDS device minimum system is connected with the automatic detection system through an SPI interface, an output signal of the DDS device minimum system is connected to the frequency spectrograph through a low-attenuation cable, and an input clock interface of the DDS device minimum system is connected with the signal source through the low-attenuation cable; the automatic detection system is connected with a program control interface of the frequency spectrograph through a communication cable according to a program control common communication protocol, the automatic detection system is connected with the program control interface of the signal source through the communication cable according to the program control common communication protocol, and the automatic detection system is connected with the program control interface of the programmable voltage source through the communication cable according to the program control common communication protocol. The automatic detection system can complete the full-voltage threshold full-frequency-band DDS test with higher difficulty under limited test conditions, greatly improves the test efficiency, ensures the test effect, reduces the test cost and has high engineering value.
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FIG. 1 is a schematic structural diagram of an automatic detection system capable of locating internal fault of DDS provided by the present invention;
fig. 2 is a schematic diagram of a test workflow of the automatic detection system.
Detailed Description
The automatic detection system for locating the internal fault of the DDS, which is proposed by the present invention, is further described in detail with reference to the accompanying drawings and the specific embodiments. Advantages and features of the present invention will become apparent from the following description and from the claims. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
Example one
The invention provides an automatic detection system capable of positioning internal faults of a DDS, which is structurally shown in figure 1. In the first embodiment, taking a typical process of outputting a full-threshold frequency spectrum under the full-threshold variation of a test DDS digital voltage as an example, when the maximum input frequency of a test object DDS device is 1GHz, the maximum output bandwidth is 500MHz, and the output bandwidth is within 400MHz, the typical value of output SFDR is about 60dBm, and after the output bandwidth reaches more than 400MHz, the output SFDR index is attenuated by 2 dBm; the whole current value range of normal operation is (1.1A, 1.5A); the digital voltage supply range is (2.5V, 3.3V). The general SPI configuration interface is realized by FPGA, the programmable instruction data transceiver is realized by mixing and crossing ARM and FPGA, the data calculation end is realized by ARM, the three parts form the main part of the automatic detection system, the FPGA is connected with the DDS device minimum system by the general SPI configuration interface, the FPGA is connected with the first ARM by a parallel bus protocol, the first ARM is connected with test instruments such as a frequency spectrograph, a signal source and an external programmable voltage source by a common communication cable by a programmable common communication protocol, and the first ARM is connected with the second ARM by a parallel bus protocol; the DDS device minimum system is connected with the frequency spectrograph and the signal source through low-attenuation cables, analog power supply and digital power supply of the DDS device minimum system are respectively connected with an output A end and an output B end of the programmable voltage source through the low-attenuation cables, and the automatic detection system is also connected with an output C end of the programmable voltage source through the low-attenuation cables.
The test flow is shown in fig. 2, and specifically as follows:
firstly, manually powering on an automatic detection system;
② an external programmable voltage source powers on the DDS device minimum system, the initial value of the voltage is V ═ V0＝2.5v；
After the system is started, the ARM program control signal source sends an output signal meeting the test requirement to the DDS device minimum system, and the FPGA starts to configure the enabling related functions of the DDS device minimum system;
fourthly, the FPGA starts to configure the enabling related function of the DDS device minimum system, and the initial output frequency F of the DDS device is set to be F0+ Δ F, initial frequency F0If necessary, the difference Δ F may be 500/250MHz and 2MHz in the range of (0, 498 MHz);
fifthly, judging whether the numerical value is in a characteristic numerical value range X belonging to the SFDR performance parameter X in the ARM readback spectrometer or not (X is the value range X belonging to the characteristic numerical value range X)min,Xmax) Within the range, typical tests can leave a margin of around 2dBm, so the lower limit Xmin＝58-2dBm＝56dBm，XmaxGenerally, no upper limit is made, if the result is within the range, the second ARM calculates and sends the result to the PC end, the step (iv) is returned to, and the loop is continued until the end is reached after 250 times;
sixthly, if the read-back data exceeds the preset range, whether the current value I of the read-back power supply meets I e (1.1A,1.5A) or not is judged, and if the read-back data exceeds the preset range, the voltage stepping is V which is equal to V0The + Δ V is 2.5V +0.1V is 2.6V, the stepping times are 8 times, and the test is continued by returning to the step 2; if not, the second ARM feeds back an error mark and outputs error information.
The automatic detection system capable of positioning the internal fault of the DDS can complete the high-difficulty full-voltage threshold full-frequency-band DDS test under the limited test condition, greatly improves the test efficiency, guarantees the test effect, reduces the test cost and has high engineering value.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.
Claims (8)
1. An automatic detection system capable of locating internal fault of DDS, comprising: the system comprises an automatic detection system, a frequency spectrograph, a signal source, a programmable voltage source and a DDS device minimum system; wherein the content of the first and second substances,
the DDS device minimum system is connected with the automatic detection system through an SPI interface, an output signal of the DDS device minimum system is connected to the frequency spectrograph through a low-attenuation cable, and an input clock interface of the DDS device minimum system is connected with the signal source through the low-attenuation cable;
the automatic detection system is connected with a program control interface of the frequency spectrograph through a communication cable according to a program control common communication protocol, the automatic detection system is connected with the program control interface of the signal source through the communication cable according to the program control common communication protocol, and the automatic detection system is connected with the program control interface of the programmable voltage source through the communication cable according to the program control common communication protocol.
2. The automatic detection system for locating a DDS internal fault as recited in claim 1, wherein the automatic detection system comprises a general purpose SPI configuration interface, a programmable command data transceiver, and a DSP operation module; the universal SPI configuration interface can be in butt joint with a DDS device for communication; the program control command data transceiver has the functions of sending a plurality of paths of program control commands and reading back and receiving response data of the program control commands; the DSP operation module has the function of floating point number calculation;
the general SPI configuration interface, the program control command data transceiver and the DSP operation module are realized by mixing and crossing an FPGA and an ARM.
3. The automatic detection system for locating internal fault of DDS as claimed in claim 1 wherein the DDS device minimal system comprises a DDS chip socket, peripheral passive devices and auxiliary circuits for providing fixed signal thereto.
4. An automatic detection system for a locatable DDS internal fault as recited in claim 3 wherein said auxiliary circuitry includes a clock management circuit and a fixed signal level network; the clock management circuit can divide a single clock source into a plurality of clock signals with configurable frequency division ratios and variable time delay; the fixed signal level network provides fixed level necessary for the DDS to be tested to work normally.
5. The automatic detection system capable of locating internal fault of DDS as claimed in claim 1 wherein the SPI interface of the DDS device minimal system is connected to the general SPI configuration interface of the automatic detection system.
6. An automatic detection system for locating a DDS internal fault as recited in claim 1 wherein the power supply of the automatic detection system is provided by the programmable voltage source.
7. The automatic detection system capable of locating internal fault of DDS of claim 1 wherein said programmable voltage source is connected to digital power supply and analog power supply outlet from said DDS device minimal system through two low attenuation cables, respectively, said programmable voltage source is provided by said automatic detection system through two low attenuation cables and on-off signals of digital power supply and analog power supply outlet from said DDS device minimal system.
8. The automatic detection system for locating a DDS internal fault as recited in claim 1, wherein the programmed common communication protocol comprises a TCP/IP network communication protocol and an RS232 serial communication protocol.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106896318A (en) * | 2017-03-27 | 2017-06-27 | 中国电子科技集团公司第五十八研究所 | Direct Digital Frequency Synthesizers circuit dynamic parameter testing system and method |
| CN111025374A (en) * | 2019-12-13 | 2020-04-17 | 中国电子科技集团公司第五十八研究所 | DDS device neutron effect evaluation system |
| CN111752202A (en) * | 2020-07-14 | 2020-10-09 | 华东师范大学 | Multifunctional signal processing platform based on FPGA and ARM |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106896318A (en) * | 2017-03-27 | 2017-06-27 | 中国电子科技集团公司第五十八研究所 | Direct Digital Frequency Synthesizers circuit dynamic parameter testing system and method |
| CN111025374A (en) * | 2019-12-13 | 2020-04-17 | 中国电子科技集团公司第五十八研究所 | DDS device neutron effect evaluation system |
| CN111752202A (en) * | 2020-07-14 | 2020-10-09 | 华东师范大学 | Multifunctional signal processing platform based on FPGA and ARM |
Non-Patent Citations (1)
| Title |
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| 周建斌 等: "SoC FPGA嵌入式设计和开发教程", 北京航空航天大学出版社 * |
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