CN113238132B - Detection device and detection method of frequency domain dielectric spectrum tester - Google Patents
Detection device and detection method of frequency domain dielectric spectrum tester Download PDFInfo
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- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/12—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing
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Abstract
The invention discloses a detection device and a detection method of a frequency domain dielectric spectrum tester, wherein the detection device comprises an upper computer and a lower computer which are in communication connection, the lower computer comprises an FPGA signal processing module, the upper computer is in communication connection with the FPGA signal processing module, and the FPGA signal processing module is electrically connected with an output amplifying module, an acquisition module and a storage module. The detection device is based on the fact that an FPGA signal processing module is used as a control core, the DDS signal generator and the high-voltage amplifier construct an output amplifying module, and the TIA current amplifying module, the variable gain amplifying module, the differential amplifying module, the AD module and the like construct an acquisition module, so that detection of dielectric loss in a wide frequency range is realized, detection precision of insulation of high-capacitance electrical equipment is improved, the detection method comprises three detection modes, multiple application environments can be met, detection time cannot be prolonged, and field detection efficiency is improved.
Description
Technical Field
The invention relates to the field of detection of insulating states of power system equipment, in particular to a detection device and a detection method of a frequency domain dielectric spectrum tester.
Background
Dielectric loss is a commonly used evaluation parameter for the insulation state of electrical equipment, and can effectively represent the degradation degree of the insulation whole. The common dielectric loss detection device is based on dielectric loss detection under power frequency voltage, the frequency domain dielectric spectrum test is used as a novel nondestructive detection method, the defects of insulated moisture and the like of high-voltage electrical equipment can be diagnosed more sensitively, the detection device is simple in wiring and convenient to operate, and the method is a preferred method for field detection of the electrical equipment. The existing frequency domain dielectric spectrum detection device generally detects the insulation state of electrical equipment in the frequency range of 1mHz-1kHz, and has a good detection effect on the insulation state of electrical equipment with large capacitance. However, when the detection frequency is low, the frequency domain dielectric spectrum detection device has the problem of reduced detection accuracy. In order to improve the detection accuracy of dielectric loss, voltage signals and current signals in multiple periods are often detected, and the detection time is doubled while the accuracy is improved. For devices with larger capacitance, such as capacitive bushings, power cables and the like, in order to obtain an accurate insulation state of the devices, more dielectric loss parameters in a low frequency band are needed, and the detection time is further prolonged, so that the field detection efficiency is greatly affected.
Disclosure of Invention
In order to solve the defects in the prior art, the invention provides a detection device and a detection method of a frequency domain dielectric spectrum tester, wherein the detection device is based on the fact that an FPGA signal processing module is used as a control core, an output amplification module is built by combining a DDS signal generator and a high-voltage amplifier, and an acquisition module is built by a TIA current amplification module, a variable gain amplification module, a differential amplification module and an AD module, so that the detection of dielectric loss in a wide frequency range is realized, and the detection precision of insulation of high-capacitance electrical equipment is improved. The detection mode comprises a single-frequency point detection mode, a sweep frequency detection mode and a multi-frequency point cooperative detection mode, so that various application environments can be met, and the field detection efficiency is improved.
In order to achieve the above purpose, the invention adopts the following specific scheme: the detection device of the frequency domain dielectric spectrum tester comprises an upper computer and a lower computer which are in communication connection, wherein the lower computer comprises an FPGA signal processing module, the upper computer is in communication connection with the FPGA signal processing module, and the FPGA signal processing module is electrically connected with an output amplifying module, an acquisition module and a storage module;
the output amplification module comprises a DDS signal generator and a high-voltage amplifier which are electrically connected, the DDS signal generator is electrically connected with the FPGA signal processing module, and the high-voltage amplifier is electrically connected with the tested body;
The acquisition module comprises a voltage detection module, a current detection module, a TIA amplification module, two differential amplification modules, two variable gain amplification modules and an AD module, wherein the voltage detection module is electrically connected with one of the variable gain amplification modules and one of the differential amplification modules in sequence, the current detection module is electrically connected with the TIA amplification module, the other variable gain amplification module and the other differential amplification module in sequence, the two differential amplification modules are electrically connected with the AD module, the AD module is electrically connected with the FPGA signal processing module, the voltage detection module is electrically connected with the high-voltage amplifier, and the current detection module is electrically connected with a tested body;
The storage module comprises a DDR memory, and the DDR memory is electrically connected with the FPGA signal processing module;
Further optimizing the detection device of the frequency domain dielectric spectrum tester: the DDS signal generator module comprises a DA module and a low-pass filter which are electrically connected, wherein the DA module is connected with the FPGA signal processing module, and the low-pass filter is connected with the high-voltage amplifier.
Further optimizing the detection device of the frequency domain dielectric spectrum tester: the FPGA signal processing module is in communication connection with the two variable gain amplifying modules.
The detection method of the frequency domain dielectric spectrum tester comprises the following steps that the detection object of the tester is a plurality of detection frequency points, each detection frequency point comprises a start frequency point and a stop frequency point, and the detection frequency points are detected by using the detection device of the frequency domain dielectric spectrum tester:
S1, starting an upper computer and a lower computer;
S2, the upper computer sends a self-checking instruction to the lower computer, the lower computer enters a self-checking state and sends a self-checking result to the upper computer, if the self-checking result is normal, S3 is executed, and if the self-checking result is abnormal, the upper computer and the lower computer stop working;
S3, selecting a detection mode on the upper computer, setting detection frequency and voltage parameters of a detection frequency point, sending the detection frequency and the voltage parameters to the lower computer, adjusting the parameters of the lower computer according to the detection frequency and the voltage parameters, then collecting detection voltage signals and detection current signals of a detected body, sending the detection voltage signals and the detection current signals to the upper computer, and calculating and storing dielectric loss tangent values of the detection frequency point according to the detection voltage signals and the detection current signals by the upper computer;
S4, repeating the step S3 until all the detection frequency points are detected, and stopping the work of the upper computer and the lower computer;
s5, detection of the detection frequency points is completed.
As a further optimization of the detection method of the frequency domain dielectric spectrum tester, the following is adopted: the self-checking step of the lower computer in the S2 is as follows:
S211, outputting a sine wave signal with the frequency of 1Hz and the amplitude of 100Vpp by the lower computer, and starting an AD module to acquire a voltage signal and a current signal;
s212, when the acquired voltage signal is a 1Hz sinusoidal signal and the effective value of the current signal is greater than 0, the self-checking result is normal, otherwise, the self-checking result is abnormal;
S213, the lower computer feeds the self-checking result back to the upper computer, and S3 is executed if the self-checking result is normal, otherwise, the upper computer and the lower computer stop working.
As a further optimization of the detection method of the frequency domain dielectric spectrum tester, the following is adopted: the detection mode in S3 includes a single frequency point detection mode:
s311, setting the detection frequency of the detection frequency point and the output voltage amplitude value of the detection frequency point at the upper computer and sending the detection frequency and the output voltage amplitude value to the lower computer;
S312, the lower computer adjusts self parameters according to the detection frequency and the output voltage amplitude, the high-voltage amplifier outputs detection voltage signals of the detection frequency points, the AD module collects detection voltage signals and detection current signals of the detected body, and the lower computer sends the collected detection voltage signals and detection current signals to the upper computer;
S313, the upper computer calculates a dielectric loss tangent value of a detection frequency point according to the detection voltage signal and the detection current signal;
S314, saving the detection voltage signal, the detection current signal and the dielectric loss tangent value to the DDR memory;
s315, repeating S311 to S315 until detection of all detection frequency points is completed.
As a further optimization of the detection method of the frequency domain dielectric spectrum tester, the following is adopted: the detection mode in S3 includes a sweep frequency detection mode:
S321, arranging all detection frequency points in sequence, determining a start frequency point and a stop frequency point, setting the detection frequency of the start frequency point and the output voltage amplitude value of the start frequency point on an upper computer, and sending the detection frequency and the output voltage amplitude value to a lower computer;
s322, the lower computer adjusts self parameters according to the detection frequency and the output voltage amplitude, the high-voltage amplifier outputs detection voltage signals of the detection frequency points, the AD module collects detection voltage signals and detection current signals of the detected body, and the lower computer sends the collected detection voltage signals and detection current signals to the upper computer;
s323, the upper computer calculates a dielectric loss tangent value of the detection frequency point according to the detection voltage signal and the detection current signal;
S324, saving the detection voltage signal, the detection current signal and the dielectric loss tangent value to the DDR memory;
s325, sequentially sending the frequency of the next detection frequency point and the corresponding output voltage amplitude to the lower computer, and repeating S322 to S324 until the detection of the termination frequency point is completed.
As a further optimization of the detection method of the frequency domain dielectric spectrum tester, the following is adopted: the detection mode in S3 includes a multi-frequency point cooperative detection mode:
S331, selecting a plurality of detection frequency points by the upper computer for system detection, setting the detection frequency of each detection frequency point and the amplitude and phase angle of output voltage, and transmitting the detection frequency of the detection frequency point and the amplitude of the corresponding output voltage to the lower computer by the upper computer;
s332, the lower computer receives the detection frequencies of the detection frequency points and the amplitude values of the corresponding output voltages, and the FPGA signal processing module synthesizes the signals of the detection frequency points, wherein the synthesis formula is as follows:
Wherein k is the number of the selected detection frequency points, i is the ordinal number of the selected detection frequency points, phi i is the initial phase of the detection frequency points, the synthesized signals are transmitted to a DA module and a high-voltage amplifier to output corresponding waveforms, the AD module acquires the output voltage signals and current signals, and the lower computer transmits the output waveforms, the voltage signals and the current signals to the upper computer;
s333, decomposing the waveform by using a wavelet packet decomposition algorithm by the upper computer, reconstructing the voltage signal and the current signal of each detection frequency point to obtain a reconstructed voltage signal and a reconstructed current signal of each detection frequency point, and intercepting the middle voltage signal and the middle current signal of the reconstructed voltage signal and the reconstructed current signal of each detection frequency point as the detection voltage signal and the detection current signal of the detected body;
S334, the upper computer calculates dielectric loss tangent values of all detection frequency points according to the detection voltage signals and the detection current signals;
s335, saving the detection voltage signal, the detection current signal and the dielectric loss tangent value to a DDR memory;
S336, repeating S331 to S335 until all detection frequency points are detected.
The beneficial effects are that: the invention provides a detection device and a detection method of a broadband dielectric spectrum tester, wherein the detection device is based on an output amplification module constructed by a DDS signal generator and a high-voltage amplifier by taking an FPGA signal processing module as a control core, and an acquisition module constructed by a TIA current amplification module, a variable gain amplification module, a differential amplification module, an AD module and the like, so that the detection of dielectric loss in a broadband range is realized, the detection precision of insulation of high-capacitance electrical equipment is improved, the detection method comprises three detection modes, various application environments can be met, the detection time is not prolonged, and the field detection efficiency is improved.
Drawings
FIG. 1 is a schematic diagram of a frame of the present invention;
Fig. 2 is a circuit diagram of a high voltage amplifier;
FIG. 3 is a TIA module circuit diagram;
FIG. 4 is a circuit diagram of a variable gain amplification module;
FIG. 5 is a differential amplifying in-phase circuit diagram;
FIG. 6 is a differential amplification inverting circuit diagram;
fig. 7 is a circuit diagram of an AD module;
FIG. 8 is a voltage reference circuit diagram;
fig. 9 is a flow chart of a detection method.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
As shown in fig. 1 to 9, a detection device of a frequency domain dielectric spectrum tester comprises an upper computer and a lower computer which are in communication connection, wherein the lower computer comprises an FPGA signal processing module, the upper computer is in communication connection with the FPGA signal processing module, and the FPGA signal processing module is electrically connected with an output amplifying module, an acquisition module and a storage module.
The acquisition module comprises a voltage detection module, a current detection module, a TIA amplification module, two differential amplification modules, two variable gain amplification modules and an AD module, wherein the voltage detection module is electrically connected with one of the variable gain amplification modules and one of the differential amplification modules in sequence, the current detection module is electrically connected with the TIA amplification module, the other variable gain amplification module and the other differential amplification module in sequence, the two differential amplification modules are electrically connected with the AD module, the AD module is electrically connected with the FPGA signal processing module, the voltage detection module is electrically connected with the high-voltage amplifier, and the current detection module is electrically connected with a tested body.
The storage module comprises a DDR memory, the DDR memory is electrically connected with the FPGA signal processing module, and the DDR memory adopts a DDR2 memory bank.
The upper computer and the lower computer communicate by adopting a wired or wireless mode, wherein the wired mode comprises but is not limited to a USB interface, a serial port, an Ethernet interface and the like, and the wireless communication mode comprises but is not limited to a WIFI mode, a Bluetooth mode and the like. The upper computer is communicated with the FPGA signal processing module in the lower computer through a USB interface or an Ethernet interface, so that the upper computer can control the FPGA signal processing module and read data.
The FPGA signal processing module comprises an FPGA signal processor, is a control core of the hardware part of the whole lower computer, completes driving of the DDS signal generator, the AD module, the DDR memory and the like, and stores read data into the DDR memory. The core board of the FPGA signal processor is an AC4075 core board produced by Shanghai electric technology (Shanghai) limited company.
The output amplification module comprises a DDS signal generator and a high-voltage amplifier which are electrically connected, wherein the DDS signal generator is electrically connected with the FPGA signal processing module, and the high-voltage amplifier is electrically connected with the tested body.
The DDS signal generator module comprises a DA module and a low-pass filter which are electrically connected, wherein the DA module is connected with the FPGA signal processing module, and the low-pass filter is connected with the high-voltage amplifier. The FPGA signal processing module outputs digital waveforms with corresponding frequencies according to parameters of the upper computer, the digital waveforms are output into electric signals through the DA module, and the electric signals are output to the high-voltage amplifier for amplification after low-pass filtering.
The FPGA signal processing module is in communication connection with the two variable gain amplifying modules. The communication mode is a wired mode or a wireless mode, and the wired communication mode includes but is not limited to a USB interface, a serial port, an ethernet interface, and the like, and the wireless communication mode includes but is not limited to a WIFI, a bluetooth, and the like.
The high-voltage amplifier includes a pre-amplifier circuit, a composite amplifier circuit, a relay K1, a relay K2, and a network resistor RP1V. The pre-amplifying circuit is composed of an operational amplifier IC1V and a peripheral circuit thereof, the output amplitude of the low-pass filter is amplified to +/-10V, the composite amplifying circuit comprises an operational amplifier IC2V and a peripheral circuit thereof, an operational amplifier IC3V and a peripheral circuit thereof, the model of the operational amplifier IC1V and the model of the operational amplifier IC2V are OPA277, the model of the operational amplifier IC3V is PA15AFU, and the model of the relay K1 and the model of the relay K2 are SIP-HV-1A-12.
The inverting input end of the operational amplifier IC1V is electrically connected with one end of a resistor R3V and one end of a resistor R5V, the other end of the resistor R3V is electrically connected with the low-pass filter, the other end of the resistor R5V and the output end of the operational amplifier IC1V are both connected with the non-inverting input end of the operational amplifier IC2V, the non-inverting input end of the operational amplifier IC1V is electrically connected with one end of a resistor R4V, and the other end of the resistor R4V is connected with one port of the operational amplifier IC 1V.
The operational amplifier IC2V is electrically connected with the potentiometer RP1, the inverting input end of the operational amplifier IC2V is connected with one port of the network resistor RP1V, the output end of the operational amplifier IC2V is electrically connected with one end of the resistor R13V, and the other end of the resistor R13V is connected with the non-inverting input end of the operational amplifier IC 3V.
The inverting input end of the operational amplifier IC3V is electrically connected with a resistor R12V, one end of a capacitor C26V and one end of a resistor R15V, one port of the operational amplifier IC3V is electrically connected with one end of a resistor R14V, the operational amplifier IC3V is connected with a capacitor C25V, the output end of the operational amplifier IC3V is electrically connected with the other end of the capacitor C26V, the other end of the resistor R14V and one end of a resistor R11V, the other end of the resistor R11V is electrically connected with the other end of the resistor R15V, one port of a network resistor RP1V, one end of a resistor R16V and one end of a normally open contact of a relay K1, the other end of the resistor R16V is electrically connected with a resistor R17V, two ends of the resistor R17V are connected with a voltmeter P4V in parallel, one end of a normally open contact of the resistor R10V and one end of a normally open contact of the relay K2, two ends of the resistor R10V are connected with a voltmeter P3V in parallel, one side of a coil of the relay K1 is electrically connected with one end of a power supply positive pole, one end of the capacitor C23V and one end of the other end of the capacitor C23V and the other end of the coil of the relay K2.
The output of the high-voltage amplifier can be output after being switched by an output relay K1, and the output end of the relay K1 is grounded to a gas discharge tube GDT1 and a short-circuit relay K2.
The TIA amplifying module comprises a cable socket J1I, an operational amplifier IC1I, a relay K2I and a relay K3I.
The cable socket J1I is connected with a gas discharge tube GDT1I, the gas discharge tube GDT1I is connected with a capacitor C1l in parallel, and one end of a resistor R1I is also connected with the cable socket J1I.
The two GRD ports of the operational amplifier IC1I are connected, the non-inverting input end of the operational amplifier IC1I is grounded, and the output end of the operational amplifier IC1I is connected with the CURRENT1 port.
The other end electric connection of resistance R1I has electric capacity C2l, relay K1I normally open contact's one end, relay K2I normally open contact's one end and relay K3I normally open contact's one end all inserts operational amplifier IC 1I's inverting input terminal, relay K1I normally open contact's the other end electric connection has resistance R30I one end, relay K2I normally open contact's the other end electric connection has resistance R31I one end, relay K3I normally open contact's the other end electric connection has resistance R32I one end, resistance R30I's the other end, resistance R31I's the other end, and resistance R32I's the other end all inserts operational amplifier IC 1I's output.
The relay K1I, the relay K2I and the relay K3I are reed switch relays, the types of the relays are COTO9091,091-12-0, the relays are used for switching three different sampling resistors R30I, R31, 31I, R32 3I, three different current measuring ranges are realized, and the TIA current amplifying module is controlled by the FPGA signal processing module so as to cope with different detection frequency points. The model of the operational amplifier IC1I is ADA4530-1ARZ.
The variable gain amplification module includes a gain amplifier IC2I, the gain amplifier IC2I including INP ports, INN ports, VOP ports, and VON ports.
The INP port of the gain amplifier IC2I is electrically connected with one end of a resistor R5I and one end of a capacitor C4I, the other end of the resistor R5I is connected with the CURRENT1 port of the TIS CURRENT amplifying module, the other end of the capacitor C4I is electrically connected with one end of a resistor R6I, and the other end of the resistor R6I is electrically connected with the INN port of the gain amplifier IC 2I.
The VOP port of the gain amplifier IC2I is connected to the ch1_p port of the amplifying in-phase circuit.
The VON port of the gain amplifier IC2I is connected to the ch1_n port of the amplifying inverter circuit.
Six ports are arranged between the INN port and the VON port, a capacitor C7l is electrically connected to the port close to the INN port, and the other five ports are respectively connected with electric signals.
A plurality of ports are arranged between the INP port and the VOP port, wherein one port is electrically connected with a resistor R8l and a capacitor C6l, one port is electrically connected with a resistor R7l and a capacitor C5l, one port is electrically connected with one end of the capacitor C8l and the resistor R9l, and the other end of the capacitor C8l is connected to the other port.
The gain amplifier IC2I is of the PGA281, and the amplification factor of the gain amplifier can be controlled by an electric signal, and if saturation of the gain amplifier is detected, the PGA281 gain amplifier can automatically adjust the gain of the gain amplifier by outputting a false alarm electric signal, and the FPGA signal processing module can automatically adjust the gain of the gain amplifier after detecting the signal.
The differential amplifying module comprises an amplifying in-phase circuit and an amplifying inverting circuit, wherein the amplifying in-phase circuit and the amplifying inverting circuit are both based on a voltage follower, the amplifying in-phase circuit comprises an operational amplifier IC1A, an in-phase input end of the operational amplifier IC1A is connected with a CH1_P port, one end of a capacitor C1 and one end of a resistor R1 are electrically connected between the in-phase input end of the operational amplifier IC1A and the CH1_P port, the other end of the capacitor C1 is electrically connected with the other end of the resistor R1, the inverting input end of the operational amplifier IC1A and the output end of the operational amplifier IC1A are electrically connected with one end of a resistor R3, and the other end of the resistor R3 is electrically connected with the capacitor C3 and the CH1D_P port.
The amplifying inverting circuit comprises an operational amplifier IC2B, wherein the non-inverting input end of the operational amplifier IC2B is connected with a CH1_N port, one end of a resistor R2 and one end of a capacitor C2 are electrically connected between the non-inverting input end of the operational amplifier IC2B and the CH1_N port, the other end of the resistor R2 is electrically connected with the other end of the capacitor C2, the inverting input end of the operational amplifier IC2B and the output end of the operational amplifier IC2B are electrically connected with one end of a resistor R4, and the other end of the resistor R4 is electrically connected with the capacitors C4 and the CH1D_N port.
The operational amplifier of OPA2277 is used for amplifying the in-phase signal and the anti-phase signal, respectively, and the type of the operational amplifier IC1A and the type of the operational amplifier IC2B are both OPA 2277.
The AD module includes a single channel analog to digital converter IC9A.
The in+ port of the single-channel analog-to-digital converter IC9A is connected to the CH1D_P port of the amplifying IN-phase circuit.
The IN-port of the single-channel analog-to-digital converter IC9A is connected to the CH1D_N port of the amplifying inverter circuit.
The single-channel analog-to-digital converter IC9A is connected with a voltage reference circuit, and the single-channel analog-to-digital converter IC9A is provided with two REF ports, wherein one REF port is connected with a VREF1 port of the voltage reference circuit, and the other REF port is connected with a VFEFS port of the voltage reference circuit.
The model of the AD chip adopted by the single-channel analog-digital converter IC9A is LTC2500-32.
The voltage reference circuit includes a voltage reference IC3A, the voltage reference IC3AThe port is connected with the VIN port, the voltage reference IC3A comprises four GND ports, two GND ports are connected, and the/>, of the voltage reference IC3AA capacitor C1A is connected between the port and one of the GND ports, a capacitor C8A is connected in parallel with the capacitor C1A, a capacitor C10A is connected between the other two GND ports of the voltage reference IC3A and the VOUT_F port after the other two GND ports are connected, a capacitor C11A is connected in parallel with the capacitor C10A, a capacitor C9A is connected in parallel with the capacitor C11A, a VREF1 port is connected between the capacitor C11A and the capacitor C9A, a capacitor C57A is connected in parallel with the capacitor C9A, and the VOUT_S port of the voltage reference IC3A is connected with the VFEFS port.
The voltage reference IC3A adopts a voltage reference chip model LTC6655BHMS8-5.
The detection method of the frequency domain dielectric spectrum tester comprises the following steps that the detection object of the tester is 26 detection frequency points, the detection frequency points comprise a start frequency point and an end frequency point, and the detection frequency points are detected by using the detection device of the frequency domain dielectric spectrum tester:
s1, starting an upper computer and a lower computer.
S2, the upper computer sends a self-checking instruction to the lower computer, the lower computer enters a self-checking state and sends a self-checking result to the upper computer, if the self-checking result is normal, S3 is executed, and if the self-checking result is abnormal, the upper computer and the lower computer stop working.
S3, selecting a detection mode on the upper computer, setting detection frequency and voltage parameters of the detection frequency point, sending the detection frequency and the voltage parameters to the lower computer, adjusting the parameters of the lower computer according to the detection frequency and the voltage parameters, then collecting detection voltage signals and detection current signals of a detected body, sending the detection voltage signals and the detection current signals to the upper computer, and calculating and storing dielectric loss tangent values of the detection frequency point according to the detection voltage signals and the detection current signals by the upper computer.
S4, repeating the step S3 until all the detection frequency points are detected, and stopping the work of the upper computer and the lower computer.
S5, detection of the detection frequency points is completed.
After receiving the command from the upper computer, the FPGA signal processing module controls the output frequency of the DDS signal generator, the DDS signal generator sends the output signal to the high-voltage amplifier, the signal received by the DDS signal generator is subjected to low-pass filtering and amplitude adjustment and then sent to the high-voltage amplifier, the high-voltage amplifier applies the test voltage to the tested body, and 26 detection frequency points are arranged in the range of 0.1 mHz-10 kHz for realizing dielectric loss measurement under different frequencies. Meanwhile, the output amplitude of the high-voltage amplifier can be adjusted within the range of 10-200 Vpp according to the condition of the measured object. The current detection circuit converts weak current signals into voltage signals and sends the voltage signals to the TIA current amplification module, the TIA current amplification module amplifies the voltage signals in a low noise mode, and the voltage signals are sent to the variable gain amplification module and the differential amplification module and then sent to the AD module. The FPGA signal processing module dynamically adjusts the output voltage of the high-voltage amplifier according to the detected current value to avoid saturation of the current amplifier, and dynamically adjusts the gain of the variable gain amplifying module to realize optimal signal-to-noise ratio of current detection and filtering of interference signals. The voltage detection circuit works in different attenuation ratios according to instructions of the FPGA signal processing module, and then sends detected voltage signals of the detected object to the variable gain amplification module and the differential amplification module for amplification, and then sends the voltage signals to the AD module. The AD module samples and converts the signals simultaneously to eliminate phase errors. The current signal and the voltage signal after the AD module conversion are recorded as a detection current signal and a detection voltage signal, the detection current signal and the detection voltage signal are stored, and the upper computer processes the detection current signal and the detection voltage signal to obtain the dielectric loss tangent of the tested body at the detection frequency point.
The self-checking step of the lower computer in S2 is as follows:
S211, outputting a sine wave signal with the frequency of 1Hz and the amplitude of 100Vpp by the lower computer, and starting the AD module to collect a voltage signal and a current signal.
S212, when the acquired voltage signal is a 1Hz sinusoidal signal and the effective value of the current signal is greater than 0, the self-checking result is normal, otherwise, the self-checking result is abnormal.
S213, the lower computer feeds the self-checking result back to the upper computer, and S3 is executed if the self-checking result is normal, otherwise, the upper computer and the lower computer stop working.
The detection modes in S3 include a single frequency point detection mode:
S311, setting the detection frequency of the detection frequency point and the output voltage amplitude value at the upper computer and sending the detection frequency and the output voltage amplitude value to the lower computer.
S312, the lower computer adjusts self parameters according to the detection frequency and the output voltage amplitude, the high-voltage amplifier outputs detection voltage signals of the detection frequency points, the AD module collects detection voltage signals and detection current signals of the detected body, and the lower computer sends the collected detection voltage signals and detection current signals to the upper computer.
S313, the upper computer calculates the dielectric loss tangent value of the detection frequency point according to the detection voltage signal and the detection current signal.
S314, saving the detection voltage signal, the detection current signal and the dielectric loss tangent value to the DDR memory.
S315, repeating S311 to S315 until detection of all detection frequency points is completed.
The lower computer receives the detection frequency and the output voltage amplitude from the upper computer, and adjusts parameters of the DDS signal generator, parameters of the high-voltage amplifier, parameters of the AD module and parameters of the variable gain amplification module according to the detection frequency and the output voltage amplitude. The high-voltage amplifier outputs a voltage signal corresponding to the detection frequency point, the AD module collects a detection voltage signal and a detection current signal, and the lower computer sends the detection voltage signal and the detection current signal to the upper computer and enters a command waiting state.
The upper computer filters and reduces noise on the detection voltage signal and the detection current signal, calculates the respective amplitude and phase angle of the detection voltage signal and the detection current signal, obtains the dielectric loss tangent value of the corresponding detection frequency point, and stores the detection voltage signal, the detection current signal and the calculation result.
The detection modes in S3 include a sweep detection mode:
S321, all the detection frequency points are arranged in sequence, the starting frequency point and the ending frequency point are determined, the detection frequency of the starting frequency point and the output voltage amplitude are set on the upper computer, and the output voltage amplitude is sent to the lower computer.
S322, the lower computer adjusts self parameters according to the detection frequency and the output voltage amplitude, the high-voltage amplifier outputs detection voltage signals of the detection frequency points, the AD module collects detection voltage signals and detection current signals of the detected body, and the lower computer sends the collected detection voltage signals and detection current signals to the upper computer.
S323, the upper computer calculates the dielectric loss tangent value of the detection frequency point according to the detection voltage signal and the detection current signal.
S324, saving the detection voltage signal, the detection current signal and the dielectric loss tangent value to the DDR memory.
S325, sequentially sending the frequency of the next detection frequency point and the corresponding output voltage amplitude to the lower computer, and repeating S322 to S324 until the detection of the termination frequency point is completed.
The detection modes in S3 comprise a multi-frequency point cooperative detection mode:
S331, selecting a plurality of detection frequency points by the upper computer for system detection, setting the detection frequency of each detection frequency point and the amplitude and phase angle of output voltage, and sending the detection frequency of the detection frequency point and the amplitude of the corresponding output voltage to the lower computer by the upper computer.
S332, the lower computer receives the detection frequencies of the detection frequency points and the amplitude values of the corresponding output voltages, and the FPGA signal processing module synthesizes the signals of the detection frequency points, wherein the synthesis formula is as follows:
Wherein k is the number of the selected detection frequency points, i is the ordinal number of the selected detection frequency points, phi i is the initial phase of the detection frequency points, the synthesized signals are transmitted to the DA module and the high-voltage amplifier, the corresponding waveforms are output, the AD module collects the output voltage signals and the output current signals, and the lower computer transmits the output waveforms, the voltage signals and the output current signals to the upper computer.
S333, the upper computer decomposes the waveform by using a wavelet packet decomposition algorithm, and reconstructs the voltage signal and the current signal of each detection frequency point to obtain a reconstructed voltage signal and a reconstructed current signal of each detection frequency point, and intercepts the middle voltage signal and the middle current signal of the reconstructed voltage signal and the reconstructed current signal of each detection frequency point as the detection voltage signal and the detection current signal of the detected object.
S334, the upper computer calculates dielectric loss tangent values of all the detection frequency points according to the detection voltage signals and the detection current signals.
S335, saving the detection voltage signal, the detection current signal and the dielectric loss tangent value to the DDR memory.
S336, repeating S331 to S335 until all detection frequency points are detected.
The detection modes comprise three types, can meet various application environments, can detect a plurality of detection frequency points simultaneously, intercept and obtain detection voltage signals and detection current signals by utilizing a synthesis formula and a wavelet packet decomposition algorithm, calculate a dielectric loss tangent value, reduce detection time and improve field detection efficiency.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (4)
1. The utility model provides a frequency domain dielectric spectrum tester's detection method, the test object of tester is a plurality of detection frequency points, detects the frequency point and includes initial frequency point and termination frequency point, its characterized in that: detecting a detection frequency point by using a detection device of a frequency domain dielectric spectrum tester, wherein the detection device comprises an upper computer and a lower computer which are in communication connection, the lower computer comprises an FPGA signal processing module, the upper computer is in communication connection with the FPGA signal processing module, and the FPGA signal processing module is electrically connected with an output amplifying module, an acquisition module and a storage module;
the output amplification module comprises a DDS signal generator and a high-voltage amplifier which are electrically connected, the DDS signal generator is electrically connected with the FPGA signal processing module, and the high-voltage amplifier is electrically connected with the tested body;
The acquisition module comprises a voltage detection module, a current detection module, a TIA amplification module, two differential amplification modules, two variable gain amplification modules and an AD module, wherein the voltage detection module is electrically connected with one of the variable gain amplification modules and one of the differential amplification modules in sequence, the current detection module is electrically connected with the TIA amplification module, the other variable gain amplification module and the other differential amplification module in sequence, the two differential amplification modules are electrically connected with the AD module, the AD module is electrically connected with the FPGA signal processing module, the voltage detection module is electrically connected with the high-voltage amplifier, and the current detection module is electrically connected with a tested body; the storage module comprises a DDR memory, and the DDR memory is electrically connected with the FPGA signal processing module; the DDS signal generator module comprises a DA module and a low-pass filter which are electrically connected, the DA module is connected with the FPGA signal processing module, and the low-pass filter is connected with the high-voltage amplifier; the FPGA signal processing module is in communication connection with the two variable gain amplifying modules, and the detection method comprises the following steps:
S1, starting an upper computer and a lower computer;
S2, the upper computer sends a self-checking instruction to the lower computer, the lower computer enters a self-checking state and sends a self-checking result to the upper computer, if the self-checking result is normal, S3 is executed, and if the self-checking result is abnormal, the upper computer and the lower computer stop working;
s3, selecting a detection mode on the upper computer, setting detection frequency and voltage parameters of a detection frequency point, sending the detection frequency and the voltage parameters to the lower computer, adjusting the parameters of the lower computer according to the detection frequency and the voltage parameters, then collecting detection voltage signals and detection current signals of a detected body, sending the detection voltage signals and the detection current signals to the upper computer, and calculating and storing dielectric loss tangent values of the detection frequency point according to the detection voltage signals and the detection current signals by the upper computer; the detection mode in S3 includes a multi-frequency point cooperative detection mode:
S331, selecting a plurality of detection frequency points by the upper computer for system detection, setting the detection frequency of each detection frequency point and the amplitude and phase angle of output voltage, and transmitting the detection frequency of the detection frequency point and the amplitude of the corresponding output voltage to the lower computer by the upper computer;
s332, the lower computer receives the detection frequencies of the detection frequency points and the amplitude values of the corresponding output voltages, and the FPGA signal processing module synthesizes the signals of the detection frequency points, wherein the synthesis formula is as follows:
Wherein k is the number of the selected detection frequency points, i is the ordinal number of the selected detection frequency points, phi is the initial phase of the detection frequency points, the synthesized signals are transmitted to a DA module and a high-voltage amplifier to output corresponding waveforms, the AD module acquires the output voltage signals and current signals, and the lower computer transmits the output waveforms, the voltage signals and the current signals to the upper computer;
s333, decomposing the waveform by using a wavelet packet decomposition algorithm by the upper computer, reconstructing the voltage signal and the current signal of each detection frequency point to obtain a reconstructed voltage signal and a reconstructed current signal of each detection frequency point, and intercepting the middle voltage signal and the middle current signal of the reconstructed voltage signal and the reconstructed current signal of each detection frequency point as the detection voltage signal and the detection current signal of the detected body;
S334, the upper computer calculates dielectric loss tangent values of all detection frequency points according to the detection voltage signals and the detection current signals;
s335, saving the detection voltage signal, the detection current signal and the dielectric loss tangent value to a DDR memory;
s336, repeating S331 to S335 until all detection frequency points are detected;
S4, repeating the step S3 until all the detection frequency points are detected, and stopping the work of the upper computer and the lower computer;
s5, detection of the detection frequency points is completed.
2. The method for detecting a frequency domain dielectric spectrum tester according to claim 1, wherein: the self-checking step of the lower computer in the S2 is as follows:
S211, outputting a sine wave signal with the frequency of 1Hz and the amplitude of 100Vpp by the lower computer, and starting an AD module to acquire a voltage signal and a current signal;
s212, when the acquired voltage signal is a 1Hz sinusoidal signal and the effective value of the current signal is greater than 0, the self-checking result is normal, otherwise, the self-checking result is abnormal;
S213, the lower computer feeds the self-checking result back to the upper computer, and S3 is executed if the self-checking result is normal, otherwise, the upper computer and the lower computer stop working.
3. The method for detecting a frequency domain dielectric spectrum tester according to claim 1, wherein: the detection mode in S3 includes a single frequency point detection mode:
s311, setting the detection frequency of the detection frequency point and the output voltage amplitude value of the detection frequency point at the upper computer and sending the detection frequency and the output voltage amplitude value to the lower computer;
S312, the lower computer adjusts self parameters according to the detection frequency and the output voltage amplitude, the high-voltage amplifier outputs detection voltage signals of the detection frequency points, the AD module collects detection voltage signals and detection current signals of the detected body, and the lower computer sends the collected detection voltage signals and detection current signals to the upper computer;
S313, the upper computer calculates a dielectric loss tangent value of a detection frequency point according to the detection voltage signal and the detection current signal;
S314, saving the detection voltage signal, the detection current signal and the dielectric loss tangent value to the DDR memory;
s315, repeating S311 to S315 until detection of all detection frequency points is completed.
4. The method for detecting a frequency domain dielectric spectrum tester according to claim 1, wherein: the detection mode in S3 includes a sweep frequency detection mode:
S321, arranging all detection frequency points in sequence, determining a start frequency point and a stop frequency point, setting the detection frequency of the start frequency point and the output voltage amplitude value of the start frequency point on an upper computer, and sending the detection frequency and the output voltage amplitude value to a lower computer;
s322, the lower computer adjusts self parameters according to the detection frequency and the output voltage amplitude, the high-voltage amplifier outputs detection voltage signals of the detection frequency points, the AD module collects detection voltage signals and detection current signals of the detected body, and the lower computer sends the collected detection voltage signals and detection current signals to the upper computer;
s323, the upper computer calculates a dielectric loss tangent value of the detection frequency point according to the detection voltage signal and the detection current signal;
S324, saving the detection voltage signal, the detection current signal and the dielectric loss tangent value to the DDR memory;
s325, sequentially sending the frequency of the next detection frequency point and the corresponding output voltage amplitude to the lower computer, and repeating S322 to S324 until the detection of the termination frequency point is completed.
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