CN113206009A - Sliced silicon heterojunction cell, preparation method and solar cell module - Google Patents

Sliced silicon heterojunction cell, preparation method and solar cell module Download PDF

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CN113206009A
CN113206009A CN202110417599.9A CN202110417599A CN113206009A CN 113206009 A CN113206009 A CN 113206009A CN 202110417599 A CN202110417599 A CN 202110417599A CN 113206009 A CN113206009 A CN 113206009A
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silicon heterojunction
sliced
battery
light
cell
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王文静
徐晓华
龚道仁
姚真真
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Anhui Huasheng New Energy Technology Co ltd
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Anhui Huasheng New Energy Technology Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/202Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic System
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/268Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/075Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PIN type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/208Particular post-treatment of the devices, e.g. annealing, short-circuit elimination
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/548Amorphous silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention belongs to the technical field of solar cells, and particularly relates to a sliced silicon heterojunction cell, a preparation method thereof and a solar cell module. The preparation method comprises the step of cutting the whole heterojunction battery, and also comprises the following steps: and (3) carrying out the following treatment on the sliced silicon heterojunction battery main body formed after cutting: placing the sliced silicon heterojunction battery main body in an atmosphere, and treating the cut surface of the sliced silicon heterojunction battery main body by a light source in a set temperature range by adopting a light injection annealing mode; the slice silicon heterojunction cell main body at least comprises a crystalline silicon substrate, an intrinsic amorphous silicon layer, a doped amorphous silicon layer, a transparent conducting layer and a gate electrode. The preparation method effectively passivates the defects of the cut side surface, reduces the recombination of current carriers, and improves the discharge efficiency of the battery, so that the battery efficiency of 0.3 percent caused by the damage of the cut side surface caused by the laser slicing technology in the prior art is reduced, and the battery efficiency is reduced by about 0.15 percent.

Description

Sliced silicon heterojunction cell, preparation method and solar cell module
Technical Field
The invention belongs to the technical field of solar cells, and particularly relates to a sliced silicon heterojunction cell, a preparation method of the sliced silicon heterojunction cell and a solar cell module.
Background
The solar cell has the advantages of cleanness, no pollution, reproducibility, stable working performance and the like. Solar cells, also known as photovoltaic cells, utilize the photovoltaic effect of semiconductors to convert the energy of sunlight directly into electrical energy. In the conversion process, the light is absorbed to generate electron-hole pairs, and the electron-hole pairs are separated to realize the transmission of the generated current. Solar cells are classified into different types according to the structure and the manufacturing process, including amorphous silicon/crystalline silicon heterojunction solar cells and other types of silicon solar cells. For example, a heterojunction battery using crystalline silicon as a substrate is prepared by preparing a semiconductor layer and electrodes on one side or both sides of the substrate to form battery pieces, then welding a plurality of battery pieces to be connected in series or in parallel, then packaging to form an assembly, and feeding the assembly back to a power grid through an inverter after power generation.
With the increase of the pressure of the power station investors on the internet at a low price, the demand on the electricity consumption cost is higher and higher. Practice proves that the half-chip technology is an effective way for reducing the packaging loss of the battery assembly and improving the power of the battery assembly. And the half-piece technology is that the standard-specification cell piece is cut into two identical half-piece cell pieces along the direction vertical to the main grid line of the cell by adopting a laser cutting method and then welded and connected in series. Compared with the conventional assembly, the half-chip assembly has the advantages that the internal short-circuit current is halved, the voltage is doubled, the internal loss is effectively reduced under the same power condition, and the external output power is improved.
In the laser cutting process, the laser partially melts the battery piece along a set path, and then the battery piece is cracked along the set path by mechanical force to realize slicing. Therefore, a laser damage region and a mechanical fracture region are formed at the cutting edge of the cell, so that silicon atoms in the cell cannot keep the original ordered arrangement state, a dangling bond is formed, the efficiency of the cell is reduced, and the external output power of the half-piece assembly is damaged.
How to maintain the efficiency of the cut silicon heterojunction battery or reduce the efficiency reduction caused by cutting becomes one of the technical problems to be solved in the field of the heterojunction battery at present.
Disclosure of Invention
The invention aims to solve the technical problems in the prior art, and provides a sliced silicon heterojunction battery, a preparation method of the sliced silicon heterojunction battery and a solar battery assembly.
The technical scheme adopted for solving the technical problem of the invention is as follows:
as an aspect of the present invention, a method for manufacturing a sliced silicon heterojunction battery is provided, including the step of cutting the whole sliced silicon heterojunction battery, and further including: and (3) carrying out the following treatment on the sliced silicon heterojunction battery main body formed after cutting:
placing the sliced silicon heterojunction battery main body in an atmosphere, and treating the cut surface of the sliced silicon heterojunction battery main body by a light source in a set temperature range by adopting a light injection annealing mode;
the slice silicon heterojunction cell main body at least comprises a crystalline silicon substrate, an intrinsic amorphous silicon layer, a doped amorphous silicon layer, a transparent conducting layer and a gate electrode.
Preferably, in the light injection annealing mode, the light source irradiates perpendicularly to the cutting surface.
Preferably, in the light injection annealing mode, the light source irradiation mode is continuous irradiation or intermittent irradiation, the total time range of the continuous irradiation is 20 s-2 min, and the total time range of the intermittent irradiation is 20 s-5 min;
preferably, in the intermittent irradiation, the single irradiation time of the light source ranges from 2ms to 20s, and the single intermittent time is preferably from 2s to 10 s.
Preferably, in the light injection annealing method, the light intensity range is 20sun to 100 sun;
preferably, the light intensity is in the range of 30 sun-80 sun.
Preferably, the set temperature range is 180 ℃ to 220 ℃.
Preferably, the atmosphere gas is air or nitrogen;
preferably, the atmosphere gas is a mixed gas of oxygen and nitrogen, and the oxygen content of the mixed gas is more than 20%;
preferably, the atmosphere gas further comprises a portion of pure water vapor.
Preferably, the light injection annealing mode comprises irradiating with light of different wavelengths, and the light source comprises infrared light, visible light, monochromatic light and white light;
preferably, the light source includes a laser, a halogen lamp, or an LED lamp.
Preferably, a laser or nondestructive cutting machine is adopted to cut the whole silicon heterojunction battery into a required shape to obtain the sliced silicon heterojunction battery main body;
preferably, the front and back surfaces of the monolithic silicon heterojunction cell are subjected to a pre-photo-implant anneal prior to dicing the monolithic heterojunction cell.
As another aspect of the present invention, a sliced silicon heterojunction battery is provided, which includes a sliced silicon heterojunction battery main body, wherein the cut surface of the sliced silicon heterojunction battery main body is processed by the above-mentioned preparation method of the sliced silicon heterojunction battery;
the slice silicon heterojunction battery is at least one of an amorphous silicon/crystalline silicon heterojunction battery and an amorphous silicon/crystalline silicon heterojunction-perovskite laminated battery.
As another aspect of the present invention, there is provided a solar cell module comprising the sliced silicon heterojunction cell described above.
The invention has the beneficial effects that:
according to the preparation method of the sliced silicon heterojunction battery, the defects of the cut side surface can be passivated by irradiating the cut side surface with photons in a certain wavelength range at a certain temperature through a light injection annealing treatment mode, so that the recombination of current carriers is reduced, and the discharge efficiency of the battery is improved, so that the battery efficiency which is 0.3% caused by the damage of the cut side surface due to the laser slicing technology in the prior art is reduced, and the battery efficiency is only reduced by about 0.15%.
Drawings
Fig. 1 is a flowchart of a method for manufacturing a sliced silicon heterojunction cell in example 1 of the present invention;
fig. 2 is a flow chart of a method for manufacturing a monolithic silicon heterojunction cell in example 1 of the present invention;
FIG. 3 is a schematic diagram of light implantation annealing of a segmented silicon heterojunction cell in example 1 of the present invention;
FIG. 4 is a schematic view showing the structure of a battery case in which a cut silicon heterojunction battery is subjected to light injection annealing in example 1 of the present invention;
FIG. 5 is a schematic view showing a flow chart for producing a battery pack according to example 2 of the present invention;
in the drawings, wherein:
11-N type monocrystalline silicon pieces; 21-a first intrinsic amorphous silicon layer; 22-a second intrinsic amorphous silicon layer; 31-N type amorphous silicon layer; a 32-P type amorphous silicon layer; 41-a first transparent conductive layer; 42-a second transparent conductive layer; 51-a first electrode; 52-a second electrode;
61-a battery compartment; 62-a light source; 63-slicing a silicon heterojunction cell body.
Detailed Description
In order to make the technical solutions of the present invention better understood by those skilled in the art, the sliced silicon heterojunction cell, the method for manufacturing the sliced silicon heterojunction cell, and the solar cell module of the present invention are further described in detail below with reference to the accompanying drawings and the detailed description. It should be understood that the detailed description and specific examples, while indicating the preferred embodiment of the invention, are intended for purposes of illustration and explanation only and are not intended to limit the scope of the invention.
It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention. The technical features mentioned in the different embodiments of the invention described below can be combined with each other as long as they do not conflict with each other.
The technical idea of the invention is as follows:
the heterojunction cell generally takes an N-type silicon wafer as a substrate, and has a structure that an amorphous silicon layer, a transparent conducting layer and electrodes are formed on two sides, and has the advantages of low light-induced attenuation rate LID, low temperature coefficient, high double-sided rate, low annual attenuation rate and the like. Compared with the solar cell in the prior art, the solar cell has great difference in performance and preparation process.
The voltage of the silicon heterojunction battery is irrelevant to the area of the battery, the current is in direct proportion to the area of the battery, when the whole silicon heterojunction battery is cut into the slicing heterojunction battery, the area of the slicing heterojunction battery is reduced, the current is reduced, and the voltage is increased, so that the internal loss is effectively reduced under the condition of the same power, and the external output power is improved. However, the fact is that after the whole silicon heterojunction cell is cut, the efficiency of the silicon heterojunction cell usually suffers significant loss, because a large number of defects and dangling bonds exist on the side surface of the cut heterojunction cell, resulting in a large number of carrier recombination, resulting in a large loss of carriers, and significantly reducing the efficiency of the cell. The invention reduces the bulk recombination of carriers by making the defects such as dislocation slide to the surface through light injection annealing treatment in the atmosphere gas, and when the atmosphere gas contains oxygen or water vapor, an oxide film can be formed on the surface, the surface state density is reduced, the loss of hydrogen atoms in the battery body from the side section and the surface is reduced, and the passivation effect is achieved. Besides the optimization effect on the laser cutting side surface, the light injection annealing also has the promotion effect on the improvement of the quality of the cell, such as the improvement of the passivation effect of amorphous silicon of an amorphous silicon/crystalline silicon interface, the improvement of the quality of an amorphous silicon film and the improvement of the quality of a transparent conducting layer film.
Example 1:
the sliced silicon heterojunction battery has more defects near the side cross section caused by laser cutting, and different from silicon atoms in a body, the silicon atoms on the surface have dangling bonds, so that a large amount of carriers are compounded without treatment.
The embodiment provides a method for manufacturing a sliced silicon heterojunction battery, as shown in fig. 1, including a step of cutting a whole slice of heterojunction battery, and further including: and (3) carrying out the following treatment on the sliced silicon heterojunction battery main body formed after cutting:
placing the sliced silicon heterojunction battery main body in an atmosphere, and treating the cut surface of the sliced silicon heterojunction battery main body by a light source in a set temperature range by adopting a light injection annealing mode; the slice silicon heterojunction cell main body at least comprises a crystalline silicon substrate, an intrinsic amorphous silicon layer, a doped amorphous silicon layer, a transparent conducting layer and a gate electrode.
Specifically, the preparation method of the sliced amorphous silicon/crystalline silicon heterojunction cell mainly comprises the following steps:
the preparation method of the sliced silicon heterojunction battery specifically comprises the following steps:
step S1): and preparing the whole silicon heterojunction cell.
In this step, as shown in fig. 2, the following process is included:
step S11) provides a crystalline silicon substrate.
In this step, the crystalline silicon substrate may be, for example, an N-type single crystal silicon wafer 11 (c-si (N)). Of course, the crystalline silicon substrate may include any one of a single crystal silicon wafer or a polycrystalline silicon wafer.
Step S12) of sequentially forming an intrinsic amorphous silicon layer and a doped amorphous silicon layer on the surface of the crystalline silicon substrate.
In this step, a first intrinsic amorphous silicon layer 21 (a-si (i)), an N-type amorphous silicon layer 31 (a-si (N)) are formed in this order on one side (front surface) of the N-type single crystal silicon wafer 11 (c-si (N)); a second intrinsic amorphous silicon layer 22 (a-Si (i)) and a P-type amorphous silicon layer 32 (a-Si (P)) are formed in this order on the other side (back surface) of the N-type single crystal silicon wafer 11 (c-Si (N)).
Step S13) forms a transparent conductive layer on the surface of the doped amorphous silicon layer.
In this step, a first transparent conductive layer 41 having a certain thickness is formed on the N-type amorphous silicon layer 31 (a-si (N)), and a second transparent conductive layer 42 having a certain thickness is formed on the P-type amorphous silicon layer 32 (a-si (P)).
Step S14) forms an electrode on the surface of the transparent conductive layer.
In this step, the electrodes include a main gate electrode and a plurality of fine gate electrodes connected to the main gate electrode and arranged in parallel with each other at intervals. Screen printing a first electrode 51, such as an Ag electrode, on the front surface of the cell, i.e., the first transparent conductive layer 41; a second electrode 52, such as an Ag electrode, is screen printed on the back surface of the cell, i.e., the second transparent conductive layer 42.
Step S15) is performed sintering and light implantation annealing.
In the step, the electrodes on the front surface and the back surface of the cell are sintered by combining a sintering technology and a light injection annealing technology, and the light injection annealing is carried out on the whole silicon heterojunction cell while sintering. That is, before the whole heterojunction cell is cut, the front surface and the back surface of the whole silicon heterojunction cell are subjected to pre-light injection annealing, and the defects of the front surface and the back surface are repaired in advance.
Step S2): and cutting the whole silicon heterojunction battery to form a sliced silicon heterojunction battery main body.
In the step, a laser or lossless cutting machine is adopted, and the whole silicon heterojunction battery is cut into a required shape according to the design, so that a sliced silicon heterojunction battery main body is obtained. The side surface of the diced sliced silicon heterojunction cell body including the thermal damage region caused by laser dicing and the mechanical fracture region where many dangling bonds exist, these regions cause a large amount of carrier recombination.
Step S3) adopts a light injection annealing mode to process the cutting surface of the wafer silicon heterojunction battery main body.
In this example, as shown in fig. 3, the sliced silicon heterojunction battery main body was placed in a battery case 61, the atmosphere was adjusted, and only the cut surface of the sliced silicon heterojunction battery main body was treated with a light source 62 within a set temperature range by a light injection annealing method.
In the step, the side surface of the cut amorphous silicon/crystalline silicon heterojunction cell is processed by adopting a light injection annealing mode, and the light injection annealing environmental conditions are as follows:
the atmosphere is air or nitrogen (N)2) Or the atmosphere is oxygen (O)2) And nitrogen, or the atmosphere gas is a mixed gas of oxygen, nitrogen and pure water vapor, wherein the oxygen: nitrogen gas 1: 5-9: 1, proper amount of water vapor can be used;
the light source comprises laser, halogen lamp or LED lamp, the light intensity is 20 sun-100 sun, and 30 sun-80 sun is more preferable;
of course, light with different wavelengths can be used for illumination, and the light source can be white light, infrared light, visible light and monochromatic light (such as green light or red light), and the light intensity range is 20 sun-100 sun. The white light is full wavelength, the infrared light is about 900nm, and the monochromatic light is light of other single colors. Preferably, red light and white light with better annealing effect by light injection are adopted.
The light source irradiates perpendicular to the side surface to be cut (namely the cutting surface), the irradiation mode can be continuous irradiation or intermittent irradiation, the total time range of the continuous irradiation is 20 s-2 min, and the total time range of the intermittent irradiation is 20 s-5 min.
Preferably, when the irradiation is intermittent, the single irradiation time of the light source is 2 ms-20 s, and the single intermittent time (namely the light source off time) is preferably 2 s-10 s;
the temperature range is set to be 180-220 ℃.
The effect of light injection annealing on a segmented silicon heterojunction cell is related to time, light intensity and temperature. The effect of light injection annealing on the cut-off silicon heterojunction cell changes along with the changes of time, light intensity and temperature, and when the light intensity and the temperature are constant, the light injection annealing effect is firstly improved along with the prolonging of the time and then tends to be saturated and unchanged; when the time and the temperature are fixed, the light injection annealing effect is firstly improved along with the enhancement of the light intensity and then tends to be saturated and unchanged; when the time and the light intensity are fixed, the light injection annealing effect is firstly improved and then is deteriorated along with the rise of the temperature. Preferably, the time, light intensity and temperature of the light injection annealing with good effect on the cut silicon heterojunction cell are respectively 40s, 80sun and 200 ℃.
In this embodiment, when the light injection annealing treatment is performed on the cut surface of the cut silicon heterojunction battery, a dedicated light injection annealing device is adopted, which includes a battery box for placing the battery to be subjected to the light injection annealing treatment, the battery box has a battery accommodating cavity, and at least one side surface of the accommodating cavity is hollowed out, as shown in fig. 4; the side length of the bottom surface of the accommodating cavity is not less than the area of the battery to be subjected to light injection annealing treatment, for example, the size of the battery is increased by 0-5 mm; the height of the accommodating cavity is larger than the sum of the thicknesses of the at least two batteries to be subjected to light injection annealing treatment, the number of the batteries to be subjected to light injection annealing treatment can be determined by the height of the accommodating cavity, and the preferred height range is 3-10 cm.
The light source is arranged at one hollowed-out side of the battery box, 50-500 sliced silicon heterojunction batteries are stacked and arranged in the specific battery box of the light injection equipment, one side of the battery box is hollowed-out, the cut surface is arranged at the hollowed-out side, for example, the right side, during annealing, the light source irradiates the sliced silicon heterojunction batteries from the right side, the irradiation mode adopts continuous irradiation or intermittent irradiation, the power of the light source is adjusted, the temperature range of the side surface of the silicon heterojunction batteries is kept between 180 ℃ and 220 ℃, and the time of light injection annealing is 20 s-5 min.
The preparation method of the sliced silicon heterojunction battery of the embodiment adopts the specially-made battery box with one hollow surface arranged in the annealing furnace, can simultaneously place a pile of sliced silicon heterojunction batteries into the battery box, and then place the battery box on the bracket of the annealing furnace, so as to realize heating and irradiation of the sliced silicon heterojunction battery.
In a more general ceramic roller way type or metal mesh belt type annealing furnace device, the front surface, the back surface and the side surface of the sliced silicon heterojunction battery main body 63 can be simultaneously subjected to light injection annealing, photons can be uniformly distributed on the whole surface of the sliced silicon heterojunction battery main body 63, and the sliced silicon heterojunction battery main body has a transmission effect with a certain depth, so that the light injection whole effect is formed, and the defects of the whole area are all repaired. The light injection annealing process is arranged after the laser slicing process, and the cut surface after cutting, the non-cut front surface and the back surface and even the defects in the body are repaired at one time, so that the independent light injection annealing is not needed before the whole heterojunction battery is cut, and the updating investment on equipment is small.
After the side surface of the cut sliced silicon heterojunction battery is treated by adopting a light injection annealing mode, because the atoms and electrons subjected to light injection annealing have higher energy, the atoms and atoms, atoms or atomic nuclei and electrons, and electrons can generate relative displacement, so that the defects of the cut side surface are reduced, the silicon atoms on the side surface react with oxygen to generate silicon oxide, the defects and dangling bonds on the side surface are passivated or partially passivated, the recombination of minority carriers is reduced, the battery efficiency after cutting is maintained, or the battery efficiency loss after cutting is partially reduced.
The experimental data of the performance of the sliced silicon heterojunction cell in this example are shown in the following table.
Figure BDA0003025258700000091
The laser dicing technique causes damage to the cut sides, which reduces the efficiency of the cell by 0.3%. Experiments show that after the light injection annealing treatment, the reduction of the cell efficiency of the sliced silicon heterojunction cell is reduced from 0.3% to 0.225%.
Example 2:
based on the processing of the sliced silicon heterojunction cell, a high-efficiency solar cell module can be formed.
In this embodiment, as shown in fig. 5, the sliced silicon heterojunction battery is subjected to light injection treatment, the processed sliced silicon heterojunction battery is connected in parallel or in series to form a corresponding assembly pattern according to the design, and assembly process steps such as series welding, lamination, framing, wire box mounting, curing, testing and the like are sequentially performed to prepare the sliced silicon heterojunction battery assembly.
After the light injection annealing treatment, the reduction of the cell efficiency of the sliced silicon heterojunction cell is reduced from 0.3% to 0.15%, and the power of a cell assembly formed by the sliced silicon heterojunction cell after the light injection annealing treatment can be improved by 1W-2W or even higher than that of a cell assembly of the same type without the sliced silicon heterojunction cell.
It is to be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The specific embodiments are specific examples of implementing the technical solutions of the present invention. Also, the term "comprises/comprising" when used herein refers to the presence of a feature, integer or component, but does not preclude the presence or addition of one or more other features, integers or components.
It will be understood that the above embodiments are merely exemplary embodiments taken to illustrate the principles of the present invention, which is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and substance of the invention, and these modifications and improvements are also considered to be within the scope of the invention.

Claims (10)

1. A preparation method of a sliced silicon heterojunction battery comprises the step of cutting the whole sliced silicon heterojunction battery, and is characterized by further comprising the following steps: and (3) carrying out the following treatment on the sliced silicon heterojunction battery main body formed after cutting:
placing the sliced silicon heterojunction battery main body in an atmosphere, and treating the cut surface of the sliced silicon heterojunction battery main body by a light source in a set temperature range by adopting a light injection annealing mode;
the slice silicon heterojunction cell main body at least comprises a crystalline silicon substrate, an intrinsic amorphous silicon layer, a doped amorphous silicon layer, a transparent conducting layer and a gate electrode.
2. The method for preparing a sliced silicon heterojunction cell as claimed in claim 1, wherein in the light injection annealing mode, the light source irradiates perpendicularly to the cutting surface.
3. The method for preparing the sliced silicon heterojunction cell as claimed in claim 1, wherein in the light injection annealing mode, the light source irradiation mode is continuous irradiation or intermittent irradiation, the total time range of the continuous irradiation is 20 s-2 min, and the total time range of the intermittent irradiation is 20 s-5 min;
preferably, in the intermittent irradiation, the single irradiation time of the light source ranges from 2ms to 20s, and the single intermittent time is preferably from 2s to 10 s.
4. The method for preparing the sliced silicon heterojunction cell as claimed in claim 1, wherein in the light injection annealing mode, the light intensity ranges from 20sun to 100 sun;
preferably, the light intensity is in the range of 30 sun-80 sun.
5. The method for preparing a sliced silicon heterojunction cell as claimed in claim 1, wherein the set temperature range is 180 ℃ -220 ℃.
6. The method for preparing a sliced silicon heterojunction cell as claimed in any of claims 1 to 5, wherein the atmospheric gas is air or nitrogen;
preferably, the atmosphere gas is a mixed gas of oxygen and nitrogen, and the oxygen content of the mixed gas is more than 20%;
preferably, the atmosphere gas further comprises a portion of pure water vapor.
7. The method for preparing the sliced silicon heterojunction cell as claimed in any one of claims 1 to 5, wherein the light injection annealing mode comprises irradiation with light of different wavelengths, and the light source comprises infrared light, visible light, monochromatic light and white light;
preferably, the light source includes a laser, a halogen lamp, or an LED white light lamp.
8. The sliced silicon heterojunction battery preparation method according to any one of claims 1 to 5, wherein the whole sliced silicon heterojunction battery is cut into a required shape by a laser or a lossless cutting machine to obtain the sliced silicon heterojunction battery main body;
preferably, the front and back surfaces of the monolithic silicon heterojunction cell are subjected to a pre-photo-implant anneal prior to dicing the monolithic heterojunction cell.
9. A sliced silicon heterojunction battery is characterized by comprising a sliced silicon heterojunction battery main body, wherein the cutting surface of the sliced silicon heterojunction battery main body is processed by adopting the preparation method of the sliced silicon heterojunction battery as claimed in any one of claims 1 to 8;
the slice silicon heterojunction battery is at least one of an amorphous silicon/crystalline silicon heterojunction battery and an amorphous silicon/crystalline silicon heterojunction-perovskite laminated battery.
10. A solar cell module comprising the sliced silicon heterojunction cell of claim 9.
CN202110417599.9A 2021-04-16 2021-04-16 Sliced silicon heterojunction cell, preparation method and solar cell module Pending CN113206009A (en)

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