CN113194635A - Impedance line manufacturing method, impedance line and circuit board - Google Patents

Impedance line manufacturing method, impedance line and circuit board Download PDF

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Publication number
CN113194635A
CN113194635A CN202110273953.5A CN202110273953A CN113194635A CN 113194635 A CN113194635 A CN 113194635A CN 202110273953 A CN202110273953 A CN 202110273953A CN 113194635 A CN113194635 A CN 113194635A
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China
Prior art keywords
impedance line
impedance
manufacturing
circuit board
layer
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Granted
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CN202110273953.5A
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Chinese (zh)
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CN113194635B (en
Inventor
高团芬
王金平
邓春喜
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Ganzhou Kexiang Electronic Technology Second Factory Co ltd
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Jiangxi Yurui Electronic Technology Co ltd
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0094Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

The application relates to an impedance line manufacturing method, an impedance line and a circuit board, wherein the impedance line manufacturing method comprises the following steps: manufacturing a first impedance line and a second impedance line on the first conductive layer and the second conductive layer respectively; the tail ends of the first impedance line and the second impedance line are designed with bonding pads; pressing and manufacturing blind holes at corresponding positions of the bonding pads, and removing media on the bonding pads; removing the glue residues, cleaning and drying; and (4) carrying out electroplating treatment to fill the blind holes with metal copper so as to form metal blind holes. According to the manufacturing method of the impedance line, the structure of the circuit board is changed, the impedance line is moved into the inner layer, and then the impedance line of the inner layer can extend to the outer layer through the blind hole to form a contact point through manufacturing the blind hole and electroplating, so that impedance measurement is facilitated. In the whole process, the flow is less, the process is simple, and the dielectric layer has the protection effect on the inner-layer impedance line, so that the impedance line can be effectively prevented from being interfered by the external environment, and the stability of the impedance of the circuit board can be kept in the testing and using processes.

Description

Impedance line manufacturing method, impedance line and circuit board
Technical Field
The application relates to the technical field of printed circuit board processing, in particular to an impedance line manufacturing method, an impedance line and a circuit board.
Background
A Printed Circuit Board (PCB), which is called a Circuit Board for short, is manufactured by an electronic printing technology. The circuit board is not only a carrier that provides the electrical circuit, but also a carrier that provides the electrical signal. Certain circuit boards in communication, medical and industrial control industries have certain requirements on impedance, and an impedance line needs to be manufactured so as to facilitate subsequent impedance testing.
The copper thickness of the resistance wire has a direct influence on the resistance value. In the traditional method for manufacturing the impedance line, the impedance line is manufactured by adopting a selective electroplating mode of local protection and re-electroplating, and the procedures of manufacturing a dry film, exposing, developing, stripping and the like are required, so that the procedures are complex, the material consumption is excessive, and the cost is increased. And because selective plating is used, the thickness of the resistance line copper is easily thinner than that of other lines, namely, the position of the resistance line is sunken. When solder resist or a covering film is subsequently manufactured, the solder resist thickness is too large or the covering film is not firmly attached, the process quality of the circuit board is affected, and the impedance performance of the circuit board is also affected.
Therefore, the conventional gold finger manufacturing method has the problems of complex process and poor impedance performance.
Disclosure of Invention
In view of the above, it is desirable to provide a method for manufacturing an impedance line, an impedance line and a circuit board, which have simple processes and good impedance performance.
In a first aspect of the present application, a method for manufacturing an impedance line is provided, including:
manufacturing a first impedance line and a second impedance line on the first conductive layer and the second conductive layer respectively; the tail ends of the first impedance line and the second impedance line are designed with bonding pads;
pressing and manufacturing blind holes at corresponding positions of the bonding pads, and removing media on the bonding pads;
removing the glue residues, cleaning and drying;
and carrying out electroplating treatment to fill the blind holes with metal copper to form metal blind holes.
In one embodiment, when the circuit board is a multilayer board with more than two layers, the first impedance line and the second impedance line are manufactured simultaneously with the inner layer pattern.
In one embodiment, the blind hole is formed by carbon dioxide laser ablation.
In one embodiment, the plating process includes the steps of copper deposition, full plate plating, and image plating.
In a second aspect of the present application, there is provided an impedance line manufactured by using the method for manufacturing an impedance line.
In a third aspect of the present application, a circuit board is provided, which includes the impedance line as described above.
According to the manufacturing method of the impedance line, the structure of the circuit board is changed, the impedance line is moved into the inner layer, and then the impedance line of the inner layer can extend to the outer layer through the blind hole to form a contact point through manufacturing the blind hole and electroplating, so that impedance measurement is facilitated. In the whole process, the flow is less, the process is simple, and the dielectric layer has the protection effect on the inner-layer impedance line, so that the impedance line can be effectively prevented from being interfered by the external environment, and the stability of the impedance of the circuit board can be kept in the testing and using processes.
Drawings
FIG. 1 is a flow chart illustrating a method for manufacturing an impedance line according to an embodiment;
FIG. 2 is a schematic structural diagram illustrating a blind via hole fabricated in one embodiment;
FIG. 3 is a top view of the structure of FIG. 2;
FIG. 4 is a schematic structural diagram of an embodiment of a blind via filled with copper metal after forming a blind via;
fig. 5 is a top view of the structure of fig. 4.
Description of reference numerals: 10-a first conductive layer, 11-a first impedance line, 20-an inner dielectric, 30-a second conductive layer, 31-a second impedance line, 40-a first dielectric layer, 41-a first blind via, 50-a first copper foil, 51-a first outer layer circuit, 52-a first electroplated layer, 60-a second dielectric layer, 61-a second blind via, 70-a second copper foil, 71-a second outer layer circuit, 72-a second electroplated layer.
Detailed Description
To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Embodiments of the present application are set forth in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
As used herein, the singular forms "a", "an" and "the" may include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises/comprising," "includes" or "including," etc., specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof.
Further, in the application patent, unless otherwise explicitly specified or limited, a first feature "on" or "under" a second feature may be directly contacted with the first and second features, or indirectly contacted with the first and second features through an intermediate. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
As mentioned above, the copper thickness of the resistance line has a direct influence on the resistance value. On the one hand, if the impedance requirements of the circuit board are strict, the copper thickness control requirements of the impedance lines during the processing process are also strict. In the processing process of the circuit board, a 'pattern electroplating' procedure is required, and the copper thickness of the circuit is increased. If the impedance circuit is also subjected to pattern electroplating, the copper thickness of the impedance circuit is easily too thick, and the impedance value is easily influenced; if a selective electroplating mode of electroplating other circuits after local protection of the impedance line is adopted, the processes of dry film, exposure, development, film stripping and the like are required, so that the problems of complex process, excessive material use and high cost are caused. And selective electroplating can cause the thickness of the copper of the resistance line to be thinner than that of the copper of other circuits, and the position of the resistance line is provided with a recess. When solder resist or a covering film is subsequently manufactured, the solder resist is too thick or the covering film is not firmly attached due to depression, so that the product quality and the impedance performance are affected.
On the other hand, the impedance line is generally located on the surface layer of the circuit board, after the product is manufactured, the surface of the impedance line is only covered with one solder mask layer or one covering film layer, if the external environment affects the surface solder mask layer or the covering film layer, the impedance line is easily interfered, the measurement accuracy of the impedance characteristic is affected, and the subsequent use of the circuit board is also affected.
Based on this, the application provides a method for manufacturing an impedance line, which is used for improving the problems that the manufacturing difficulty of the impedance line is high and the impedance performance is easily affected by the outside.
In a first aspect of the present application, a method for manufacturing an impedance line is provided, and referring to fig. 1, in one embodiment, the method includes steps S10 to S40.
Step S10: manufacturing a first impedance line and a second impedance line on the first conductive layer and the second conductive layer respectively; the tail ends of the first impedance line and the second impedance line are designed with bonding pads;
step S20: pressing and manufacturing blind holes at corresponding positions of the bonding pads, and removing media on the bonding pads;
step S30: removing the glue residues, cleaning and drying;
step S40: and (4) carrying out electroplating treatment to fill the blind holes with metal copper so as to form metal blind holes.
According to the manufacturing method of the impedance line, the structure of the circuit board is changed, the impedance line is moved into the inner layer, and then the impedance line of the inner layer can extend to the outer layer through the blind hole to form a contact point through manufacturing the blind hole and electroplating, so that impedance measurement is facilitated. In the whole process, the flow is less, the process is simple, and the dielectric layer has the protection effect on the inner-layer impedance line, so that the impedance line can be effectively prevented from being interfered by the external environment, and the stability of the impedance of the circuit board can be kept in the testing and using processes.
The following detailed description is made with reference to the accompanying drawings.
As shown in fig. 2, an inner core board is taken, and a first impedance line 11 and a second impedance line 31 are respectively formed on a first conductive layer 10 and a second conductive layer 30 of the inner core board. It is understood that the first resistance line 11 does not refer to a single line, but is a general term for all resistance lines on the first conductive layer 10 of the core board. Similarly, the second resistance line 31 is a general term for all resistance lines on the second conductive layer 30 of the inner core board. Further, when the circuit board is a multilayer board with more than two layers, the first impedance line 11 and the second impedance line 31 are manufactured simultaneously with the inner layer pattern, so that the manufacturing process is reduced, and the cost is saved. When the circuit board is a single-sided board or a double-sided board, the dielectric layer of the circuit board is changed into an inner core board, i.e. a sandwich structure of a conductive layer-a dielectric layer-a conductive layer, and excess conductive material of the conductive layer of the inner core board is removed through an inner layer graphic process flow, so that the inner layer medium 20 is exposed, and the required first impedance line 11 and the second impedance line 31 are manufactured. The ends of the first impedance line 11 and the second impedance line 31 are designed with pads, and the pad positions are contact points of probes in impedance testing. Preferably, the conductive material of the first conductive layer 10 and the second conductive layer 30 is copper.
After the impedance line is manufactured, please refer to fig. 2 again, a first dielectric layer 40 and a first copper foil 50 are sequentially stacked on the first conductive layer 10, and a second dielectric layer 60 and a second copper foil 70 are sequentially stacked on the second conductive layer 30, and then press-fitting is performed. And then manufacturing a first blind hole 41 and a second blind hole 61 at the positions corresponding to the pads at the tail ends of the impedance lines on the outer-layer copper foils, namely the first copper foil 50 and the second copper foil 70, and removing the medium on the pads at the tail ends of the impedance lines. Preferably, the first blind hole 41 and the second blind hole 61 are formed by carbon dioxide laser ablation. And after the blind holes are manufactured, removing glue residues, cleaning and drying the semi-finished product of the circuit board, removing the residual glue residues of the first dielectric layer 40 and the second dielectric layer 60, and avoiding the influence of the glue residues on the subsequent process. As shown in fig. 3, which is a top view of fig. 2, the end pad of the first impedance line 11 is exposed through the first blind via 41. Preferably, the size of the blind hole is 100% -110% of the designed size of the impedance line end pad to ensure that the impedance line end pad is fully exposed.
And after the blind holes are manufactured, electroplating treatment is carried out, so that the blind holes are filled with metal copper, and the metal blind holes are formed, thereby facilitating impedance testing. In one embodiment, the electroplating treatment comprises the steps of copper deposition, full-plate electroplating and pattern electroplating, wherein a layer of copper is deposited on the wall of the blind hole through the copper deposition step to realize the conduction of the wall of the blind hole, and then the blind hole is completely filled with metal copper through the full-plate electroplating step and the pattern electroplating step. As shown in fig. 4 and 5, after the electroplating process, the first blind via 41 and the second blind via 61 are filled with copper, so that the end pads of the first impedance line 11 and the second impedance line 31 extend to the outer layer surface of the circuit board to form a contact point of the probe during the impedance test. Furthermore, the electroplating treatment can be an electroplating treatment process of the circuit board, and the electroplating of the blind hole and the thickening of the outer layer circuit are completed on the basis of not increasing an additional process. As shown in fig. 4, while the blind via is filled, the first plating layer 52 and the second plating layer 72 are formed on the first outer layer wiring 51 and the second outer layer wiring 71, thereby realizing thickening of the outer layer wiring.
According to the manufacturing method of the impedance line, the structure of the circuit board is changed, and the impedance line is moved into the inner layer, so that on one hand, the uniformity of the copper thickness of the impedance line can be improved, on the other hand, the impedance line can be fully protected by media, the impedance line can be effectively prevented from being interfered by the external environment, and the stability of the impedance of the circuit board can be kept in the testing and using processes. And then through manufacturing the blind hole and electroplating, the impedance line of the inner layer can extend to the outer layer through the blind hole to form a contact point, so that the impedance test can be carried out in the same way as the original way without changing the measuring way and terminal data, thereby being beneficial to improving the working efficiency and reducing the cost. In the whole process, the original processing flow of the circuit board is fully utilized, the number of newly-added flows is reduced to the maximum extent, the complexity of operation can be avoided, and the manufacturing cost is reduced. The technology makes full use of the self structure of the circuit board and the original processing flow of the circuit board, can effectively prevent the impedance line from being interfered by the external environment due to the protection effect of the dielectric layer, and has the advantages of simple process and stable impedance performance.
In a second aspect of the present application, there is provided an impedance line manufactured by using the method for manufacturing an impedance line in the above-described embodiment. For the specific definition of the impedance line, please refer to the method for manufacturing the impedance line, which is not described herein again.
In a third aspect of the present application, a circuit board is provided, which includes the impedance line in the above embodiments. Specifically, the circuit board can be a single-sided board or a double-sided board, and can also be a multilayer board; can be a soft board, a hard board or a rigid-flexible board. The designed number of the impedance lines in the circuit board can be one or a plurality of. In short, the present embodiment does not limit the number and type of layers of the circuit board and the number of impedance lines designed in the circuit board. It is understood that other processes may be used to fabricate other structures of the circuit board before and/or after the impedance lines are fabricated, depending on the actual circuit design, so as to complete the circuit fabrication of the circuit board.
According to the circuit board, when the impedance line is manufactured, the structure of the circuit board is changed, the impedance line is moved into the inner layer, the impedance line is fully protected by media, the impedance line can be effectively prevented from being interfered by an external environment, and the stability of impedance of the circuit board can be kept in the testing and using processes. And then through manufacturing the blind hole and electroplating, the impedance line of the inner layer can extend to the outer layer through the blind hole to form a contact point, so that the impedance test can be carried out in the same way as the original way without changing the measuring way and terminal data, thereby being beneficial to improving the working efficiency and reducing the cost. In the whole process, the original processing flow of the circuit board is fully utilized, the number of newly-added flows is reduced to the maximum extent, the complexity of operation can be avoided, and the manufacturing cost is reduced. The technology makes full use of the self structure of the circuit board and the original processing flow of the circuit board, can effectively prevent the impedance line from being interfered by the external environment due to the protection effect of the dielectric layer, and has the advantages of simple process and stable impedance performance.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above examples only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (6)

1. A method of making an impedance line, comprising:
manufacturing a first impedance line and a second impedance line on the first conductive layer and the second conductive layer respectively; the tail ends of the first impedance line and the second impedance line are designed with bonding pads;
pressing and manufacturing blind holes at corresponding positions of the bonding pads, and removing media on the bonding pads;
removing the glue residues, cleaning and drying;
and carrying out electroplating treatment to fill the blind holes with metal copper to form metal blind holes.
2. The method of claim 1, wherein the first and second resistance lines are formed simultaneously with the inner layer pattern when the circuit board is a multi-layer board having two or more layers.
3. The method for manufacturing the impedance line according to claim 1, wherein the blind hole is manufactured by carbon dioxide laser ablation.
4. The method of claim 1, wherein the plating process comprises the steps of copper deposition, full plate plating, and image plating.
5. An impedance line, characterized in that it is manufactured using the method of manufacturing an impedance line according to any one of claims 1 to 4.
6. A circuit board comprising the impedance line of claim 5.
CN202110273953.5A 2021-03-15 2021-03-15 Impedance line manufacturing method, impedance line and circuit board Active CN113194635B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116033657A (en) * 2022-12-26 2023-04-28 广东依顿电子科技股份有限公司 Method, device and storage medium for automatically selecting double-line impedance line

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JP2005183799A (en) * 2003-12-22 2005-07-07 Toshiba Corp Multilayer print-circuit board and its manufacturing method
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116033657A (en) * 2022-12-26 2023-04-28 广东依顿电子科技股份有限公司 Method, device and storage medium for automatically selecting double-line impedance line
CN116033657B (en) * 2022-12-26 2023-11-03 广东依顿电子科技股份有限公司 Method, device and storage medium for automatically selecting double-line impedance line

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Address after: 341000 south of Weibang Road, industrial park, Xinfeng County, Ganzhou City, Jiangxi Province

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