CN113169163A - 半导体装置 - Google Patents
半导体装置 Download PDFInfo
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- CN113169163A CN113169163A CN202080006402.6A CN202080006402A CN113169163A CN 113169163 A CN113169163 A CN 113169163A CN 202080006402 A CN202080006402 A CN 202080006402A CN 113169163 A CN113169163 A CN 113169163A
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- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
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- 238000006243 chemical reaction Methods 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
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- Engineering & Computer Science (AREA)
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
- Inverter Devices (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
能够抑制功率循环耐量降低。具备半导体芯片(30),所述半导体芯片(30)在正面(34)具备由电极区域(32a、32b、32c、32d、32e)构成,并且从电极区域(32a、32b、32c、32d、32e)分别输出输出电流的有源区(32)。另外,具备在各个电极区域(32a、32b、32c、32d、32e)被连接至少一根的引线。另外,在半导体装置(10)中,引线被连接与所连接的电极区域(32a、32b、32c、32d、32e)的位置对应的每单位根数的电流量达到预定值以下的根数。由此,能够抑制由于电流流通导致的引线50的发热。
Description
技术领域
本发明涉及半导体装置。
背景技术
半导体装置包含IGBT(Insulated Gate Bipolar Transistor:绝缘栅双极型晶体管)、FWD(Free Wheeling Diode:续流二极管)等半导体元件。半导体装置通过引线将半导体元件之间等电连接,从而被用作例如电力转换装置。此时,引线由于其电阻所以会因电流导通而发热。特别是,如果引线按照半导体元件等的布局而超过预定的长度,则发热量变大。因此,在这样的长的引线的布线区域中,通过增加引线的根数,从而减少每一根引线的电流,抑制发热量的增加。
现有技术文献
专利文献
专利文献1:日本特开2018-014354号公报
发明内容
技术问题
然而,即使如上所述增加长的引线的根数,实际上也不能充分地抑制引线的发热。另外,按照半导体元件的键合面积,所能够连接的引线的根数受到限制。因此,随着引线温度的上升,会导致发生引线的熔断。另外,如果按照对引线的通电反复进行由发热导致的温度上升和下降,则会导致发生引线的连接部的剥离。这样半导体装置无法确保功率循环耐量,导致半导体装置的可靠性降低。
本发明是鉴于这种情况而作出的,目的在于提供能够抑制功率循环耐量的降低的半导体装置。
技术方案
根据本发明的一个观点,提供一种半导体装置,所述半导体装置具备:第1半导体芯片,其在正面具备输出电极部,所述输出电极部由多个电极区域构成,并且从上述多个电极区域分别输出输出电流,和引线,其在上述多个电极区域的各个电极区域被连接至少一根,上述引线被连接与所连接的电极区域的位置对应的、每单位根数的电流量达到预定值以下的根数。
技术效果
根据公开的技术,能够抑制功率循环耐量的降低,并抑制半导体装置的可靠性降低。
通过表示作为本发明的例子所优选的实施方式的附图和相关联的以下说明,本发明的上述以及其他目的、特征和优点变得清楚。
附图说明
图1是实施方式中的半导体装置的侧截面图。
图2是实施方式中的半导体装置的俯视图。
图3是实施方式中的半导体芯片的俯视图。
图4是用于说明针对实施方式中的半导体芯片的引线键合位置的图(之一)。
图5是用于说明针对实施方式中的半导体芯片的引线键合位置的图(之二)。
图6是用于说明针对实施方式中的半导体芯片的引线键合位置的图(之三)。
图7是用于说明实施方式中的半导体装置的从半导体芯片起的引线键合的俯视图。
图8是用于说明实施方式中的半导体装置的从半导体芯片起的引线键合的侧视图。
图9是用于说明与实施方式中的半导体装置的半导体芯片的键合位置对应的引线键合的俯视图(之一)。
图10是用于说明与实施方式中的半导体装置的半导体芯片的键合位置对应的引线键合的俯视图(之二)。
图11是用于说明与实施方式中的半导体装置的半导体芯片的键合位置对应的引线键合的俯视图(之三)。
图12是实施方式中的其他半导体芯片的俯视图。
符号说明
10:半导体装置
20a,20b:陶瓷电路基板
21a,21b:绝缘板
22a1~22a3,22b1~22b4:导电图案
23a,23b:金属板
30,30a,30b,40a,40b,130:半导体芯片
31,131:栅极
32,132:有源区
32a,32b,32c,32d,32e,132a,132b,132c,132d,132e,132f,132g:电极区域
33,133:栅极流道
34:正面
34a1,34b1,34c1:中央区域
34a2,34b2,34b3:周缘区域
34a7,34b7,34c7:延长中央区域
34c2,34c3:内侧周缘区域
34c4,34c5:外侧周缘区域
34c6:最远周缘区域
50,51,52,53,54,55a,55b:引线
60:散热板
70:壳体部
71,72,73:布线部件
71a,72a,73a:端子
74:盖部
75:封装部件
具体实施方式
以下,参照附图对实施方式进行说明。应予说明,在以下的说明里,“正面”和“上表面”在图1的半导体装置10中表示朝向上侧的面。同样地,“上”在图1的半导体装置10中表示上侧的方向。“背面”以及“下表面”在图1的半导体装置10中表示朝向下侧的面。同样地,“下”在图1的半导体装置10中表示下侧的方向。根据需要,在其他附图中也表示同样的方向性。“正面”、“上表面”、“上”、“背面”、“下表面”、“下”、“侧面”只是确定相对的位置关系的方便的表达,并不限定本发明的技术思想。例如,“上”和“下”未必意味着相对于地面的铅直方向。也就是说,“上”和“下”的方向不限于重力方向。
用图1和图2对实施方式的半导体装置进行说明。图1是实施方式中的半导体装置的侧截面图。图2是实施方式中的半导体装置的俯视图。应予说明,图1是图2的与单点划线X-X对应的位置的截面图。另外,在图2中仅记载了半导体装置10的陶瓷电路基板20a、20b。
如图1所示,半导体装置10具有陶瓷电路基板20a、20b和散热板60。如图2所示,在陶瓷电路基板20a、20b配置有半导体芯片30a、30b、40a、40b。另外,半导体装置10具有壳体部70和设置于壳体部70的开口上部的盖部74。此时,壳体部70包围陶瓷电路基板20a、20b,介由粘接剂(省略图示)设置于散热板60的周缘区域。另外,在壳体部70和盖部74安装有布线部件71、72、73。布线部件71的一端电连接于陶瓷电路基板20a,且作为另一端的端子71a在壳体部70露出。布线部件72的一端电连接于陶瓷电路基板20b,且作为另一端的端子72a在壳体部70露出。布线部件73的一端电连接于陶瓷电路基板20a,且作为另一端的端子73a在壳体部70露出。并且,壳体部70内的陶瓷电路基板20a、20b被封装部件75封装。这种情况下的封装部件75是硅凝胶、封装树脂。
如图1和图2所示,陶瓷电路基板20a具有:绝缘板21a、形成于绝缘板21a的正面的导电图案22a1~22a3和形成于绝缘板21a的背面的金属板23a。陶瓷电路基板20b具有:绝缘板21b、形成于绝缘板21b的正面的导电图案22b1~22b4和形成于绝缘板21b的背面的金属板23b。应予说明,导电图案22a1~22a3、22b1~22b4的形状、个数是一个例子。绝缘板21a、21b由导热性优异的高导热性的陶瓷构成。该陶瓷例如是氧化铝、氮化铝、氮化硅。导电图案22a1~22a3、22b1~22b4由导电性优异的金属构成。该金属例如是铜或铜合金。金属板23a、23b由导热性优异的金属构成。该金属例如是铝、铁、银、铜或至少包含它们中的一种的合金。能够使用例如DCB(Direct Copper Bonding:直接铜键合)基板、AMB(Active MetalBrazed:活性金属钎焊)基板作为具有这样的构成的陶瓷电路基板20a、20b。陶瓷电路基板20a能够使在半导体芯片30a、40a产生的热介由导电图案22a2、绝缘板21a和金属板23a向图1中下侧传导而进行散热。陶瓷电路基板20b能够使在半导体芯片30b、40b产生的热介由导电图案22b2、绝缘板21b和金属板23b向图1中下侧传导而进行散热。应予说明,导电图案22a1~22a3、22b1~22b4的厚度优选为0.10mm以上且1.00mm以下,更优选为0.20mm以上且0.50mm以下。另外,在这样的陶瓷电路基板20a的导电图案22a2介由焊料(省略图示)连接有布线部件71。在导电图案22b2介由焊料(省略图示)连接有布线部件72。在导电图案22a3介由焊料(省略图示)连接有布线部件73。应予说明,示出于导电图案22a2、22b2、22a3的正方形表示布线部件71、72、73的连接区域。
半导体芯片30a、30b由硅或碳化硅构成。另外,半导体芯片30a、30b包含开关元件。开关元件例如是IGBT、功率MOSFET(Metal Oxide Semiconductor Field EffectTransistor:金属氧化物半导体场效应晶体管)。这样的半导体芯片30a、30b例如在背面具备输入电极(漏极电极或集电极电极)作为主电极,在正面具备控制电极(栅极电极)且具备输出电极(源极电极或发射极电极)作为主电极。就上述的半导体芯片30a、30b而言,其背面侧通过焊料(省略图示)连接于导电图案22a2、22b2上。半导体芯片40a、40b由硅或碳化硅构成。另外,半导体芯片40a、40b包含二极管。二极管例如是SBD(Schottky Barrier Diode:肖特基势垒二极管)、FWD。这样的半导体芯片40a、40b在背面具备输出电极(阴极电极)作为主电极,在正面具备输入电极(阳极电极)作为主电极。就上述的半导体芯片40a、40b而言,其背面侧通过焊料(省略图示)连接于导电图案22a2、22b2上。
对于这样的陶瓷电路基板20a、20b和半导体芯片30a、30b、40a、40b如下所述地布有引线50。应予说明,在图1和图2中,将控制用布线以外的连接各部之间并作为输入输出电流用的主电流布线的引线的总称设为引线50。作为控制用布线的引线55a电连接于导电图案22a1和半导体芯片30a的栅极。作为控制用布线的引线55b电连接于导电图案22b1和半导体芯片30b的栅极。主电流布线的引线50适当地将半导体芯片30a、30b、半导体芯片40a、40b、导电图案22a3、22b3、22b4之间电连接。应予说明,引线50、55a、55b由导电性优异的金属构成。该金属例如是铝、铜或至少包含它们中的一种的合金。另外,它们的直径优选为100μm以上且1.00mm以下。主电流布线的引线50的直径优选为250μm以上且500μm以下。越变得比该范围窄,电流容量越不足,引线越有可能断裂。越变得比该范围宽,在键合于半导体芯片30a、30b时越有可能对半导体芯片30a、30b造成损伤。
布线部件71、72、73由导电性优异的金属构成。该金属例如是铝、铁、银、铜或至少包含它们中的一种的合金。另外,为了提高耐腐蚀性,例如也可以通过镀覆处理等将镍和/或金等金属形成于布线部件71、72、73的表面。具体而言,除了镍和/或金以外,还有镍-磷合金和/或镍-硼合金等。进一步地,也可以在镍-磷合金上层叠金。
散热板60介由焊料(省略图示)设置于陶瓷电路基板20a、20b。这样的散热板60由导热性优异的金属构成。该金属例如是铝、铁、银、铜或至少包含它们中的一种的合金。另外,为了提高耐腐蚀性,例如也可以通过镀覆处理等将镍等材料形成于散热板60的表面。具体而言,除了镍以外,还有镍-磷合金、镍-硼合金等。应予说明,也可以在该散热板60的背面侧介由焊锡或银焊料等安装冷却器(省略图示)。由此,能够提高散热性。该情况下的冷却器由导热性优异的金属构成。该金属例如是铝、铁、银、铜或至少包含它们中的一种的合金。另外,作为冷却器,可以应用翅片或者由多个翅片构成的散热器以及利用水冷的冷却装置等。另外,散热板60也可以与这样的冷却器一体地构成。在该情况下,由导热性优异的金属构成。该金属也是例如铝、铁、银、铜或至少包含它们中的一种的合金。并且,为了提高耐腐蚀性,例如也可以通过镀覆处理等将镍等材料形成于与冷却器一体化的散热板60的表面。具体而言,除了镍以外,还有镍-磷合金、镍-硼合金等。壳体部70和盖部74分别呈例如箱状和平板状,由热塑性树脂构成。作为这样的树脂有PPS树脂、PBT树脂、PBS树脂、PA树脂或ABS树脂等。另外,壳体部70和盖部74形成有供布线部件71、72、73的端子71a、72a、73a插入的开口孔(省略图示)。
接下来,用图3说明半导体芯片30a、30b的详细情况。应予说明,以后,将半导体芯片30a、30b的总称设为半导体芯片30。图3是实施方式中的半导体芯片的俯视图。半导体芯片30在俯视时为矩形。半导体芯片30在其正面的端部中央部具备栅极31(控制电极部),并具备有源区32(输出电极部)。应予说明,半导体芯片30的尺寸为例如纵向12mm、横向10mm。
栅极31被输入控制电压。有源区32是连接有引线50,并在半导体芯片30处于导通状态时输出输出电流的区域。如图3所示,这样的有源区32由沿从栅极31朝向与该栅极31对置的端部的方向(延伸方向)分别配置的电极区域32a、32b、电极区域32c、32d、电极区域32e构成。另外,电极区域32a、32b、32c、32d、32e是分别设置有多个IGBT的晶体管区域。应予说明,也可以在各个电极区域32a、32b、32c、32d、32e一起设置有多个IGBT和续流二极管。电极区域32a、32b、32c、32d、32e之间相互被绝缘,并且电极区域32a、32b、32c、32d、32e分别输出独立的输出电流。另外,有源区32具备从栅极31沿延伸方向延伸到电极区域32c、32d的栅极流道33。即,栅极流道33沿着作为晶体管区域的电极区域32a、32c与电极区域32b、32d之间的边界部而设置。因此,电极区域32a、32b、电极区域32c、32d在栅极流道33的两侧沿着该方向分别依次配置。应予说明,在此情况下,能够根据沿延伸方向与栅极31分离的位置(分离位置)分别确定多个电极区域32a、32b、32c、32d、32e。例如,如果分离位置为第1排,则能够确定电极区域32a、32b(最近电极区域),如果分离位置为第2排,则能够确定电极区域32c、32d(中间电极区域),如果分离位置为第3排,则能够确定电极区域32e(最远电极区域)。
栅极流道33电连接于电极区域32a、32b、32c、32d、32e的各个IGBT(或者,功率MOFET)的栅极。另外,在有源区32中,越沿着栅极流道33的延伸方向与栅极31分离,则面积越大。例如,电极区域32a、32b分别是10.6mm2,从各电极区域32a、32b输出30.7A的输出电流。电极区域32c、32d分别是11.9mm2,从各电极区域32c、32d输出34.5A的输出电流。电极区域32e是24.5mm2,输出71.0A的输出电流。
接下来,用图4说明针对这样的半导体芯片30的引线的键合位置。图4和图5是用于说明针对实施方式中的半导体芯片的引线键合位置的图。应予说明,在图4中,对图3的半导体芯片30分别在预定的区域加阴影来识别各区域。如图4所示,半导体芯片30在各电极区域32a、32b、32c、32d、32e中所示的虚线的矩形区域键合有引线50。如图4所示,在这样的半导体芯片30的正面34设定有中央区域34a1和将中央区域34a1包围的(U字型的)周缘区域34a2。中央区域34a1由正面34的栅极31的长边的宽度和栅极流道33的长度构成。另外,在周缘区域34a2中,在中央区域34a1的延伸方向前方设定有延长中央区域34a7。
就半导体芯片30而言,如果在栅极31施加控制电压,则控制电压经由栅极流道33施加于电极区域32a、32b、32c、32d的各个IGBT的栅极。因此,栅极31和栅极流道33附近的温度上升。并且,如果从栅极流道33向相对于栅极流道33垂直的方向逐渐远离,则温度逐渐降低。即,可认为半导体芯片30的中央区域34a1的温度变得比周缘区域34a2的温度高。随着对栅极31反复施加电压,在中央区域34a1反复发生温度的上升和温度的下降。键合于这样的中央区域34a1的引线50因这样的温度差而易于发生剥离等。因此,在半导体芯片30中,设为在比中央区域34a1靠外侧的周缘区域34a2的电极区域32a、32b、32c、32d键合引线50。特别是电极区域32e设为在延长中央区域34a7的两侧分别键合引线50。
另外,引线50被连接与所连接的电极区域32a、32b、32c、32d、32e的面积和位置对应的预定根数。该预定根数设定为能够抑制温度的上升的最小根数。由此,如果从各电极区域32a、32b、32c、32d、32e输出电流,则在一根引线50中流通的输出电流(每单位根数的电流量)变为预定值以下,能够抑制一根引线50的发热。例如,在直径400μm的引线50,且半导体芯片30的情况下,如果面积为11mm2以下,则预定根数为2根,如果面积为12mm2以下,则预定根数为3根。另外,如果面积为22mm2以上且25mm2以下,则预定根数为6根。在这些情况下,输出电流的预定值为15.5A/根。因此,电极区域32a、32b(各面积为10.6mm2)分别键合2根引线50。此时的流通引线50的输出电流变为15.3A/根。电极区域32c、32d(各面积为11.9mm2)分别键合3根引线50。此时的流通引线50的输出电流变为11.4A/根。电极区域32e(各面积为24.5mm2)分别键合6根引线50。此时的流通引线50的输出电流变为11.7A/根。
另外,对于引线50而言,根据所连接的电极区域32a、32b、32c、32d、32e的向从栅极31朝向与该栅极31对置的端部的延伸方向的分离位置,引线50的每单位根数所能流通的电流不同。因此,引线50被连接与所连接的电极区域32a、32b、32c、32d、32e的位置对应的预定根数。分离位置距离栅极31最近的电极区域32a、32b(最近电极区域)的在每一根引线中流通的输出电流为15.3A/根。分离位置距离栅极31最远的电极区域32e(最远电极区域)的在每一根引线中流通的输出电流为11.7A/根。位于最近电极区域32a、32b与最远电极区域32e之间的电极区域32c、32d(中间电极区域)的在每一根引线中流通的输出电流为11.4A/根。这样,分别连接的引线50的每单位根数的输出电流以中间电极区域32c、32d、最远电极区域32e、最近电极区域32a、32b的顺序增大。由此,如果从各电极区域32a、32b、32c、32d、32e输出电流,则能够抑制各个引线50的发热。
另外,在图4中,举例说明了作为未键合有引线50的区域、键合有引线50的区域而针对正面34设定有中央区域34a1和包围中央区域34a1的周缘区域34a2的情况。不限于该情况,也可以如图5所示设定中央区域34b1和周缘区域34b2、34b3。即,如图5所示,中央区域34b1被设定为由栅极31的长边的宽度和到与栅极31对置的端部为止的长度构成的范围。另外,周缘区域34b2、34b3设定于中央区域34a1的两侧。另外,在中央区域34b1的栅极流道33的延伸方向前方,与图4的延长中央区域34a7对应地设定有被周缘区域34b2、34b3夹着的延长中央区域34b7。
另外,用图6说明设定于半导体芯片30的正面34的区域的其他例子。图6是用于说明针对实施方式中的半导体芯片的引线键合位置的图。半导体芯片30的正面34还能够根据各区域中的温度的上升情况而如下所述地进行设定。如图6所示,半导体芯片30的正面34包括中央区域34c1、内侧周缘区域34c2、34c3、外侧周缘区域34c4、34c5和最远周缘区域34c6。中央区域34c1是由正面34的栅极31的长边的宽度和栅极流道33的长度构成的区域。内侧周缘区域34c2、34c3是相对于中央区域34c1的延伸方向为两侧的周缘区域,并且是靠近栅极流道33的区域。外侧周缘区域34c4、34c5是内侧周缘区域34c2、34c3的更外侧的区域。最远周缘区域34c6是距离栅极31最远的区域的周缘区域。另外,在最远周缘区域34c6中,在中央区域34c1的延伸方向前方设定有延长中央区域34c7。如上所述,可认为中央区域34c1的温度比内侧周缘区域34c2、34c3、外侧周缘区域34c4、34c5、最远周缘区域34c6的温度高。另外,同样地因为距离栅极流道33越近则温度越高,所以可认为内侧周缘区域34c2、34c3的温度比外侧周缘区域34c4、34c5的温度高。另外,可认为在最远周缘区域34c6中,随着从延长中央区域34c7去到外侧,温度下降。
接下来,用图7~图11以及图6说明这样的半导体装置10中的半导体芯片30a、40a和导电图案22a3之间的引线的键合的详细情况。图7是用于说明实施方式中的半导体装置的从半导体芯片起的引线键合的俯视图。图8是用于说明实施方式中的半导体装置的从半导体芯片起的引线键合的侧视图。图9~图11是用于说明与实施方式中的半导体装置的半导体芯片的键合位置对应的引线键合的俯视图。应予说明,在图7~图11中,分别示出仅图2的半导体芯片30a、40a和导电图案22a3的主要部分的俯视图和侧视图。另外,图9~图11是分别对图7和图8的引线50中的引线51、52、53进行记载的图。应予说明,对于半导体芯片30b、40b和导电图案22b3、22b4也能够与这里说明的半导体芯片30a、40a和导电图案22a3同样地进行键合。
如图7所示,半导体芯片30a、位于半导体芯片30的与栅极31相反的一侧的半导体芯片40a和位于半导体芯片40a的与半导体芯片30a相反的一侧的导电图案22a3配置于散热板60(在图7中省略图示)。半导体芯片30a、40a和导电图案22a3之间用引线50连接。其中,半导体芯片40a与导电图案22a3用引线54电连接。应予说明,在图7中,省略了在图2示出的引线55a的记载。另外,这里例示了对陶瓷电路基板20a的导电图案22a3连接引线50的情况。不限于陶瓷电路基板20a的导电图案22a3,还能够对其他半导体芯片、导电板等导电部件连接引线50。
首先,如图9和图8所示,引线50中的引线51将半导体芯片30a的有源区32的电极区域32a、32b与导电图案22a3之间直接电连接。另外,引线51将半导体芯片30a的有源区32的电极区域32c、32d的缘部侧与导电图案22a3之间直接电连接。即,引线51连接于电极区域32c、32d中的图6示出的外侧周缘区域34c4、34c5。外侧周缘区域34c4、34c5的温度比中央区域34c1和内侧周缘区域34c2、34c3的温度低。因此,从电极区域32c、32d发出经由引线51而向导电图案22a3传导的热量足够少,抑制引线51的与导电图案22a3的连接部分发生剥离等。
如图10和图8所示,引线50中的引线52将半导体芯片30a的有源区32的电极区域32c、32d的内侧(靠近栅极流道33)与导电图案22a3之间电连接。此时,引线52暂且与半导体芯片30a和导电图案22a3之间的半导体芯片40a的主电极连接。即,引线52连接于电极区域32c、32d中的图6示出的内侧周缘区域34c2、34c3。虽然内侧周缘区域34c2、34c3的温度比中央区域34c1的温度低,但是比外侧周缘区域34c4、34c5的温度高。因此,可认为在直接连接了电极区域32c、32d(内侧周缘区域34c2、34c3)与导电图案22a3与引线52的情况下,经由引线52向导电图案22a3传导的热量比较大。因此,可能会导致引线52的与导电图案22a3的连接部分发生剥离等。因此,引线52设为在将电极区域32c、32d(内侧周缘区域34c2、34c3)与导电图案22a3连接时,经由半导体芯片40a。由此,来自电极区域32c、32d(内侧周缘区域34c2、34c3)的热量的一部分释放到半导体芯片40a。因此,能够使通过引线52从电极区域32c、32d(内侧周缘区域34c2、34c3)向导电图案22a3传导的热量减少,抑制引线52的与导电图案22a3的连接部分发生剥离等。
如图11和图8所示,引线50中的引线53将半导体芯片30a的有源区32的电极区域32e与导电图案22a3之间电连接。此时,引线53暂且与半导体芯片30a和导电图案22a3之间的半导体芯片40a的主电极连接。此时,引线54也有时将导电图案22a3和半导体芯片40a电连接,引线53使电流易于流入距离半导体芯片30a的栅极31远的电极区域32e。另外,引线53连接于作为电极区域32e的图6示出的最远周缘区域34c6中的延长中央区域34c7的外侧。因此,能够使从电极区域32e向引线53传导的热量进一步降低。由此,抑制电极区域32e(最远周缘区域34c6)与引线53的连接部分发生剥离等。另外,来自电极区域32e(最远周缘区域34c6)的热量的一部分释放到半导体芯片40a。因此,能够使通过引线53从电极区域32e(最远周缘区域34c6)向导电图案22a3传导的热量减少,抑制引线53的与导电图案22a3的连接部分发生剥离等。
在上述半导体装置10中,具备半导体芯片30,所述半导体芯片30在正面具备由电极区域32a、32b、32c、32d、32e构成,并且从电极区域32a、32b、32c、32d、32e分别输出输出电流的有源区32。另外,具备分别在电极区域32a、32b、32c、32d、32e被连接至少一根的引线50。另外,在半导体装置10中,引线50被连接与所连接的电极区域32a、32b、32c、32d、32e的位置对应的每单位根数的电流量达到预定值以下的根数。由此,能够抑制由于电流流通导致的引线50的发热。
另外,半导体芯片30的正面34在俯视时为矩形。半导体芯片30还具备位于正面34的端部中央部的被输入控制电压的栅极31和沿从栅极31朝向与栅极31对置的端部的延伸方向从栅极31延伸到预定的位置为止的栅极流道33。另外,电极区域32a、32b、32c、32d、32e沿着该延伸方向分别配置在栅极流道33的两侧,引线50的根数根据电极区域32a、32b、32c、32d、32e相对于栅极31的向该延伸方向的分离位置而变化。由此,能够进一步抑制由于电流流通导致的引线50的发热,抑制功率循环耐量的降低,并抑制半导体装置10的可靠性降低。
应予说明,在上述中举例说明了像图3的半导体芯片30那样对于从栅极31朝向与栅极31对置的端部的延伸方向分割为3排(电极区域32a、32b、电极区域32c、32d、电极区域32e)的情况。分割数不限于半导体芯片30的情况。用图12对其他半导体芯片进行说明。图12是实施方式中的其他半导体芯片的俯视图。
如图12所示,半导体芯片130在俯视时为矩形,并且在其正面的端部中央部具备栅极131(控制电极部)并具备有源区132(输出电极部)。应予说明,半导体芯片130的尺寸为例如纵向12mm、横向10mm。如图12所示,有源区132由沿从栅极131朝向与该栅极131对置的端部的延伸方向分别配置为4排的电极区域132a、132b、电极区域132c、132d、电极区域132e、132f、电极区域132g构成。另外,电极区域132a、132b、132c、132d、132e、132f、132g是分别设置有多个IGBT的晶体管区域。电极区域132a、132b、132c、132d、132e、132f、132g之间相互被绝缘、电极区域132a、132b、132c、132d、132e、132f、132g分别输出独立的输出电流。在晶体管区域中,电连接于栅极131的栅极流道133为从栅极131朝向与栅极131对置的端部的方向,并且被设置为沿着电极区域132a、132c与电极区域132b、132d与电极区域132e、132f之间的边界部而延伸到电极区域132e、132f。即,电极区域132a、132b、电极区域132c、132d、电极区域132e、132f在栅极流道133的两侧沿着该方向分别依次配置。另外,在有源区132中,越沿着栅极流道133与栅极131分离,则面积越大。
如图12所示,这样的半导体芯片130也在各电极区域132a、132b、132c、132d、132e、132f、132g中示出的虚线的矩形区域键合有引线50。另外,在这种情况下,引线50也被连接与所连接的电极区域132a、132b、132c、132d、132e、132f、132g的面积对应的预定根数以下的每单位面积的根数。
另外,对于引线50而言,根据所连接的电极区域132a、132b、132c、132d、132e、132f、132g的向从栅极131朝向与该栅极131对置的端部的延伸方向的分离位置,引线50的每单位根数所能流通的电流不同。分别连接的引线50的每单位根数的输出电流以电极区域132e、132f(中间电极区域)、电极区域132c、132d(中间电极区域)、电极区域132g(最远电极区域)、电极区域132a、132b(最近电极区域)的顺序增大。由此,如果从各电极区域132a、132b、132c、132d、132e、132f、132g输出电流,则能够抑制各个引线50的发热。
另外,在半导体芯片130中也适用如图4~图6所示的区域的设定。在应用图4的情况下,设定有由栅极131的长边的宽度和栅极流道133的长度构成的中央区域34a1以及包围中央区域34a1的周缘区域34a2。在应用图5的情况下,中央区域34b1被设定为由栅极131的长边的宽度和到与栅极131对置的端部为止的长度构成的范围。另外,周缘区域34b2、34b3设定于中央区域34b1的两侧。
另外,在应用图6的情况下,中央区域34c1被设定为由栅极131的长边的宽度和栅极流道133的长度构成的区域。内侧周缘区域34c2、34c3是中央区域34c1的两侧的周缘区域并且被设定为靠近栅极流道133的区域。即,在内侧周缘区域34c2、34c3中包含电极区域132c、132d、132e、132f的靠近栅极流道133的键合位置。外侧周缘区域34c4、34c5被设定为内侧周缘区域34c2、34c3的更外侧的区域。最远周缘区域34c6设定为距离栅极131最远的区域的周缘区域(电极区域132g)。并且,如果将这样的半导体芯片130替代图7的半导体芯片30a而应用,则连接于内侧周缘区域34c2、34c3、外侧周缘区域34c4、34c5和最远周缘区域34c6的引线50以与图7的情况同样的方式连接于导电图案22a3。这样的半导体芯片130也与使用了半导体芯片30a的情况同样地能够抑制由于电流流通导致的引线50的发热。
以上仅表示本发明的原理。进一步地,对于本领域技术人员而言可以进行多种变形、变更,本发明并不限定于上述所示且所说明的准确的构成和应用例,对应的所有的变形例以及等价物均被视为由所附的权利要求及其等价物所确定的本发明的范围。
Claims (15)
1.一种半导体装置,其特征在于,所述半导体装置具备:
第1半导体芯片,其在正面具备输出电极部,所述输出电极部由多个电极区域构成,并且从所述多个电极区域分别输出输出电流;以及
引线,其在所述多个电极区域的各个电极区域被连接至少一根,
所述引线被连接与所连接的电极区域的位置对应的、每单位根数的电流量达到预定值以下的根数。
2.根据权利要求1所述的半导体装置,其特征在于,所述第1半导体芯片包含开关元件。
3.根据权利要求1或2所述的半导体装置,其特征在于,
所述第1半导体芯片的所述正面在俯视时为矩形,并且在所述正面的端部中央部还具备被输入控制电压的控制电极部,
所述多个电极区域分别沿着从所述控制电极部朝向与所述控制电极部对置的端部的延伸方向而配置,
所述多个电极区域根据所述多个电极区域的从所述控制电极部起的向所述延伸方向的分离位置,具有所述分离位置距离所述控制电极部最近的最近电极区域、所述分离位置距离所述控制电极部最远的最远电极区域和位于所述最近电极区域与所述最远电极区域之间的中间电极区域,
所述电流量根据与所述分离位置对应的区域而不同。
4.根据权利要求3所述的半导体装置,其特征在于,从连接于所述多个电极区域中的所述中间电极区域的所述引线输出的每单位根数的第1输出电流最小。
5.根据权利要求4所述的半导体装置,其特征在于,从连接于所述多个电极区域中的所述最远电极区域的所述引线输出的每单位根数的第2输出电流在所述第1输出电流之后第二小。
6.根据权利要求3~5中任一项所述的半导体装置,其特征在于,所述半导体装置还具有相对于所述第1半导体芯片在所述控制电极部的相反侧与所述第1半导体芯片分离地设置的导电板,
所述引线的一端连接于所述输出电极部,另一端连接于所述导电板。
7.根据权利要求3~6中任一项所述的半导体装置,其特征在于,所述第1半导体芯片的所述正面还具备沿所述延伸方向从所述控制电极部延伸到所述中间电极区域的栅极流道,
所述引线分别连接于周缘区域,所述周缘区域本身为所述最近电极区域和所述中间电极区域且处于与所述控制电极部的宽度对应的中央区域的相对于所述延伸方向的两侧。
8.根据权利要求3~5中任一项所述的半导体装置,其特征在于,所述半导体装置还具有:
第2半导体芯片,其相对于所述第1半导体芯片设置于所述控制电极部的相反侧,并且在正面设置有主电极;以及
导电板,其设置于所述第2半导体芯片的与所述第1半导体芯片相反的一侧,
所述引线的一端连接于所述输出电极部,另一端连接于所述导电板,所述一端与所述另一端之间的中间部连接于所述第2半导体芯片的所述主电极。
9.根据权利要求8所述的半导体装置,其特征在于,所述第2半导体芯片包含二极管元件。
10.根据权利要求8或9所述的半导体装置,其特征在于,所述引线的一端连接于所述最近电极区域,另一端直接连接于所述导电板。
11.根据权利要求8~10中任一项所述的半导体装置,其特征在于,所述引线的一端连接于所述最远电极区域,另一端连接于所述导电板,所述一端与所述另一端之间的中间部连接于所述第2半导体芯片的所述主电极。
12.根据权利要求8所述的半导体装置,其特征在于,所述第1半导体芯片的所述正面还具备沿所述延伸方向从所述控制电极部延伸到所述中间电极区域的栅极流道,
所述引线分别连接于周缘区域,所述周缘区域本身为所述最近电极区域和所述中间电极区域且处于与所述控制电极部的宽度对应的中央区域的相对于所述延伸方向的两侧。
13.根据权利要求7或12所述的半导体装置,其特征在于,所述引线连接于所述最远电极区域中的从所述中央区域向所述延伸方向延长而得的延长中央区域的相对于所述延伸方向的两侧的区域。
14.根据权利要求12所述的半导体装置,其特征在于,所述引线的一端连接于本身为所述中间电极区域的、所述周缘区域的所述栅极流道侧的内侧周缘区域,另一端连接于所述导电板,所述一端与所述另一端之间的中间部连接于所述第2半导体芯片的所述主电极。
15.根据权利要求12所述的半导体装置,其特征在于,所述引线的一端连接于本身为所述中间电极区域的、所述周缘区域的与所述栅极流道分离的外侧周缘区域,另一端直接连接于所述导电板。
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