CN113168104A - 通过组合一组预定义的分离掩模创建不同设计的方法 - Google Patents
通过组合一组预定义的分离掩模创建不同设计的方法 Download PDFInfo
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- CN113168104A CN113168104A CN201980069378.8A CN201980069378A CN113168104A CN 113168104 A CN113168104 A CN 113168104A CN 201980069378 A CN201980069378 A CN 201980069378A CN 113168104 A CN113168104 A CN 113168104A
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- 238000000034 method Methods 0.000 title claims abstract description 62
- 238000013461 design Methods 0.000 title abstract description 41
- 238000000926 separation method Methods 0.000 title description 3
- 239000004065 semiconductor Substances 0.000 claims abstract description 63
- 239000000758 substrate Substances 0.000 claims abstract description 28
- 239000000463 material Substances 0.000 claims abstract description 24
- 229920002120 photoresistant polymer Polymers 0.000 claims description 55
- 239000002184 metal Substances 0.000 claims description 14
- 230000011664 signaling Effects 0.000 claims description 9
- 238000012545 processing Methods 0.000 claims description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 5
- 229910052710 silicon Inorganic materials 0.000 claims description 5
- 239000010703 silicon Substances 0.000 claims description 5
- 238000004519 manufacturing process Methods 0.000 abstract description 17
- 230000008569 process Effects 0.000 description 14
- 238000003860 storage Methods 0.000 description 9
- 239000007769 metal material Substances 0.000 description 8
- 238000013459 approach Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 238000005530 etching Methods 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 230000008901 benefit Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000012938 design process Methods 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
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Classifications
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/20—Exposure; Apparatus therefor
- G03F7/2022—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/20—Exposure; Apparatus therefor
- G03F7/2022—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure
- G03F7/203—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure comprising an imagewise exposure to electromagnetic radiation or corpuscular radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/20—Exposure; Apparatus therefor
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
- G03F7/70433—Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
- G03F7/70475—Stitching, i.e. connecting image fields to produce a device field, the field occupied by a device such as a memory chip, processor chip, CCD, flat panel display
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/004—Photosensitive materials
- G03F7/039—Macromolecular compounds which are photodegradable, e.g. positive electron resists
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Electromagnetism (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
Description
Claims (20)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202210794653.6A CN115268222B (zh) | 2018-12-14 | 2019-12-11 | 方法、ic裸片以及半导体装置 |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201862780140P | 2018-12-14 | 2018-12-14 | |
US62/780,140 | 2018-12-14 | ||
PCT/US2019/065779 WO2020123694A1 (en) | 2018-12-14 | 2019-12-11 | Method for creation of different designs by combining a set of pre-defined disjoint masks |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202210794653.6A Division CN115268222B (zh) | 2018-12-14 | 2019-12-11 | 方法、ic裸片以及半导体装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN113168104A true CN113168104A (zh) | 2021-07-23 |
Family
ID=71076650
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201980069378.8A Pending CN113168104A (zh) | 2018-12-14 | 2019-12-11 | 通过组合一组预定义的分离掩模创建不同设计的方法 |
CN202210794653.6A Active CN115268222B (zh) | 2018-12-14 | 2019-12-11 | 方法、ic裸片以及半导体装置 |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202210794653.6A Active CN115268222B (zh) | 2018-12-14 | 2019-12-11 | 方法、ic裸片以及半导体装置 |
Country Status (3)
Country | Link |
---|---|
US (1) | US20210349392A1 (zh) |
CN (2) | CN113168104A (zh) |
WO (1) | WO2020123694A1 (zh) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113885299A (zh) * | 2021-11-16 | 2022-01-04 | 华进半导体封装先导技术研发中心有限公司 | 一种多掩膜版尺寸芯片曝光方法 |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050054210A1 (en) * | 2003-09-04 | 2005-03-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Multiple exposure method for forming patterned photoresist layer |
CN101315914A (zh) * | 2007-05-29 | 2008-12-03 | 台湾积体电路制造股份有限公司 | 半导体中介片及其在电子封装上的应用 |
CN102246304A (zh) * | 2008-11-04 | 2011-11-16 | 全球Oled科技有限责任公司 | 具有小芯片和可适性互连的器件 |
US20120264276A1 (en) * | 2011-04-14 | 2012-10-18 | Harris Corporation | Method of processing a wafer by using and reusing photolithographic masks |
US20120319246A1 (en) * | 2011-06-16 | 2012-12-20 | Globalfoundries Singapore Pte. Ltd. | Ip protection |
CN104064556A (zh) * | 2013-03-14 | 2014-09-24 | 阿尔特拉公司 | 可编程中介层电路系统 |
US20150302974A1 (en) * | 2014-04-16 | 2015-10-22 | Broadcom Corporation | Magnetic-core three-dimensional (3d) inductors and packaging integration |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6187486B1 (en) * | 1999-01-05 | 2001-02-13 | Worldwide Semiconductor Manufacturing Corp. | Method of multi-exposure for improving photolithography resolution |
US6803178B1 (en) * | 2001-06-25 | 2004-10-12 | Advanced Micro Devices, Inc. | Two mask photoresist exposure pattern for dense and isolated regions |
US7588869B2 (en) * | 2003-12-30 | 2009-09-15 | Lg Display Co., Ltd. | Divided exposure method for making a liquid crystal display |
US7875406B2 (en) * | 2008-03-27 | 2011-01-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multiple technology node mask |
US9097975B2 (en) * | 2012-09-14 | 2015-08-04 | Macronix International Co., Ltd. | Double patterning by PTD and NTD process |
US8866304B2 (en) * | 2012-12-21 | 2014-10-21 | Altera Corporation | Integrated circuit device with stitched interposer |
US9997467B2 (en) * | 2016-08-19 | 2018-06-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor packages and methods of forming the same |
-
2019
- 2019-12-11 CN CN201980069378.8A patent/CN113168104A/zh active Pending
- 2019-12-11 CN CN202210794653.6A patent/CN115268222B/zh active Active
- 2019-12-11 WO PCT/US2019/065779 patent/WO2020123694A1/en active Application Filing
- 2019-12-11 US US17/278,226 patent/US20210349392A1/en active Pending
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050054210A1 (en) * | 2003-09-04 | 2005-03-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Multiple exposure method for forming patterned photoresist layer |
CN101315914A (zh) * | 2007-05-29 | 2008-12-03 | 台湾积体电路制造股份有限公司 | 半导体中介片及其在电子封装上的应用 |
CN102246304A (zh) * | 2008-11-04 | 2011-11-16 | 全球Oled科技有限责任公司 | 具有小芯片和可适性互连的器件 |
US20120264276A1 (en) * | 2011-04-14 | 2012-10-18 | Harris Corporation | Method of processing a wafer by using and reusing photolithographic masks |
US20120319246A1 (en) * | 2011-06-16 | 2012-12-20 | Globalfoundries Singapore Pte. Ltd. | Ip protection |
CN104064556A (zh) * | 2013-03-14 | 2014-09-24 | 阿尔特拉公司 | 可编程中介层电路系统 |
US20150302974A1 (en) * | 2014-04-16 | 2015-10-22 | Broadcom Corporation | Magnetic-core three-dimensional (3d) inductors and packaging integration |
CN105185554A (zh) * | 2014-04-16 | 2015-12-23 | 美国博通公司 | 磁芯三维(3d)电感器及封装集成 |
Also Published As
Publication number | Publication date |
---|---|
US20210349392A1 (en) | 2021-11-11 |
WO2020123694A1 (en) | 2020-06-18 |
CN115268222B (zh) | 2024-04-30 |
CN115268222A (zh) | 2022-11-01 |
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Effective date of registration: 20220525 Address after: Unit 718, building 2, Beijing Aerospace Building, No. 53, Gaoxin South ninth Road, Keyuan Road, Nanshan District, Shenzhen, Guangdong Applicant after: Shenzhen qipule Chip Technology Co.,Ltd. Address before: 35th floor, Nord financial center, Fuzhong Third Road, Futian District, Shenzhen City, Guangdong Province Applicant before: Beiming Investment Co.,Ltd. |