CN113067465B - Negative resistance based on DSP control - Google Patents
Negative resistance based on DSP control Download PDFInfo
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- CN113067465B CN113067465B CN202110465762.9A CN202110465762A CN113067465B CN 113067465 B CN113067465 B CN 113067465B CN 202110465762 A CN202110465762 A CN 202110465762A CN 113067465 B CN113067465 B CN 113067465B
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- 239000004065 semiconductor Substances 0.000 claims abstract description 5
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- 230000001360 synchronised effect Effects 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 5
- 102100031145 Probable low affinity copper uptake protein 2 Human genes 0.000 description 2
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- 238000010276 construction Methods 0.000 description 2
- 230000010363 phase shift Effects 0.000 description 2
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Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
- H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
- H02M7/53873—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with digital control
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
Abstract
The invention discloses a negative resistance based on DSP control, which comprises a direct-current voltage source, a full-bridge inverter circuit, a current sampling module, a DSP controller and a switching tube driving module which are connected in sequence; the full-bridge inverter circuit comprises 4 semiconductor power switching tubes; the DSP controller comprises a CAP module, a first PWM module and a second PWM module; the first PWM module generates 2 paths of square wave control signals PWMA1 and PWMB1; the second PWM module generates 2 paths of square wave control signals PWMA2 and PWMB2; the switching tube driving module generates 4 paths of switching tube driving signals according to square wave control signals PWMA1, PWMB1, PWMA2 and PWMB2 respectively; 4-way switching tube driving signal switching tube driving signals respectively control the on and off of 4 semiconductor power switching tubes so as to realize the control of the phase and the effective value of the output voltage of the full-bridge inverter circuit. Under the condition that the input voltage at the direct current side is fixed, the invention can realize flexible control of the effective value of the output voltage of the full-bridge inverter circuit by changing the duty ratio of the output voltage of the full-bridge inverter circuit.
Description
Technical Field
The invention relates to the technical field of negative resistance construction, in particular to a negative resistance based on DSP control.
Background
The negative resistance is a one-port active element meeting ohm's law, and is characterized in that when the relevant reference direction is selected, the voltage at two ends of the element is opposite to the phase of the flowing current, and active power is output outwards. The existing negative resistance construction methods mainly comprise two types: firstly, an operational amplifier and a positive resistor are used for base; and the second is an inverter circuit based on self-oscillation control. The former is limited by the saturated voltage of the operational amplifier, the output active power is limited, and the latter is only suitable for low-power occasions, the switching tube driving signal is directly generated by the zero-crossing comparator, the duty ratio of the output voltage of the inverter circuit is always equal to 0.5, and the voltage of the direct current side of the inverter circuit can be changed only by cascading the DC-DC converter at the front end of the inverter circuit so as to realize the adjustment of the output voltage of the inverter circuit, but the cost and the volume of the system are increased.
Disclosure of Invention
The invention aims to overcome the defects and shortcomings of the prior art, and provides a negative resistance based on DSP control, which generates a driving signal of a switching tube of an inverter circuit through synchronization and phase shift control, and only utilizes the inverter circuit to simultaneously control the output voltage and the phase of the inverter circuit.
In order to achieve the above purpose, the technical scheme provided by the invention is as follows: the negative resistance based on DSP control comprises a direct-current voltage source, a full-bridge inverter circuit, a current sampling module, a DSP controller and a switching tube driving module; the direct-current voltage source is connected with the full-bridge inverter circuit; the full-bridge inverter circuit comprises 4 semiconductor power switching tubes Q 1、Q2、Q3、Q4; the current sampling module samples the output current of the full-bridge inverter circuit and generates square wave signals with the same phase and frequency as the output current of the full-bridge inverter circuit; the DSP controller comprises a CAP module (i.e. a pulse capturing module), a first PWM module (i.e. a first pulse width modulation module) and a second PWM module (i.e. a second pulse width modulation module); the CAP module captures the rising edge of the square wave signal generated by the current sampling module, acquires the phase and the frequency of the output current of the full-bridge inverter circuit in real time, and generates a synchronous signal of the first PWM module when the CAP module captures the rising edge of the square wave signal; the first PWM module generates 2 paths of square wave control signals PWMA1 and PWMB1; the second PWM module generates 2 paths of square wave control signals PWMA2 and PWMB2; the switching tube driving module generates 4 paths of switching tube driving signals V GS1、VGS2、VGS3、VGS4 according to square wave control signals PWMA1, PWMB1, PWMA2 and PWMB2 respectively; the switching tube driving signal V GS1、VGS2、VGS3、VGS4 controls the switching tubes Q 1、Q2、Q3 and Q 4 to be switched on and off respectively; the fundamental component of the output voltage of the full-bridge inverter circuit is the same as the fundamental component of the output current of the full-bridge inverter circuit in phase, the duty ratio of the output voltage of the full-bridge inverter circuit is adjustable, and the port characteristics of the whole circuit can be equivalent to negative resistance.
Further, the first PWM module includes a first period counter and a first time base counter, the second PWM module includes a second period counter and a second time base counter, the values of the first period counter and the second period counter are always equal to a period value PRD of the output current of the full-bridge inverter circuit, and the period value PRD of the output current of the full-bridge inverter circuit satisfies: prd=t S/TCLK, where T S represents the period of the full-bridge inverter circuit output current, and T CLK represents the clock period of the PWM module of the DSP controller; the first time base counter and the second time base counter are configured into a descending mode, in the descending mode, the first time base counter and the second time base counter firstly load the values of the first period counter and the second period counter, then start descending until the values are reduced to 0, the values of the first period counter and the second period counter are automatically reloaded, and the above actions are repeated; when the value of the first time base counter is equal to the value of the first period counter, the square wave control signal PWMA1 is set high, the square wave control signal PWMB1 is set low, and when the value of the first time base counter is equal to the value of the 1/2 first period counter, the square wave control signal PWMA1 is set low, and the square wave control signal PWMB1 is set high; when the value of the second time base counter is equal to the value of the second period counter, the square wave control signal PWMA2 is set high, the square wave control signal PWMB2 is set low, and when the value of the second time base counter is equal to 1/2 of the value of the second period counter, the square wave control signal PWMA2 is set low, and the square wave control signal PWMB2 is set high; when the value of the first time base counter is reduced to 0, a synchronous signal of the second PWM module is generated.
Further, when the synchronization signal of the PWM module arrives, the value of the first time base counter is updated to be Pha1 immediately, and when the synchronization signal of the second PWM module arrives, the value of the second time base counter is updated to be Pha2 immediately, and the values of Pha1 and Pha2 satisfy the following relationship:
Wherein D S represents the duty cycle of the output voltage of the full-bridge inverter circuit.
Compared with the prior art, the invention has the following advantages and beneficial effects:
1. The invention is based on a power electronic converter, and can realize negative resistance of any power level.
2. Through synchronization and phase shift control, the negative resistance with adjustable output voltage is realized by using the inverter circuit only, and the device has the characteristics of simple structure, low cost, small volume and high efficiency.
In a word, the negative resistance based on DSP control disclosed by the invention can realize flexible control of the effective value of the output voltage of the full-bridge inverter circuit by changing the duty ratio of the output voltage of the full-bridge inverter circuit under the condition that the input voltage of the direct current side is fixed, and has remarkable advantages in practical application.
Drawings
Fig. 1 is a block diagram of a configuration of a negative resistance based on DSP control provided in an embodiment.
Fig. 2 is a schematic diagram of the generation of the switching tube driving signal shown in fig. 1 in the embodiment.
Fig. 3 is a block diagram of a series-series wireless power transfer system based on the proposed negative resistance in an embodiment.
Fig. 4 is a steady-state waveform diagram of the output voltage and the output current of the inverter circuit shown in fig. 3 in the embodiment.
Detailed Description
The present invention will be described in further detail with reference to examples and drawings, but embodiments of the present invention are not limited thereto.
As shown in fig. 1, the embodiment discloses a negative resistance based on DSP control, which includes a dc voltage source, a full-bridge inverter circuit, a current sampling module, a DSP controller and a switching tube driving module; the direct-current voltage source is connected with the full-bridge inverter circuit; the full-bridge inverter circuit comprises 4 semiconductor power switching tubes Q 1、Q2、Q3、Q4; the current sampling module samples the output current of the full-bridge inverter circuit and generates square wave signals with the same phase and frequency as the output current of the full-bridge inverter circuit; the DSP controller comprises a CAP module (i.e. a pulse capturing module), a first PWM module (i.e. a first pulse width modulation module) and a second PWM module (i.e. a second pulse width modulation module); the first PWM module comprises a first period counter and a first time base counter, the second PWM module comprises a second period counter and a second time base counter, and the values of the first period counter and the second period counter are always equal to the period value PRD of the output current of the full-bridge inverter circuit; the CAP module captures the rising edge of the square wave signal generated by the current sampling module, acquires the phase and the frequency of the output current of the full-bridge inverter circuit in real time, and generates a synchronous signal of the first PWM module when the CAP module captures the rising edge of the square wave signal; the first PWM module generates 2 paths of square wave control signals PWMA1 and PWMB1; the second PWM module generates 2 paths of square wave control signals PWMA2 and PWMB2; the switching tube driving module generates 4 paths of switching tube driving signals V GS1、VGS2、VGS3、VGS4 according to square wave control signals PWMA1, PWMB1, PWMA2 and PWMB2 respectively; the switching tube driving signal V GS1、VGS2、VGS3、VGS4 controls the switching tubes Q 1、Q2、Q3 and Q 4 to be switched on and off respectively; the fundamental component of the output voltage and the fundamental component of the output current of the inverter circuit are always in phase, and the port characteristic of the whole circuit can be equivalent to negative resistance-R N.
In this embodiment, a specific generation process of the square wave control signal and the switching tube driving signal is shown in fig. 2. Firstly, a CAP module of a DSP controller captures a rising edge of a square wave signal i' P generated by a sampling module, the DSP controller calculates the frequency of an output current of an inverter circuit according to the captured rising edge of the square wave signal, and updates the values PRD of a first period counter and a second period counter in real time (PRD=T S/TCLK, wherein T S represents the period of the output current of the full-bridge inverter circuit, T CLK represents the clock period of a PWM module of the DSP controller), and simultaneously, when the rising edge of the square wave signal arrives, a synchronous signal S n1 of the first PWM module is generated. The first PWM module and the second PWM module are configured in a falling mode in which the time base counter 1 and the time base counter 2 first load the values of the first period counter and the second period counter and then start to decrement down until the values of the first period counter and the second period counter are automatically reloaded and the above actions are repeated. As shown in fig. 2, when the value CTR1 of the time base counter 1 is equal to the value of the first period counter, the square wave control signal PWMA1 is set high, the square wave control signal PWMB1 is set low, when the value of the time base counter 1 is equal to 1/2 of the value of the first period counter, the square wave control signal PWMA1 is set low, the square wave control signal PWMB1 is set high, and when the value of the time base counter 1 is reduced to 0, the synchronization signal S n2 of the second PWM module is generated. The production principle of the square wave control signals PWMA2 and PWMB2 is the same as that of the square wave control signals PWMA1 and PWMB1, when the value CTR2 of the base counter 2 is equal to the value of the second period counter, the square wave control signal PWMA2 is set high, the square wave control signal PWMB2 is set low, when the value of the base counter 2 is equal to 1/2 of the value of the second period counter, the square wave control signal PWMA2 is set low, and the square wave control signal PWMB2 is set high.
When the synchronization signal S n1 of the first PWM module arrives, the value CTR of the time base counter 1 is updated to be Pha1 immediately, and when the synchronization signal S n1 of the second PWM module arrives, the value CTR2 of the time base counter 2 is updated to be Pha2 immediately, wherein, ph 1 and ph 2 satisfy:
Wherein D S represents the duty cycle of the output voltage of the full-bridge inverter circuit.
To further illustrate the advantages of the present invention, in this embodiment, the proposed negative resistance is used in a series-series wireless power transmission system, the schematic block diagram of which is shown in fig. 3, where V dc represents the voltage of the dc voltage source, L P and L S represent the transmit coil inductance and the receive coil inductance, C P and C S represent the transmit end capacitance and the receive end capacitance, R S and R P represent the transmit coil and the receive coil internal resistance, M PS represents the mutual inductance value between the coils, and R L represents the load value. The corresponding inverter circuit output voltage and output current waveforms at circuit steady state are shown in fig. 4, where V ac represents the inverter circuit output voltage, V ac1 represents the inverter circuit output voltage fundamental component, and the effective value V ac1 satisfies the following relationship:
It can be seen from fig. 4 that the inverter circuit output voltage fundamental component and the output current fundamental component remain in phase.
The above examples are preferred embodiments of the present invention, but the embodiments of the present invention are not limited to the above examples, and any other changes, modifications, substitutions, combinations, and simplifications that do not depart from the spirit and principle of the present invention should be made in the equivalent manner, and the embodiments are included in the protection scope of the present invention.
Claims (2)
1. A negative resistance based on DSP control, characterized by: the full-bridge inverter circuit comprises a direct-current voltage source, a full-bridge inverter circuit, a current sampling module, a DSP controller and a switching tube driving module; the direct-current voltage source is connected with the full-bridge inverter circuit; the full-bridge inverter circuit comprises 4 semiconductor power switching tubes Q 1、Q2、Q3、Q4; the current sampling module samples the output current of the full-bridge inverter circuit and generates square wave signals with the same phase and frequency as the output current of the full-bridge inverter circuit; the DSP controller comprises a CAP module, a first PWM module and a second PWM module; the CAP module captures the rising edge of the square wave signal generated by the current sampling module, acquires the phase and the frequency of the output current of the full-bridge inverter circuit in real time, and generates a synchronous signal of the first PWM module when the CAP module captures the rising edge of the square wave signal; the first PWM module generates 2 paths of square wave control signals PWMA1 and PWMB1; the second PWM module generates 2 paths of square wave control signals PWMA2 and PWMB2; the switching tube driving module generates 4 paths of switching tube driving signals V GS1、VGS2、VGS3、VGS4 according to square wave control signals PWMA1, PWMB1, PWMA2 and PWMB2 respectively; the switching tube driving signal V GS1、VGS2、VGS3、VGS4 controls the switching tubes Q 1、Q2、Q3 and Q 4 to be switched on and off respectively; the fundamental component of the output voltage of the full-bridge inverter circuit is the same as the fundamental component of the output current of the full-bridge inverter circuit in phase, the duty ratio of the output voltage of the full-bridge inverter circuit is adjustable, and the port characteristics of the whole circuit can be equivalently negative resistance;
The first PWM module comprises a first period counter and a first time base counter, the second PWM module comprises a second period counter and a second time base counter, the values of the first period counter and the second period counter are always equal to the period value PRD of the output current of the full-bridge inverter circuit, and the period value PRD of the output current of the full-bridge inverter circuit meets the following conditions: prd=t S/TCLK, where T S represents the period of the full-bridge inverter circuit output current, and T CLK represents the clock period of the PWM module of the DSP controller; the first time base counter and the second time base counter are configured into a descending mode, in the descending mode, the first time base counter and the second time base counter firstly load the values of the first period counter and the second period counter, then start descending until the values are reduced to 0, the values of the first period counter and the second period counter are automatically reloaded, and the above actions are repeated; when the value of the first time base counter is equal to the value of the first period counter, the square wave control signal PWMA1 is set high, the square wave control signal PWMB1 is set low, and when the value of the first time base counter is equal to the value of the 1/2 first period counter, the square wave control signal PWMA1 is set low, and the square wave control signal PWMB1 is set high; when the value of the second time base counter is equal to the value of the second period counter, the square wave control signal PWMA2 is set high, the square wave control signal PWMB2 is set low, and when the value of the second time base counter is equal to 1/2 of the value of the second period counter, the square wave control signal PWMA2 is set low, and the square wave control signal PWMB2 is set high; when the value of the first time base counter is reduced to 0, a synchronous signal of the second PWM module is generated.
2. A negative resistance based on DSP control as claimed in claim 1, wherein: when the synchronization signal of the PWM module arrives, the value of the first time-base counter is updated to be Pha1 immediately, and when the synchronization signal of the second PWM module arrives, the value of the second time-base counter is updated to be Pha2 immediately, and the values of Pha1 and Pha2 satisfy the following relationship:
Wherein D S represents the duty cycle of the output voltage of the full-bridge inverter circuit.
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CN113422443B (en) * | 2021-07-26 | 2024-02-02 | 大连海事大学 | Magnetic adsorption type underwater wireless power supply system with multiple transmitting and receiving coils in cascade connection |
CN114744900B (en) * | 2022-03-15 | 2024-06-28 | 华南理工大学 | Negative resistance based on mixed frequency modulation and phase synchronization control |
CN117081360B (en) * | 2023-07-10 | 2024-08-20 | 哈尔滨工业大学 | Voltage regulation control method of full-bridge inverter circuit |
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2021
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