CN109039305B - Circuit for generating clock pulse signal based on alternating current - Google Patents

Circuit for generating clock pulse signal based on alternating current Download PDF

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CN109039305B
CN109039305B CN201810872563.8A CN201810872563A CN109039305B CN 109039305 B CN109039305 B CN 109039305B CN 201810872563 A CN201810872563 A CN 201810872563A CN 109039305 B CN109039305 B CN 109039305B
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diode
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CN109039305A (en
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黄琦
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/003—Changing the DC level
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B47/00—Circuit arrangements for operating light sources in general, i.e. where the type of light source is not relevant
    • H05B47/10—Controlling the light source
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/40—Control techniques providing energy savings, e.g. smart controller or presence detection

Abstract

The invention relates to the technical field of synchronous control and discloses a circuit for generating a clock pulse signal based on alternating current. The invention can provide a novel circuit for converting alternating current signals in a power supply network into frequency multiplication clock pulse signals, and further can apply the output clock pulse signals as input signals of units such as counting/timing circuits and the like in an intelligent product after the novel circuit is arranged in the intelligent product, so that a crystal oscillator circuit unit can be designed by default, frequency deviation phenomenon and timing deviation caused by working temperature can be avoided, the same clock pulse signals can be ensured to be obtained in a plurality of intelligent products connected into the same power supply network, the purpose of synchronously controlling the plurality of intelligent products can be realized, and the intelligent household requirements can be met. In addition, independent communication modules do not need to be configured for each intelligent product, cost can be reduced, product size miniaturization is facilitated, and the problem that the consistency of synchronous control is influenced due to communication interference can be avoided.

Description

Circuit for generating clock pulse signal based on alternating current
Technical Field
The invention belongs to the technical field of synchronous control, and particularly relates to a circuit for generating a clock pulse signal based on alternating current.
Background
In an intelligent home, a plurality of products are more and more intelligent, namely, corresponding intelligent functions can be realized by operating intelligent programs built in the products. However, in the running process of the intelligent program, a crystal oscillator circuit unit is generally required to provide a clock pulse signal with a constant frequency, if more than 2 intelligent household products, such as intelligent lamps, are to be controlled synchronously, and a household has multiple lamps, if the brightness or color change of the lamps is to be controlled synchronously, the following technical problems will exist: (1) if an independent communication module (such as an RS232 interface or a WiFi wireless communication module) is configured for each smart home product, and the communication modules are used to control the cooperative work of multiple products, the product cost and volume will be undoubtedly increased; (2) if these smart home products do not have an independent communication module, then only the crystal oscillator circuit unit in the product can be relied on to perform accurate timing (i.e. provide a clock pulse signal), and synchronous control is realized based on the same clock pulse signal, but in the practical application process, because the change of temperature can lead to the crystal oscillator to generate a frequency deviation phenomenon, the clock pulse signals in each product have differences, and further the synchronization between the products is no longer possible. Therefore, it is necessary to provide a technical solution that is low in cost and easy to perform synchronous control on multiple smart home products.
Disclosure of Invention
In order to solve the above problems in the prior art, the present invention is directed to a circuit that can be disposed in a smart home product and generates a clock signal based on an alternating current.
The technical scheme adopted by the invention is as follows:
a circuit for generating a clock pulse signal based on alternating current comprises a rectifying circuit unit, a voltage-stabilizing filter circuit unit, a first current-limiting branch circuit unit, a first voltage-stabilizing diode, a second voltage-stabilizing diode, a first resistor, a second resistor and a first field effect transistor, wherein the input end of the rectifying circuit unit is used for leading in alternating current, the output end of the rectifying circuit unit is electrically connected with the input end of the voltage-stabilizing filter circuit unit, the output end of the voltage-stabilizing filter circuit unit is used for leading out direct current, the stabilizing voltage of the first voltage-stabilizing diode is higher than that of the second voltage-stabilizing diode, and the difference between the stabilizing voltages of the first voltage-stabilizing diode and the second voltage-stabilizing diode is higher than the starting voltage of the first field effect transistor;
one end of the first current-limiting branch unit is electrically connected with the output end of the rectifying circuit unit, the other end of the first current-limiting branch unit is electrically connected with the cathode of the first voltage-stabilizing diode and the cathode of the second voltage-stabilizing diode respectively, the anode of the second voltage-stabilizing diode is electrically connected with one end of the first resistor and the grid of the first field-effect tube respectively, and the drain of the first field-effect tube is electrically connected with one end of the second resistor and serves as a first clock pulse signal output end;
direct current voltage is led in from the other end of the second resistor, and the source electrode of the first field effect transistor, the other end of the first resistor and the anode of the first voltage stabilizing diode are grounded respectively.
Preferably, the voltage stabilizing filter circuit unit comprises a diode and an electrolytic capacitor, wherein the anode of the diode is used as the input end of the voltage stabilizing filter circuit unit;
and the cathode of the diode is electrically connected with the anode of the electrolytic capacitor and is used as the output end of the voltage-stabilizing filter circuit unit, and the cathode of the electrolytic capacitor is grounded.
Preferably, the high-frequency filter circuit further comprises a first high-frequency filter branch unit connected with the first current-limiting branch unit in series.
Preferably, the device further comprises a first capacitor connected in parallel with the first resistor.
Preferably, the first field effect transistor is an NMOS transistor with the model number of SN 7002.
The other technical scheme adopted by the invention is as follows:
a circuit for generating a clock pulse signal based on alternating current comprises a rectifying circuit unit, a voltage-stabilizing filter circuit unit, a second current-limiting branch circuit unit, a third resistor, a first diode, a third voltage-stabilizing diode and a voltage comparator, wherein the input end of the rectifying circuit unit is used for leading in alternating current, the output end of the rectifying circuit unit is electrically connected with the input end of the voltage-stabilizing filter circuit unit, and the output end of the voltage-stabilizing filter circuit unit is used for leading out direct current;
one end of the second current-limiting branch unit and one end of the third current-limiting branch unit are respectively and electrically connected with the output end of the rectifier circuit unit, the other end of the second current-limiting branch unit is respectively and electrically connected with one end of the third resistor and the first input end of the voltage comparator, the other end of the third current-limiting branch unit is electrically connected with the anode of the first diode, the cathode of the first diode is respectively and electrically connected with the cathode of the third voltage-stabilizing diode and the second input end of the voltage comparator, and the output end of the voltage comparator is used as a second clock pulse signal output end;
and a VCC pin of the voltage comparator leads in direct-current voltage, and a GND pin of the voltage comparator, the other end of the third resistor and the anode of the third voltage stabilizing diode are respectively grounded.
The optimized resistor also comprises a second field effect transistor and a fourth resistor;
the grid electrode of the second field effect transistor is electrically connected with the output end of the voltage comparator, and the drain electrode of the second field effect transistor is electrically connected with one end of the fourth resistor and serves as a third clock pulse signal output end;
the other end of the fourth resistor is led in direct current voltage, and the source electrode of the second field effect transistor is grounded.
Further optimized, the device also comprises a photoelectric coupler and a fifth resistor;
the positive electrode of a light emitting source of the photoelectric coupler is electrically connected with one end of the fourth resistor, the negative electrode of the light emitting source of the photoelectric coupler is electrically connected with the drain electrode of the second field effect transistor, and the positive electrode of a light receiver of the photoelectric coupler is electrically connected with one end of the fifth resistor and serves as a fourth clock pulse signal output end;
the other end of the fifth resistor is led in direct current voltage, and the negative electrode of a light receiver of the photoelectric coupler is grounded.
Preferably, the power supply further comprises a second high-frequency filtering branch unit and/or a low-frequency filtering branch unit connected in series with the second current-limiting branch unit.
Preferably, a second capacitor and/or a zener diode with an anode grounded are connected in parallel between two ends of the third resistor, and a third capacitor is connected in parallel between a cathode and an anode of the third zener diode.
The invention has the beneficial effects that:
(1) the invention provides a novel circuit for converting alternating current signals in a power supply network into frequency multiplication clock pulse signals, and further the novel circuit can be used as input signals of units such as counting/timing circuits and the like in an intelligent product after being arranged in the intelligent product, so that a crystal oscillator circuit unit can be designed by default, frequency deviation and timing deviation caused by working temperature can be avoided, the same clock pulse signals can be ensured to be obtained in a plurality of intelligent products connected into the same power supply network, the purpose of synchronously controlling the plurality of intelligent products can be realized, and the intelligent household requirements can be met;
(2) after the circuit is arranged in a plurality of intelligent products of the synchronous control system, an independent communication module is not required to be configured for each intelligent product, so that the cost can be reduced, the miniaturization of the product volume is facilitated, and the influence on the consistency of the synchronous control function due to communication interference factors can be avoided;
(3) the circuit also has the advantages of stable work, wide application range, simple structure, easy realization and the like, and is convenient for practical popularization and application.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a circuit diagram of a first method for generating a clock signal based on an alternating current according to the present invention.
Fig. 2 is a waveform diagram of electrical signals at a plurality of nodes in a first ac-based clock signal generation circuit according to the present invention.
Fig. 3 is a circuit diagram of a second circuit for generating a clock signal based on ac power according to the present invention.
Detailed Description
The invention is further described with reference to the following figures and specific embodiments. It should be noted that the description of the embodiments is provided to help understanding of the present invention, but the present invention is not limited thereto.
The term "and/or" herein is merely an association describing an associated object, meaning that three relationships may exist, e.g., a and/or B, may mean: a exists alone, B exists alone, and A and B exist at the same time, and the term "/and" is used herein to describe another association object relationship, which means that two relationships may exist, for example, A/and B, may mean: a alone, and both a and B alone, and further, the character "/" in this document generally means that the former and latter associated objects are in an "or" relationship.
Example one
As shown in fig. 1 and 2, the first circuit for generating a clock pulse signal based on ac power provided by this embodiment includes a rectifier circuit unit, a voltage stabilizing filter circuit unit, a first current limiting branch unit, a first voltage stabilizing diode DZ1, a second voltage stabilizing diode DZ2, a first resistor R1, a second resistor R2, and a first field effect transistor Q1, wherein, the input end VIN of the rectification circuit unit is used for leading in alternating current, the output end of the rectification circuit unit is electrically connected with the input end of the voltage-stabilizing filter circuit unit, the output terminal VOUT of the voltage stabilizing filter circuit unit is used for leading out direct current, the stabilizing voltage of the first voltage stabilizing diode DZ1 is higher than the stabilizing voltage of the second voltage stabilizing diode DZ2, the difference between the stable voltages of the first zener diode DZ1 and the second zener diode DZ2 is higher than the turn-on voltage of the first field effect transistor Q1; one end of the first current-limiting branch unit is electrically connected with the output end of the rectifier circuit unit, the other end of the first current-limiting branch unit is electrically connected with the cathode of the first zener diode DZ1 and the cathode of the second zener diode DZ2 respectively, the anode of the second zener diode DZ2 is electrically connected with one end of the first resistor R1 and the gate of the first field-effect transistor Q1 respectively, and the drain of the first field-effect transistor Q1 is electrically connected with one end of the second resistor R2 and serves as a first clock pulse signal output end Pout 1; the other end of the second resistor R2 leads in a direct current voltage VCC, and the source electrode of the first field effect transistor Q1, the other end of the first resistor R1 and the anode of the first voltage-stabilizing diode DZ1 are respectively grounded.
As shown in fig. 1 and 2, in the first circuit configuration for generating a clock signal based on an alternating current, the rectifier circuit unit is used to convert the alternating current into a "steamed bun" -shaped waveform (VD in fig. 2) with a positive voltage overall, which may be, but is not limited to, the diode rectifier bridge DB1 as shown in fig. 1. The voltage stabilizing and filtering circuit unit is used for stabilizing and filtering the waveform of the 'steamed bun' shape to obtain stable and pure direct current so as to provide electric energy for a power supply module in an intelligent product. The first current limiting branch unit is used for current limiting, and may be, but not limited to, a plug-in resistor R11 (the resistance of which is usually set to be more than 1M ohm) as shown in fig. 1 or a series branch formed by connecting at least 2 chip resistors in series, and since the first current limiting branch unit generally needs to bear a voltage greater than 311V, and the chip resistors are limited by withstand voltage, a plug-in resistor is preferably used.
Since the first zener diode DZ1 is connected in parallel with the second zener diode DZ2 and the first resistor R1 connected in series, since the regulated voltage (20V for example as shown in fig. 1) of the first zener diode DZ1 is higher than the regulated voltage (16V for example as shown in fig. 1) of the second zener diode DZ2, when the first zener diode DZ1 is in the regulated state, the terminal voltage of the first resistor R1 is equal to the difference between the regulated voltages of the first zener diode DZ1 and the second zener diode DZ2 (i.e., VGS may be equal to 4V), and since the terminal voltage is higher than the turn-on voltage of the first fet Q1 (generally not more than 2V), the drain-source electrode of the first fet Q1 can be brought into the saturation conduction state, and a low level is output at the first clock pulse signal output terminal Pout 1. On the contrary, when the terminal voltage of the first resistor R1 is lower than the turn-on voltage of the first fet Q1, the drain-source of the first fet Q1 is turned off, and the high VCC is output at the first clock pulse signal output terminal Pout 1.
As can be seen from the waveform diagrams of the electrical signals at the nodes in the circuit shown in fig. 2, finally, a square wave pulse signal with a constant frequency (the frequency of the square wave pulse signal is twice the frequency of the alternating current) can be output at the first clock pulse signal output terminal Pout1, so that the square wave pulse signal can be used as an input signal of a unit such as a counting/timing circuit in an intelligent product to realize a counting or timing function. Therefore, after the circuit is arranged in an intelligent product, a crystal oscillator circuit unit can be designed by default, frequency deviation phenomenon and timing deviation caused by working temperature are avoided, the same clock pulse signal can be obtained in a plurality of intelligent products connected to the same power supply network, the purpose of synchronously controlling the plurality of intelligent products is facilitated, and the intelligent household requirement is met. In addition, after the circuit is arranged in a plurality of intelligent products of the synchronous control system, an independent communication module does not need to be configured for each intelligent product, so that the cost can be reduced, the product size can be miniaturized, and the influence on the consistency of the synchronous control function caused by communication interference factors can be avoided.
Preferably, the voltage regulation filter circuit unit comprises a diode D11 and an electrolytic capacitor C11, wherein the anode of the diode D11 is used as the input end of the voltage regulation filter circuit unit; the cathode of the diode D11 is electrically connected with the anode of the electrolytic capacitor C11 and serves as the output end of the voltage-stabilizing filter circuit unit, and the cathode of the electrolytic capacitor C11 is grounded. As shown in fig. 1, the diode D11 is used to isolate the electrolytic capacitor C11 from the reverse flow of dc power. The electrolytic capacitor C11 is used to filter out ac signals so that stable and clean dc can be obtained, which may be, but is not limited to, an aluminum electrolytic capacitor.
Preferably, the high-frequency filter circuit further comprises a first high-frequency filter branch unit connected with the first current-limiting branch unit in series. As shown in fig. 1, the first high-frequency filtering branch unit is configured to suppress a high-frequency electrical signal (i.e., an interference signal) from flowing to the first resistor R1, so as to improve the anti-interference capability of the circuit, which may be, but is not limited to, an inductive element or a magnetic bead element.
Preferably, the device further comprises a first capacitor C1 connected with the first resistor R1 in parallel. As shown in fig. 1, by providing the first capacitor C1, the interference signal in the terminal voltage of the first resistor R1 can be filtered out, so as to further improve the interference immunity of the circuit, which may be, but is not limited to, a ceramic capacitor.
Optimally, the first field effect transistor Q1 can be but is not limited to an NMOS transistor with model number SN 7002. The NMOS transistor has the starting voltage of about 2V generally, so that the design requirement can be met. In addition, other devices with reference voltage can be used instead, such as a TL 431 device (a three-terminal adjustable shunt reference source with good thermal stability).
In summary, the first circuit for generating a clock pulse signal based on an alternating current provided by this embodiment has the following technical effects:
(1) the embodiment provides a novel circuit for converting an alternating current signal in a power supply network into a frequency multiplication clock pulse signal, so that after the novel circuit is arranged in an intelligent product, the output clock pulse signal can be used as an input signal of units such as a counting/timing circuit and the like in the intelligent product, therefore, a crystal oscillator circuit unit can be designed by default, frequency deviation and timing deviation caused by working temperature can be avoided, the same clock pulse signal can be ensured to be obtained in a plurality of intelligent products connected into the same power supply network, the purpose of synchronously controlling the plurality of intelligent products can be realized, and the intelligent household requirement can be met;
(2) after the circuit is arranged in a plurality of intelligent products of the synchronous control system, an independent communication module is not required to be configured for each intelligent product, so that the cost can be reduced, the miniaturization of the product volume is facilitated, and the influence on the consistency of the synchronous control function due to communication interference factors can be avoided;
(3) the circuit also has the advantages of strong anti-interference capability, flexible applicability, simple structure, easy realization and the like, and is convenient for practical popularization and application.
Example two
As shown in fig. 3, the present embodiment provides another circuit for generating a clock signal based on an alternating current, which is different from the first embodiment in that: the rectifier circuit comprises a rectifier circuit unit, a voltage-stabilizing filter circuit unit, a second current-limiting branch circuit unit, a third resistor R3, a first diode D1, a third voltage-stabilizing diode DZ3 and a voltage comparator U1, wherein an input end VIN of the rectifier circuit unit is used for leading in alternating current, an output end of the rectifier circuit unit is electrically connected with an input end of the voltage-stabilizing filter circuit unit, and an output end VOUT of the voltage-stabilizing filter circuit unit is used for leading out direct current; one end of the second current-limiting branch unit and one end of the third current-limiting branch unit are respectively electrically connected to an output end of the rectifier circuit unit, the other end of the second current-limiting branch unit is respectively electrically connected to one end of the third resistor R3 and the first input end of the voltage comparator U1, the other end of the third current-limiting branch unit is electrically connected to an anode of the first diode D1, a cathode of the first diode D1 is respectively electrically connected to a cathode of the third voltage-stabilizing diode DZ3 and the second input end of the voltage comparator U1, and an output end of the voltage comparator U1 is used as a second clock pulse signal output end Pout 2; the VCC pin of the voltage comparator U1 leads in a direct current voltage VCC, and the GND pin of the voltage comparator U1, the other end of the third resistor R3 and the anode of the third voltage-stabilizing diode DZ3 are respectively grounded.
As shown in fig. 3, in the second circuit structure for generating a clock pulse signal based on alternating current, the functions and circuit structures of the rectifier circuit unit and the voltage stabilizing filter circuit unit are the same as those of the corresponding circuit unit in the first embodiment, and are not described herein again. The functions and circuit structures of the second current-limiting branch unit and the third current-limiting branch unit are the same as those of the first current-limiting branch unit in the first embodiment, and are not described herein again.
The third resistor R3 is used to provide a first comparison level for the first INPUT of the voltage comparator U1 (i.e., the INPUT + pin shown in fig. 3). The first diode D1 is used as an isolation diode and the third zener diode is used to provide a second comparison level to the second INPUT terminal (i.e., INPUT-pin as shown in fig. 3) of the voltage comparator U1. The voltage comparator U1 is used for outputting the following levels according to the comparison result of the two comparison levels: (1) when the cathode voltage of the third zener diode DZ3 is lower than the terminal level of the third resistor R3, a high level is OUTPUT at the OUTPUT terminal of the voltage comparator U1 (i.e., the OUTPUT pin shown in fig. 3); (2) when the cathode voltage of the third zener diode DZ3 is higher than the terminal level of the third resistor R3, a low level is output at the output terminal of the voltage comparator U1. A square-wave pulse signal can thus also be obtained as a clock pulse signal for a processing chip running the smart program. In addition, the voltage comparator U1 may be, but is not limited to, an operational amplifier based voltage comparison circuit.
Therefore, the present embodiment has the same technical effects as the first embodiment, and the description thereof is omitted. In addition, one end of the third resistor R3 and the cathode of the third zener diode DZ3 may be alternately electrically connected to the INPUT + pin and the INPUT-pin of the voltage comparator U1.
Preferably, the device also comprises a second field effect transistor Q2 and a fourth resistor R4; the gate of the second field effect transistor Q2 is electrically connected to the output terminal of the voltage comparator U1, and the drain of the second field effect transistor Q2 is electrically connected to one end of the fourth resistor R4 and serves as a third clock pulse signal output terminal Pout 3; the other end of the fourth resistor R4 is led into direct current voltage VCC, and the source electrode of the second field effect transistor Q2 is grounded. As shown in fig. 3, the second fet Q2 is used to amplify the initially generated square-wave pulse signal to provide a clock pulse signal with a larger current requirement, so as to meet the working requirement of the processing chip.
Further optimized, the device also comprises a photoelectric coupler U2 and a fifth resistor R5; the positive electrode of the light emitting source of the photoelectric coupler U2 is electrically connected with one end of the fourth resistor R4, the negative electrode of the light emitting source of the photoelectric coupler U2 is electrically connected with the drain electrode of the second field-effect tube Q2, and the positive electrode of the light receiver of the photoelectric coupler U2 is electrically connected with one end of the fifth resistor R5 and serves as a fourth clock pulse signal output end Pout 4; the other end of the fifth resistor R5 is led in a direct current voltage VCC, and the negative electrode of the light receiver of the photoelectric coupler U2 is grounded. As shown in fig. 3, the input pin of the processing chip that needs to be connected to the square pulse signal can be protected by the photoelectric isolation of the photocoupler U2. For example, when a processing chip running an intelligent program is located on the secondary side of the power transformer, the input pin of the processing chip needs to be electrically connected to the fourth clock pulse signal output terminal Pout 4; and in other cases, the second clock pulse signal output terminal Pout2 or the third clock pulse signal output terminal Pout3 can be electrically connected, so that the use can be flexible, and the applicability is greatly improved.
Preferably, the power supply further comprises a second high-frequency filtering branch unit and/or a low-frequency filtering branch unit connected in series with the second current-limiting branch unit. As shown in fig. 3, the function and circuit structure of the second high-frequency filtering branch unit are the same as those of the first high-frequency filtering branch unit in the first embodiment, and are not described herein again. The low-frequency filtering branch unit is used for filtering low-frequency signals and further improving the anti-interference capability, and a voltage stabilizing diode with a stable voltage of more than 10V can be adopted, so that the terminal voltage of the third resistor R3 cannot change when the amplitude of interference signals is less than 10V.
Preferably, a second capacitor C2 and/or a zener diode with its anode grounded are connected in parallel between two ends of the third resistor R3, and a third capacitor C3 is connected in parallel between the cathode and the anode of the third zener diode DZ 3. As shown in fig. 3, the second capacitor C2 and/or the zener diode with grounded anode are provided, so as to filter low-frequency interference signals, and ensure that no interference signals exist at the first input terminal of the voltage comparator, compared with the first embodiment, thereby further improving the interference rejection capability, wherein the second capacitor C2 may preferably adopt a ceramic capacitor with a capacitance value of 100 nF. Similarly, by providing the third capacitor C3, in addition to providing a stable reference voltage for the second input terminal of the voltage comparator U1, the interference rejection capability is further improved by filtering an interference signal; the third capacitor C3 may also preferably be a ceramic capacitor with a capacitance of 100 nF.
The technical effect of the present embodiment is the same as that of the first embodiment, and is not described herein again.
The present invention is not limited to the above-described alternative embodiments, and various other forms of products can be obtained by anyone in light of the present invention. The above detailed description should not be taken as limiting the scope of the invention, which is defined in the claims, and which the description is intended to be interpreted accordingly.

Claims (10)

1. A circuit for generating a clock signal based on alternating current, comprising: the high-voltage power supply comprises a rectifying circuit unit, a voltage-stabilizing filter circuit unit, a first current-limiting branch circuit unit, a first voltage-stabilizing diode (DZ1), a second voltage-stabilizing diode (DZ2), a first resistor (R1), a second resistor (R2) and a first field-effect transistor (Q1), wherein the input end (V2) of the rectifying circuit unitIN) For introducing an alternating current, said machineThe output end of the current circuit unit is electrically connected with the input end of the voltage stabilizing filter circuit unit, and the output end (V) of the voltage stabilizing filter circuit unitOUT) For deriving a direct current, the regulated voltage of the first zener diode (DZ1) being higher than the regulated voltage of the second zener diode (DZ2), the difference between the regulated voltages of the first (DZ1) and second (DZ2) zener diodes being higher than the turn-on voltage of the first field effect transistor (Q1);
one end of the first current limiting branch unit is electrically connected with the output end of the rectifier circuit unit, the other end of the first current limiting branch unit is electrically connected with the cathode of the first voltage stabilizing diode (DZ1) and the cathode of the second voltage stabilizing diode (DZ2) respectively, the anode of the second voltage stabilizing diode (DZ2) is electrically connected with one end of the first resistor (R1) and the grid of the first field effect transistor (Q1) respectively, and the drain of the first field effect transistor (Q1) is electrically connected with one end of the second resistor (R2) and serves as a first clock pulse signal output end (P2)out1)；
The other end of the second resistor (R2) is connected with a direct current voltage (V)CC) The source of the first field effect transistor (Q1), the other end of the first resistor (R1) and the anode of the first zener diode (DZ1) are respectively grounded.
2. A circuit for generating a clock signal based on alternating current as claimed in claim 1, characterized in that: the voltage-stabilizing filter circuit unit comprises a diode (D11) and an electrolytic capacitor (C11), wherein the anode of the diode (D11) is used as the input end of the voltage-stabilizing filter circuit unit;
the cathode of the diode (D11) is electrically connected with the anode of the electrolytic capacitor (C11) and used as the output end of the voltage-stabilizing filter circuit unit, and the cathode of the electrolytic capacitor (C11) is grounded.
3. A circuit for generating a clock signal based on alternating current as claimed in claim 1, characterized in that: the first high-frequency filtering branch unit is connected with the first current limiting branch unit in series.
4. A circuit for generating a clock signal based on alternating current as claimed in claim 1, characterized in that: also included is a first capacitor (C1) connected in parallel with the first resistor (R1).
5. A circuit for generating a clock signal based on alternating current as claimed in claim 1, characterized in that: the first field effect transistor (Q1) adopts an NMOS transistor with the model number of SN 7002.
6. A circuit for generating a clock signal based on alternating current, comprising: the high-voltage power supply comprises a rectifying circuit unit, a voltage stabilizing filter circuit unit, a second current limiting branch circuit unit, a third resistor (R3), a first diode (D1), a third voltage stabilizing diode (DZ3) and a voltage comparator (U1), wherein the input end (V1) of the rectifying circuit unitIN) The output end of the rectifying circuit unit is electrically connected with the input end of the voltage stabilizing filter circuit unit, and the output end (V) of the voltage stabilizing filter circuit unitOUT) Used for leading out direct current;
one end of the second current-limiting branch unit and one end of the third current-limiting branch unit are respectively and electrically connected with the output end of the rectifier circuit unit, the other end of the second current-limiting branch unit is respectively and electrically connected with one end of a third resistor (R3) and the first input end of a voltage comparator (U1), the other end of the third current-limiting branch unit is electrically connected with the anode of a first diode (D1), the cathode of the first diode (D1) is respectively and electrically connected with the cathode of a third voltage-stabilizing diode (DZ3) and the second input end of the voltage comparator (U1), and the output end of the voltage comparator (U1) is used as a second clock pulse signal output end (P)out2)；
The VCC pin of the voltage comparator (U1) introduces a direct current voltage (V)CC) The GND pin of the voltage comparator (U1), the other end of the third resistor (R3) and the anode of the third zener diode (DZ3) are respectively grounded.
7. The alternating current-based clock signal generation circuit of claim 6, wherein: the device also comprises a second field effect transistor (Q2) and a fourth resistor (R4);
the gate of the second field effect transistor (Q2) is electrically connected with the output end of the voltage comparator (U1), and the drain of the second field effect transistor (Q2) is electrically connected with one end of the fourth resistor (R4) and is used as a third clock pulse signal output end (P4)out3)；
The other end of the fourth resistor (R4) is connected with a direct current voltage (V)CC) And the source electrode of the second field effect transistor (Q2) is grounded.
8. A circuit for generating a clock signal based on alternating current as claimed in claim 7, wherein: the circuit also comprises a photoelectric coupler (U2) and a fifth resistor (R5);
the positive electrode of a light emitting source of the photoelectric coupler (U2) is electrically connected with one end of the fourth resistor (R4), the negative electrode of the light emitting source of the photoelectric coupler (U2) is electrically connected with the drain electrode of the second field effect transistor (Q2), the positive electrode of a light receiver of the photoelectric coupler (U2) is electrically connected with one end of the fifth resistor (R5) and serves as a fourth clock pulse signal output end (P)out4)；
The other end of the fifth resistor (R5) is connected with a direct current voltage (V)CC) And the negative electrode of the light receiver of the photoelectric coupler (U2) is grounded.
9. The alternating current-based clock signal generation circuit of claim 6, wherein: the second high-frequency filtering branch unit and/or the low-frequency filtering branch unit are/is connected with the second current-limiting branch unit in series.
10. A circuit for generating a clock signal on the basis of alternating current according to claim 6, characterized in that a second capacitor (C2) and/or a zener diode with its anode grounded is connected in parallel between the two ends of the third resistor (R3), and a third capacitor (C3) is connected in parallel between the cathode and the anode of the third zener diode (DZ 3).
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CN110191549B (en) * 2019-07-04 2021-03-09 浙江阳光美加照明有限公司 LED (light emitting diode) accurate timing switch lamp and accurate timing drive circuit thereof
CN111277125A (en) * 2020-03-11 2020-06-12 中国建设银行股份有限公司 Direct-current power supply filter assembly and direct-current power supply filter circuit
CN113950183A (en) * 2021-09-16 2022-01-18 杭州博联智能科技股份有限公司 Synchronous control method and system for lighting equipment

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2907077Y (en) * 2006-04-27 2007-05-30 广东天际电器有限公司 Power supply module
TW201212542A (en) * 2010-09-13 2012-03-16 Mstar Semiconductor Inc Regulated protection circuit, display controller and LED driving method of the same
CN105392246A (en) * 2014-08-29 2016-03-09 美格纳半导体有限公司 Circuit and method for correcting a power factor for an AC direct lighting apparatus
CN206181501U (en) * 2016-11-25 2017-05-17 黄晓允 Self -powered light operator
EP3171671A1 (en) * 2011-06-08 2017-05-24 Macroblock, Inc. Ac-dc dual-use led driving circuit
CN107172765A (en) * 2017-07-12 2017-09-15 谷沛耕 LED drive circuit of the AC input High Power Factor without stroboscopic
CN108233707A (en) * 2016-12-13 2018-06-29 罗姆股份有限公司 DC/DC converters and its controller, the electronic equipment of nonisulated type

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2907077Y (en) * 2006-04-27 2007-05-30 广东天际电器有限公司 Power supply module
TW201212542A (en) * 2010-09-13 2012-03-16 Mstar Semiconductor Inc Regulated protection circuit, display controller and LED driving method of the same
EP3171671A1 (en) * 2011-06-08 2017-05-24 Macroblock, Inc. Ac-dc dual-use led driving circuit
CN105392246A (en) * 2014-08-29 2016-03-09 美格纳半导体有限公司 Circuit and method for correcting a power factor for an AC direct lighting apparatus
CN206181501U (en) * 2016-11-25 2017-05-17 黄晓允 Self -powered light operator
CN108233707A (en) * 2016-12-13 2018-06-29 罗姆股份有限公司 DC/DC converters and its controller, the electronic equipment of nonisulated type
CN107172765A (en) * 2017-07-12 2017-09-15 谷沛耕 LED drive circuit of the AC input High Power Factor without stroboscopic

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
An ac-dc single-stage full-bridge PWM converter with bridgeless input;Pritam Das;《 2009 IEEE Energy Conversion Congress and Exposition》;20090924;全文 *
基于光耦的交流过零信号产生电路;梁湖辉;《电脑知识与技术》;20160526;第12卷(第11期);全文 *

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