CN102856916A - Reactive power control method and circuit of single-phase photovoltaic inverter - Google Patents

Reactive power control method and circuit of single-phase photovoltaic inverter Download PDF

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Publication number
CN102856916A
CN102856916A CN2012101042267A CN201210104226A CN102856916A CN 102856916 A CN102856916 A CN 102856916A CN 2012101042267 A CN2012101042267 A CN 2012101042267A CN 201210104226 A CN201210104226 A CN 201210104226A CN 102856916 A CN102856916 A CN 102856916A
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circuit
power switch
output
switch pipe
pwm
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CN102856916B (en
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崔大龙
郭海亚
邢波
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Beijing Kinglong New Energy Technology Co Ltd
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Beijing Kinglong New Energy Technology Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/56Power conversion systems, e.g. maximum power point trackers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/30Reactive power compensation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/40Arrangements for reducing harmonics

Abstract

The invention discloses a reactive power control circuit of a single-phase photovoltaic inverter. The reactive power control circuit comprises a bus voltage supporting capacitor, a single-phase full-bridge inversion circuit, a filtering inductor, an EMC (Electro Magnetic Compatibility) filtering circuit, a sampling circuit, a power switch pipe driving circuit and a DSP (Digital Signal Processor), wherein the DSP consists of a PLL (Phase Locked Loop) control module, a voltage outer ring PI control module, a current inner ring PI feedforward control module and a sinusoidal PWM (Pulse-Width Modulation) wave sending control module, and an input signal of the sinusoidal PWM wave sending control module of the DSP further includes a current inner ring current given amount Ig. The invention further provides a reactive power control method of the single-phase photovoltaic inverter. The method not only can be used for judging whether the voltage Uac of a power grid is larger than zero, and comparing the absolute value of a PWM wave sending control input modulation wave Upwm with a given triangular carrier wave Uc, but also can be used for judging whether the given current inner ring current amount Ig is larger than zero. Not only can the conduction loss of a power switching tube be reduced, and the conversion efficiency of the inverter is improved, but also the current waveform can be continuous, an output harmonic wave is reduced, and the pollution on a harmonic wave of a power grid is reduced.

Description

A kind of single-phase photovoltaic DC-to-AC converter powerless control method and circuit
Technical field
The present invention relates to the photovoltaic new energy field, be specifically related to a kind of single-phase photovoltaic DC-to-AC converter powerless control method and circuit, can be applicable to the idle control of single-phase photovoltaic DC-to-AC converter of any power stage, also can be applied to the static passive compensation device of single phase circuit.
Background technology
Along with photovoltaic generation proportion in the electrical network distribution network systems is gradually large, photovoltaic generation also all the more becomes large to the harmonic pollution of electrical network, and the quality of power supply of electrical network has also been caused impact; And in large-scale distribution system, other power consumption equipments inevitably cause harmonic pollution to electrical network.For these harmonic pollutions, reactive power compensation can be good at solving the harmonic pollution of a part of electrical network.With respect to the photovoltaic inverting system that does not have no-power compensation function, photovoltaic inverting system with reactive power compensation function for alleviate the electrical network burden, to improve power supply quality significant, therefore reactive power compensation also seems all the more important at photovoltaic generating system, and then becomes a criterion of photovoltaic DC-to-AC converter.
Figure 1A is the system construction drawing that the idle control circuit of most of single-phase photovoltaic DC-to-AC converter adopts, and the powerless control method that the present invention introduces and two kinds of existing powerless control methods of comparing with it all are based on the system construction drawing shown in Figure 1A and make comparisons.
Shown in Figure 1A, the idle control circuit of single-phase photovoltaic DC-to-AC converter comprises busbar voltage Support Capacitor, single-phase full bridge inverter circuit, filter inductance, EMC filter circuit, sample circuit, power switch tube drives circuit and DSP;
Wherein,
The busbar voltage Support Capacitor comprises the first capacitor C 1; The positive pole of the first capacitor C 1 links to each other with the first input end of single-phase full bridge inverter circuit, and voltage is DC bus-bar voltage Ubus herein; The negative pole of the first capacitor C 1 links to each other with the second input of single-phase full bridge inverter circuit;
The single-phase full bridge inverter circuit is used for realizing that direct current is to the inversion control of alternating current, it comprises four IGBT switching tubes---the first power switch pipe T1, the second power switch pipe T2, the 3rd power switch pipe T3, the 4th power switch pipe T4, and four diodes---the first diode D1, the second diode D2, the 3rd diode D3, the 4th diode D4;
Wherein, described four diodes---the first diode D1, the second diode D2, the 3rd diode D3, the 4th diode D4 are connected anti-parallel to respectively described four IGBT switching tubes---the two ends of the first power switch pipe T1, the second power switch pipe T2, the 3rd power switch pipe T3, the 4th power switch pipe T4; Namely the first diode D1 is connected anti-parallel to the two ends of the first power switch pipe T1; The second diode D2 is connected anti-parallel to the two ends of the second power switch pipe T2; The 3rd diode D3 is connected anti-parallel to the two ends of three power switch pipe T3; The 4th diode D4 is connected anti-parallel to the two ends of the 4th power switch pipe T4;
Described four IGBT switching tubes---the first power switch pipe T1, the second power switch pipe T2, the 3rd power switch pipe T3, the 4th power switch pipe T4 have respectively one source pole and a drain electrode; The positive pole of described the first capacitor C 1 links to each other with the drain electrode of described the first power switch pipe T1, the drain electrode of described the 3rd power switch pipe T3; The negative pole of described the first capacitor C 1 links to each other with the source electrode of described second switch pipe T2, the source electrode of described the 4th switch transistor T 4;
After the drain electrode of the source electrode of described the first switch transistor T 1 and described second switch pipe T2 is electrical connected, as the first output of described single-phase full bridge inverter circuit; After the drain electrode of the source electrode of described the 3rd switch transistor T 3 and described the 4th switch transistor T 4 is electrical connected, as the second output of described single-phase full bridge inverter circuit;
Filter inductance comprises the first inductance L 1, the second inductance L 2; The first end of the first inductance L 1 links to each other with the first output of single-phase full bridge inverter circuit; The first end of the second inductance L 2 links to each other with the second output of single-phase full bridge inverter circuit; The second end of the first inductance L 1 links to each other with the first input end of EMC circuit filtering circuit; The second end of the second inductance L 2 links to each other with the second input of EMC circuit filtering circuit;
The sample circuit (not shown) is used for sample detecting, comprises three input pins, links to each other with the first input end of single-phase full bridge inverter circuit, the first input end of EMC circuit filtering circuit and the first output of EMC circuit filtering circuit respectively; The sample circuit (not shown) also comprises three output pins, links to each other with three input pins of DSP respectively, exports respectively following signal: DC bus-bar voltage Ubus, line voltage Uac, power network current Iac;
DSP (Digital Signal Processor, digital signal processor) comprises PLL (Phase Locked Logic, phase-locked loop) control module, outer voltage PI control module, current inner loop PI feedfoward control module and sine pulse width modulation (PWM) (Pulse Width Modulation, pulse width modulation) send out the ripple control module
The input of PLL control module is line voltage Uac, the PLL control module is output as and line voltage Uac locking phase scaled value sin (ω t+ θ), wherein, θ is the phase angle deviation between power network current Iac and the line voltage Uac, and (θ=0 o'clock power network current Iac phase place Complete Synchronization is in line voltage Uac phase place; θ added idle control at 0 o'clock);
Idle control is based on the control of the phase angle deviation between power network current Iac and the line voltage Uac, not having idle when control is that phase angle between requirement power network current Iac and the line voltage Uac is consistent, and idle control then requires the certain deviation θ of phase angle maintenance between power network current Iac and the line voltage Uac;
The input signal that the sine pulse width modulation (PWM) of DSP is sent out the ripple control module comprises that PWM sends out ripple control inputs modulating wave Upwm, line voltage Uac, given triangular carrier Uc; The output that the sine pulse width modulation (PWM) of DSP is sent out the ripple control module is four road pwm signal PWM1 ', PWM2 ', PWM3 ', PWM4 ';
DSP comprises three input pins, inputs respectively following signal: DC bus-bar voltage Ubus, line voltage Uac, power network current Iac; DSP comprises four output pins, exports respectively four road pwm signal PWM1 ', PWM2 ', PWM3 ', PWM4 ';
Described power switch tube drives circuit comprises four input pins, and it links to each other respectively with four output pins of DSP; Described power switch tube drives circuit comprises four PWM output pins: a PWM output pin, the 2nd PWM output pin, the 3rd PWM output pin, the 4th PWM output pin, its with described single-phase full bridge inverter circuit in four IGBT switching tubes---the grid of the first power switch pipe T1, the second power switch pipe T2, the 3rd power switch pipe T3, the 4th power switch pipe T4 links to each other respectively, respectively output pwm signal PWM1, PWM2, PWM3, PWM4; The first power switch pipe T1, the second power switch pipe T2, the second power switch pipe T3, the 4th power switch pipe T4 that PWM1, PWM2, PWM3, PWM4 control respectively the single-phase full bridge inverter circuit carry out inversion;
The power switch tube drives circuit is exported four road pulse width modulated waves, and the single-phase full bridge inverter circuit is controlled; When certain PWM output pin of power switch tube drives circuit is low level, be equivalent to certain PWM output pin output digit signals 0 of power switch tube drives circuit, that coupled power switch pipe of grid is cut-off state, disconnects; When certain PWM output pin of power switch tube drives circuit is high level, be equivalent to certain PWM output pin output digit signals 1 of power switch tube drives circuit, that coupled power switch pipe of grid is conducting state.
For three-phase inverter, the reactive power compensation ratio is easier to realize; But, just relatively harsher concerning single-phase photovoltaic DC-to-AC converter.
At present, single-phase photovoltaic DC-to-AC converter mainly adopts single-phase full bridge formula voltage source type inverter.The common control method to single-phase photovoltaic DC-to-AC converter is to use the switching signal that is produced by Sine Wave Pulse Width Modulation to go turning on and off of power ratio control switching device.The single-phase photovoltaic DC-to-AC converter control method of this employing Sine Wave Pulse Width Modulation can be used for reactive power compensation.
Single-phase photovoltaic DC-to-AC converter powerless control method commonly used mainly contains two kinds of technical schemes at present; Wherein, technical scheme is the bipolarity powerless control method just like shown in Fig. 2 A, Fig. 2 B, Fig. 2 C; Technical scheme two is general unipolarity powerless control method shown in Fig. 3 A, Fig. 3 B, Fig. 3 C.
1, bipolarity powerless control method
1.1 the content of technical scheme one---bipolarity powerless control method:
The prior art directly related with the present invention is the bipolarity powerless control method just like shown in Fig. 2 A, Fig. 2 B, Fig. 2 C.
Adopt the system construction drawing shown in Figure 1A, ambipolar control method adds phase angle departure θ when PLL is synchronous, carry out idle control.
Fig. 2 A is prior art one---the PWM of bipolarity powerless control method sends out the schematic flow diagram of ripple; Referring to Fig. 2 A, sinusoidal modulation wave Upwm and given bipolarity triangular carrier Uc are made comparisons: when sinusoidal modulation wave Upwm is in positive half cycle, in the part of sinusoidal modulation wave Upwm more than or equal to given bipolarity triangular carrier Uc, power switch pipe T1, T4 conducting, T2, T3 turn-off, in the part of sinusoidal modulation wave Upwm less than given bipolarity triangular carrier Uc, power switch pipe T2, T3 conducting, T1, T4 turn-off; When sinusoidal modulation wave Upwm is in negative half period, adopt similar processing method---in the part of sinusoidal modulation wave Upwm more than or equal to given bipolarity triangular carrier Uc, power switch pipe T1, T4 conducting, T2, T3 turn-off, in the part of sinusoidal modulation wave Upwm less than given bipolarity triangular carrier Uc, power switch pipe T2, T3 conducting, T1, T4 turn-off.
Send out in the ripple controlling unit at PWM, concrete PWM sends out the ripple mode shown in Fig. 2 B.Fig. 2 B is prior art one---the PWM of bipolarity powerless control method sends out the waveform schematic diagram of ripple; Wherein, the longitudinal axis is voltage magnitude, and transverse axis is time t, and Uc is given bipolarity triangular carrier, and Upwm is sinusoidal modulation wave.
Wherein, given bipolarity triangular carrier Uc is configured by the PWM control register in DSP, adopts the triangular waveform of rise and fall symmetry, will be configured according to the difference of used each DSP as for concrete configuration.
Greater than zero the time, current waveform can find out that from Fig. 2 C the electric current phase angle is ahead of line voltage under the idle control model of bipolarity shown in Fig. 2 C at phase angle departure θ.Fig. 2 C is prior art one---the line voltage Uac of bipolarity powerless control method and the waveform schematic diagram of power network current Iac.
1.2 the shortcoming of prior art one
On the one hand, the bipolarity control mode can be good at solving the control of reactive power compensating, but the defective of this technical scheme is: the device for power switching switching loss is very large, and useful life is short, has especially reduced the efficient of inverter;
Can find out from Fig. 2 C, the bipolarity powerless control method is in the cycle of each given bipolarity triangular carrier Uc, 4 power switch pipe T1, T2, T3, T4 have conducting to turn-off generation, switching loss is large during power switch pipe work, useful life is short, for the efficient of whole inverter certain impact is arranged.
2, general unipolarity powerless control method
2.2 the content of technical scheme two---general unipolarity powerless control method
The prior art two directly related with the present invention is general unipolarity powerless control method shown in Fig. 3 A, Fig. 3 B, Fig. 3 C.
General unipolarity powerless control method, also be to adopt the system construction drawing shown in Figure 1A, when PLL is synchronous, add phase angle departure θ, different from the bipolarity modulation system is to send out in the ripple controlling unit different at PWM, concrete PWM sends out the ripple mode shown in Fig. 3 B, and Fig. 3 B is prior art two---and the PWM of general unipolarity powerless control method sends out the waveform schematic diagram of ripple; Wherein, given triangular carrier Uc is configured by the PWM control register in DSP, adopts the triangular waveform of rise and fall symmetry, will be configured according to the difference of used each DSP as for concrete configuration.
Fig. 3 A is prior art two---the PWM of general unipolarity powerless control method sends out the schematic flow diagram of ripple;
Wherein, when sinusoidal modulation wave Upwm is in positive half cycle, power switch pipe T1, the complementation of T3 low frequency, the T1 conducting, T2, T3 turn-off,---wherein, in the part of sinusoidal modulation wave Upwm more than or equal to triangular carrier Uc, T4 conducting; In the part of sinusoidal modulation wave Upwm less than triangular carrier Uc, power switch pipe T4 turn-offs;
When sinusoidal modulation wave Upwm is in negative half period, shown in dotted line among Fig. 3 A, this moment, sinusoidal modulation wave Upwm got its absolute value, power switch pipe T1, the complementation of T3 low frequency, T1 turn-offs, the T3 conducting, and T4 turn-offs---wherein, in the absolute value of the sinusoidal modulation wave Upwm part more than or equal to triangular carrier Uc, power switch pipe T2 turn-offs; In the absolute value of the sinusoidal modulation wave Upwm part less than triangular carrier Uc, power switch pipe T2 conducting.
Greater than zero the time, current waveform is shown in Fig. 3 C under the idle control model of bipolarity at phase angle departure θ.Fig. 3 C is prior art two---the line voltage Uac of general unipolarity powerless control method and the waveform schematic diagram of power network current Iac.Can find out that from Fig. 3 C power network current Iac phase place is ahead of line voltage Uac.
2.3 the shortcoming of prior art two
Can be found out that by Fig. 3 C used unipolar control mode also has himself defective at ordinary times: can near electric network reactive-load control, cause current distortion, be unfavorable for Reactive Power Control, cause easily harmonic pollution in electric power net.
The single-phase photovoltaic DC-to-AC converter output power network current Iac of the idle control of unipolarity, although phase place is ahead of line voltage Uac, but: the part that is ahead of line voltage Uac phase place in power network current Iac phase place, the power network current waveform is discontinuous, distortion is arranged, can cause certain harmonic pollution to electrical network like this.
2.4 analyze the shortcoming of prior art two
Fig. 3 D is single-phase grid-connected inverter output relation figure.For single-phase grid-connected inverter, can regard single-phase inverter itself as a voltage source and add an impedance, then link to each other with electrical network.
Can regard voltage source Uinv as at operating each state constantly of single-phase grid-connected inverter and add impedance Z and connect with voltage source Ug, shown in Fig. 3 D, wherein Z is the inverter internal impedance.The amplitude of suitable adjusting Uinv and with respect to the phase place of electrical network Ug, just can make the inverter absorption or send the reactive current that meets the demands, realize dynamic passive compensation, its essence is and utilize inverter output voltage and the pressure reduction of line voltage in inverter output impedance to form required reactive power compensation electric current, realize the energy exchange of inverter and electrical network, control inverter realizes absorbing or sending reactive power.
The generation of reactive power mainly is energy mutually exchange between electrical network and inverter, adopt such as Fig. 3 A and the described unipolar control of Fig. 3 B, inverter can only be to the electrical network conveying capacity, and can not absorb power grid energy, so cause the current waveform distortion shown in Fig. 3 C.
3. brief summary:
In sum, deficiency for powerless control method in the prior art, large for the switching loss that overcomes existing single-phase photovoltaic DC-to-AC converter powerless control method, wave distortion serious, to defectives such as harmonic pollution in electric power net are large, propose a kind ofly can reduce the power switch pipe conduction loss, improve the inverter conversion efficiency, can make again current waveform continuously, reduce output harmonic wave, reduce the single-phase photovoltaic DC-to-AC converter powerless control method to the harmonic pollution of electrical network, become current problem demanding prompt solution.
Summary of the invention
The object of the invention is to, deficiency for existing single-phase photovoltaic DC-to-AC converter powerless control method, and a kind of single-phase photovoltaic DC-to-AC converter powerless control method is proposed, it is realized with the idle control circuit of a kind of single-phase photovoltaic DC-to-AC converter, the present invention can reduce the power switch pipe conduction loss, improve the inverter conversion efficiency, can make again current waveform continuously, reduce output harmonic wave, reduce the harmonic pollution to electrical network.
For achieving the above object, the present invention discloses following technical scheme:
The present invention discloses the idle control circuit of a kind of single-phase photovoltaic DC-to-AC converter,
It comprises busbar voltage Support Capacitor, single-phase full bridge inverter circuit, filter inductance, EMC filter circuit, sample circuit, power switch tube drives circuit and DSP;
Wherein,
The busbar voltage Support Capacitor comprises the first electric capacity; The positive pole of the first electric capacity links to each other with the first input end of single-phase full bridge inverter circuit; The negative pole of the first electric capacity links to each other with the second input of single-phase full bridge inverter circuit;
The single-phase full bridge inverter circuit, it comprises four IGBT switching tubes---the first power switch pipe, the second power switch pipe, the 3rd power switch pipe, the 4th power switch pipe, and four diodes---the first diode, the second diode, the 3rd diode, the 4th diode; Wherein, described four diodes---the first diode, the second diode, the 3rd diode, the 4th diode is connected anti-parallel to respectively described four IGBT switching tubes---the two ends of the first power switch pipe, the second power switch pipe, the 3rd power switch pipe, the 4th power switch pipe; Namely the first diode reverse is parallel to the two ends of the first power switch pipe; The second diode reverse is parallel to the two ends of the second power switch pipe; The 3rd diode reverse is parallel to the two ends of three power switch pipes; The 4th diode reverse is parallel to the two ends of the 4th power switch pipe; Described four IGBT switching tubes---the first power switch pipe, the second power switch pipe, the 3rd power switch pipe, the 4th power switch pipe has respectively one source pole and a drain electrode; The positive pole of described the first electric capacity links to each other with the drain electrode of described the first power switch pipe, the drain electrode of described the 3rd power switch pipe; The negative pole of described the first electric capacity links to each other with the source electrode of described second switch pipe, the source electrode of described the 4th switching tube; After the drain electrode of the source electrode of described the first switching tube and described second switch pipe is electrical connected, as the first output of described single-phase full bridge inverter circuit; After the drain electrode of the source electrode of described the 3rd switching tube and described the 4th switching tube is electrical connected, as the second output of described single-phase full bridge inverter circuit;
Filter inductance comprises the first inductance, the second inductance; The first end of the first inductance links to each other with the first output of single-phase full bridge inverter circuit; The first end of the second inductance links to each other with the second output of single-phase full bridge inverter circuit; The second end of the first inductance links to each other with the first input end of EMC circuit filtering circuit; The second end of the second inductance links to each other with the second input of EMC circuit filtering circuit;
Sample circuit comprises three input pins, links to each other with the first input end of single-phase full bridge inverter circuit, the first input end of EMC circuit filtering circuit and the first output of EMC circuit filtering circuit respectively; Sample circuit also comprises three output pins, links to each other with three input pins of DSP respectively, exports respectively following signal: DC bus-bar voltage Ubus, line voltage Uac, power network current Iac;
DSP comprises that PLL control module, outer voltage PI control module, current inner loop PI feedfoward control module and sine pulse width modulation (PWM) send out the ripple control module,
Wherein, the input of PLL control module is line voltage Uac, and the PLL control module is output as and line voltage Uac locking phase scaled value sin (ω t+ θ), and wherein, θ is the phase angle deviation between power network current Iac and the line voltage Uac;
The input that sine pulse width modulation (PWM) is sent out the ripple control module comprises that PWM sends out ripple control inputs modulating wave Upwm, line voltage Uac, given triangular carrier Uc; The output that sine pulse width modulation (PWM) is sent out the ripple control module is four road pwm signal PWM1 ', PWM2 ', PWM3 ', PWM4 ';
DSP comprises three input pins, inputs respectively following signal: DC bus-bar voltage Ubus, line voltage Uac, power network current Iac; DSP comprises four output pins, exports respectively four road pwm signal PWM1 ', PWM2 ', PWM3 ', PWM4 ';
Described power switch tube drives circuit comprises four input pins, and it links to each other respectively with four output pins of DSP; Described power switch tube drives circuit comprises four PWM output pins, its with described single-phase full bridge inverter circuit in four IGBT switching tubes---the grid of the first power switch pipe, the second power switch pipe, the 3rd power switch pipe, the 4th power switch pipe links to each other respectively, respectively output pwm signal PWM1, PWM2, PWM3, PWM4;
Wherein:
In the idle control circuit of described single-phase photovoltaic DC-to-AC converter, the input of the outer voltage PI control module of DSP is the difference of DC bus-bar voltage Ubus and DC bus-bar voltage control specified rate Ubus ', and the output of outer voltage PI control module is outer voltage output variable Im;
In the idle control circuit of described single-phase photovoltaic DC-to-AC converter, the input of the current inner loop PI feedfoward control module of DSP is the difference of current inner loop given value of current amount Ig and power network current Iac; Wherein, described current inner loop given value of current amount Ig=Im*sin (ω t+ θ); The output of current inner loop PI feedfoward control module is U1;
In the idle control circuit of described single-phase photovoltaic DC-to-AC converter, the output that the sine pulse width modulation (PWM) of DSP is sent out the ripple control module is four road pwm signal PWM1 ', PWM2 ', PWM3 ', PWM4 '; The input that the sine pulse width modulation (PWM) of DSP is sent out the ripple control module comprises that PWM sends out ripple control inputs modulating wave Upwm, line voltage Uac, given triangular carrier Uc; Wherein, described PWM sends out ripple control inputs modulating wave Upwm, be the output U1 of current inner loop PI feedfoward control module and line voltage Uac and;
In the idle control circuit of described single-phase photovoltaic DC-to-AC converter, the described PWM that sends out one of the input signal of ripple control module as the sine pulse width modulation (PWM) of DSP sends out ripple control inputs modulating wave Upwm, be current inner loop PI feedfoward control module output U1 and line voltage Uac's and;
The input signal that the sine pulse width modulation (PWM) of DSP is sent out the ripple control module also comprises current inner loop given value of current amount Ig.
The idle control circuit of described single-phase photovoltaic DC-to-AC converter also comprises photovoltaic battery array, Boost booster circuit;
Wherein, the Boost booster circuit comprises the 3rd inductance, the 5th power switch pipe, the 5th diode and the 6th diode; Wherein, the 5th diode reverse is parallel to the 5th power switch pipe; The first end of the 3rd inductance links to each other with the first end of photovoltaic battery array; The second end of the 3rd inductance links to each other with the positive pole of the drain electrode of the 5th power switch pipe and the 6th diode; The source ground of the 5th power switch pipe as the second input of Boost booster circuit, links to each other with the second end of photovoltaic battery array, simultaneously, as the second output of Boost booster circuit, links to each other with the second input of single-phase full bridge inverter circuit; The grid of the 5th power switch pipe is controlled by the 5th PWM output pin of power switch tube drives circuit; The negative pole of the 6th diode is the first output of Boost booster circuit, links to each other with the first input end of single-phase full bridge inverter circuit;
The first output of Boost booster circuit links to each other with the first input end of the positive pole of the first electric capacity and single-phase full bridge inverter circuit; The second output of Boost booster circuit links to each other with the second input of the negative pole of the first electric capacity and single-phase full bridge inverter circuit;
In the idle control circuit of described single-phase photovoltaic DC-to-AC converter, sample circuit also comprises three input pins, respectively with the first end of photovoltaic battery array, Boost booster circuit in the first end of the 3rd inductance link to each other with the second end; Sample circuit also comprises two output pins, links to each other with two input pins of DSP respectively;
In the idle control circuit of described single-phase photovoltaic DC-to-AC converter, DSP also comprises two input pins: input respectively photovoltaic battery array output voltage U pv, photovoltaic battery array output current Ipv; DSP also comprises the 5th output pin, output pwm signal: PWM5 ';
In the idle control circuit of described single-phase photovoltaic DC-to-AC converter, described power switch tube drives circuit also comprises the 5th input pin, and it links to each other with the 5th output pin of DSP; Described power switch tube drives circuit comprises the 5th PWM output pin, its with described photovoltaic DC-to-AC converter in the 5th IGBT switching tube---the grid of the 5th power switch pipe links to each other, output pwm signal PWM5; The 5th power switch pipe in the PWM control Boost booster circuit;
In the idle control circuit of described single-phase photovoltaic DC-to-AC converter, DSP also comprises MPPT module, the Boost PI control module of boosting,
Wherein, the input of MPPT module is photovoltaic battery array output voltage U pv and photovoltaic battery array output current Ipv, and the output of MPPT module is MPPT voltage disturbance specified rate Upv ';
The boost input of PI control module of Boost is the poor of photovoltaic battery array output voltage U pv and MPPT voltage disturbance specified rate Upv ', and the boost output of PI control module of Boost is PWM5 '.
The present invention also discloses a kind of single-phase photovoltaic DC-to-AC converter powerless control method, and its sine pulse width modulation (PWM) with the DSP of the idle control circuit of described single-phase photovoltaic DC-to-AC converter is sent out the ripple control module and realized that described single-phase photovoltaic DC-to-AC converter powerless control method may further comprise the steps:
Whether step S401, set up if judge line voltage Uac>=0---set up, then forward step S402a to, if be false, then forward step S402b to;
Whether step S402a, set up if judge current inner loop given value of current amount Ig>=0---set up, then forward step S403a to, if be false, then forward step S403b to;
Whether step S402b, set up if judge current inner loop given value of current amount Ig>=0---set up, then forward step S404a to, if be false, then forward step S404b to;
Step S403a, relatively PWM sends out the absolute value of ripple control inputs modulating wave Upwm and given triangular carrier Uc, if judge | and whether Upwm|>=Uc sets up---and set up, then forward step S405a to, if be false, then forward step S405b to;
Step S403b, relatively PWM sends out the absolute value of ripple control inputs modulating wave Upwm and given triangular carrier Uc, if judge | and whether Upwm|>=Uc sets up---and set up, then forward step S406a to, if be false, then forward step S406b to;
Step S404b, relatively PWM sends out the absolute value of ripple control inputs modulating wave Upwm and given triangular carrier Uc, if judge | and whether Upwm|>=Uc sets up---and set up, then forward step S407a to, if be false, then forward step S407b to;
Step S404a, relatively PWM sends out the absolute value of ripple control inputs modulating wave Upwm and given triangular carrier Uc, if judge | and whether Upwm|>=Uc sets up---and set up, then forward step S408a to, if be false, then forward step S408b to;
Four road pwm signals are respectively PWM1 '=1 among the step S405a, PWM2 '=0, and PWM3 '=0, finish afterwards PWM4 '=1;
Four road pwm signals are respectively PWM1 '=1 among the step S405b, PWM2 '=0, and PWM3 '=0, finish afterwards PWM4 '=0;
Four road pwm signals are respectively PWM1 '=0 among the step S406a, PWM2 '=0, and PWM3 '=0, finish afterwards PWM4 '=0;
Four road pwm signals are respectively PWM1 '=0 among the step S406b, PWM2 '=0, and PWM3 '=1, finish afterwards PWM4 '=0;
Four road pwm signals are respectively PWM1 '=0 among the step S407a, PWM2 '=1, and PWM3 '=1, finish afterwards PWM4 '=0;
Four road pwm signals are respectively PWM1 '=0 among the step S407b, PWM2 '=0, and PWM3 '=1, finish afterwards PWM4 '=0;
Four road pwm signals are respectively PWM1 '=0 among the step S408a, PWM2 '=0, and PWM3 '=0, finish afterwards PWM4 '=0;
Four road pwm signals are respectively PWM1 '=1 among the step S408b, PWM2 '=0, and PWM3 '=0, finish afterwards PWM4 '=0.
Beneficial effect of the present invention is, a kind of single-phase photovoltaic DC-to-AC converter powerless control method is proposed, it is realized with the idle control circuit of a kind of single-phase photovoltaic DC-to-AC converter, the present invention can reduce the power switch pipe conduction loss, improve the inverter conversion efficiency, can make again current waveform continuously, reduce output harmonic wave, reduce the harmonic pollution to electrical network.
Description of drawings
In order to make the purpose, technical solutions and advantages of the present invention clearer, below in conjunction with the drawings and specific embodiments, be described in more detail with other technical characterictic and advantage the present invention is above-mentioned.
Figure 1A is the system configuration schematic diagram of prior art one and the two idle control circuits of single-phase photovoltaic DC-to-AC converter that adopt;
Figure 1B is the system configuration schematic diagram of the idle control circuit of single-phase photovoltaic DC-to-AC converter that adopts of the present invention program;
Fig. 2 A is prior art---the PWM of a bipolarity powerless control method sends out the schematic flow diagram of ripple;
Fig. 2 B is prior art---the PWM of a bipolarity powerless control method sends out the waveform schematic diagram of ripple;
Fig. 2 C is prior art---the line voltage Uac of a bipolarity powerless control method and the waveform schematic diagram of power network current Iac;
Fig. 3 A is prior art two---the PWM of general unipolarity powerless control method sends out the schematic flow diagram of ripple;
Fig. 3 B is prior art two---the PWM of general unipolarity powerless control method sends out the waveform schematic diagram of ripple;
Fig. 3 C is prior art two---the line voltage Uac of general unipolarity powerless control method and the waveform schematic diagram of power network current Iac;
Fig. 3 D is single-phase grid-connected inverter output relation figure;
Fig. 4 A is the schematic flow diagram that the PWM of single-phase photovoltaic DC-to-AC converter powerless control method of the present invention sends out ripple;
Fig. 4 B is the waveform schematic diagram that the PWM of single-phase photovoltaic DC-to-AC converter powerless control method of the present invention sends out ripple;
Fig. 4 C is the line voltage Uac of single-phase photovoltaic DC-to-AC converter powerless control method of the present invention and the waveform schematic diagram of power network current Iac (visible electric current I ac leading voltage phase place Uac);
Fig. 5 is, single-phase full bridge inverter circuit in the idle control circuit of single-phase photovoltaic DC-to-AC converter shown in Figure 1A, the single-phase photovoltaic DC-to-AC converter powerless control method of employing shown in Fig. 4 A, Fig. 4 B, two kinds of circuit working patterns in line voltage Uac positive half period, under the operating state (1) of Ig>=0 (arrow is the flow direction of electric current under the state for this reason);
Fig. 5 A is the equivalent electric circuit (arrow is the flow direction of electric current under the state for this reason) of the first circuit working pattern-operating state (S405b) of operating state (1);
Fig. 5 B is the equivalent electric circuit (arrow is the flow direction of electric current under the state for this reason) of the second circuit working pattern-operating state (S405a) of operating state (1);
Fig. 6 is the single-phase full bridge inverter circuit in the idle control circuit of single-phase photovoltaic DC-to-AC converter shown in Figure 1A, the single-phase photovoltaic DC-to-AC converter powerless control method of employing shown in Fig. 4 A, Fig. 4 B, two kinds of circuit working patterns in line voltage Uac positive half period, under the operating state (2) of Ig<0 (arrow is the flow direction of electric current under the state for this reason);
Fig. 6 A is the equivalent electric circuit (arrow is the flow direction of electric current under the state for this reason) of the first circuit working pattern-operating state (S406b) of operating state (2);
Fig. 6 B is the equivalent electric circuit (arrow is the flow direction of electric current under the state for this reason) of the second circuit working pattern-operating state (S406a) of operating state (2);
Fig. 7 is the single-phase full bridge inverter circuit in the idle control circuit of single-phase photovoltaic DC-to-AC converter shown in Figure 1A, the single-phase photovoltaic DC-to-AC converter powerless control method of employing shown in Fig. 4 A, Fig. 4 B is in line voltage Uac negative half-cycle, two kinds of circuit working patterns of the operating state (S404a) of Ig<0 (arrow is the flow direction of electric current under the state for this reason);
Fig. 7 A is the equivalent electric circuit (arrow is the flow direction of electric current under the state for this reason) of the first circuit working pattern-operating state (S407b) of operating state (S404a);
Fig. 7 B is the equivalent electric circuit (arrow is the flow direction of electric current under the state for this reason) of the second circuit working pattern-operating state (S407a) of operating state (S404a);
Fig. 8 is the single-phase full bridge inverter circuit in the idle control circuit of single-phase photovoltaic DC-to-AC converter shown in Figure 1A, the single-phase photovoltaic DC-to-AC converter powerless control method of employing shown in Fig. 4 A, Fig. 4 B is in line voltage Uac negative half-cycle, two kinds of circuit working patterns of the operating state (S404b) of Ig>=0 (arrow is the flow direction of electric current under the state for this reason);
Fig. 8 A is the equivalent electric circuit (arrow is the flow direction of electric current under the state for this reason) of the first circuit working pattern-operating state (S408b) of operating state (S404b);
Fig. 8 B is the equivalent electric circuit (arrow is the flow direction of electric current under the state for this reason) of the first circuit working pattern-operating state (S408a) of operating state (S404b).
Embodiment
Below in conjunction with accompanying drawing the specific embodiment of the present invention is described in further detail.It should be noted that execution mode according to powerless control method of the present invention as just example, but the invention is not restricted to this embodiment.
The invention discloses a kind of single-phase photovoltaic DC-to-AC converter powerless control method, is a kind of high efficiency, high performance powerless control method take digitized signal processor (DSP) as core.The present invention can effectively utilize sun generating, and simultaneous adaptation can realize Reactive Power Control in the new requirement of being incorporated into the power networks, and lowers the harmonic pollution to electrical network.
System construction drawing as shown in Figure 1B is the system configuration schematic diagram of the idle control circuit of single-phase photovoltaic DC-to-AC converter of the present invention.
As shown in Figure 1B, the direct current of photovoltaic cell plate array is by after the DC filter filtering, be interchange by the single-phase full bridge inverter circuit by dc inversion, send on the electrical network through alternating current filter filtering again, wherein: its at sample circuit to dc voltage, electric current, AC voltage, after electric current is sampled, carry out the system voltage outer shroud, current inner loop control, simultaneously ac voltage signal is carried out the synchronizing signal of phase-locked controlled system, outer voltage controller output signal Im and synchronized signal, the sinusoidal wave reference instruction Ig=Imsin (wt+ θ) of idle controlled quentity controlled variable θ (phase deviation instruction) polymer fabric side, the sinusoidal wave reference instruction Ig of current on line side and current on line side value of feedback Iac subtracted each other obtain the current deviation signal, adopt simultaneously the dead beat PI control principle with electric voltage feed forward to control, the PWM modulation generating unit of DSP is exported four road pulse width modulated waves, finally is input to H bridge-type full-bridge (T1, T2, T3, T4) control in the inverter circuit.
Figure 1B is the system configuration schematic diagram of the idle control circuit of single-phase photovoltaic DC-to-AC converter that adopts of the present invention program;
Figure 1B part identical with Figure 1A repeats no more referring to the background technology part.
The part that Figure 1B is different with Figure 1A has:
The idle control circuit of single-phase photovoltaic DC-to-AC converter also comprises photovoltaic battery array, Boost booster circuit;
Wherein, the Boost booster circuit comprises the 3rd inductance L 3, the 5th power switch pipe T5, the 5th diode D5 and the 6th diode D6; Wherein, the 5th diode D5 is connected anti-parallel to the 5th power switch pipe T5; The first end of the 3rd inductance L 3 links to each other with the first end of photovoltaic battery array; The second end of the 3rd inductance L 3 links to each other with the positive pole of the drain electrode of the 5th power switch pipe T5 and the 6th diode D6; The source ground of the 5th power switch pipe T5 as the second input of Boost booster circuit, links to each other with the second end of photovoltaic battery array, simultaneously, as the second output of Boost booster circuit, links to each other with the second input of single-phase full bridge inverter circuit; The grid of the 5th power switch pipe T5 is controlled by the 5th PWM output pin of power switch tube drives circuit; The negative pole of the 6th diode D6 is the first output of Boost booster circuit, links to each other with the first input end of single-phase full bridge inverter circuit, and voltage is DC bus-bar voltage Ubus herein;
Boost booster circuit part among Figure 1B can be omitted its dispensable technical characterictic.
The busbar voltage Support Capacitor comprises the first capacitor C 1; The positive pole of the first capacitor C 1 links to each other with the first output of Boost booster circuit and the first input end of single-phase full bridge inverter circuit; The negative pole of the first capacitor C 1 links to each other with the second output of Boost booster circuit and the second input of single-phase full bridge inverter circuit;
As shown in Figure 1B, in the idle control circuit of single-phase photovoltaic DC-to-AC converter, the sample circuit (not shown) also comprises three input pins, respectively with the first end of photovoltaic battery array, Boost booster circuit in the first end of the 3rd inductance L 3 link to each other with the second end; The sample circuit (not shown) also comprises two output pins, links to each other with two input pins of DSP respectively;
As shown in Figure 1B, in the idle control circuit of single-phase photovoltaic DC-to-AC converter, DSP also comprises two input pins: input respectively photovoltaic battery array output voltage U pv, photovoltaic battery array output current Ipv; DSP also comprises the 5th output pin, output pwm signal: PWM5 ';
As shown in Figure 1B, described power switch tube drives circuit also comprises the 5th input pin, and it links to each other with the 5th output pin of DSP; Described power switch tube drives circuit comprises the 5th PWM output pin, its with described photovoltaic DC-to-AC converter in the 5th IGBT switching tube---the grid of the 5th power switch pipe T5 links to each other, output pwm signal PWM5; The 5th power switch pipe T5 in the PWM5 control Boost booster circuit;
As shown in Figure 1B, in the idle control circuit of single-phase photovoltaic DC-to-AC converter, DSP also comprises MPPT (Maximum Power Point Tracking, MPPT maximum power point tracking) module, the Boost PI control module of boosting,
Wherein, the input of MPPT module is photovoltaic battery array output voltage U pv and photovoltaic battery array output current Ipv, and the output of MPPT module is MPPT voltage disturbance specified rate Upv ';
The boost input of PI control module 101 of Boost is the poor of photovoltaic battery array output voltage U pv and MPPT voltage disturbance specified rate Upv ', and the boost output of PI control module 101 of Boost is PWM5 ';
The input of PLL control module is line voltage Uac, the PLL control module is output as and line voltage Uac locking phase scaled value sin (ω t+ θ), wherein, θ is the phase angle deviation between power network current Iac and the line voltage Uac, and (θ=0 o'clock power network current Iac phase place Complete Synchronization is in line voltage Uac phase place; θ added idle control at 0 o'clock);
The input of outer voltage PI control module is the difference of DC bus-bar voltage Ubus and DC bus-bar voltage control specified rate Ubus ', and the output of outer voltage PI control module is outer voltage output variable Im;
The input of current inner loop PI feedfoward control module is the difference of current inner loop given value of current amount Ig and power network current Iacc; Wherein, described current inner loop given value of current amount Ig=Im*sin (ω t+ θ) is the product of the output Im of outer voltage PI control module and the output sin of PLL control module (ω t+ θ); The output of current inner loop PI feedfoward control module is U1, sends out ripple control inputs modulating wave Upwm for generation of PWM;
The output that the sine pulse width modulation (PWM) of DSP is sent out the ripple control module is four road pwm signal PWM1 ', PWM2 ', PWM3 ', PWM4 ';
The input signal that the sine pulse width modulation (PWM) of DSP is sent out the ripple control module comprises that PWM sends out ripple control inputs modulating wave Upwm, line voltage Uac, given triangular carrier Uc; Wherein, described PWM sends out ripple control inputs modulating wave Upwm, be the output U1 of current inner loop PI feedfoward control module and line voltage Uac and;
The input signal that the sine pulse width modulation (PWM) of DSP is sent out the ripple control module also comprises current inner loop given value of current amount Ig; Wherein, Ig is used as in the present invention net side sine pulse width modulation (PWM) and sends out the ripple reference instruction, be used for DSP and control each pwm signal of the grid of each IGBT switching tube of exporting to the single-phase full bridge inverter circuit by the power switch tube drives circuit, and then control the switch of each IGBT switching tube; Can say that Ig is by current inner loop PI feedfoward control module controls Upwm;
When photovoltaic battery array output voltage U pv is lower or higher, by the boost control of PI control module, outer voltage PI control module of MPPT module, Boost, make DC bus-bar voltage Ubus be controlled in a given magnitude of voltage place, send out simultaneously the control of ripple control module by current inner loop PI feedfoward control module, PLL control module, sine pulse width modulation (PWM), circular current specified rate Ig in the generation current;
When the phase angle deviation θ between power network current Iac and the line voltage Uac is zero, current inner loop given value of current amount Ig and line voltage Uac homophase, when phase angle deviation θ is non-vanishing, current inner loop given value of current amount Ig and line voltage Uac be homophase not, certain phase angle deviation is arranged, send reactive power;
Idle control is based on the control of the phase angle deviation between power network current Iac and the line voltage Uac, not having idle when control is that phase angle between requirement power network current Iac and the line voltage Uac is consistent, idle control then requires the phase angle between power network current Iac and the line voltage Uac to keep certain deviation θ, can realize control so add phase angle departure θ in current inner loop given value of current amount Ig=Im*sin (ω t+ θ) when current inner loop is controlled.
In a word, the place that the present invention is different from above-mentioned two kinds of prior art schemes also is to send out in the ripple controlling unit at PWM to embody---the present invention adds the corresponding phase deviation instruction of the reactive power amount θ that will control at current regulator, circular current specified rate Ig=Imsin (wt+ θ) in the resultant current is as the sinusoidal wave reference instruction of current on line side.The sinusoidal wave reference instruction Ig of current on line side subtracted each other with current on line side value of feedback Iac obtain the current deviation signal, simultaneously employing has the dead beat PI control principle of electric voltage feed forward and controls.
Fig. 4 A is the schematic flow diagram that the PWM of single-phase photovoltaic DC-to-AC converter powerless control method of the present invention sends out ripple; It may further comprise the steps:
Whether step S401, set up if judge Uac>=0---set up, then forward step S402a to, if be false, then forward step S402b to;
Whether step S402a, set up if judge Ig>=0---set up, then forward step S403a to, if be false, then forward step S403b to;
Whether step S402b, set up if judge Ig>=0---set up, then forward step S404a to, if be false, then forward step S404b to;
Step S403a, relatively PWM sends out the absolute value of ripple control inputs modulating wave Upwm and given triangular carrier Uc, if judge | and whether Upwm|>=Uc sets up---and set up, then forward step S405a to, if be false, then forward step S405b to;
Step S403b, relatively PWM sends out the absolute value of ripple control inputs modulating wave Upwm and given triangular carrier Uc, if judge | and whether Upwm|>=Uc sets up---and set up, then forward step S406a to, if be false, then forward step S406b to;
Step S404b, relatively PWM sends out the absolute value of ripple control inputs modulating wave Upwm and given triangular carrier Uc, if judge | and whether Upwm|>=Uc sets up---and set up, then forward step S407a to, if be false, then forward step S407b to;
Step S404a, relatively PWM sends out the absolute value of ripple control inputs modulating wave Upwm and given triangular carrier Uc, if judge | and whether Upwm|>=Uc sets up---and set up, then forward step S408a to, if be false, then forward step S408b to;
Four road pwm signals are respectively PWM1 '=1 among the step S405a, PWM2 '=0, and PWM3 '=0, finish afterwards PWM4 '=1;
Four road pwm signals are respectively PWM1 '=1 among the step S405b, PWM2 '=0, and PWM3 '=0, finish afterwards PWM4 '=0;
Four road pwm signals are respectively PWM1 '=0 among the step S406a, PWM2 '=0, and PWM3 '=0, finish afterwards PWM4 '=0;
Four road pwm signals are respectively PWM1 '=0 among the step S406b, PWM2 '=0, and PWM3 '=1, finish afterwards PWM4 '=0;
Four road pwm signals are respectively PWM1 '=0 among the step S407a, PWM2 '=1, and PWM3 '=1, finish afterwards PWM4 '=0;
Four road pwm signals are respectively PWM1 '=0 among the step S407b, PWM2 '=0, and PWM3 '=1, finish afterwards PWM4 '=0;
Four road pwm signals are respectively PWM1 '=0 among the step S408a, PWM2 '=0, and PWM3 '=0, finish afterwards PWM4 '=0;
Four road pwm signals are respectively PWM1 '=1 among the step S408b, PWM2 '=0, and PWM3 '=0, finish afterwards PWM4 '=0.
Wherein, given triangular carrier Uc is symmetrical, is configured by the PWM control register in DSP, adopts the triangular waveform of rise and fall symmetry, will be configured according to the difference of used each DSP as for concrete configuration.
Shown in Figure 1A and Figure 1B:
When PWM1 '=0, the first output pin of DSP is low level, and it links to each other with the first input pin of power switch tube drives circuit; Thereby the first output pin PWM1 of power switch tube drives circuit also is low level, and then the first coupled power switch pipe T1 of grid is cut-off state;
When PWM1 '=1, the first output pin of DSP is high level, and it links to each other with the first input pin of power switch tube drives circuit; Thereby the first output pin PWM1 of power switch tube drives circuit also is high level, and then the first coupled power switch pipe T1 of grid is conducting state;
When PWM2 '=0, the second output pin of DSP is low level, and it links to each other with the second input pin of power switch tube drives circuit; Thereby the second output pin PWM2 of power switch tube drives circuit also is low level, and then the second coupled power switch pipe T2 of grid is cut-off state;
When PWM2 '=1, the second output pin of DSP is high level, and it links to each other with the second input pin of power switch tube drives circuit; Thereby the second output pin PWM2 of power switch tube drives circuit also is high level, and then the second coupled power switch pipe T2 of grid is conducting state;
When PWM3 '=0, the 3rd output pin of DSP is low level, and it links to each other with the 3rd input pin of power switch tube drives circuit; Thereby the 3rd output pin PWM3 of power switch tube drives circuit also is low level, and then the 3rd coupled power switch pipe T3 of grid is cut-off state;
When PWM3 '=1, the 3rd output pin of DSP is high level, and it links to each other with the 3rd input pin of power switch tube drives circuit; Thereby the 3rd output pin PWM3 of power switch tube drives circuit also is high level, and then the 3rd coupled power switch pipe T3 of grid is conducting state;
When PWM4 '=0, the 4th output pin of DSP is low level, and it links to each other with the 4th input pin of power switch tube drives circuit; Thereby the 4th output pin PWM4 of power switch tube drives circuit also is low level, and then the 4th coupled power switch pipe T4 of grid is cut-off state;
When PWM4 '=1, the 4th output pin of DSP is high level, and it links to each other with the 4th input pin of power switch tube drives circuit; Thereby the 4th output pin PWM4 of power switch tube drives circuit also is high level, and then the 4th coupled power switch pipe T4 of grid is conducting state.
As seen, compare with the prior art scheme, method of the present invention can effectively solve simultaneously conducting, and the quantity of the IGBT of shutoff reduces the loss of power switch pipe.
Fig. 4 B is the waveform schematic diagram that the PWM of single-phase photovoltaic DC-to-AC converter powerless control method of the present invention sends out ripple;
When PLL is synchronous, add phase angle departure θ, carry out idle control, send out in the ripple controlling unit at PWM, concrete PWM sends out the ripple mode shown in Fig. 4 B, adopting Upwm is that sinusoidal modulation wave Upwm and Upwm take absolute value, and makes comparisons with given symmetrical triangular carrier Uc, and four operating states are arranged in a switch periods, that is: operating state (1) Ig>=0, Uac>=0; (2) Ig<0, Uac>=0; (3) Ig<0, Uac<0; (4) Ig>=0, Uac<0.
Operating state (1) Ig>=0, Uac>=0 operating state during corresponding to the S403a step among Fig. 4 A;
Operating state (2) Ig<0, Uac>=0 operating state during corresponding to the S403b step among Fig. 4 A;
Operating state (3) Ig<0, Uac<0 operating state during corresponding to the S404b step among Fig. 4 A;
Operating state (4) Ig>=0, Uac<0 operating state during corresponding to the S404a step among Fig. 4 A.
When being operated in state (1), i.e. Ig>=0, Uac>=0 o'clock, always conducting of power switch pipe T1, T2, T3 turn-off; Wherein, in the part of sinusoidal modulation wave Upwm absolute value more than or equal to given triangular carrier Uc, the T4 conducting, in the part of sinusoidal modulation wave Upwm absolute value less than given triangular carrier Uc, T4 turn-offs.Namely in Ig>=0, Uac>=0, | during Upwm|>=Uc, in step S405a, output PWM1 '=1, PWM2 '=0, PWM3 '=0, PWM4 '=1; In Ig>=0, Uac>=0, | during Upwm|<Uc, in step S405b, output PWM1 '=1, PWM2 '=0, PWM3 '=0, PWM4 '=0.As seen when state (1), power switch pipe T1, T2, T3 have obtained protection without switching loss.
When being operated in state (2), power switch pipe T1, T2, T4 turn-off; Wherein, in the part of sinusoidal modulation wave Upwm absolute value more than or equal to given triangular carrier Uc, T3 turn-offs, in the part of sinusoidal modulation wave Upwm absolute value less than given triangular carrier Uc, T3 conducting.Namely in Ig<0, Uac>=0, | during Upwm|>=Uc, in step S406a, output PWM1 '=0, PWM2 '=0, PWM3 '=0, PWM4 '=0; In Ig<0, Uac>=0, | during Upwm|<Uc, in step S406b, output PWM1 '=0, PWM2 '=0, PWM3 '=1, PWM4 '=0.As seen when state (2), power switch pipe T1, T2, T4 have obtained protection without switching loss.
When being operated in state (3), power switch pipe T1, T4 turn-off, and T3 is conducting always; Wherein, in the part of sinusoidal modulation wave Upwm absolute value more than or equal to given triangular carrier Uc, the T2 conducting, in the part of sinusoidal modulation wave Upwm absolute value less than given triangular carrier Uc, T2 turn-offs.Namely in Ig<0, Uac<0, | during Upwm|>=Uc, in step S407a, output PWM1 '=0, PWM2 '=1, PWM3 '=1, PWM4 '=0; In Ig<0, Uac<0, | during Upwm|<Uc, in step S407b, output PWM1 '=0, PWM2 '=0, PWM3 '=1, PWM4 '=0.As seen when state (3), power switch pipe T1, T3, T4 have obtained protection without switching loss.
When being operated in state (4), power switch pipe T2, T3, T4 turn-off; Wherein, in the part of sinusoidal modulation wave Upwm absolute value more than or equal to given triangular carrier Uc, T1 turn-offs, in the part of sinusoidal modulation wave Upwm absolute value less than given triangular carrier Uc, T1 conducting.Namely in Ig>=0, Uac<0, | during Upwm|>=Uc, in step S408a, output PWM1 '=0, PWM2 '=0, PWM3 '=0, PWM4 '=0; In Ig>=0, Uac<0, | during Upwm|<Uc, in step S408b, output PWM1 '=1, PWM2 '=0, PWM3 '=0, PWM4 '=0.As seen when state (4), power switch pipe T2, T3, T4 have obtained protection without switching loss.
Fig. 4 C is the line voltage Uac of single-phase photovoltaic DC-to-AC converter powerless control method of the present invention and the waveform schematic diagram of power network current Iac (visible electric current I ac leading voltage phase place Uac); Fig. 4 C is depicted as when the idle control that the present invention carries out, and phase angle departure θ is greater than zero, power network current and line voltage Uac waveform, and current phase is ahead of line voltage Uac.
As seen, from Fig. 4 C, can find out, compare with Fig. 3 C, PWM of the present invention send out the ripple control method aspect switching loss obviously than little many of bipolarity control mode, and aspect current waveform, be better than the unipolar control mode of common usefulness.Be that PWM of the present invention sends out the ripple control method, can control power network current and phase distortion not occur, thereby be input to electrical network without harmonic wave that concrete principle is referring to, following analysis to operating state (1) and operating state (2).In the prior art two, inverter can only be to the electrical network conveying capacity, and can not absorb power grid energy, so cause the current waveform distortion.Compare with prior art two, in the present invention, inverter can not only be to the electrical network conveying capacity, and can absorb power grid energy, so do not cause the power network current wave distortion.
Following Main Analysis is operating state (1) and the operating state (2) of departure θ in phase angle greater than zero time once:
At first, when being operated in state (1), it is Ig>=0, Uac>=0 o'clock, be illustrated in figure 5 as the circuit-mode of work operating state (1), Fig. 5 is, single-phase full bridge inverter circuit in the idle control circuit of single-phase photovoltaic DC-to-AC converter as shown in Figure 1B, the single-phase photovoltaic DC-to-AC converter powerless control method of employing shown in Fig. 4 A, Fig. 4 B, two kinds of circuit working patterns in line voltage Uac positive half period, under the operating state (1) of Ig>=0 (arrow is the flow direction of electric current under the state for this reason);
Current direction shown in solid line among Fig. 5, electric current I ac flows through T1, L1, L2, T4, power tube T1, T4 plays modulating action, DC side photovoltaic array and dc bus capacitor, to inductance L 1, the L2 charging, so that power network current Iac increases, and to inductance L 1, the L2 storage power, until power switch pipe T4 pipe turn-offs, enter dotted line current direction shown in Figure 8, power switch pipe T1 is open-minded, and other power device is in off state, dc capacitor voltage rising stored energy, in the existence of AC owing to inductance, electric current I ac can not suddenly change, so electric current I ac flows through power tube T1, inductance L 1, L2, the backward diode of power switch pipe T3 parallel connection forms continuous current circuit, and electric current I ac reduces gradually.
Fig. 5 A is the equivalent electric circuit (arrow is the flow direction of electric current under the state for this reason) of the first circuit working pattern-operating state (S405b) of operating state (1); In the part of sinusoidal modulation wave Upwm absolute value less than given triangular carrier Uc, namely in Ig>=0, Uac>=0, | during Upwm|<Uc, in step S405b, output PWM1 '=1, PWM2 '=0, PWM3 '=0, PWM4 '=0.Always conducting of power switch pipe T1, T2, T3 turn-off, and T4 turn-offs.
Fig. 5 B is the equivalent electric circuit (arrow is the flow direction of electric current under the state for this reason) of the second circuit working pattern-operating state (S405a) of operating state (1).In the part of sinusoidal modulation wave Upwm absolute value more than or equal to given triangular carrier Uc, namely in Ig>=0, Uac>=0, | during Upwm|>=Uc, in step S405a, output PWM1 '=1, PWM2 '=0, PWM3 '=0, PWM4 '=1; Power switch pipe T1 conducting, T2, T3 turn-off, the T4 conducting.
As seen when state (1), always conducting of power switch pipe T1, T2, T3 turn-off always, and power switch pipe T1, T2, T3 have obtained protection without switching loss.
Secondly, when being operated in state (2), Ig<0, Uac>=0; Be illustrated in figure 6 as the circuit-mode of operating state (2),
Fig. 6 is the single-phase full bridge inverter circuit in as shown in Figure 1B the idle control circuit of single-phase photovoltaic DC-to-AC converter, the single-phase photovoltaic DC-to-AC converter powerless control method of employing shown in Fig. 4 A, Fig. 4 B, two kinds of circuit working patterns in line voltage Uac positive half period, under the operating state (2) of Ig<0 (arrow is the flow direction of electric current under the state for this reason);
Current direction shown in solid line among Fig. 6, electric current I ac flows through the backward diode of power switch pipe T3, inductance L 2, L1, power switch pipe T1 parallel connection, give induction charging, the inductance storage power, so that power network current Iac increases, until power switch pipe T3 turn-offs, enter dotted line current direction shown in Figure 6, all switching tubes all turn-off, electric current is through the backward diode of the backward diode of power switch pipe T4 parallel connection, inductance L 2, L1, power switch pipe T1 parallel connection, to the dc bus capacitor charging, inductance releases energy, and electric current I ac reduces.This process implementation the exchange of energy between inverter and the electrical network, mainly for generation of reactive power.Thereby, compare with prior art two, in the present invention, inverter can not only be to the electrical network conveying capacity, and can absorb power grid energy, so do not cause the power network current wave distortion.
Fig. 6 A is the equivalent electric circuit (arrow is the flow direction of electric current under the state for this reason) of the first circuit working pattern-operating state (S406b) of operating state (2).In the part of sinusoidal modulation wave Upwm absolute value less than given triangular carrier Uc, namely in Ig<0, Uac>=0, | during Upwm|<Uc, in step S406b, output PWM1 '=0, PWM2 '=0, PWM3 '=1, PWM4 '=0; Thereby power switch pipe T1, T2, T4 turn-off the T3 conducting
Fig. 6 B is the equivalent electric circuit (arrow is the flow direction of electric current under the state for this reason) of the second circuit working pattern-operating state (S406a) of operating state (2).Namely in the part of sinusoidal modulation wave Upwm absolute value less than given triangular carrier Uc, T3 conducting.In the part of sinusoidal modulation wave Upwm absolute value more than or equal to given triangular carrier Uc, namely in Ig<0, Uac>=0, | during Upwm|>=Uc, in step S406a, output PWM1 '=0, PWM2 '=0, PWM3 '=0, PWM4 '=0; Thereby power switch pipe T1, T2, T4 turn-off, and T3 turn-offs.
When being operated in state (2), power switch pipe T1, T2, T4 turn-off always; As seen when state (2), power switch pipe T1, T2, T4 have obtained protection without switching loss.。
In addition, operating state (3) is similar to the working method of state (2) to operating state (1) to state (4), only underdraws here:
When being operated in state (3), Ig<0, Uac<0; The working method of operating state (3) as shown in Figure 7, Fig. 7 is the single-phase full bridge inverter circuit in as shown in Figure 1B the idle control circuit of single-phase photovoltaic DC-to-AC converter, the single-phase photovoltaic DC-to-AC converter powerless control method of employing shown in Fig. 4 A, Fig. 4 B is in line voltage Uac negative half-cycle, two kinds of circuit working patterns of the operating state (S404a) of Ig<0 (arrow is the flow direction of electric current under the state for this reason);
Fig. 7 A is the equivalent electric circuit (arrow is the flow direction of electric current under the state for this reason) of the first circuit working pattern-operating state (S407b) of operating state (S404a); In the part of sinusoidal modulation wave Upwm absolute value less than given triangular carrier Uc, namely in Ig<0, Uac<0, | during Upwm|<Uc, in step S407b, output PWM1 '=0, PWM2 '=0, PWM3 '=1, PWM4 '=0; Thereby power switch pipe T1, T4 turn-off, the T3 conducting, and T2 turn-offs.
Fig. 7 B is the equivalent electric circuit (arrow is the flow direction of electric current under the state for this reason) of the second circuit working pattern-operating state (S407a) of operating state (S404a).In the part of sinusoidal modulation wave Upwm absolute value more than or equal to given triangular carrier Uc, namely in Ig<0, Uac<0, | during Upwm|>=Uc, in step S407a, output PWM1 '=0, PWM2 '=1, PWM3 '=1, PWM4 '=0; Thereby power switch pipe T1, T4 turn-off, T3 conducting, T2 conducting.
When being operated in state (3), power switch pipe T1, T4 turn-off, and T3 is conducting always; As seen when state (3), power switch pipe T1, T3, T4 have obtained protection without switching loss.
When being operated in state (4), Ig>=0, Uac<0; The working method of operating state (4) as shown in Figure 8, Fig. 8 is the single-phase full bridge inverter circuit in as shown in Figure 1B the idle control circuit of single-phase photovoltaic DC-to-AC converter, the single-phase photovoltaic DC-to-AC converter powerless control method of employing shown in Fig. 4 A, Fig. 4 B is in line voltage Uac negative half-cycle, two kinds of circuit working patterns of the operating state (S404b) of Ig>=0 (arrow is the flow direction of electric current under the state for this reason);
Fig. 8 A is the equivalent electric circuit (arrow is the flow direction of electric current under the state for this reason) of the first circuit working pattern-operating state (S408b) of operating state (S404b); In the part of sinusoidal modulation wave Upwm absolute value less than given triangular carrier Uc, namely in Ig>=0, Uac<0, | during Upwm|<Uc, in step S408b, output PWM1 '=1, PWM2 '=0, PWM3 '=0, PWM4 '=0; Thereby power switch pipe T2, T3, T4 turn-off the T1 conducting.
Fig. 8 B is the equivalent electric circuit (arrow is the flow direction of electric current under the state for this reason) of the first circuit working pattern-operating state (S408a) of operating state (S404b).In the part of sinusoidal modulation wave Upwm absolute value more than or equal to given triangular carrier Uc, namely in Ig>=0, Uac<0, | during Upwm|>=Uc, in step S408a, output PWM1 '=0, PWM2 '=0, PWM3 '=0, PWM4 '=0; Thereby power switch pipe T2, T3, T4 turn-off, and T1 turn-offs.
When being operated in state (4), power switch pipe T2, T3, T4 turn-off; As seen when state (4), power switch pipe T2, T3, T4 have obtained protection without switching loss.
Oscillogram and working state figure when the present invention has only listed electric current leading voltage phase place, and the oscillogram of line voltage Uac phase place and working state figure have gone out with regard within the rule after the current hysteresis, but its state is also in implementation of the present invention.
In sum, the present invention utilizes the particularity of the phase place of current inner loop given value of current amount Ig and line voltage Uac in the single-phase photovoltaic inverter control system in the idle control stage, by changing the manner of comparison of modulating wave Upwm and given triangular carrier Uc, realize the energy exchange between electrical network and dc bus capacitor and the filter inductance, thus the reactive power that arrival high efficiency, control inverter that harmonic pollution is little are sent.
Technical scheme with respect to prior art, characteristics of the present invention and beneficial effect are, full-bridge of the present invention control PWM sends out ripple mode and in the past bipolarity control and single-polarity PWM, and to send out ripple different, powerless control method of the present invention, can change continuously at the waveform of realizing idle control, not interrupted, and switching loss is less.
(1) from Fig. 5, Fig. 5 A, Fig. 5 B, Fig. 6, Fig. 6 A, Fig. 6 B, Fig. 7, Fig. 7 A, Fig. 7 B, Fig. 8, Fig. 8 A, Fig. 8 B, can find out, powerless control method of the present invention, aspect switching loss obviously than little many of bipolarity control mode;
Can find out from Fig. 4 C that (2) powerless control method of the present invention is better than the unipolar control mode of common usefulness aspect current waveform.
In sum, the present invention can reduce the power switch pipe conduction loss when realizing the idle control of single-phase photovoltaic DC-to-AC converter, improves the inverter conversion efficiency, can also make current waveform continuous, reduces output harmonic wave, reduces the harmonic pollution to electrical network.
More than explanation is preferred embodiment of the present invention; just illustrative for the purpose of the present invention; and nonrestrictive, those of ordinary skills understand, in the situation that does not break away from the spirit and scope that claims of the present invention limit; by analysis, reasoning or limited experiment; can make many modifications, change, or equivalence; obtain a plurality of technical schemes, but these technical schemes will fall within the scope of protection of the present invention all.

Claims (3)

1. idle control circuit of single-phase photovoltaic DC-to-AC converter,
It comprises busbar voltage Support Capacitor, single-phase full bridge inverter circuit, filter inductance, EMC filter circuit, sample circuit, power switch tube drives circuit and DSP;
Wherein,
The busbar voltage Support Capacitor comprises the first electric capacity; The positive pole of the first electric capacity links to each other with the first input end of single-phase full bridge inverter circuit; The negative pole of the first electric capacity links to each other with the second input of single-phase full bridge inverter circuit;
The single-phase full bridge inverter circuit, it comprises four IGBT switching tubes---the first power switch pipe, the second power switch pipe, the 3rd power switch pipe, the 4th power switch pipe, and four diodes---the first diode, the second diode, the 3rd diode, the 4th diode; Wherein, described four diodes---the first diode, the second diode, the 3rd diode, the 4th diode is connected anti-parallel to respectively described four IGBT switching tubes---the two ends of the first power switch pipe, the second power switch pipe, the 3rd power switch pipe, the 4th power switch pipe; Namely the first diode reverse is parallel to the two ends of the first power switch pipe; The second diode reverse is parallel to the two ends of the second power switch pipe; The 3rd diode reverse is parallel to the two ends of three power switch pipes; The 4th diode reverse is parallel to the two ends of the 4th power switch pipe; Described four IGBT switching tubes---the first power switch pipe, the second power switch pipe, the 3rd power switch pipe, the 4th power switch pipe has respectively one source pole and a drain electrode; The positive pole of described the first electric capacity links to each other with the drain electrode of described the first power switch pipe, the drain electrode of described the 3rd power switch pipe; The negative pole of described the first electric capacity links to each other with the source electrode of described second switch pipe, the source electrode of described the 4th switching tube; After the drain electrode of the source electrode of described the first switching tube and described second switch pipe is electrical connected, as the first output of described single-phase full bridge inverter circuit; After the drain electrode of the source electrode of described the 3rd switching tube and described the 4th switching tube is electrical connected, as the second output of described single-phase full bridge inverter circuit;
Filter inductance comprises the first inductance, the second inductance; The first end of the first inductance links to each other with the first output of single-phase full bridge inverter circuit; The first end of the second inductance links to each other with the second output of single-phase full bridge inverter circuit; The second end of the first inductance links to each other with the first input end of EMC circuit filtering circuit; The second end of the second inductance links to each other with the second input of EMC circuit filtering circuit;
Sample circuit comprises three input pins, links to each other with the first input end of single-phase full bridge inverter circuit, the first input end of EMC circuit filtering circuit and the first output of EMC circuit filtering circuit respectively; Sample circuit also comprises three output pins, links to each other with three input pins of DSP respectively, exports respectively following signal: DC bus-bar voltage Ubus, line voltage Uac, power network current Iac;
DSP comprises that PLL control module, outer voltage PI control module, current inner loop PI feedfoward control module and sine pulse width modulation (PWM) send out the ripple control module,
Wherein, the input of PLL control module is line voltage Uac, and the PLL control module is output as and line voltage Uac locking phase scaled value sin (ω t+ θ), and wherein, θ is the phase angle deviation between power network current Iac and the line voltage Uac;
The input that sine pulse width modulation (PWM) is sent out the ripple control module comprises that PWM sends out ripple control inputs modulating wave Upwm, line voltage Uac, given triangular carrier Uc; The output that sine pulse width modulation (PWM) is sent out the ripple control module is four road pwm signal PWM1 ', PWM2 ', PWM3 ', PWM4 ';
DSP comprises three input pins, inputs respectively following signal: DC bus-bar voltage Ubus, line voltage Uac, power network current Iac; DSP comprises four output pins, exports respectively four road pwm signal PWMI ', PWM2 ', PWM3 ', PWM4 ';
Described power switch tube drives circuit comprises four input pins, and it links to each other respectively with four output pins of DSP; Described power switch tube drives circuit comprises four PWM output pins, its with described single-phase full bridge inverter circuit in four IGBT switching tubes---the grid of the first power switch pipe, the second power switch pipe, the 3rd power switch pipe, the 4th power switch pipe links to each other respectively, respectively output pwm signal PWM1, PWM2, PWM3, PWM4;
It is characterized in that:
In the idle control circuit of described single-phase photovoltaic DC-to-AC converter, the input of the outer voltage PI control module of DSP is the difference of DC bus-bar voltage Ubus and DC bus-bar voltage control specified rate Ubus ', and the output of outer voltage PI control module is outer voltage output variable Im;
In the idle control circuit of described single-phase photovoltaic DC-to-AC converter, the input of the current inner loop PI feedfoward control module of DSP is the difference of current inner loop given value of current amount Ig and power network current Iac; Wherein, described current inner loop given value of current amount Ig=Im*sin (ω t+ θ); The output of current inner loop PI feedfoward control module is U1;
In the idle control circuit of described single-phase photovoltaic DC-to-AC converter, the output that the sine pulse width modulation (PWM) of DSP is sent out the ripple control module is four road pwm signal PWM1 ', PWM2 ', PWM3 ', PWM4 '; The input that the sine pulse width modulation (PWM) of DSP is sent out the ripple control module comprises that PWM sends out ripple control inputs modulating wave Upwm, line voltage Uac, given triangular carrier Uc; Wherein, described PWM sends out ripple control inputs modulating wave Upwm, be the output U1 of current inner loop PI feedfoward control module and line voltage Uac and;
In the idle control circuit of described single-phase photovoltaic DC-to-AC converter, the described PWM that sends out one of the input signal of ripple control module as the sine pulse width modulation (PWM) of DSP sends out ripple control inputs modulating wave Upwm, be current inner loop PI feedfoward control module output U1 and line voltage Uac's and;
The input signal that the sine pulse width modulation (PWM) of DSP is sent out the ripple control module also comprises current inner loop given value of current amount Ig.
2. the idle control circuit of single-phase photovoltaic DC-to-AC converter as claimed in claim 1 is characterized in that:
Also comprise photovoltaic battery array, Boost booster circuit;
Wherein, the Boost booster circuit comprises the 3rd inductance, the 5th power switch pipe, the 5th diode and the 6th diode; Wherein, the 5th diode reverse is parallel to the 5th power switch pipe; The first end of the 3rd inductance links to each other with the first end of photovoltaic battery array; The second end of the 3rd inductance links to each other with the positive pole of the drain electrode of the 5th power switch pipe and the 6th diode; The source ground of the 5th power switch pipe as the second input of Boost booster circuit, links to each other with the second end of photovoltaic battery array, simultaneously, as the second output of Boost booster circuit, links to each other with the second input of single-phase full bridge inverter circuit; The grid of the 5th power switch pipe is controlled by the 5th PWM output pin of power switch tube drives circuit; The negative pole of the 6th diode is the first output of Boost booster circuit, links to each other with the first input end of single-phase full bridge inverter circuit;
The first output of Boost booster circuit links to each other with the first input end of the positive pole of the first electric capacity and single-phase full bridge inverter circuit; The second output of Boost booster circuit links to each other with the second input of the negative pole of the first electric capacity and single-phase full bridge inverter circuit;
In the idle control circuit of described single-phase photovoltaic DC-to-AC converter, sample circuit also comprises three input pins, respectively with the first end of photovoltaic battery array, Boost booster circuit in the first end of the 3rd inductance link to each other with the second end; Sample circuit also comprises two output pins, links to each other with two input pins of DSP respectively;
In the idle control circuit of described single-phase photovoltaic DC-to-AC converter, DSP also comprises two input pins: input respectively photovoltaic battery array output voltage U pv, photovoltaic battery array output current Ipv; DSP also comprises the 5th output pin, output pwm signal: PWM5 ';
In the idle control circuit of described single-phase photovoltaic DC-to-AC converter, described power switch tube drives circuit also comprises the 5th input pin, and it links to each other with the 5th output pin of DSP; Described power switch tube drives circuit comprises the 5th PWM output pin, its with described photovoltaic DC-to-AC converter in the 5th IGBT switching tube---the grid of the 5th power switch pipe links to each other, output pwm signal PWM5; The 5th power switch pipe in the PWM control Boost booster circuit;
In the idle control circuit of described single-phase photovoltaic DC-to-AC converter, DSP also comprises MPPT module, the Boost PI control module of boosting,
Wherein, the input of MPPT module is photovoltaic battery array output voltage U pv and photovoltaic battery array output current Ipv, and the output of MPPT module is MPPT voltage disturbance specified rate Upv ';
The boost input of PI control module of Boost is the poor of photovoltaic battery array output voltage U pv and MPPT voltage disturbance specified rate Upv ', and the boost output of PI control module of Boost is PWM5 '.
3. single-phase photovoltaic DC-to-AC converter powerless control method, its sine pulse width modulation (PWM) with the DSP of the idle control circuit of single-phase photovoltaic DC-to-AC converter as claimed in claim 1 are sent out the ripple control module and are realized, it is characterized in that:
Described single-phase photovoltaic DC-to-AC converter powerless control method may further comprise the steps:
Whether step S401, set up if judge line voltage Uac>=0---set up, then forward step S402a to, if be false, then forward step S402b to;
Whether step S402a, set up if judge current inner loop given value of current amount Ig>=0---set up, then forward step S403a to, if be false, then forward step S403b to;
Whether step S402b, set up if judge current inner loop given value of current amount Ig>=0---set up, then forward step S404a to, if be false, then forward step S404b to;
Step S403a, relatively PWM sends out the absolute value of ripple control inputs modulating wave Upwm and given triangular carrier Uc, if judge | and whether Upwm|>=Uc sets up---and set up, then forward step S405a to, if be false, then forward step S405b to;
Step S403b, relatively PWM sends out the absolute value of ripple control inputs modulating wave Upwm and given triangular carrier Uc, if judge | and whether Upwm|>=Uc sets up---and set up, then forward step S406a to, if be false, then forward step S406b to;
Step S404b, relatively PWM sends out the absolute value of ripple control inputs modulating wave Upwm and given triangular carrier Uc, if judge | and whether Upwm|>=Uc sets up---and set up, then forward step S407a to, if be false, then forward step S407b to;
Step S404a, relatively PWM sends out the absolute value of ripple control inputs modulating wave Upwm and given triangular carrier Uc, if judge | and whether Upwm|>=Uc sets up---and set up, then forward step S408a to, if be false, then forward step S408b to;
Four road pwm signals are respectively PWMl '=1 among the step S405a, PWM2 '=0, and PWM3 '=0, finish afterwards PWM4 '=1;
Four road pwm signals are respectively PWM1 '=1 among the step S405b, PWM2 '=0, and PWM3 '=0, finish afterwards PWM4 '=0;
Four road pwm signals are respectively PWM1 '=0 among the step S406a, PWM2 '=0, and PWM3 '=0, finish afterwards PWM4 '=0;
Four road pwm signals are respectively PWM1 '=0 among the step S406b, PWM2 '=0, and PWM3 '=1, finish afterwards PWM4 '=0;
Four road pwm signals are respectively PWM1 '=0 among the step S407a, PWM2 '=1, and PWM3 '=1, finish afterwards PWM4 '=0;
Four road pwm signals are respectively PWM1 '=0 among the step S407b, PWM2 '=0, and PWM3 '=1, finish afterwards PWM4 '=0;
Four road pwm signals are respectively PWM1 '=0 among the step S408a, PWM2 '=0, and PWM3 '=0, finish afterwards PWM4 '=0;
Four road pwm signals are respectively PWM1 '=1 among the step S408b, PWM2 '=0, and PWM3 '=0, finish afterwards PWM4 '=0.
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