CN113067335A - Current compensation method and circuit adopting critical current control strategy - Google Patents

Current compensation method and circuit adopting critical current control strategy Download PDF

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Publication number
CN113067335A
CN113067335A CN202110390812.1A CN202110390812A CN113067335A CN 113067335 A CN113067335 A CN 113067335A CN 202110390812 A CN202110390812 A CN 202110390812A CN 113067335 A CN113067335 A CN 113067335A
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current
obtaining
circuit
voltage
current compensation
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鲍洋
盛虎
张路
王博
王科磊
张瑞龙
燕晨阳
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Xi'an Megmeet Electric Co ltd
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Xi'an Megmeet Electric Co ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/01—Arrangements for reducing harmonics or ripples
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/18—Arrangements for adjusting, eliminating or compensating reactive power in networks
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/30—Reactive power compensation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/40—Arrangements for reducing harmonics

Abstract

The embodiment of the invention discloses a current compensation method and a circuit adopting a critical current control strategy, and the method comprises the steps of obtaining the power grid voltage of an input circuit, obtaining a first current compensation quantity according to the power grid voltage, obtaining the characteristic of a filter module in the circuit, obtaining a second current compensation quantity according to the characteristic of the filter module, and adjusting the actual current of the circuit according to the first current compensation quantity and the second current compensation quantity. By the method, the power factor of the circuit adopting the critical current control strategy can be improved, and the problem of total harmonic distortion can be solved.

Description

Current compensation method and circuit adopting critical current control strategy
Technical Field
The present invention relates to the field of power electronics technologies, and in particular, to a current compensation method and a circuit using a critical current control strategy.
Background
In a digital power supply system, voltage side harmonic pollution is a serious problem, soft switching can be realized in a current critical continuous mode, the working efficiency of equipment is improved, and the problem of more serious Total Harmonic Distortion (THD) pollution is caused.
In the prior art, common solutions are to add a filtering unit and to compensate, for example, filter delay compensation by an associated control strategy. However, for the scheme of adding the filtering unit, the scheme not only increases the cost, but also causes a certain filtering delay, and causes problems of reducing the power factor and the like. However, for a scheme for compensating, for example, filtering delay compensation by using a relevant control strategy, the scheme for compensating, for example, filtering delay compensation method by using a relevant control strategy cannot fundamentally solve the distortion problem, still has and solves the total harmonic distortion problem, and has a poor compensation effect, and the power factor is also low.
Disclosure of Invention
The embodiment of the invention aims to provide a current compensation method and a circuit adopting a critical current control strategy, which can improve the power factor of the circuit adopting the critical current control strategy and solve the problem of total harmonic distortion.
In order to achieve the above object, in a first aspect, the present invention provides a current compensation method applied to a circuit adopting a critical current control strategy, including:
acquiring a power grid voltage input into the circuit;
obtaining a first current compensation quantity according to the power grid voltage;
obtaining characteristics of a filtering module in the circuit;
obtaining a second current compensation quantity according to the characteristics of the filtering module;
and adjusting the actual current of the circuit according to the first current compensation amount and the second current compensation amount.
In an optional manner, the obtaining a first current compensation amount according to the grid voltage includes:
obtaining the duration time of the negative current according to the power grid voltage;
and obtaining the first current compensation quantity according to the duration of the negative current.
In an optional manner, the obtaining a duration of a negative current according to the grid voltage includes:
the duration of the negative current is:
Figure BDA0003016678370000021
wherein, ttotalTotal time of a single cycle, ubusFor bus voltage, UsThe peak value of the grid voltage, ω 1 is the angular velocity of the grid voltage, t1 is the time of change of the grid voltage, toffThe time when the grid current drops.
In an alternative mode, the obtaining the first current compensation amount according to the duration of the negative current includes:
substituting the duration of the negative current into an inductance characteristic formula to obtain the first current compensation quantity, wherein the inductance characteristic formula is as follows:
Figure BDA0003016678370000022
wherein dicIs the change in current, U (t) is the change in voltage over time, dtcFor duration, L is the inductance value.
In an optional manner, the obtaining a second current compensation amount according to the characteristic of the filtering module includes:
obtaining the rising time of the target current according to the characteristics of the filtering module;
and obtaining the second current compensation amount according to the rising time of the target current.
In an optional manner, the obtaining a rise time of the target current according to the characteristic of the filtering module includes:
the filter module comprises a filter inductor and a filter capacitor, and the characteristics of the filter module comprise an inductance value of the filter inductor, a capacitance value of the filter capacitor and a phase difference between the voltage of the filter capacitor and the voltage of the power grid;
the rising time of the target current is as follows:
Figure BDA0003016678370000023
wherein, Δ tonIs the rise time of the target current, IsFor peak values of the grid current, UsThe peak value of the grid voltage, ω 2 the angular velocity of the grid current, t2 the time of change of the grid current,
Figure BDA0003016678370000032
the phase difference between the voltage of the filter capacitor and the voltage of the power grid is shown, L is the inductance value of the filter inductor, and C is the capacitance value of the filter capacitor.
In an optional manner, obtaining the second current compensation amount according to a rising time period of the target current includes:
substituting the rising time of the target current into an inductance characteristic formula to obtain the target current value, wherein the inductance characteristic formula is as follows:
Figure BDA0003016678370000031
wherein dicIs the change in current, U (t) is the change in voltage over time, dtcFor duration, L is the inductance value.
In a second aspect, the present invention provides a current compensation apparatus applied to a circuit employing a critical current control strategy, comprising:
the first acquisition module is used for acquiring the power grid voltage input into the circuit;
the first compensation module is used for obtaining a first current compensation quantity according to the power grid voltage;
a second obtaining module, configured to obtain characteristics of a filtering module in the circuit;
the second compensation module is used for obtaining a second current compensation quantity according to the characteristics of the filtering module;
and the adjusting module is used for adjusting the actual current of the circuit according to the first current compensation amount and the second current compensation amount.
In a third aspect, the present invention provides a circuit employing a critical current control strategy, comprising:
a control processing unit comprising:
at least one processor and a memory communicatively coupled to the at least one processor, the memory storing instructions executable by the at least one processor to enable the at least one processor to perform the method of any of claims 1-7.
In a fourth aspect, the invention provides a non-transitory computer-readable storage medium having stored thereon computer-executable instructions that, when executed by a circuit employing a critical current control strategy, cause the circuit to perform the method of any of claims 1-7.
The embodiment of the invention has the beneficial effects that: the method comprises the steps of obtaining the power grid voltage input into the circuit adopting the critical current control strategy, obtaining a first current compensation quantity according to the power grid voltage, obtaining the characteristic of a filter module in the circuit, obtaining a second current compensation quantity according to the characteristic of the filter module, and adjusting the actual current of the circuit according to the first current compensation quantity and the second current compensation quantity.
Drawings
One or more embodiments are illustrated by way of example in the accompanying drawings, which correspond to the figures in which like reference numerals refer to similar elements and which are not to scale unless otherwise specified.
FIG. 1 is a schematic diagram of current waveform distortion present in a prior art circuit employing a critical current control strategy;
FIG. 2 is another schematic diagram illustrating current waveform distortion in a prior art circuit employing a critical current control strategy;
FIG. 3 is a schematic diagram illustrating a current waveform distortion phenomenon in a circuit employing a critical current control strategy according to the prior art;
FIG. 4 is a flow chart of a current compensation method according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a current waveform in practical applications according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of a current waveform before negative current compensation according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of a negative current compensated current waveform according to an embodiment of the present invention;
fig. 8 is a schematic diagram of grid current and grid voltage waveforms before the grid current is compensated for a delay with respect to the grid voltage according to an embodiment of the present invention;
fig. 9 is a schematic diagram of the grid current and the grid voltage waveforms after the grid current is compensated for the delay relative to the grid voltage according to the embodiment of the present invention;
fig. 10 is a schematic structural diagram of a current compensation device according to an embodiment of the present invention;
fig. 11 is a schematic structural diagram of a circuit adopting a critical current control strategy according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present invention, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the prior art, for circuits adopting a critical current control strategy, such as boost circuits, the current waveform of the circuits is usually distorted. The boost circuit is one of six basic chopper circuits, and is a switching dc boost circuit which can make the output voltage higher than the input voltage. The distortion of the current waveform in these circuits is generally expressed in the following two aspects.
On the one hand, the current waveform is distorted due to the existence of the negative current, please refer to fig. 1, in which fig. 1 is a schematic diagram illustrating the current distortion phenomenon of the circuit adopting the critical current control strategy in the prior art. As shown in fig. 1, the dashed line i1 represents the rise of the inductor current in the circuit adopting the critical current control strategy under the ideal condition, i.e. the inductor current should ideally increase from the ideal zero point a1 (i.e. when the current is 0). However, due to the existence of circuit parasitic parameters and software and hardware control delay, a negative current exists, that is, in an actual application process, an actual zero point is a zero point a2, and in a time period of t1, the current substantially rises from the negative current to zero, so that a difference i3 between an ideal current i1 and an actual current i2 is caused, and the difference i3 causes current energy loss, and meanwhile, since the negative current conditions under different voltages are not consistent, the current rise times under different voltages are not consistent, so that the current rise waveform is distorted. Further, if the actual current is smaller, the current rising waveform distortion is more serious, for example, as shown in fig. 2, in an embodiment, the actual current i21 is always below zero current during the time period t21, and the current rising waveform distortion is more serious.
On the other hand, measures against electromagnetic interference are taken in the circuit, and these measures also cause waveform distortion of the current. As shown in fig. 3, a phase difference D1 exists between the input voltage (i.e., the grid voltage u31) and the input current (i.e., the grid current i31) of the circuit employing the critical current control strategy. It can be seen that there is a phase angle delay between the grid current i31 and the grid voltage u31 and a distortion in the current sine, i.e. a distortion in the current waveform.
Based on the above, the present invention provides a compensation method applied to a circuit adopting a critical current control strategy, which is designed to add a corresponding current compensation amount to an actual current to adjust the actual current so as to correct the distortion of the current waveform, in order to solve the above two problems.
As shown in fig. 4, fig. 4 is a flowchart of a current compensation method applied to a circuit employing a critical current control strategy according to an embodiment of the present invention, and the method includes:
401: the grid voltage of the input circuit is obtained.
402: and obtaining a first current compensation quantity according to the power grid voltage.
From the above, the reason for the negative current is due to the existence of the circuit parasitic parameters and the software and hardware control delay, and the time for the negative current is basically a fixed value. And according to the volt-second principle, the sum of the time of generating the negative current and the time of restoring the negative current and the voltage of the power grid form a reciprocal relation, namely the smaller the voltage of the power grid, the larger the negative current. As shown in fig. 5, the current below the zero point P0 is negative. It can be seen that the closer to the zero point P0, the larger the negative current, i.e. the smaller the grid voltage.
The volt-second principle, also called volt-second balance, refers to that the voltage added to the two ends of the inductor multiplied by the on-time is equal to the voltage at the two ends of the inductor multiplied by the off-time at the moment of switching off the switching power supply in a stable working state, or that the positive volt-second value at the two ends of the inductor is equal to the negative volt-second value in the switching power supply in a stable working state.
Therefore, the current required current compensation quantity can be generated according to the voltage, namely the first current compensation quantity, and the compensation current formed by the first current compensation quantity and the actual current are parallelly connected and converged in real time, so that the purpose of adjusting the actual current is achieved.
In one embodiment, after the grid voltage (i.e., the input voltage of the circuit) is obtained, the duration of the negative current may be obtained according to the grid voltage, and the first current compensation amount may be obtained according to the duration of the negative current.
In particular, the grid voltage is defined as usThe peak value of the grid voltage is defined as UsBus voltage is defined as ubusDefining the rise time of the input current (i.e. the grid current) as tupThe time of input current drop is defined as toffThe total time of a single week is defined as ttotal. The following formula is available: u. ofs＝Us×sinω1t1①；usΔtup＝(ubus-us)×Δt off②；
Figure BDA0003016678370000061
Δttotal＝Δtup+Δt off④。
By combining the four formulas, namely the formula for the duration of the negative current can be obtained:
Figure BDA0003016678370000071
wherein, Δ ttotalI.e. the negative current duration, and ω 1 is the angular velocity of the grid voltage, t1 is the time of change of the grid voltage.
Then, after the duration of the negative current is obtained by calculation, the duration is substituted into the inductance characteristic formula, and the first current compensation amount can be obtained. The inductance characteristic formula is as follows:
Figure BDA0003016678370000072
wherein dicIs the change in current, U (t) is the change in voltage over time, dtcFor duration, L is the inductance value. Therefore, according to the volt-second principle and the kirchhoff current law, the current value corresponding to the calculated first current compensation quantity can be directly converged with the actual current in a parallel mode, so that the adjustment of the actual current is completed.
In practical applications, the actual waveform of the current before compensating for the negative current is shown in fig. 6. It can be seen that, due to the existence of the negative current, the actual current i61 has a descending process during the ascending process, that is, the waveform of the current i61 is distorted.
After compensating for the negative current, the actual waveform of the current is shown in fig. 7. Firstly, the actual current i71 does not fall any more during the rising process, but keeps a smooth rising, and the distorted waveform of the current is corrected.
In summary, by compensating the negative current, it can be ensured that the control energy is not lost due to the existence of the negative current, and at the same time, the actual inductive current and the inductive current under the ideal condition have the same contour line, so that the current waveform Distortion as shown in fig. 2 can be directly avoided, thereby greatly improving the Total Harmonic Distortion (THD) condition, and optimizing the heavy-load Total Harmonic Distortion to be less than 2%.
403: characteristics of a filtering module in a circuit are obtained.
404: and obtaining a second current compensation quantity according to the characteristics of the filtering module.
As is well known, measures for preventing electromagnetic interference (EMI) in a circuit are generally implemented by providing a filtering module. The filtering module may cause a delay of the grid current with respect to the grid voltage, that is, there is a phase difference between the grid current and the grid voltage, so that a distortion exists in a sine degree of the grid current, and a magnitude of the phase difference is determined by the filtering module, that is, a magnitude of the phase difference caused by different filtering modules is different, and therefore, different compensation amounts need to be set according to characteristics of different filtering modules, wherein the characteristics of the filtering module may include each component and its attribute in the filtering module, and a current or a voltage of each component and the like.
In an embodiment, after the characteristics of the filtering module are obtained, the corresponding rising time of the target current may be obtained, and the second current compensation may be obtained according to the rising time of the target current.
Optionally, for example, components in the filtering module are a filtering inductor and a filtering capacitor, that is, the filtering module is an LC filter. The characteristics of the filtering module comprise an inductance value of the filtering inductor, a capacitance value of the filtering capacitor and a phase difference between the voltage of the filtering capacitor and the voltage of the power grid.
In particular, the grid voltage is defined as usThe filter capacitor voltage is defined as ucDefining the grid current as isThe capacitance current is defined as icThe inductor current is defined as iLThe rise time of the target current is defined as Δ tonThe capacitance value of the filter capacitor is defined as C, the inductance value of the filter inductor is defined as L, the angular velocity of the grid current is defined as ω 2, the change time of the grid current is defined as t2, and the phase difference between the filter capacitor voltage and the grid voltage is defined as
Figure BDA0003016678370000081
The following formula is available:
Figure BDA0003016678370000082
is＝Is sinω2t2⑥；
Figure BDA0003016678370000083
Figure BDA0003016678370000084
integrating the fifth and sixth formulas, the rising time of the target current is:
Figure BDA0003016678370000085
wherein, Δ tonI.e. the rise time of the target current.
Similarly, after the rising time of the target current is calculated, the rising time is substituted into the inductance characteristic formula, and the second current compensation amount can be obtained. The inductance characteristic formula is as follows:
Figure BDA0003016678370000086
wherein dicIs the change in current, U (t) is the change in voltage over time, dtcFor duration, L is the inductance value. Thus, it can be connected in parallel according to volt-second principle and kirchhoff's current lawAnd the current value corresponding to the calculated second current compensation quantity is directly converged with the actual current so as to complete the adjustment of the actual current.
In practical applications, the waveforms of the grid current and the grid voltage are as shown in fig. 8 before compensating for the delay of the grid current with respect to the grid voltage. The grid voltage u81 and the grid current i81 do not coincide with each other, that is, a certain phase angle deviation (i.e., phase difference) exists between the grid voltage u81 and the grid current i81, so that the grid current i81 is distorted, and the power factor is deteriorated.
After compensating for the delay of the grid current with respect to the grid voltage, the waveforms of the grid current and the grid voltage are as shown in fig. 9. The superposition of the power grid voltage u91 and the power grid current i91 enables the distortion waveform of the power grid current to be corrected, the power grid current has better sine degree, and the power factor is improved.
In conclusion, the input current and the input voltage have the same frequency and phase by compensating the delay of the power grid current relative to the power grid voltage, namely performing real-time phase angle compensation on the power grid current. The power factor is optimized, the optimized power factor can reach more than 0.99, the waveform distortion problem caused by phase angle delay of input current is optimized, and the total harmonic distortion condition is improved.
405: and adjusting the actual current of the circuit according to the first current compensation amount and the second current compensation amount.
And finally, according to a volt-second principle and a kirchhoff current law, the first current compensation quantity and the second current compensation quantity which are obtained by calculation in the embodiment are converged with the actual current in a parallel connection mode, and the actual current in the circuit is adjusted in real time.
By the mode, the distortion problem of the current waveform can be better solved, the total harmonic distortion condition can be improved, and meanwhile, the power factor is better improved.
Fig. 10 is a schematic structural diagram of a current compensation apparatus according to an embodiment of the present invention, which is applied to a circuit employing a critical current control strategy. As shown in fig. 10, the current compensation apparatus 1000 includes a first obtaining module 1001, a first compensation module 1002, a second obtaining module 1003, a second compensation module 1004, and an adjusting module 1005.
The first obtaining module 1001 is configured to input a grid voltage of the circuit. The first compensation module 1002 is configured to obtain a first current compensation amount according to the grid voltage. The second obtaining module 1003 is used for obtaining the characteristics of the filtering module in the circuit. The second compensation module 1004 is configured to obtain a second current compensation amount according to the characteristic of the filtering module. And an adjusting module 1005, configured to adjust an actual current of the circuit according to the first current compensation amount and the second current compensation amount.
Since the apparatus embodiment and the method embodiment are based on the same concept, the contents of the apparatus embodiment may refer to the method embodiment on the premise that the contents do not conflict with each other, and are not described herein again.
Fig. 11 is a schematic diagram of a circuit employing a critical current control strategy according to an embodiment of the present invention. As shown in fig. 11, the circuit 1100 that employs a critical current control strategy includes one or more processors 1101 and a memory 1102. Fig. 11 illustrates an example of one processor 1101.
The processor 1101 and the memory 1102 may be connected by a bus or other means, such as the bus connection illustrated in FIG. 11.
The memory 1102, which is a non-volatile computer-readable storage medium, may be used for storing non-volatile software programs, non-volatile computer-executable programs, and modules, such as program instructions/modules (e.g., the units shown in fig. 10) corresponding to the terminal interaction method in the embodiment of the present invention. The processor 1101 executes various functional applications and data processing of the terminal interaction device by running the nonvolatile software programs, instructions and modules stored in the memory 1102, that is, the functions of the current compensation method in the above-described method embodiment and the various modules and units of the above-described device embodiment are realized.
The memory 1102 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid-state storage device. In some embodiments, the memory 1102 may optionally include memory located remotely from the processor 1101, which may be connected to the processor 1101 by a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The program instructions/modules stored in the memory 1102, when executed by the one or more processors 1101, perform the current compensation method in any of the method embodiments described above, e.g., perform the various steps shown in fig. 4 described above; the functions of the various elements described in fig. 10 may also be implemented.
Embodiments of the present invention also provide a non-transitory computer-readable storage medium storing computer-executable instructions that, when executed by a circuit employing a critical current control strategy, cause the circuit to perform a method as in any of the above embodiments.
Embodiments of the present invention also provide a computer program product comprising a computer program stored on a computer-readable storage medium, the computer program comprising program instructions which, when executed by a computer, cause the computer to perform the method of any of the above embodiments.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; within the idea of the invention, also technical features in the above embodiments or in different embodiments may be combined, steps may be implemented in any order, and there are many other variations of the different aspects of the invention as described above, which are not provided in detail for the sake of brevity; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present application.

Claims (10)

1. A current compensation method applied to a circuit adopting a critical current control strategy is characterized by comprising the following steps:
acquiring a power grid voltage input into the circuit;
obtaining a first current compensation quantity according to the power grid voltage;
obtaining characteristics of a filtering module in the circuit;
obtaining a second current compensation quantity according to the characteristics of the filtering module;
and adjusting the actual current of the circuit according to the first current compensation amount and the second current compensation amount.
2. The method of claim 1, wherein obtaining a first current compensation amount based on the grid voltage comprises:
obtaining the duration time of the negative current according to the power grid voltage;
and obtaining the first current compensation quantity according to the duration of the negative current.
3. The method of claim 2, wherein obtaining the duration of negative current based on the grid voltage comprises:
the duration of the negative current is:
Figure FDA0003016678360000011
wherein, ttotalTotal time of a single cycle, ubusFor bus voltage, UsThe peak value of the grid voltage, ω 1 is the angular velocity of the grid voltage, t1 is the time of change of the grid voltage, toffThe time when the grid current drops.
4. The method of claim 3, wherein obtaining the first current compensation amount based on the duration of the negative current comprises:
substituting the duration of the negative current into an inductance characteristic formula to obtain the first current compensation quantity, wherein the inductance characteristic formula is as follows:
Figure FDA0003016678360000021
wherein dicIs the change in current, U (t) is the change in voltage over time, dtcFor duration, L is the inductance value.
5. The method of claim 1, wherein obtaining a second current compensation amount according to the characteristics of the filtering module comprises:
obtaining the rising time of the target current according to the characteristics of the filtering module;
and obtaining the second current compensation amount according to the rising time of the target current.
6. The method of claim 5, wherein obtaining a rise time of a target current according to the characteristics of the filtering module comprises:
the filter module comprises a filter inductor and a filter capacitor, and the characteristics of the filter module comprise an inductance value of the filter inductor, a capacitance value of the filter capacitor and a phase difference between the voltage of the filter capacitor and the voltage of the power grid;
the rising time of the target current is as follows:
Figure FDA0003016678360000022
wherein, Δ tonIs the rise time of the target current, IsFor peak values of the grid current, UsThe peak value of the grid voltage, ω 2 the angular velocity of the grid current, t2 the time of change of the grid current,
Figure FDA0003016678360000024
is the phase difference between the voltage of the filter capacitor and the voltage of the power grid, L is the inductance value of the filter inductor, and C is the capacitance of the filter capacitorThe value is obtained.
7. The method according to claim 5, wherein obtaining the second current compensation amount according to a rise time period of the target current comprises:
substituting the rising time of the target current into an inductance characteristic formula to obtain the target current value, wherein the inductance characteristic formula is as follows:
Figure FDA0003016678360000023
wherein dicIs the change in current, U (t) is the change in voltage over time, dtcFor duration, L is the inductance value.
8. A current compensation apparatus for use in a circuit employing a critical current control strategy, comprising:
the first acquisition module is used for acquiring the power grid voltage input into the circuit;
the first compensation module is used for obtaining a first current compensation quantity according to the power grid voltage;
a second obtaining module, configured to obtain characteristics of a filtering module in the circuit;
the second compensation module is used for obtaining a second current compensation quantity according to the characteristics of the filtering module;
and the adjusting module is used for adjusting the actual current of the circuit according to the first current compensation amount and the second current compensation amount.
9. A circuit employing a critical current control strategy, comprising:
a control processing unit comprising:
at least one processor and a memory communicatively coupled to the at least one processor, the memory storing instructions executable by the at least one processor to enable the at least one processor to perform the method of any of claims 1-7.
10. A non-transitory computer-readable storage medium having stored thereon computer-executable instructions that, when executed by a circuit employing a critical current control strategy, cause the circuit to perform the method of any of claims 1-7.
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