CN112997297A - Semiconductor device, power conversion device, and method for manufacturing semiconductor device - Google Patents
Semiconductor device, power conversion device, and method for manufacturing semiconductor device Download PDFInfo
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- CN112997297A CN112997297A CN201980067408.1A CN201980067408A CN112997297A CN 112997297 A CN112997297 A CN 112997297A CN 201980067408 A CN201980067408 A CN 201980067408A CN 112997297 A CN112997297 A CN 112997297A
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Images
Classifications
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
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- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
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- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
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- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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Abstract
A polishing step for removing the resin attached to the 2 heat dissipation surfaces to expose the 2 heat dissipation surfaces is not required, and the productivity and reliability of the semiconductor device are improved. In addition, leakage of the liquid sealing material is suppressed. The semiconductor device includes a 1 st heat dissipation member, a frame member, a 2 nd heat dissipation member, a semiconductor element, and a sealing resin portion. The 1 st heat dissipation member is embedded in the frame member. The frame member includes a frame-shaped portion and a positioning portion. The positioning part is positioned at the inner side of the frame-shaped part. The 2 nd heat dissipation member abuts against the positioning portion, and is positioned by the positioning portion. The 1 st heat radiating surface of the 1 st heat radiating member and the 2 nd heat radiating surface of the 2 nd heat radiating member face in opposite directions to each other and are exposed to the outside. The semiconductor element is sandwiched between a 1 st heat sink member and a 2 nd heat sink member. The sealing resin portion fills a gap between the frame member and the 2 nd heat dissipating member.
Description
Technical Field
The invention relates to a semiconductor device, a power conversion device, and a method for manufacturing the semiconductor device.
Background
A power module having a plurality of semiconductor elements mounted thereon is mounted on products such as industrial equipment, home appliances, and information terminals, and is used for power generation, power transmission, efficient energy utilization, regeneration, and the like.
In order to meet the demands for higher voltages and larger currents, power modules are required to have high heat dissipation properties. Therefore, in a power module, particularly a power module for a transmission device, a double-sided cooling structure capable of actively dissipating heat not only from the back surface of a semiconductor element but also from the active surface of the semiconductor element is often employed.
In many cases, a power module having a double-sided cooling structure includes a semiconductor element, 2 heat dissipation members, and a sealing resin portion. The 2 heat dissipation members sandwich the semiconductor element. The sealing resin portion is formed by transfer molding, and seals the semiconductor element and the 2 heat dissipation members. The 2 heat radiating surfaces of the 2 heat radiating members face in opposite directions, and are exposed without being covered with the sealing resin portion. The sealing resin portion is formed by filling a liquid sealing material including a sealing resin and hardening the filled liquid sealing material.
For example, a semiconductor device described in patent document 1 includes a semiconductor chip, a lower heat sink, a heat sink block, an upper heat sink, and resin (paragraphs 0013 and 0019). The lower surface of the semiconductor chip and the upper surface of the lower heat spreader are joined by solder (paragraph 0014). The upper surface of the semiconductor chip and the lower surface of the heat spreader block are joined by solder (paragraph 0014). The upper surface of the heat sink block and the lower surface of the upper heat sink are joined by solder (paragraph 0014). This dissipates heat from both sides of the semiconductor chip via the lower heat sink and the upper heat sink (paragraph 0014). The resin fills and seals the gap between the pair of lower and upper heat sinks and the peripheral portions of the semiconductor chip and the heat sink block (paragraph 0019). The lower surface of the lower heat sink and the upper surface of the upper heat sink are exposed (paragraph 0026).
In addition, in a power module employing a double-sided cooling structure, a structure for positioning a heat dissipation member may be employed.
For example, a power module described in patent document 2 includes a 1 st cooler, a housing, a circuit unit, a heat sink, a 2 nd cooler, and a sealing resin body (paragraphs 0025, 0026, and 0031). The circuit unit includes an insulating substrate and a semiconductor element (paragraph 0025). The insulating substrate is bonded to the 1 st cooler (paragraph 0025). A semiconductor element is mounted on an insulating substrate (paragraph 0025). The heat sink is soldered to the circuit unit (paragraph 0025). The 2 nd cooler is in contact with the heat sink (paragraph 0026). A sealing resin body is formed in a housing space for housing the circuit unit (paragraphs 0025 and 0031). The 2 nd cooler is fitted into a notch formed in a lattice-like partition (paragraph 0029). Thereby, a gap for filling the resin is formed between the housing space and the 2 nd cooler (paragraph 0030).
In addition, power modules mounted on household electrical appliances are required to be small and lightweight, to have high reliability, and to have high productivity that can cope with various types of production.
Further, the power module is also required to have a package form that can be applied to a SiC semiconductor that has a high operating temperature and high efficiency and is highly likely to become the mainstream in the future.
Documents of the prior art
Patent document
Patent document 1: japanese patent laid-open publication No. 2003-110064
Patent document 2: japanese patent laid-open publication No. 2009-164156
Disclosure of Invention
In the case where the resin is attached to 2 heat dissipation surfaces in the power module adopting the two-sided cooling configuration, it is difficult to connect the 2 heat dissipation surfaces to the cooler. Therefore, a polishing step of removing the resin attached to the 2 heat dissipation surfaces and exposing the 2 heat dissipation surfaces is required.
However, the polishing process requires a special apparatus and a long processing time, which causes a reduction in productivity of the power module. In the polishing step, if the metal powder generated in the polishing step is not completely removed by cleaning, or the like, the reliability of the power module such as insulation failure is reduced.
In addition, when a structure for positioning a heat dissipation member is employed in a power module employing a double-sided cooling structure, the structure may cause leakage of a liquid sealing material. For example, in the power module described in patent document 2, there is a possibility that the liquid sealing material leaks through a gap formed between the 2 nd cooler and the recessed groove. This problem is particularly significant in the case where the liquid sealing material is heated to about 60 ℃ to reduce the viscosity of the liquid sealing material to 2 to 6Pa · S in order to ensure the fluidity of the liquid sealing material, and the liquid sealing material may intrude into a minute gap.
These problems occur not only in a power module in which a plurality of semiconductor elements are mounted, but also in a discrete component in which one semiconductor element is mounted.
The present invention has been made in view of these problems. The invention aims to solve the problem that a grinding process for removing resin attached to 2 heat dissipation surfaces to expose the 2 heat dissipation surfaces is not needed, and the productivity and the reliability of a semiconductor device are improved. Another object to be solved by the present invention is to suppress leakage of the liquid sealing material.
The present invention is directed to a semiconductor device.
The semiconductor device includes a 1 st heat dissipation member, a frame member, a 2 nd heat dissipation member, a semiconductor element, and a sealing resin portion.
A1 st heat dissipation member is embedded in the frame member.
The frame member includes a frame-shaped portion and a positioning portion. The positioning part is positioned at the inner side of the frame-shaped part. The 2 nd heat dissipation member abuts against the positioning portion, and is positioned by the positioning portion.
The 1 st heat radiating surface of the 1 st heat radiating member and the 2 nd heat radiating surface of the 2 nd heat radiating member face in opposite directions to each other and are exposed to the outside.
The semiconductor element is sandwiched between a 1 st heat sink member and a 2 nd heat sink member.
The sealing resin portion fills a gap between the frame member and the 2 nd heat dissipating member to seal the semiconductor element.
The present invention is also directed to a power conversion device including the semiconductor device.
The present invention is also directed to a method of manufacturing a semiconductor device.
In the method for manufacturing a semiconductor device, a 1 st heat dissipating member having a 1 st heat dissipating surface is embedded, and a frame member having a frame-shaped portion and a positioning portion located inside the frame-shaped portion is formed by insert molding.
Then, the 1 st heat radiating member and the 2 nd heat radiating member sandwich the semiconductor element so that the 1 st heat radiating surface of the 1 st heat radiating member and the 2 nd heat radiating surface of the 2 nd heat radiating member face in directions opposite to each other, the 2 nd heat radiating member is abutted to the positioning portion, and the 2 nd heat radiating member is positioned by the positioning portion.
Thereafter, a liquid sealing material including a sealing resin is poured into a gap between the frame member and the 2 nd heat sink member and hardened.
According to the present invention, the 1 st heat dissipation member is embedded in the frame member, and the sealing resin portion fills the gap between the frame member and the 2 nd heat dissipation member. Therefore, adhesion of the resin to the 1 st heat dissipation surface of the 1 st heat dissipation member and the 2 nd heat dissipation surface of the 2 nd heat dissipation member can be suppressed during the manufacture of the semiconductor device. Thus, the polishing step of removing the resin adhering to the 1 st heat dissipation surface of the 1 st heat dissipation member and the 2 nd heat dissipation surface of the 2 nd heat dissipation member to expose the 1 st heat dissipation surface of the 1 st heat dissipation member and the 2 nd heat dissipation surface of the 2 nd heat dissipation member becomes unnecessary, and productivity and reliability of the semiconductor device can be improved.
In addition, according to the present invention, the positioning portion for positioning the heat dissipation member is located inside the frame-shaped portion. Therefore, the positioning portion does not cause leakage of the liquid sealing material, and leakage of the liquid sealing material can be suppressed.
The objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description and the accompanying drawings.
Drawings
Fig. 1 is a top view schematically illustrating a power module of embodiment 1.
Fig. 2 is a top view schematically illustrating a structure in which the upper surface heat dissipation device, the 1 st upper surface solder layer, the 2 nd upper surface solder layer, the 3 rd upper surface solder layer, and the sealing resin section are removed from the power module of embodiment 1.
Fig. 3 is an exploded perspective view schematically illustrating a structure in which a sealing resin portion is removed from a power module according to embodiment 1.
Fig. 4 is a sectional view schematically illustrating a cross section of the power module of embodiment 1 at the position of a cutting line a-a depicted in fig. 1.
Fig. 5 is a sectional view schematically illustrating a cross section of the power module of embodiment 1 at the position of a cutting line B-B depicted in fig. 1.
Fig. 6 is a flowchart showing a flow of manufacturing the power module according to embodiment 1.
Fig. 7 is a sectional view schematically illustrating an intermediate product obtained in the middle of manufacturing the power module according to embodiment 1.
Fig. 8 is a sectional view schematically showing an intermediate product obtained in the middle of manufacturing the power module according to embodiment 1.
Fig. 9 is a sectional view schematically showing an intermediate product obtained in the middle of manufacturing the power module according to embodiment 1.
Fig. 10 is a sectional view schematically showing an intermediate product obtained in the middle of manufacturing the power module according to embodiment 1.
Fig. 11 is a cross-sectional view schematically illustrating a cross section of a power module according to another example 1 of embodiment 1 at the position of a cutting line a-a depicted in fig. 1.
Fig. 12 is a cross-sectional view schematically illustrating a cross section of a power module according to another example 2 of embodiment 1 at the position of a cutting line a-a depicted in fig. 1.
Fig. 13 is an exploded top view schematically illustrating a structure after removing the 1 st upper surface solder layer, the 2 nd upper surface solder layer, the 3 rd upper surface solder layer, and the sealing resin portion from the power module of embodiment 2.
Fig. 14 is a sectional view schematically illustrating a cross section of the power module of embodiment 2 at the position of the cutting line C-C depicted in fig. 13.
Fig. 15 is a flowchart showing a flow of manufacturing the power module according to embodiment 2.
Fig. 16 is an exploded top view schematically illustrating a structure in which the 1 st upper surface solder layer, the 2 nd upper surface solder layer, the 3 rd upper surface solder layer, the 4 th upper surface solder layer, the 5 th upper surface solder layer, and the sealing resin portion are removed from the power module of the other example of embodiment 2.
Fig. 17 is a cross-sectional view schematically illustrating a cross section of a power module according to another example of embodiment 2 at the position of a cutting line D-D depicted in fig. 16.
Fig. 18 is a cross-sectional view schematically illustrating a power module according to another example of embodiment 2 at the position of a cutting line E-E depicted in fig. 16.
Fig. 19 is a top view schematically illustrating a power module of embodiment 3.
Fig. 20 is a sectional view schematically illustrating a cross section of the power module of embodiment 3 at the position of the cutting line F-F depicted in fig. 19.
Fig. 21 is a top view schematically illustrating a power module of embodiment 4.
Fig. 22 is a top view schematically illustrating a structure in which the following upper surface heat dissipation device, 1 st upper surface solder layer, 2 nd upper surface solder layer, 3 rd upper surface solder layer, and sealing resin portion are removed from the power module of embodiment 4.
Fig. 23 is a cross-sectional view schematically illustrating a cross section of a power module according to another example 1 of embodiment 4 at the position of a cutting line G-G depicted in fig. 21.
Fig. 24 is a cross-sectional view schematically illustrating a cross section of a power module according to another example 1 of embodiment 4 at the position of a cutting line H-H depicted in fig. 21.
Fig. 25 is a cross-sectional view schematically illustrating a cross section of a power module according to another example 1 of embodiment 4 at the position of a cutting line I-I depicted in fig. 21.
Fig. 26 is a sectional view schematically illustrating a power module of embodiment 5.
Fig. 27 is a cross-sectional view schematically illustrating a state in which the power module according to embodiment 5 is inserted into a cooling heat dissipation member.
Fig. 28 is a block diagram illustrating a power conversion device of embodiment 6.
(symbol description)
1000. 2000, 3000, 4000, 5000: a power module; 1020: insert mold frame (insert mold frame); 1040: lower surface heat dissipation equipment; 1041: a signal terminal; 1042: 1 st external terminal; 1043: a 2 nd external terminal; 1044: a frame member; 1160: a frame-shaped portion; 1161: a step portion; 1021: a 1 st semiconductor element; 1022: a 2 nd semiconductor element; 1025: an upper surface heat dissipation device; 1030: a sealing resin section; 1060: a surface electrode; 1061: a back electrode; 1062: a signal electrode; 1171. 1172, 1173, 1174: a plurality of portions; 2040: a lower surface insulating circuit board; 2400. 2420: a substrate; 2401. 2421: an insulating layer; 2402. 2422: a conductor layer; 2423: a signal circuit; 2025: an upper surface insulating circuit board; 3500: the 1 st joint part; 3501: a 2 nd engaging part; 3502: a 3 rd engaging part; 3520: 1 st opening part; 3521: a 2 nd opening part; 3522: a 3 rd opening part; 100: a power source; 200: a power conversion device; 201: a main conversion circuit; 202: a semiconductor module; 203: a control circuit; 300: and (4) loading.
Detailed Description
1 embodiment mode 1
1.1 overview of Power Module
Fig. 1 is a top view schematically illustrating a power module of embodiment 1. Fig. 2 is a top view schematically illustrating a structure in which the following upper surface heat dissipation device, 1 st upper surface solder layer, 2 nd upper surface solder layer, 3 rd upper surface solder layer, and sealing resin portion are removed from the power module of embodiment 1. Fig. 3 is an exploded perspective view schematically showing a structure in which a sealing resin portion described below is removed from the power module according to embodiment 1. Fig. 4 and 5 are cross-sectional views schematically illustrating a power module according to embodiment 1. Fig. 4 and 5 illustrate cross sections at the positions of the cutting lines a-a and B-B depicted in fig. 1, respectively.
As shown in fig. 1 to 5, the power module 1000 according to embodiment 1 includes an insert mold frame 1020, a 1 st semiconductor element 1021, a 2 nd semiconductor element 1022, a 1 st lower surface solder layer 1023, a 2 nd lower surface solder layer 1024, an upper surface heat sink 1025, a 1 st upper surface solder layer 1026, a 2 nd upper surface solder layer 1027, a 3 rd upper surface solder layer 1028, a bonding wire 1029, and a sealing resin portion 1030. The power module 1000 may include elements other than these elements.
1.2 insert Molding frame
As shown in fig. 1 to 5, the insert mold frame 1020 includes a lower surface heat sink 1040, a signal terminal 1041, a 1 st external terminal 1042, a 2 nd external terminal 1043, and a frame member 1044. The insert mold frame 1020 may include elements other than these elements. The lower surface heat sink 1040, the signal terminal 1041, the 1 st external terminal 1042, and the 2 nd external terminal 1043 are embedded in the frame member 1044.
The insert mold frame 1020 is formed by injecting a curing precursor of resin into a gap of a mold in which the lower surface heat sink 1040, the signal terminal 1041, the 1 st external terminal 1042, and the 2 nd external terminal 1043 are sandwiched, and curing the injected curing precursor of resin. Therefore, even when the signal terminal 1041, the 1 st external terminal 1042, and the 2 nd external terminal 1043 penetrate the frame member 1044, it is possible to suppress a gap from being formed between the signal terminal 1041, the 1 st external terminal 1042, and the 2 nd external terminal 1043 and the frame member 1044, the gap from which the liquid sealing material that is a precursor of the sealing resin portion 1030 leaks out. The pressure of the fluid injected before curing of the resin during molding of the insert mold frame 1020 is lower than that during molding of the transfer mold frame. Therefore, when the insert mold frame 1020 is molded, a thin film including a cured product of the resin is not easily formed on the surface of the lower surface heat sink 1040 or the like. In addition, even in the case of forming the film, the film is easily removed.
1.3 bonding of semiconductor element, Heat sink device, Signal terminal, and external terminal
As shown in fig. 4 and 5, the 1 st semiconductor element 1021 includes a back surface electrode 1060. As shown in fig. 4 and 5, the 2 nd semiconductor element 1022 includes a back surface electrode 1080.
As shown in fig. 4 and 5, the back electrode 1060 of the 1 st semiconductor element 1021 and the back electrode 1080 of the 2 nd semiconductor element 1022 are solder-bonded to the upper surface 1100 of the lower heat sink 1040 through the 1 st lower surface solder layer 1023 and the 2 nd lower surface solder layer 1024, respectively. Thus, the 1 st semiconductor element 1021 and the 2 nd semiconductor element 1022 are die-bonded to the lower surface heat sink 1040, mechanically and thermally bonded to the lower surface heat sink 1040, and electrically connected to the lower surface heat sink 1040.
As shown in fig. 2 to 5, the 1 st semiconductor element 1021 further includes a surface electrode 1061. As shown in fig. 2 to 5, the 2 nd semiconductor element 1022 further includes a surface electrode 1081.
As shown in fig. 4 and 5, the surface electrode 1061 of the 1 st semiconductor element 1021 and the surface electrode 1081 of the 2 nd semiconductor element 1022 are solder bonded to the lower surface 1120 of the upper surface heat sink 1025 via the 1 st upper surface solder layer 1026 and the 2 nd upper surface solder layer 1027, respectively. Thus, the 1 st semiconductor element 1021 and the 2 nd semiconductor element 1022 are die-bonded to the top surface heat sink rig 1025, mechanically and thermally bonded to the top surface heat sink rig 1025, and electrically connected to the top surface heat sink rig 1025.
As shown in fig. 2 to 5, the 1 st semiconductor element 1021 further includes a signal electrode 1062. The signal electrode 1062 is electrically connected to a signal terminal 1041 via a bonding wire 1029.
The 1 st external terminal 1042 is, as illustrated in fig. 4, bonded to the upper surface 1100 of the lower surface heat sink assembly 1040. Thus, the 1 st external terminal 1042 is electrically connected to the lower surface heat sink 1040. The 1 st external terminal 1042 is electrically connected to the back surface electrode 1060 of the 1 st semiconductor element 1021 and the back surface electrode 1080 of the 2 nd semiconductor element 1022 through the lower surface heat sink 1040.
The 2 nd external terminal 1043 is solder bonded to the lower surface 1120 of the upper surface heat dissipating device 1025 via a 3 rd upper surface solder layer 1028, as illustrated in fig. 5. Thereby, the 2 nd external terminal 1043 is electrically connected to the upper surface heat sink 1025. The 2 nd external terminal 1043 is electrically connected to the surface electrode 1061 of the 1 st semiconductor element 1021 and the surface electrode 1081 of the 2 nd semiconductor element 1022 through the upper surface heat sink 1025.
The solder bonding using solder as a bonding medium may be replaced with other types of bonding. For example, the solder bonding may be replaced by bonding using a cured product of a conductive adhesive, an Ag sintered material, a Cu sintered material, or the like as a bonding medium. The conductive adhesive contains, for example, an epoxy resin and an Ag filler. The Ag filler is dispersed into the epoxy resin. The Ag sintered material and the Cu sintered material are obtained by firing Ag nanoparticles and Cu nanoparticles at low temperatures, respectively.
1.4 Heat dissipation Path
As shown in fig. 4 and 5, the 1 st semiconductor element 1021 and the 2 nd semiconductor element 1022 are sandwiched between the lower surface heat sink 1040 and the upper surface heat sink 1025. The heat generated from the 1 st semiconductor element 1021 and the 2 nd semiconductor element 1022 passes through the lower surface heat sink 1040 and the upper surface heat sink 1025, and is released from the lower surface 1101 of the lower surface heat sink 1040 and the upper surface 1121 of the upper surface heat sink 1025. In addition, the lower surface 1101 of the lower surface heat dissipation device 1040 faces the 1 st direction D1, and the upper surface 1121 of the upper surface heat dissipation device 1025 faces the 2 nd direction D2 opposite to the 1 st direction D1. Thus, lower surface 1101 of lower surface heat sink 1040 and upper surface 1121 of upper surface heat sink 1025 serve as heat dissipation surfaces, and lower surface heat sink 1040 and upper surface heat sink 1025 serve as the 1 st heat dissipation member and the 2 nd heat dissipation member, respectively, constituting the double-sided cooling structure.
1.5 encapsulation of semiconductor elements
The sealing resin portion 1030 includes a hardened substance of sealing resin, as illustrated in fig. 4 and 5, filling the gap 1140 of the insert mold frame 1020 and the upper surface heat dissipation device 1025. The main portion of gap 1140 is formed by the gap between lower surface heat dissipating arrangement 1040 and upper surface heat dissipating arrangement 1025 and the gap between frame member 1044 and upper surface heat dissipating arrangement 1025. Thus, the 1 st semiconductor element 1021 and the 2 nd semiconductor element 1022 sandwiched between the lower surface heat sink 1040 and the upper surface heat sink 1025 are sealed.
1.6 positioning of surface Heat dissipation Equipment
As shown in fig. 2 and 3, the frame member 1044 includes a frame portion 1160 and a step portion 1161.
The frame portion 1160 has a frame shape. The step portion 1161 is located inside the frame portion 1160. Step surface 1180 of step portion 1161 has a step with end 1200 of frame portion 1160 most deviated from direction 2D 2. Upper surface heat sink assembly 1025 abuts step surface 1180 of step portion 1161, and is positioned by step surface 1180 of step portion 1161. Accordingly, the stepped surface 1180 of the stepped portion 1161 serves as a positioning portion for positioning the upper surface heat sink 1025, and the upper surface heat sink 1025 is positioned at a desired position, thereby improving the accuracy of the thickness of the power module 1000.
The desired position is a position where the upper surface 1121 of the upper surface heat dissipation apparatus 1025 protrudes slightly from the frame member 1044 in the 2 nd direction D2, as illustrated in fig. 4 and 5. This can prevent the liquid sealing material, which is a precursor of the sealing resin portion 1030, from covering the upper surface 1121 of the upper surface heat sink 1025, and prevent the resin from adhering to the upper surface 1121 of the upper surface heat sink 1025.
The position where the upper surface heat dissipation device 1025 is positioned is determined by the height from the bottom surface of the insert mold frame 1020 to the step surface 1180 of the step 1161. The height is determined according to where the stepped portion 1161 is disposed in the frame portion 1160. The step surface 1180 of the step portion 1161 includes a plurality of portions 1171, 1172, 1173, and 1174 separated from each other. The plurality of portions 1171, 1172, 1173, and 1174 form a same plane and contact a lower surface 1120 of the upper surface heat dissipation device 1025 that faces in the 1 st direction D1. Thus, the upper surface heat dissipation device 1025 is positioned on the same plane constituted by the plurality of portions 1171, 1172, 1173, and 1174 of the step surface 1180 of the step portion 1161. Moreover, the thicknesses of 1 st upper surface solder layer 1026, 2 nd upper surface solder layer 1027, and 3 rd upper surface solder layer 1028 can be maintained at desired thicknesses, and excessive pressing of 1 st upper surface solder layer 1026, 2 nd upper surface solder layer 1027, and 3 rd upper surface solder layer 1028 can be suppressed.
As shown in fig. 2 and 3, the step portion 1161 preferably has a semi-cylindrical shape extending in the 2 nd direction D2. This makes it easy to process the mold used for insert molding of the insert mold frame 1020, and prevents the step portion 1161 from hindering the flow of the liquid sealing material when the liquid sealing material serving as a precursor of the sealing resin portion 1030 is injected into the tank space 1220.
1.7 accommodating the sealing resin portion into the insert mold frame
As shown in fig. 3, 4, and 5, the lower heat dissipating device 1040 and the frame member 1044 have a shape of a box with no cover, in which the side walls are mainly formed by the frame-like portion 1160 and the bottom is mainly formed by the lower heat dissipating device 1040. The sealing resin portion 1030 is accommodated in the box space 1220 defined by the uncovered box shape, and does not protrude from the box space 1220. This can further suppress the liquid sealing material, which is a precursor of the sealing resin portion 1030, from covering the upper surface 1121 of the upper surface heat sink 1025, and can further suppress the resin from adhering to the upper surface 1121 of the upper surface heat sink 1025.
1.8 injection site of liquid sealing Material
The upper surface heat dissipation device 1025 has a planar shape smaller than that of the inlet opening of the in-box space 1220, as illustrated in fig. 1 to 5. Further, upper surface heat sink 1025 has a shape that can be housed in frame-shaped portion 1160 without being placed on frame-shaped portion 1160. Thus, a gap 1260 shown in fig. 1, 2, and 5 is formed between the upper surface heat dissipation device 1025 and the frame portion 1160, and a liquid sealing material as a precursor of the sealing resin portion 1030 can be easily injected into the gap 1140 between the insert mold frame 1020 and the upper surface heat dissipation device 1025 from the formed gap 1260. End surfaces 1122 of upper surface heat dissipation apparatus 1025 extend from edges of upper surface 1121 of upper surface heat dissipation apparatus 1025 to edges of lower surface 1120 of upper surface heat dissipation apparatus 1025. The entire end face 1122 of the upper surface heat sink 1025 is separated from the frame portion 1160. This forms a space between the entire end face 1122 of upper heat sink 1025 and frame portion 1160. In this space, a nozzle for discharging the liquid sealing material is inserted when the liquid sealing material is injected into the gap 1140 between the insert mold frame 1020 and the upper surface heat dissipation device 1025. This space facilitates the replacement of the gas in the tank interior space 1220.
1.9 Material of sealing resin portion
The sealing resin is a direct potting resin. The direct potting resin includes fillers such as epoxy resin and silica filler. The filler is dispersed in the epoxy resin. The direct potting resin may be replaced with another type of liquid sealing material that can be poured into the gap 1140 between the insert mold frame 1020 and the upper surface heat sink 1025 and can be cured at normal temperature or by heating or Ultraviolet (UV) irradiation. For example, the potting resin may be replaced with a liquid gel.
1.10 Material of Heat dissipating device
Lower surface heat spreading equipment 1040 and upper surface heat spreading equipment 1025 comprise Cu. Cu may be replaced with other kinds of metals or alloys having high heat dissipation, high electrical conductivity, and high solder wettability. For example, Cu may be replaced with Ni or an alloy containing Ni as a main component.
The lower surface heat sink 1040 and the upper surface heat sink 1025 made of 1 metal may be replaced with heat sinks made of 2 or more metals or alloys. For example, lower surface heat sink 1040 and upper surface heat sink 1025 may be replaced with heat sinks including a base material made of a metal or alloy having high heat dissipation and high electrical conductivity and an outermost surface layer made of a metal or alloy having high solder wettability. The base material preferably includes Cu, Al, or Ni or an alloy containing Cu, Al, or Ni as a main component. The base material does not need to be made of a metal or alloy having high solder wettability, but may be made of a metal or alloy such as Al which does not have high solder wettability. The most preferable surface layer is made of Cu, Ni, Au or Ag or an alloy containing Cu, Ni, Au or Ag as a main component.
1.11 Material of frame Member
The frame member 1044 includes a cured Product of Polyphenylene Sulfide (PPS) resin. The PPS resin may be replaced with another resin. For example, the PPS resin may be replaced with a Liquid Crystal Polymer (LCP) resin.
1.12 materials of back electrode and front electrode of semiconductor device
The back surface electrode 1060 and the front surface electrode 1061 of the 1 st semiconductor element 1021 and the back surface electrode 1080 and the front surface electrode 1081 of the 2 nd semiconductor element 1022 are made of a material that can be bonded to a bonding destination using a bonding medium such as solder or an Ag frit, and preferably include Cu, Au, Ag, or Pt, or an alloy containing Cu, Au, Ag, or Pt as a main component.
1.13 Material of bonding wire
The bonding wire 1029 is an Al wire. The Al line may be replaced with another type of conductor line. For example, the Al wire may be replaced with a Cu wire, an Al-coated Cu wire, an Au wire, or the like.
1.14 kinds of the 1 st semiconductor element and the 2 nd semiconductor element
The 1 st semiconductor element 1021 and the 2 nd semiconductor element 1022 are power semiconductor elements.
The back surface electrode 1060 and the front surface electrode 1061 of the 1 st semiconductor element 1021 are a 1 st main electrode and a 2 nd main electrode of the 1 st semiconductor element 1021, respectively. The signal electrode 1062 of the 1 st semiconductor element 1021 is an electrode for controlling the conduction state between the back surface electrode 1060 of the 1 st semiconductor element 1021 and the surface electrode 1061 of the 1 st semiconductor element 1021. A signal for controlling the conduction state between the back surface electrode 1060 of the 1 st semiconductor element 1021 and the front surface electrode 1061 of the 1 st semiconductor element 1021 is input to the signal electrode 1062 of the 1 st semiconductor element 1021.
The 1 st semiconductor element 1021 is an Insulated Gate Bipolar Transistor (IGBT) which is an Si semiconductor, for example. The 2 nd semiconductor element 1022 is, for example, a diode. When the 1 st semiconductor element 1021 is an IGBT and the 2 nd semiconductor element 1022 is a diode, the back surface electrode 1060, the front surface electrode 1061, and the signal electrode 1062 of the 1 st semiconductor element 1021 are a collector, an emitter, and a gate of the IGBT, respectively. The back surface electrode 1080 and the front surface electrode 1081 of the 2 nd semiconductor element 1022 are a cathode and an anode of a diode, respectively. In this case, the power module 1000 may constitute 1 branch of the inverter, and has a 1-in-1 module configuration including a switching element formed of the IGBT and a free wheel diode formed of the diode, with 1 pair being built in. It is also possible to exchange the collector and emitter and exchange the anode and cathode.
The 1 st semiconductor element 1021 and the 2 nd semiconductor element 1022 may be Integrated Circuits (ICs), Metal Oxide Semiconductor Field Effect Transistors (MOSFETs), or the like.
Example of size 1.15
The lower surface heat dissipating device 1040 has, for example, outer dimensions 35mm × 22mm and a thickness of 3 mm. The signal terminal 1041 has a thickness of 0.4mm, for example. The 1 st external terminal 1042 and the 2 nd external terminal 1043 have a thickness of 0.8mm, for example. The frame member 1044 has, for example, an outer dimension of 48mm × 28mm and a height of 6.2 mm. When the 1 st semiconductor element 1021 is an IGBT, the IGBT has an outer dimension of 15mm × 15mm and a thickness of 0.3mm, for example. In the case where the 2 nd semiconductor element 1022 is a diode, the diode has an outer dimension of 15mm × 15mm and a thickness of 0.3mm, for example. The upper surface heat dissipation device 1025 has, for example, outer dimensions of 30mm × 20mm and a thickness of 3 mm. Step surface 1180 of step portion 1161 has a height of 3.6mm from the bottom surface, for example.
1.16 method for manufacturing power module
Fig. 6 is a flowchart showing a flow of manufacturing the power module according to embodiment 1. Fig. 7 to 10 are sectional views schematically illustrating intermediate products obtained in the middle of manufacturing the power module according to embodiment 1.
In manufacturing the power module 1000, steps S101 to S105 shown in fig. 6 are sequentially performed.
In step S101, the insert mold frame 1020 illustrated in fig. 7 is formed by insert molding. The 1 st external terminal 1042 not shown in fig. 7 has been bonded to the lower surface heat dissipation device 1040 at this stage.
In step S102, as shown in fig. 7, an intermediate product is prepared in which the 1 st semiconductor element 1021 and the 2 nd semiconductor element 1022 are placed on the lower surface heat sink 1040 with the 1 st lower surface solder sheet 1300 and the 2 nd lower surface solder sheet 1301 interposed therebetween. The intermediate product is heated in a reflow furnace. Thus, the 1 st lower surface solder sheet 1300 and the 2 nd lower surface solder sheet 1301 are changed to the 1 st lower surface solder layer 1023 and the 2 nd lower surface solder layer 1024, respectively, and the 1 st semiconductor element 1021 and the 2 nd semiconductor element 1022 are solder-bonded to the lower surface heat sink 1040.
In the step S103, as illustrated in fig. 8, one end of a bonding wire 1029 is bonded to the signal electrode 1062 of the 1 st semiconductor element 1021, and the other end of the bonding wire 1029 is bonded to the signal terminal 1041. Thereby, the signal electrode 1062 of the 1 st semiconductor element 1021 is electrically connected to the signal terminal 1041 via the bonding wire 1029.
In step S104, an intermediate product in which the upper surface heat dissipation device 1025 is placed on the step surface 1180 of the step portion 1161 is prepared. At this time, as illustrated in fig. 9, the top surface heat sink 1025 is disposed on the 1 st semiconductor element 1021, the 2 nd semiconductor element 1022, and the 2 nd external terminal 1043 with the 1 st top surface solder sheet 1303, the 2 nd top surface solder sheet 1304, and the 3 rd top surface solder sheet 1305 interposed therebetween, respectively. The intermediate product is heated in a reflow furnace. Thus, the 1 st upper surface solder sheet 1303, the 2 nd upper surface solder sheet 1304, and the 3 rd upper surface solder sheet 1305 are changed to the 1 st upper surface solder layer 1026, the 2 nd upper surface solder layer 1027, and the 3 rd upper surface solder layer 1028, respectively, and the 1 st semiconductor element 1021, the 2 nd semiconductor element 1022, and the 2 nd external terminal 1043 are solder-bonded to the upper surface heat sink 1025.
Through steps S102 and S104, the 1 st semiconductor element 1021 and the 2 nd semiconductor element 1022 are sandwiched between the lower surface heat sink 1040 and the upper surface heat sink 1025, and the lower surface heat sink 1040 and the upper surface heat sink 1025 face each other with the 1 st semiconductor element 1021 and the 2 nd semiconductor element 1022 sandwiched therebetween, so that the lower surface 1101 of the lower surface heat sink 1040 and the upper surface 1121 of the upper surface heat sink 1025 face each other in opposite directions.
In step S105, as shown in fig. 10, the direct potting resin 1320 is poured into the gap 1140 while being heated to 60 ℃, and the poured direct potting resin 1320 is vacuum-defoamed and heated. The heating was carried out according to a heating profile maintaining 140 ℃ for 1.5 hours after maintaining 100 ℃ for 1.5 hours. Thereby, the poured direct potting resin 1320 is cured to change to the sealing resin portion 1030, and the power module 1000 illustrated in fig. 1 to 5 is completed.
The completed power module 1000 has a total thickness of 6.6mm thicker than the height of the frame member 1044 by placing the upper surface heat dissipation device 1025 on the stepped surface 1180 of the stepped portion 1161 in the process S104. Thus, upper surface 1121 of upper surface heat sink 1025 protrudes from frame member 1044, and lower surface 1101 of lower surface heat sink 1040 and upper surface 1121 of upper surface heat sink 1025 can be reliably brought into contact with the cooler.
1.17 Effect of embodiment 1
According to embodiment 1, the lower surface heat dissipation device 1040 is embedded in the frame member 1044, and the sealing resin portion 1030 fills the gap between the frame member 1044 and the upper surface heat dissipation device 1025. Therefore, adhesion of resin to lower surface 1101 of lower surface heat dissipation device 1040 and upper surface 1121 of upper surface heat dissipation device 1025 during manufacture of power module 1000 can be suppressed. Thus, a polishing step of removing the resin adhering to lower surface 1101 of lower surface heat sink 1040 and upper surface 1121 of upper surface heat sink 1025 to expose lower surface 1101 of lower surface heat sink 1040 and upper surface 1121 of upper surface heat sink 1025 is unnecessary, and productivity and reliability of power module 1000 can be improved.
In addition, according to embodiment 1, the step surface 1180 of the step portion 1161 for positioning the upper surface heat dissipation device 1025 is located inside the frame-like portion 1160. Therefore, the stepped surface 1180 of the stepped portion 1161 does not cause leakage of the liquid sealing material that is a precursor of the sealing resin portion 1030, and leakage of the liquid sealing material can be suppressed.
1.18 modification
The power module 1000 is a semiconductor device in which 2 semiconductor elements in total, each of which is composed of 1 st semiconductor element 1021 and 1 nd semiconductor element 1022, are mounted. The above-described technique can be applied to a power module as a discrete component of a semiconductor device mounted with 1 or more semiconductor elements in total or as a semiconductor device mounted with 3 or more semiconductor elements in total. When the above-described technique is applied to a power module in which 3 or more semiconductor elements are mounted, the power module may have a module structure in which 2 or more pairs of switching elements each including an IGBT and a free wheel diode each including a diode are incorporated. For example, the power module may have a 2-in-1 module structure in which 2 pairs of the pair are incorporated, or may have a 6-in-1 module structure in which 6 pairs of the pair are incorporated.
1.19 other examples of the shape of the surface Heat sink
Fig. 11 is a cross-sectional view schematically illustrating a cross section of a power module according to another example 1 of embodiment 1. Fig. 12 is a cross-sectional view schematically illustrating a cross section of a power module according to another example 2 of embodiment 1. Fig. 11 and 12 illustrate cross sections at the location of the cutting line a-a depicted in fig. 1.
In the power module 1000 according to the other example 1 of embodiment 1 illustrated in fig. 11, the end face 1122 of the upper surface heat dissipation device 1025 extends from the edge of the upper surface 1121 of the upper surface heat dissipation device 1025 to the edge of the lower surface 1120 of the upper surface heat dissipation device 1025. Lower surface 1120 occupies a smaller area than upper surface 1121. The end surface 1122 is a slope that continuously moves inward as it moves away from the edge of the upper surface 1121 in the 1 st direction D1.
In the power module 1000 according to the other example 2 of embodiment 1 illustrated in fig. 12, the end face 1122 of the upper surface heat dissipation device 1025 extends from the edge of the upper surface 1121 of the upper surface heat dissipation device 1025 to the edge of the lower surface 1120 of the upper surface heat dissipation device 1025. Lower surface 1120 occupies a smaller area than upper surface 1121. End surface 1122 of upper surface heat sink 1025 is a stepped surface that moves discontinuously inward as it moves away from the edge of upper surface 1121 in direction 1D 1.
When the end face 1122 of the upper surface heat dissipation device 1025 is the above-described inclined surface or step formation surface, it is possible to suppress the liquid sealing material, which is a precursor of the sealing resin portion 1030, from climbing up the upper surface 1121 of the upper surface heat dissipation device 1025.
2 embodiment 2
2.1 major points of difference between embodiment 1 and embodiment 2
Fig. 13 is an exploded top view schematically illustrating a structure after removing the 1 st upper surface solder layer, the 2 nd upper surface solder layer, the 3 rd upper surface solder layer, and the sealing resin portion from the power module of embodiment 2. Fig. 14 is a sectional view schematically illustrating a power module of embodiment 2. Fig. 14 illustrates a cross-section at the location of the cutting line C-C depicted in fig. 13.
The power module 2000 of embodiment 2 illustrated in fig. 13 and 14 is different from the power module 1000 of embodiment 1 illustrated in fig. 1 to 5 mainly in the following differences.
The power module 1000 according to embodiment 1 is a semiconductor device in which 2 semiconductor elements in total, each of which is composed of 1 st semiconductor element 1021 and 1 nd semiconductor element 1022, are mounted. In contrast, the power module 2000 of embodiment 2 is a semiconductor device in which a total of 4 semiconductor elements including 21 st semiconductor elements 1021 and 2 nd semiconductor elements 1022 are mounted.
In the power module 1000 according to embodiment 1, the lower surface heat dissipation fixture 1040 and the upper surface heat dissipation fixture 1025 are the 1 st heat dissipation member and the 2 nd heat dissipation member, respectively, which constitute the double-sided cooling structure. In contrast, in the power module 2000 of embodiment 2, the lower surface insulated circuit board 2040 and the upper surface insulated circuit board 2025 serve as the 1 st heat radiating member and the 2 nd heat radiating member, respectively, which constitute the double-sided cooling structure.
Next, a configuration adopted in the power module 2000 of embodiment 2 will be described in relation to the above-described difference. The configuration not described is also employed in the power module 2000 of embodiment 2 as the configuration employed in the power module 1000 of embodiment 1.
2.2 Structure of insulating Circuit Board
As shown in fig. 14, the lower surface insulating circuit board 2040 includes a base 2400, an insulating layer 2401, and a conductor layer 2402. The lower surface insulating circuit board 2040 has a laminated structure in which an insulating layer 2401 and a conductor layer 2402 are laminated on a base 2400. The insulating layer 2401 is interposed between the base 2400 and the conductor layer 2402, electrically insulating the base 2400 from the conductor layer 2402.
As shown in fig. 14, the upper surface insulating circuit board 2025 includes a base 2420, an insulating layer 2421, and a conductor layer 2422. The upper surface insulating circuit board 2025 has a structure in which an insulating layer 2421 and a conductor layer 2422 are stacked on a base 2420. An insulating layer 2421 is between the base 2420 and the conductor layer 2422 to electrically insulate the base 2420 from the conductor layer 2422. As shown in fig. 13, the conductor layer 2422 has a pattern for forming circuit wiring necessary for making the power module 2000 a power module having a 2-in-1 module structure.
Both or one of the lower surface heat sink 1040 and the upper surface heat sink 1025 provided in the power module 1000 according to embodiment 1 may be replaced with an insulated circuit board having a laminated structure similar to that of the lower surface insulated circuit board 2040 and the upper surface insulated circuit board 2025.
2.3 insert Molding frame
As in the case of the lower surface heat sink 1040 provided in the power module 1000 according to embodiment 1, as shown in fig. 13 and 14, the lower surface insulating circuit board 2040 is embedded in the frame member 1044 together with the signal terminals 1041, the 1 st external terminal 1042, and the 2 nd external terminal 1043, and forms the insert mold frame 1020 together with the signal terminals 1041, the 1 st external terminal 1042, the 2 nd external terminal 1043, and the frame member 1044.
2.4 bonding of semiconductor element, insulating circuit board, and external terminal
As shown in fig. 14, the rear surface electrode 1060 of the 1 st semiconductor element 1021 and the rear surface electrode 1080 of the 2 nd semiconductor element 1022 are solder-bonded to the upper surface 2440 of the conductor layer 2402 of the lower surface insulating circuit board 2040 via the 1 st lower surface solder layer 1023 and the 2 nd lower surface solder layer 1024, respectively. Thus, the 1 st semiconductor element 1021 and the 2 nd semiconductor element 1022 are die-bonded to the lower surface insulating circuit board 2040, mechanically and thermally bonded to the lower surface insulating circuit board 2040, and electrically connected to the conductor layer 2402.
As shown in fig. 14, the surface electrode 1061 of the 1 st semiconductor element 1021 and the surface electrode 1081 of the 2 nd semiconductor element 1022 are solder-bonded to the lower surface 2460 of the conductor layer 2422 of the upper surface insulating circuit board 2025 via the 1 st upper surface solder layer 1026 and the 2 nd upper surface solder layer 1027, respectively. Thus, the 1 st semiconductor element 1021 and the 2 nd semiconductor element 1022 are die-bonded to the upper surface insulating circuit board 2025, mechanically and thermally bonded to the upper surface insulating circuit board 2025, and electrically connected to the conductor layer 2422.
The 1 st external terminal 1042 is bonded to the conductor layer 2402 of the lower surface insulating circuit substrate 2040. Thereby, the 1 st external terminal 1042 is electrically connected to the conductor layer 2402. The 1 st external terminal 1042 is electrically connected to the back surface electrode 1060 of the 1 st semiconductor element 1021 and the back surface electrode 1080 of the 2 nd semiconductor element 1022 through the conductor layer 2402 of the lower surface insulating circuit board 2040.
As shown in fig. 14, the 2 nd external terminal 1043 is solder-bonded to the lower surface 2460 of the conductor layer 2422 of the upper surface insulating circuit substrate 2025 via the 3 rd upper surface solder layer 1028. Thereby, the 2 nd external terminal 1043 is electrically connected to the conductor layer 2422 of the upper surface insulating circuit board 2025. The 2 nd external terminal 1043 is electrically connected to the surface electrode 1061 of the 1 st semiconductor element 1021 and the surface electrode 1081 of the 2 nd semiconductor element 1022 through the conductor layer 2422 of the upper surface insulating circuit board 2025.
2.5 Heat dissipation Path
As shown in fig. 13 and 14, the 1 st semiconductor element 1021 and the 2 nd semiconductor element 1022 are sandwiched between the lower surface insulating circuit board 2040 and the upper surface insulating circuit board 2025. The heat generated from the 1 st semiconductor element 1021 and the 2 nd semiconductor element 1022 passes through the lower surface insulating circuit board 2040 and the upper surface insulating circuit board 2025, and is released from the lower surface 2480 of the base 2420 of the lower surface insulating circuit board 2040 and the upper surface 2500 of the base 2400 of the upper surface insulating circuit board 2025. In addition, the lower surface 2480 of the base 2420 faces the 1 st direction D1, and the upper surface 2500 of the base 2400 faces the 2 nd direction D2 opposite to the 1 st direction D1. Thus, the lower surface 2480 of the base 2420 and the upper surface 2500 of the base 2400 become heat radiating surfaces, and the lower surface insulated circuit board 2040 and the upper surface insulated circuit board 2025 become a 1 st heat radiating member and a 2 nd heat radiating member, respectively, which constitute a double-sided cooling structure.
2.6 positioning of surface-insulated Circuit substrate
The upper surface insulating circuit board 2025 abuts against a step surface 1180 of the step portion 1161 shown in fig. 13, and is positioned by the step surface 1180 of the step portion 1161, similarly to the upper surface heat sink 1025 provided in the power module 1000 according to embodiment 1.
2.7 insulating Circuit Board Material
The base 2400 of the lower surface-insulated circuit board 2040 and the base 2420 of the upper surface-insulated circuit board 2025 include Cu. The Cu may be replaced with another kind of metal or alloy having high heat dissipation properties. For example, the Cu may be replaced with Al.
The conductor layer 2402 of the lower surface insulated circuit board 2040 and the conductor layer 2422 of the upper surface insulated circuit board 2025 include Cu. The Cu may be replaced with another type of conductor having high heat dissipation, high electrical conductivity, and high solder wettability. For example, the Cu may be replaced with Ni or an alloy containing Ni as a main component.
The conductor layer 2402 of the lower surface insulated circuit board 2040 and the conductor layer 2422 of the upper surface insulated circuit board 2025 each composed of 1 kind of conductor may be replaced with a conductor layer composed of 2 or more kinds of conductors. For example, the conductor layers 2402 and 2422 may be replaced with a conductor layer including a base material made of a conductor having high heat dissipation and high electrical conductivity and an outermost layer made of a conductor having high solder wettability. The base material preferably includes Cu, Al, or Ni or an alloy containing Cu, Al, or Ni as a main component. The base material does not need to be made of a metal or alloy having high solder wettability, but may be made of a metal or alloy such as Al which does not have high solder wettability. The most preferable surface layer is made of Cu, Ni, Au or Ag or an alloy containing Cu, Ni, Au or Ag as a main component.
The insulating layer 2401 of the lower surface insulating circuit board 2040 and the insulating layer 2421 of the upper surface insulating circuit board 2025 are epoxy resin layers. The epoxy resin layer includes a cured product of a resin composition. The resin composition contains an epoxy resin and fillers such as BN (boron nitride) filler and AlN (aluminum nitride) filler. The filler is dispersed in the epoxy resin. The epoxy resin layer may be replaced with another type of layer having high insulation and a high heat dissipation layer.
The lower surface 2480 of the base 2420 of the lower surface insulating circuit board 2040 and the upper surface 2500 of the base 2400 of the upper surface insulating circuit board 2025 are not covered with resin and are exposed to the outside. This allows the lower surface 2480 of the base 2420 and the upper surface 2500 of the base 2400 to be brought into close contact with the cooler, and heat can be efficiently dissipated from the lower surface 2480 of the base 2420 and the upper surface 2500 of the base 2400.
Example of 2.8 size
The lower surface insulating circuit board 2040 has, for example, an outer dimension of 35mm × 48mm and a thickness of 3 mm. The signal terminal 1041 has a thickness of 0.4mm, for example. The 1 st external terminal 1042 and the 2 nd external terminal 1043 have a thickness of 0.8mm, for example. The frame member 1044 has, for example, an outer dimension of 48mm × 56mm and a height of 6.2 mm. When the 1 st semiconductor element 1021 is an IGBT, the IGBT has an outer dimension of 16mm × 16mm and a thickness of 0.3mm, for example. In the case where the 2 nd semiconductor element 1022 is a diode, the diode has an outer dimension of 16mm × 16mm and a thickness of 0.3mm, for example. The upper surface insulating circuit board 2025 has an outer dimension of 30mm × 44mm and a thickness of 3 mm. Step surface 1180 of step portion 1161 has a height of 3.6mm from the bottom surface, for example.
2.9 method of manufacturing a power module
Fig. 15 is a flowchart showing a flow of manufacturing the power module according to embodiment 2.
In manufacturing the power module 2000, steps S201 to S205 shown in fig. 15 are sequentially performed.
In step S201, the insert mold frame 1020 is formed by insert molding. The 1 st external terminal 1042 has been bonded to the conductor layer 2402 of the lower surface insulating circuit substrate 2040 at this stage.
In step S202, an intermediate product is prepared in which the 1 st semiconductor element 1021 and the 2 nd semiconductor element 1022 are placed on the upper surface 2440 of the conductor layer 2402 of the lower surface insulating circuit board 2040 with the 1 st lower surface solder sheet and the 2 nd lower surface solder sheet interposed therebetween, respectively. The intermediate product is heated in a reflow furnace. Thereby, the 1 st lower surface solder sheet and the 2 nd lower surface solder sheet are changed to the 1 st lower surface solder layer 1023 and the 2 nd lower surface solder layer 1024, respectively, and the 1 st semiconductor element 1021 and the 2 nd semiconductor element 1022 are solder-bonded to the conductor layer 2402.
In step S203, one end of the bonding wire 1029 is bonded to the signal electrode 1062 of the 1 st semiconductor element 1021, and the other end of the bonding wire 1029 is bonded to the signal terminal 1041. Thereby, the signal electrode 1062 is electrically connected to the signal terminal 1041 via the bonding wire 1029.
In step S204, an intermediate product is prepared in which the upper surface insulating circuit board 2025 is placed on the step surface 1180 of the step portion 1161. At this time, the upper surface insulating circuit board 2025 is disposed on the 1 st semiconductor element 1021, the 2 nd semiconductor element 1022, and the 2 nd external terminal 1043 with the 1 st upper surface solder sheet, the 2 nd upper surface solder sheet, and the 3 rd upper surface solder sheet interposed therebetween, respectively. The intermediate product is heated in a reflow furnace. Thus, the 1 st, 2 nd and 3 rd upper surface solder sheets are changed to the 1 st, 2 nd and 3 rd upper surface solder layers 1026, 1027 and 1028, respectively, and the 1 st, 2 nd and 2 nd semiconductor elements 1021, 1022 and 2 nd external terminals 1043 are solder-bonded to the conductor layer 2422 of the upper surface insulating circuit board 2025.
Through the steps S202 and S204, the 1 st semiconductor element 1021 and the 2 nd semiconductor element 1022 are sandwiched between the lower surface insulating circuit board 2040 and the upper surface insulating circuit board 2025 so that the lower surface 2480 of the base body 2420 of the lower surface insulating circuit board 2040 and the upper surface 2500 of the base body 2400 of the upper surface insulating circuit board 2025 face in opposite directions to each other.
In step S205, the direct potting resin is poured into the gap 1140 while being heated to 60 ℃, and the poured direct potting resin is vacuum-defoamed and heated. The heating was carried out according to a heating profile maintaining 140 ℃ for 1.5 hours after maintaining 100 ℃ for 1.5 hours. Thereby, the poured potting resin is cured and changed to the sealing resin portion 1030, and the power module 2000 shown in fig. 13 and 14 is completed.
The completed power module 2000 has a total thickness of 6.6mm thicker than the height of the frame member 1044 by the upper surface insulating circuit substrate 2025 being placed on the stepped surface 1180 of the stepped portion 1161 in the process S204. Thus, the upper surface 2500 of the base body 2400 of the upper surface insulated circuit board 2025 protrudes from the frame 1044, and the lower surface 2480 of the base body 2420 of the lower surface insulated circuit board 2040 and the upper surface 2500 of the base body 2400 of the upper surface insulated circuit board 2025 can be reliably brought into contact with the cooler.
2.10 Effect of embodiment 2
According to embodiment 2, the lower surface insulating circuit board 2040 is embedded in the frame member 1044, and the sealing resin section 1030 fills the gap between the frame member 1044 and the upper surface insulating circuit board 2025. Therefore, adhesion of resin to the lower surface 2480 of the base body 2420 of the lower surface insulating circuit board 2040 and the upper surface 2500 of the base body 2400 of the upper surface insulating circuit board 2025 during the manufacture of the power module 2000 can be suppressed. Thus, a polishing process of removing the resin adhering to the lower surface 2480 of the base 2420 and the upper surface 2500 of the base 2400 to expose the lower surface 2480 of the base 2420 and the upper surface 2500 of the base 2400 is not required, and productivity and reliability of the power module 2000 can be improved.
In addition, according to embodiment 2, the step surface 1180 of the step portion 1161 for positioning the upper surface heat dissipation device 1025 is located inside the frame-like portion 1160. Therefore, the stepped surface 1180 of the stepped portion 1161 does not cause leakage of the liquid sealing material that is a precursor of the sealing resin portion 1030, and leakage of the liquid sealing material can be suppressed.
In addition, according to embodiment 2, the base 2420 of the upper surface insulating circuit board 2025 and the base 2400 of the lower surface insulating circuit board 2040 are electrically insulated from the 1 st semiconductor element 1021 and the 2 nd semiconductor element 1022. Therefore, the upper surface insulating circuit board 2025 and the lower surface insulating circuit board 2040 can be bonded to the cooler via a bonding medium having high thermal conductivity such as solder. In addition, power modules having a module structure of 2 in 1, 6 in 1, or the like can be easily manufactured.
2.11 other example of the Structure of the Top-surface-insulated Circuit Board
Fig. 16 is an exploded top view schematically illustrating a structure in which the 1 st upper surface solder layer, the 2 nd upper surface solder layer, the 3 rd upper surface solder layer, the 4 th solder layer, the 5 th solder layer, and the sealing resin portion are removed from the power module of the other example of embodiment 2. Fig. 17 and 18 are cross-sectional views schematically illustrating a power module according to another example of embodiment 2. Fig. 17 and 18 illustrate cross sections at the positions of cutting lines D-D and E-E depicted in fig. 16, respectively.
In the power module 2000 according to another example of embodiment 2 shown in fig. 16, 17, and 18, the upper surface insulating circuit board 2025 includes the signal circuit 2423. The signal electrode 1062 is solder-bonded to the lower surface 2461 of the signal circuit 2423 via the 4 th upper surface solder layer 2031. Thereby, the signal electrode 1062 is electrically connected to the signal circuit 2423. In addition, the signal terminal 1041 is solder-bonded to the lower surface 2461 of the signal circuit 2423 via the 5 th upper surface solder layer 2032. Thus, the signal terminal 1041 is electrically connected to the signal circuit 2423, and is electrically connected to the signal electrode 1062 via the signal circuit 2423. An insulating layer 2421 is disposed between the substrate 2420 and the conductive layer 2422 and the signal circuit 2423 to electrically insulate the substrate 2420 from the conductive layer 2422 and the signal circuit 2423. This can omit a bonding wire for electrically connecting the signal electrode 1062 and the signal terminal 1041.
3 embodiment 3
3.1 major points of difference between embodiment 1 and embodiment 3
Fig. 19 is a top view schematically illustrating a power module of embodiment 3. Fig. 20 is a sectional view schematically illustrating a power module of embodiment 3. Fig. 20 illustrates a cross-section at the location of the cutting line F-F depicted in fig. 19.
The power module 3000 of embodiment 3 shown in fig. 19 and 20 is different from the power module 1000 of embodiment 1 shown in fig. 1 to 5 mainly in the following differences.
In power module 1000 according to embodiment 1, upper surface heat sink 1025 has no opening. In contrast, in power module 3000 of embodiment 3, upper surface heat sink 1025 includes 1 st opening 3520, 2 nd opening 3521, and 3 rd opening 3522.
Next, a configuration adopted in power module 3000 of embodiment 3 will be described in relation to the above-described difference. The configuration not described is also employed in the power module 3000 of embodiment 3 as the configuration employed in the power module 1000 of embodiment 1.
3.2 Joint part and opening part of Upper surface Heat sink
As shown in fig. 20, the upper surface heat sink device 1025 includes a 1 st joint 3500, a 2 nd joint 3501, and a 3 rd joint 3502. The 1 st bonding part 3500, the 2 nd bonding part 3501, and the 3 rd bonding part 3502 are solder-bonded to the 1 st semiconductor element 1021, the 2 nd semiconductor element 1022, and the 2 nd external terminal 1043 as bonding destinations via the 1 st upper surface solder layer 1026, the 2 nd upper surface solder layer 1027, and the 3 rd upper surface solder layer 1028, respectively.
In the upper surface heat sink 1025, the 1 st bonding part 3500, the 2 nd bonding part 3501, and the 3 rd bonding part 3502 have a 1 st opening 3520, a 2 nd opening 3521, and a 3 rd opening 3522, respectively. The 1 st opening 3520, the 2 nd opening 3521, and the 3 rd opening 3522 penetrate the upper surface heat sink 1025 in the 2 nd direction D2.
The power module 3000 can be manufactured in the same manner as the power module 1000. Therefore, in manufacturing the power module 3000, by changing the 1 st upper surface solder sheet 1303, the 2 nd upper surface solder sheet 1304, and the 3 rd upper surface solder sheet 1305 to the 1 st upper surface solder layer 1026, the 2 nd upper surface solder layer 1027, and the 3 rd upper surface solder layer 1028, respectively, the 1 st upper surface solder layer 1026, the 2 nd upper surface solder layer 1027, and the 3 rd upper surface solder layer 1028 can be formed. However, in manufacturing the power module 3000, it is also possible to form the 1 st upper surface solder layer 1026, the 2 nd upper surface solder layer 1027 and the 3 rd upper surface solder layer 1028 by injecting the molten solder through the 1 st opening portion 3520, the 2 nd opening portion 3521 and the 3 rd opening portion 3522 to change the molten solder injected through the 1 st opening portion 3520, the 2 nd opening portion 3521 and the 3 rd opening portion 3522 into the 1 st upper surface solder layer 1026, the 2 nd upper surface solder layer 1027 and the 3 rd upper surface solder layer 1028, respectively. Instead of the solder melt, a paste containing Ag nanoparticles as a precursor of the Ag sintered material may be injected. The potting resin 1320 may be directly poured into all or a part of the 1 st opening 3520, the 2 nd opening 3521, and the 3 rd opening 3522 during the manufacture of the power module 3000.
3.3 Effect of embodiment 3
According to embodiment 3, productivity and reliability of the power module 3000 can be improved as in embodiment 1. In addition, leakage of the liquid sealing material can be suppressed.
In addition, according to embodiment 3, the 1 st opening 3520, the 2 nd opening 3521, and the 3 rd opening 3522 can be used to remove the excess solder from the 1 st bonding pad 3500, the 2 nd bonding pad 3501, and the 3 rd bonding pad 3502, respectively, and can be used to check whether the 1 st bonding pad 3500, the 2 nd bonding pad 3501, and the 3 rd bonding pad 3502 have been formed.
Embodiment 4
Fig. 21 is a top view schematically illustrating a power module of embodiment 4. Fig. 22 is a top view schematically illustrating a structure after the upper surface heat dissipation device, the 1 st upper surface solder layer, the 2 nd upper surface solder layer, the 3 rd upper surface solder layer, and the sealing resin section are removed from the power module of embodiment 4. Fig. 23, 24, and 25 are cross-sectional views schematically illustrating a power module according to embodiment 4. Fig. 23, 24 and 25 illustrate cross sections at the positions of cutting lines G-G, H-H and I-I depicted in fig. 21, respectively.
The power module 4000 of embodiment 4 illustrated in fig. 21 to 25 is different from the power module 1000 of embodiment 1 illustrated in fig. 1 to 5 mainly in the following difference points.
In the power module 1000 according to embodiment 1, the 1 st external terminal 1042 and the 2 nd external terminal 1043 protrude from the frame 1044 in the same direction. In addition, the signal terminals 1041 protrude from the frame 1044 in a direction opposite to the direction in which the 1 st external terminal 1042 and the 2 nd external terminal 1043 protrude. In contrast, in the power module 4000 of embodiment 4, the signal terminals 1041, the 1 st external terminal 1042, and the 2 nd external terminal 1043 protrude from the frame 1044 in the same direction. This increases the degree of freedom of insertion when the power module is inserted into another device.
The configuration not described is also employed in the power module 4000 of embodiment 4 as the configuration employed in the power module 1000 of embodiment 1. The configuration adopted in the power module 2000 of embodiment 2 or the power module 3000 of embodiment 3 may be adopted in the power module 4000 of embodiment 4.
5 embodiment 5
Fig. 26 is a sectional view schematically illustrating a power module of embodiment 5. Fig. 27 is a cross-sectional view schematically illustrating a state in which the power module according to embodiment 5 is inserted into a cooling heat dissipation member.
The power module 5000 of embodiment 5 illustrated in fig. 26 is different from the power module 1000 of embodiment 1 illustrated in fig. 1 to 5 mainly in the following difference points.
In power module 1000 of embodiment 1, upper surface heat dissipation device 1025 is positioned at a position where upper surface 1121 of upper surface heat dissipation device 1025 is parallel to lower surface 1101 of lower surface heat dissipation device 1040. In contrast, in power module 5000 of embodiment 5, upper surface heat dissipation device 1025 is positioned in a position where upper surface 1121 of upper surface heat dissipation device 1025 is inclined with respect to lower surface 1101 of lower surface heat dissipation device 1040. By making the heights of the plurality of portions 1171, 1172, 1173, and 1174 of the step surface 1180 of the step portion 1161 different from each other, it is possible to realize that the upper surface 1121 of the upper surface heat dissipation device 1025 is inclined with respect to the lower surface 1101 of the lower surface heat dissipation device 1040. Thereby, the power module 5000 having a tapered shape is obtained. As shown in fig. 27, even when the draft occurs in the insertion hole into which the power module 5000 is inserted due to the manufacturing process, the upper surface 1121 of the upper surface heat dissipation fixture 1025 provided to the power module 5000 inserted into the insertion hole and the lower surface 1101 of the lower surface heat dissipation fixture 1040 provided to the power module 5000 inserted into the insertion hole can be brought into sufficient contact with the heat dissipation member 5500, and the heat dissipation performance can be improved.
The configuration not described is also employed in the power module 5000 of embodiment 5 as the configuration employed in the power module 1000 of embodiment 1. The configuration adopted in the power module 2000 of embodiment 2, the power module 3000 of embodiment 3, or the power module 4000 of embodiment 4 may also be adopted in the power module 5000 of embodiment 5.
6 embodiment 6
This embodiment is an example in which the semiconductor device according to embodiments 1 to 5 is applied to a power conversion device. The application of the semiconductor devices according to embodiments 1 to 5 is not limited to a specific power conversion device, but a case where the semiconductor devices according to embodiments 1 to 5 are applied to a three-phase inverter will be described below as embodiment 6.
Fig. 28 is a block diagram showing a configuration of a power conversion system to which the power conversion device of the present embodiment is applied.
The power conversion system shown in fig. 28 includes a power source 100, a power conversion device 200, and a load 300. The power supply 100 is a dc power supply and supplies dc power to the power conversion device 200. The power supply 100 may be configured by various examples, and may be configured by, for example, a DC system, a solar cell, or a storage battery, or may be configured by a rectifier circuit or an AC/DC converter connected to an AC system. The power supply 100 may be configured by a DC/DC converter that converts DC power output from the DC system into predetermined power.
The power conversion device 200 is a three-phase inverter connected between the power source 100 and the load 300, and converts dc power supplied from the power source 100 into ac power to supply ac power to the load 300. As shown in fig. 28, the power conversion device 200 includes: a main converter circuit 201 that converts dc power into ac power and outputs the ac power; and a control circuit 203 that outputs a control signal for controlling the main converter 201 to the main converter 201.
The load 300 is a three-phase motor driven by ac power supplied from the power conversion device 200. The load 300 is not limited to a specific application, and is a motor mounted on various electric devices, for example, a motor used for a hybrid car, an electric car, a railway vehicle, an elevator, or an air conditioner.
The power converter 200 will be described in detail below. The main converter circuit 201 includes a switching element and a flywheel diode (not shown), and is switched by the switching element to convert dc power supplied from the power supply 100 into ac power and supply the ac power to the load 300. While there are various specific circuit configurations of the main conversion circuit 201, the main conversion circuit 201 of the present embodiment is a 2-level three-phase full bridge circuit and can be configured with 6 switching elements and 6 freewheeling diodes connected in anti-parallel with the respective switching elements. Each switching element and each free wheel diode of the main conversion circuit 201 are formed by a semiconductor module 202 corresponding to any of embodiments 1 to 5. The 6 switching elements are connected in series for every 2 switching elements to form upper and lower arms, and each upper and lower arm forms each phase (U-phase, V-phase, W-phase) of the full bridge circuit. Output terminals of the upper and lower arms, that is, 3 output terminals of the main converter circuit 201 are connected to the load 300.
The main converter circuit 201 includes a drive circuit (not shown) for driving each switching element, but the drive circuit may be built in the semiconductor module 202, or may be provided independently of the semiconductor module 202. The drive circuit generates a drive signal for driving the switching element of the main conversion circuit 201, and supplies the drive signal to the control electrode of the switching element of the main conversion circuit 201. Specifically, a drive signal for turning the switching element into an on state and a drive signal for turning the switching element into an off state are output to the control electrode of each switching element in accordance with a control signal from the control circuit 203 to be described later. When the switching element is maintained in the on state, the drive signal is a voltage signal (on signal) equal to or higher than the threshold voltage of the switching element, and when the switching element is maintained in the off state, the drive signal is a voltage signal (off signal) equal to or lower than the threshold voltage of the switching element.
The control circuit 203 controls the switching elements of the main converter 201 so as to supply desired power to the load 300. Specifically, the time (on time) for which each switching element of the main converter circuit 201 should be brought into an on state is calculated based on the power to be supplied to the load 300. For example, the main converter circuit 201 can be controlled by PWM control in which the on time of the switching element is modulated in accordance with the voltage to be output. Then, at each time point, a control command (control signal) is output to the drive circuit provided in the main conversion circuit 201 so that an on signal is output to the switching element to be turned on and an off signal is output to the switching element to be turned off. The drive circuit outputs an on signal or an off signal as a drive signal to the control electrode of each switching element in accordance with the control signal.
In the power converter according to the present embodiment, the semiconductor modules according to embodiments 1 to 5 are applied as the switching elements and the flywheel diodes of the main converter circuit 201, and therefore, productivity and reliability can be improved.
In the present embodiment, an example in which the semiconductor devices according to embodiments 1 to 5 are applied to a 2-level three-phase inverter is described, but the application of the semiconductor devices according to embodiments 1 to 5 is not limited thereto, and the semiconductor devices can be applied to various power conversion devices. In the present embodiment, the power conversion device of 2 levels is used, but a power conversion device of 3 levels or multilevel may be used, and when power is supplied to a single-phase load, the semiconductor devices according to embodiments 1 to 5 may be applied to a single-phase inverter. In addition, when power is supplied to a DC load or the like, the semiconductor devices according to embodiments 1 to 5 can be applied to a DC/DC converter or an AC/DC converter.
The power conversion device to which the semiconductor device according to embodiments 1 to 5 is applied is not limited to the case where the load is a motor, and can be used as a power supply device for an electric discharge machine, a laser machine, an induction heating cooker, a non-contactor power supply system, a power conditioner for a solar power generation system, a power storage system, or the like, for example.
In addition, the present invention can be modified and omitted as appropriate within the scope of the present invention.
Although the present invention has been described in detail, the above description is illustrative in all aspects, and the present invention is not limited thereto. It is to be understood that numerous modifications, not illustrated, can be devised without departing from the scope of the invention.
Claims (20)
1. A semiconductor device includes:
a 1 st heat dissipation member having a 1 st heat dissipation surface exposed to the outside and facing a 1 st direction;
a frame member in which the 1 st heat dissipation member is embedded, the frame member including a frame-shaped portion and a positioning portion located inside the frame-shaped portion;
a 2 nd heat dissipating member having a 2 nd heat dissipating surface exposed to the outside and facing a 2 nd direction opposite to the 1 st direction, the 2 nd heat dissipating member being abutted against the positioning portion and positioned by the positioning portion;
a semiconductor element sandwiched between the 1 st heat sink member and the 2 nd heat sink member; and
and a sealing resin part which fills a gap between the frame member and the 2 nd heat dissipation member to seal the semiconductor element.
2. The semiconductor device according to claim 1,
the positioning portion positions the 2 nd heat dissipating member at a position where the 2 nd heat dissipating surface protrudes in the 2 nd direction from the frame member.
3. The semiconductor device according to claim 1 or 2,
the positioning part positions the 2 nd heat dissipation part at a position where the 2 nd heat dissipation surface is inclined with respect to the 1 st heat dissipation surface.
4. The semiconductor device according to any one of claims 1 to 3,
the frame-shaped portion has an end portion most deviated from the 2 nd direction,
the frame member includes a step portion which is located inside the frame-shaped portion, has the positioning portion, and has a step with the end portion.
5. The semiconductor device according to claim 4,
the step portion has a semi-cylindrical shape.
6. The semiconductor device according to any one of claims 1 to 5,
the 2 nd heat sink member has a face facing the 1 st direction,
the positioning portion includes a plurality of portions that are separated from each other, contact the surface facing the 1 st direction, and form the same plane.
7. The semiconductor device according to any one of claims 1 to 6,
the 2 nd heat dissipating member has an end surface extending from an edge of the 2 nd heat dissipating surface and moving inward as it is separated from the edge in the 1 st direction.
8. The semiconductor device according to any one of claims 1 to 7,
the 2 nd heat sink member has a face facing the 1 st direction,
the frame member has a tapered surface which is continuous from the positioning portion and is offset from the positioning portion in the 2 nd direction more than the positioning portion with a gap whose width decreases in a direction perpendicular to the 1 st direction as it advances in the 1 st direction.
9. The semiconductor device according to any one of claims 1 to 8,
the 1 st heat dissipating member and the frame member are formed in a box shape without a lid,
the sealing resin section is housed in a box-shaped space defined by the shape of the uncovered box.
10. The semiconductor device according to any one of claims 1 to 9,
the 1 st heat dissipating member and the frame member are formed in a box shape without a lid,
the 2 nd heat dissipation member has a planar shape smaller than a planar shape of an inlet opening of an in-box space defined by the uncovered box-like shape.
11. The semiconductor device according to claim 10,
the 2 nd heat dissipation member has an end surface extending from an edge of the 2 nd heat dissipation surface,
the entire end surface is separated from the frame-shaped portion.
12. The semiconductor device according to any one of claims 1 to 11,
at least one of the 1 st heat radiating member and the 2 nd heat radiating member includes a heat radiating device made of a metal or an alloy and having a heat radiating surface.
13. The semiconductor device according to any one of claims 1 to 12,
at least one of the 1 st heat dissipation member and the 2 nd heat dissipation member includes an insulating circuit board, and the insulating circuit board includes: a base body made of metal or alloy and having a heat radiating surface; a conductor layer electrically connected to the semiconductor element; and an insulating layer electrically insulating the base from the conductor layer.
14. The semiconductor device according to claim 13,
the semiconductor element includes: a 1 st main electrode; a 2 nd main electrode; and a signal electrode for controlling a conduction state between the 1 st main electrode and the 2 nd main electrode,
the insulating circuit board further includes a signal circuit electrically connected to the signal electrode,
the insulating layer electrically insulates the substrate from the signal circuit.
15. The semiconductor device according to any one of claims 1 to 14,
the 2 nd heat dissipating member includes a joining portion joined to a joining destination, and the joining portion has an opening portion penetrating the 2 nd heat dissipating member in the 2 nd direction.
16. The semiconductor device according to claim 15,
the bonding destination includes the semiconductor element.
17. The semiconductor device according to claim 15 or 16,
the semiconductor device further includes an external terminal electrically connected to the semiconductor element and embedded in the frame member,
the bonding destination is provided with the external terminal.
18. The semiconductor device according to any one of claims 1 to 17,
the semiconductor element includes: a 1 st main electrode; a 2 nd main electrode; and a signal electrode for controlling a conduction state between the 1 st main electrode and the 2 nd main electrode,
the semiconductor device further includes: a 1 st external terminal electrically connected to the 1 st main electrode, embedded in the frame member, and protruding from the frame member; a 2 nd external terminal electrically connected to the 2 nd main electrode, embedded in the frame member, and protruding from the frame member in the same direction as the 1 st external terminal; and a signal terminal electrically connected to the signal electrode, embedded in the frame member, and protruding from the frame member in the same direction as the 1 st external terminal.
19. A power conversion device is provided with:
a main conversion circuit having the semiconductor device according to any one of claims 1 to 18, the main conversion circuit converting input electric power and outputting the converted electric power; and
and the control circuit outputs a control signal for controlling the main conversion circuit to the main conversion circuit.
20. A method for manufacturing a semiconductor device includes:
a) forming a frame member having a 1 st heat dissipating member embedded therein and having a 1 st heat dissipating surface, a frame-shaped portion, and a positioning portion located inside the frame-shaped portion by insert molding;
b) a step of sandwiching the semiconductor element between the 1 st heat dissipation member and the 2 nd heat dissipation member after the step a) so that the 1 st heat dissipation surface and the 2 nd heat dissipation surface of the 2 nd heat dissipation member face in directions opposite to each other, the 2 nd heat dissipation member is brought into contact with the positioning portion, and the 2 nd heat dissipation member is positioned by the positioning portion; and
c) and a step of pouring a liquid sealing material including a sealing resin into a gap between the frame member and the 2 nd heat dissipating member and hardening the liquid sealing material after the step b).
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| JP2018218352 | 2018-11-21 | ||
| JP2018-218352 | 2018-11-21 | ||
| PCT/JP2019/044875 WO2020105556A1 (en) | 2018-11-21 | 2019-11-15 | Semiconductor device, power conversion device, and method for manufacturing semiconductor device |
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| CN112997297B CN112997297B (en) | 2024-04-02 |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101599484A (en) * | 2008-06-05 | 2009-12-09 | 三菱电机株式会社 | Resin molded semiconductor device and manufacture method thereof |
| JP2011029589A (en) * | 2009-06-30 | 2011-02-10 | Denso Corp | Semiconductor device and method of manufacturing the same |
| CN102986026A (en) * | 2010-06-30 | 2013-03-20 | 日立汽车系统株式会社 | Power module and power converter using same |
| CN103348468A (en) * | 2011-03-04 | 2013-10-09 | 日立汽车系统株式会社 | Semiconductor module and semiconductor module manufacturing method |
| US20130295725A1 (en) * | 2012-05-03 | 2013-11-07 | Jin-woo Park | Semiconductor package and method of forming the same |
| CN103597729A (en) * | 2011-06-08 | 2014-02-19 | 日立汽车系统株式会社 | Power module and power conversion apparatus using same |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3507682B2 (en) * | 1998-01-09 | 2004-03-15 | 株式会社東芝 | Semiconductor module |
| JP2009164156A (en) | 2007-12-28 | 2009-07-23 | Toyota Motor Corp | Power module |
| JP5359579B2 (en) | 2009-06-11 | 2013-12-04 | 日産自動車株式会社 | Semiconductor device manufacturing method and semiconductor device |
| JP2011151109A (en) * | 2010-01-20 | 2011-08-04 | Fuji Electric Co Ltd | Semiconductor device and method for manufacturing the same |
-
2019
- 2019-11-15 JP JP2020558350A patent/JP7026823B2/en active Active
- 2019-11-15 WO PCT/JP2019/044875 patent/WO2020105556A1/en active Application Filing
- 2019-11-15 CN CN201980067408.1A patent/CN112997297B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101599484A (en) * | 2008-06-05 | 2009-12-09 | 三菱电机株式会社 | Resin molded semiconductor device and manufacture method thereof |
| CN102201398A (en) * | 2008-06-05 | 2011-09-28 | 三菱电机株式会社 | Resin sealed semiconductor device and manufacturing method therefor |
| JP2011029589A (en) * | 2009-06-30 | 2011-02-10 | Denso Corp | Semiconductor device and method of manufacturing the same |
| CN102986026A (en) * | 2010-06-30 | 2013-03-20 | 日立汽车系统株式会社 | Power module and power converter using same |
| CN103348468A (en) * | 2011-03-04 | 2013-10-09 | 日立汽车系统株式会社 | Semiconductor module and semiconductor module manufacturing method |
| CN103597729A (en) * | 2011-06-08 | 2014-02-19 | 日立汽车系统株式会社 | Power module and power conversion apparatus using same |
| US20130295725A1 (en) * | 2012-05-03 | 2013-11-07 | Jin-woo Park | Semiconductor package and method of forming the same |
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| WO2020105556A1 (en) | 2020-05-28 |
| CN112997297B (en) | 2024-04-02 |
| JP7026823B2 (en) | 2022-02-28 |
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