CN112993164A - Matrix type large-area perovskite battery and preparation method thereof - Google Patents

Matrix type large-area perovskite battery and preparation method thereof Download PDF

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Publication number
CN112993164A
CN112993164A CN201911283159.8A CN201911283159A CN112993164A CN 112993164 A CN112993164 A CN 112993164A CN 201911283159 A CN201911283159 A CN 201911283159A CN 112993164 A CN112993164 A CN 112993164A
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etching
area
longitudinal
line
electrode
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CN112993164B (en
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刘生忠
王开
王辉
杜敏永
曹越先
段连杰
孙友名
焦玉骁
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Dalian Institute of Chemical Physics of CAS
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    • HELECTRICITY
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    • H10K30/00Organic devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation
    • H10K30/10Organic devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation comprising heterojunctions between organic semiconductors and inorganic semiconductors
    • HELECTRICITY
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    • H10K30/00Organic devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation
    • H10K30/80Constructional details
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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    • H10K30/00Organic devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation
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Abstract

The invention provides a matrix type large-area perovskite battery and a preparation method thereof. The invention adopts reasonable distribution of active areas, reasonable design of metal leads and dispensing areas to prepare large-area perovskite batteries, and modules in the large-area devices are distributed in a matrix form. The matrix type large-area perovskite battery has the advantages that the secondary modules form the primary modules, the secondary modules are connected in series, the primary modules are connected in parallel, and the voltage and current output by the whole large-area device can be adjusted by adjusting the number of the modules. Meanwhile, the primary modules are independent from each other, the work of the whole device is not influenced after the single module is damaged, and the damaged area cannot be diffused. The design method provided by the invention is different from the conventional large-area series connection method, and the photoelectric performance and stability of the device can be improved more obviously.

Description

Matrix type large-area perovskite battery and preparation method thereof
Technical Field
The invention belongs to the technical field of solar cells, and relates to a design method of a matrix type large-area perovskite cell.
Background
Solar energy is inexhaustible energy, is clean and environment-friendly, does not need transportation, and is one of the most important new energy sources in the 21 st century. The solar cell is a semiconductor photoelectric device for converting light energy into electric energy, and has important research value in the field of energy conversion. Meanwhile, the solar cell can be integrated with a power generation window, a greenhouse ceiling or a glass curtain wall and the like to be applied to photovoltaic building integration, and has wide prospects. The perovskite cell is a novel all-solid-state thin-film solar cell and mainly comprises a transparent conductive substrate, an electron transport layer, an organic-inorganic composite perovskite, a hole transport layer and a back electrode. The working process is as follows: first, the perovskite layer absorbs sunlight to generate electrons (e)-) And cavity (h)+);e-When the electron diffusion layer is diffused to the interface of the electron transport layer, the electron diffusion layer is quickly injected into a conduction band of the electron transport layer and then is led into an external circuit through the conductive substrate; h is+E transported by the hole transport layer to the back electrode and finally in an external circuit-And the two phases are combined to form a complete current cycle. Due to continuous optimization of researchers on various functional layers of the perovskite battery, the perovskite battery is developed rapidly, the photoelectric conversion efficiency of the perovskite battery is rapidly increased to more than 25% in short years, and the basic requirements of industrialization are met. Therefore, the development and preparation of large-area perovskite batteries are of great significance.
Disclosure of Invention
In order to overcome the defects in the prior art, the invention aims to provide a design method of a large-area perovskite battery, and the purpose of improving the performance and stability of the large-area perovskite battery is achieved.
The technical scheme of the invention is as follows:
a matrix type large-area perovskite battery is composed of a conductive substrate, an active functional layer, a back electrode and a back plate, wherein an active area, a dispensing area and an etching area are arranged in the device. The preparation method comprises the following steps:
1) and etching the conductive substrate, wherein a plurality of horizontal and vertical etching stripes are adopted to divide the conductive area of the conductive substrate into a plurality of matrix type square areas, each area is a primary module, and when the conductive substrate is etched, the stripe etching is not carried out on the left side edge of the substrate. The etching striations refer to etching areas with certain width (millimeter can be adopted). Continuously etching the conductive substrate, and etching the conductive substrate along the longitudinal direction between the longitudinal etching stripes to form a first etching line; the first etched lines can be generally considered as etched stripes of very small width, typically on the order of microns. A plurality of first etching lines are arranged between every two longitudinal etching stripes.
2) Preparing an active layer on the conductive substrate, etching the right side of each first etching line, removing the active layer at the corresponding position, and forming a second etching line, wherein the first etching line is parallel to the second etching line, and the etching depth is the thickness of the whole active layer; each second etching line is positioned at a plurality of microns on the right side of each first etching line;
3) preparing a conductive electrode on the surface of the active layer, etching the right side of each second etched line, removing the conductive electrode and the active layer at corresponding positions, and forming a third etched line, wherein the third etched line is parallel to the first etched line, and the third etched line can be positioned at a plurality of microns on the right side of the second etched line; the adjacent first etching line, the second etching line and the third etching line form an etching area, each primary module is divided into a plurality of secondary modules by the etching area, and the secondary modules are mutually connected in series;
4) etching the conductive electrode along the horizontal and vertical etching stripes in the step 1) to respectively obtain horizontal and vertical etching areas; the horizontal etching area is superposed with the horizontal etching stripe, and the conductive electrode and the active layer at the corresponding positions are removed, namely the etching stripe is exposed; when the conductive electrode is etched along the longitudinal etching stripe, the width of the longitudinal etching area is larger than that of the longitudinal etching stripe, a certain etching width is widened to the right side of the longitudinal etching stripe while the longitudinal etching area is overlapped with the longitudinal etching stripe during etching, the conductive electrode and the active layer at corresponding positions are removed, the conductive substrate is exposed, and an exposed area is formed;
wherein, the order of step 3) and step 4) can be exchanged, namely, step 4) is firstly carried out and step 3) is carried out);
5) preparing a negative electrode interdigital grid line and a positive electrode interdigital grid line: each interdigital grid line comprises a plurality of parallel longitudinal electrodes and a transverse electrode, and each longitudinal electrode is vertically linked with the transverse electrode;
the longitudinal electrode in the negative electrode interdigital grid line is arranged on the right side of the longitudinal etching stripe and is superposed with the exposed area of the conductive substrate in the step 4), and the transverse electrode is arranged above the transverse etching stripe on the uppermost side;
the longitudinal electrode in the positive electrode interdigital grid line is arranged on the left side of the longitudinal etching stripe, the longitudinal grid line is positioned on the left side of the longitudinal etching stripe in the step 3) and is overlapped with the conductive electrode of the secondary module adjacent to the etching stripe, and the transverse electrode is arranged below the transverse etching stripe on the lowest side;
6) and dispensing, wherein the dispensing position is completely the same as the etching stripe, namely coating glue on the etching stripe, buckling a back plate for packaging, and solidifying the glue line to obtain the area-packaged matrix type large-area perovskite battery.
Due to the application of the technical scheme, compared with the prior art, the invention has the following advantages: (1) compared with the traditional series-type large-area device, the matrix type large-area perovskite battery can reduce the series resistance in the battery by reasonably laying the grid lines, improve the photoelectric conversion efficiency of the battery, flexibly regulate and control the voltage and current output by the battery by setting the number of the batteries in the module and the number of the modules, and widen the application field of the device.
(2) The efficiency of the traditional series-type large-area device is rapidly attenuated when the traditional series-type large-area device is damaged, each primary module in the matrix type large-area perovskite battery works independently and is packaged independently, and the influence of the damage of a single primary module on the overall light performance of the device is limited. The invention greatly improves the stability and the damage resistance of the device.
Drawings
Fig. 1 is a schematic diagram of a matrix-type large area perovskite battery containing 25 primary modules. In the figure, 1-a negative electrode interdigital grid line, 2-a secondary module, 3-a primary module, 4-a conductive substrate, 5-an etching stripe, 6-a positive electrode interdigital grid line and 7-an etching area.
Fig. 2 is a detailed structural diagram of a matrix type large-area perovskite battery including 4 primary modules in example 1. (a) Etching the conductive substrate; (b) schematic representation after preparation of the active layer; (c) schematic representation of the sample after preparation of the metal electrode; (d) the back schematic view of the sample after dispensing; (e) schematic front view of the sample after dispensing.
FIG. 3 is an etched line inside the primary modules and between the secondary modules, (a) etching the conductive substrate; (b) depositing an Electron Transport Layer (ETL), a perovskite layer (perovskite), and a Hole Transport Layer (HTL) on the etched conductive substrate; (c) etching the active layer; (d) depositing a metal electrode on the etched active layer; (e) and etching the metal electrode and the active layer.
Fig. 4 is a detailed structural diagram of a matrix type large-area perovskite battery including 8 primary modules in example 3.
Detailed Description
In order that the manner and operation of the invention can be more fully understood, reference should now be made to the following detailed description taken in conjunction with the accompanying drawings. It should be understood, however, that the intention is not to limit the invention to the particular examples and embodiments described. The specific examples and embodiments included herein are intended to assist those skilled in the art in practicing the invention.
Example 1:
the conductive substrate was etched using laser etching stripes according to the etching pattern, which was shown in fig. 2(a), dividing the conductive substrate into 2 × 2 primary modules, with stripe width of 3 mm. Wherein the etched region at this time corresponds to the horizontal and vertical etched stripes in fig. 1. And continuously etching the conductive substrate, and etching the conductive substrate by using the first etching line along the longitudinal direction between the longitudinal etching stripes, such as the etching area in fig. 2 (a). As shown in fig. 2(b), a titanium oxide layer, a methamidolead iodoperovskite layer, and a Spiro-OMeTAD hole transport layer are sequentially formed on a conductive substrate, and then a second laser is used to etch the active layer at a position 500 μm to the right of the longitudinal first etching line in fig. 2(a) and parallel to the first etching line. Preparing a gold electrode on the surface of the active layer by adopting thermal evaporation, then etching by adopting laser, firstly etching along the etching stripes, wherein the etching position is superposed with the horizontal etching stripes and the vertical etching stripes, the etching depth is the thickness of the gold electrode and the active layer, so that the substrate is exposed, the etching depth is widened by 3 millimeters to the right along the vertical etching stripes, the etching depth is the thickness of the gold electrode and the active layer, so that the conductive layer is exposed, and an exposed area is formed; finally, a line is etched to the right 500 μm along the longitudinal second etching line to form a third etching line with a depth from the gold electrode to the active layer, so that the conductive substrate is exposed. The adjacent first etching line, second etching line and third etching line form an etching area, each primary module is divided into a plurality of secondary modules by the etching area, and the etching positions of the three times are corresponding to the positions (a), (c) and (e) in the battery preparation process in the secondary module 2, so that the internal series module device is obtained. Then, metal interdigital electrodes were prepared, thus obtaining a sample such as the sample of fig. 2 (c). Fig. 1 shows an infinitely expanding design of a matrix perovskite cell, so that the leftmost and rightmost electrode gridlines can be eliminated in actual production. According to the graphs (d) and (e) of the figure 2, ultraviolet curing glue is coated along all the etching stripe points, a glass back plate is buckled, and ultraviolet glue is solidified through ultraviolet lamp irradiation, so that the matrix type large-area perovskite battery is obtained.
Example 2:
by the preparation method described in example 1, the matrix type large-area perovskite battery can be obtained by preparing the titanium oxide layer, the methylamine lead iodoperovskite layer and the spiro-OMeTAD hole transport layer on the conductive substrate in sequence, and preparing the nickel oxide layer, the formamidine lead iodoperovskite layer and the titanium oxide layer in sequence.
Example 3:
by the preparation method described in example 1, as shown in fig. 4, a matrix type large-area perovskite battery containing 8 primary modules can be obtained by changing 2 × 2 primary modules into 2 × 4 primary modules.
Example 4:
the matrix type large-area perovskite battery can be obtained by changing the gold electrode into the carbon electrode according to the preparation method of the embodiment 1.
Example 5:
according to the preparation method of the embodiment 1, the matrix type flexible large-area perovskite battery can be obtained by changing the glass conductive substrate into ITO/PEN.
Example 6:
prepared as described in example 1, reacting CH3NH3PbI3Perovskite to (Cs)aFAbMA1-a-b)Pb(IxBr3-x)3A matrix type large-area perovskite battery can be obtained.
Example 7:
by the preparation method described in example 1, the matrix type flexible large-area perovskite battery can be obtained by changing the glass back electrode into a polyimide substrate.
Example 8:
the preparation method of example 1 is adopted, and the matrix type large-area perovskite battery can be obtained by changing the laser etching of the active layer into chemical etching
The foregoing is a more detailed description of the present invention that is presented in conjunction with specific embodiments, and the practice of the invention is not to be considered limited to those descriptions. Several alternatives or modifications, similar in performance or use, which are not departed from the inventive concept should be considered as falling within the scope of the invention.

Claims (10)

1. The preparation method of the matrix type large-area perovskite battery is characterized by comprising the following specific preparation steps:
1) etching the conductive substrate (4): a plurality of horizontal and vertical etching stripes (5) are adopted to divide a conductive area of a conductive substrate (4) into a plurality of matrix type square areas, and each area is a primary module (3); continuously etching the conductive substrate between the longitudinal etching stripes along the longitudinal direction to form a first etching line; a plurality of first etching lines are arranged between every two longitudinal etching stripes;
2) preparing an active layer on the conductive substrate, etching the right side of each first etching line, removing the active layer at the corresponding position, and forming a second etching line, wherein the first etching line is parallel to the second etching line, and the etching depth is the thickness of the whole active layer;
3) preparing a conductive electrode on the surface of the active layer, etching the right side of each second etching line, removing the conductive electrode and the active layer at corresponding positions to form a third etching line, wherein the third etching line is parallel to the first etching line, the adjacent first etching line, second etching line and third etching line form an etching area (7), each primary module (3) is divided into a plurality of secondary modules (2) by the etching area (7), and each secondary module (2) is connected in series;
4) etching the conductive electrode along the horizontal and vertical etching stripes (5) in the step 1) to respectively obtain horizontal and vertical etching areas; the horizontal etching area is superposed with the horizontal etching stripe, and the conductive electrode and the active layer at the corresponding positions are removed, namely the horizontal etching stripe is exposed; when the conductive electrode is etched along the longitudinal etching stripe, the width of the longitudinal etching area is larger than that of the longitudinal etching stripe, a certain etching width is widened to the right side of the longitudinal etching stripe while the longitudinal etching area is overlapped with the longitudinal etching stripe during etching, the conductive electrode and the active layer at corresponding positions are removed, the conductive substrate is exposed, and an exposed area is formed; wherein the sequence of the step 3) and the step 4) can be changed, namely, the step 4) is firstly carried out and the step 3) is carried out);
5) preparing a cathode interdigital grid line (1) and an anode interdigital grid line (6): each interdigital grid line comprises a plurality of parallel longitudinal electrodes and a transverse electrode, and each longitudinal electrode is vertically linked with the transverse electrode;
the longitudinal electrode in the negative electrode interdigital grid line (1) is arranged on the right side of the longitudinal etching stripe (5) and is coincided with the exposed area of the conductive substrate in the step 4), and the transverse electrode is arranged above the transverse etching stripe (5) on the uppermost side;
a longitudinal electrode in the anode interdigital grid line (6) is arranged on the left side of the longitudinal etching stripe (5), the longitudinal grid line at the moment is positioned on the left side of the longitudinal etching stripe (5) in the step 3) and is superposed with a conductive electrode of a secondary module adjacent to the etching stripe (5), and a transverse electrode is arranged below the lowest transverse etching stripe (5);
6) and dispensing, wherein the dispensing position is completely the same as the etching stripe (5), namely coating glue on the etching stripe (5), buckling a back plate for packaging, and solidifying the glue line to obtain the area-packaged matrix type large-area perovskite battery.
2. The method according to claim 1, wherein the conductive substrate in step 1) is composed of a transparent film and a conductive material; transparent films include, but are not limited to, glass, polyimide, polyethylene terephthalate, polyethylene naphthalene resins, and the like; the conductive material includes, but is not limited to, one or more of doped indium oxide such as indium tin oxide (e.g., indium tin oxide), doped tin oxide (e.g., fluorine doped tin oxide), doped zinc oxide (e.g., aluminum doped zinc oxide), and the like.
3. The method for preparing the conductive substrate according to claim 1), wherein the method for etching the conductive substrate in the steps 1) -4) includes but is not limited to one or more of laser etching, chemical etching and the like.
4. The method of claim 1, wherein: the active layer in the step 2) comprises one or more than two of an electron transport layer, a perovskite layer and a hole transport layer.
5. The method of claim 1, wherein: the conductive electrode in the steps 3) and 5) is made of one or more than two of gold, silver, copper, nickel, aluminum, carbon electrodes and the like.
6. The method of claim 1, wherein: the back plate in the step 6) is an insulating film; the insulating film includes, but is not limited to, glass, polyimide, polyethylene terephthalate, polyethylene naphthalene resin, and the like.
7. The method of claim 1, wherein: the shape of the conductive substrate is not limited to a rectangle, but may be a circle, an ellipse, a diamond, or the like.
8. The method of claim 1, wherein: the steps 3) and 5) can be carried out simultaneously, and the cathode interdigital grid line (1) and the anode interdigital grid line (6) are not cut off when the conductive electrode is etched in the steps 3) and 4).
9. A matrix-type large-area perovskite battery prepared by the preparation method of any one of claims 1 to 8, which is characterized in that: all modules in the battery device are distributed in a matrix form, the secondary modules form a primary module, the secondary modules are mutually connected in series, and the primary modules are mutually connected in parallel; the output voltage and the output current of the whole battery are adjusted by adjusting the number of the secondary modules in the primary module.
10. The matrix large area perovskite battery of claim 9, wherein: each primary module is separately packaged inside the battery device through a glue line, and therefore the diffusion of a damaged area after a single primary module is damaged is effectively prevented.
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000133828A (en) * 1998-10-23 2000-05-12 Sharp Corp Thin-film solar cell and manufacture thereof
KR20070004593A (en) * 2003-12-25 2007-01-09 쇼와쉘세키유가부시키가이샤 Integrated thin-film solar cell and its manufacturing method
JP2011091211A (en) * 2009-10-22 2011-05-06 Fujifilm Corp Solar cell module, method of manufacturing solar cell module, and apparatus for manufacturing solar cell module
CN108470834A (en) * 2018-03-23 2018-08-31 武汉理工大学 A kind of new structure large area perovskite solar cell and preparation method thereof
CN108987586A (en) * 2017-06-02 2018-12-11 颜步 A kind of perovskite solar cell module and preparation method thereof
US20190326065A1 (en) * 2018-04-24 2019-10-24 Nutech Ventures Molecular doping enabled scalable blading of efficient hole transport layer-free perovskite solar cells

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000133828A (en) * 1998-10-23 2000-05-12 Sharp Corp Thin-film solar cell and manufacture thereof
KR20070004593A (en) * 2003-12-25 2007-01-09 쇼와쉘세키유가부시키가이샤 Integrated thin-film solar cell and its manufacturing method
JP2011091211A (en) * 2009-10-22 2011-05-06 Fujifilm Corp Solar cell module, method of manufacturing solar cell module, and apparatus for manufacturing solar cell module
CN108987586A (en) * 2017-06-02 2018-12-11 颜步 A kind of perovskite solar cell module and preparation method thereof
CN108470834A (en) * 2018-03-23 2018-08-31 武汉理工大学 A kind of new structure large area perovskite solar cell and preparation method thereof
US20190326065A1 (en) * 2018-04-24 2019-10-24 Nutech Ventures Molecular doping enabled scalable blading of efficient hole transport layer-free perovskite solar cells

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