CN112992776A - Packaging method, packaging structure and packaging module - Google Patents

Packaging method, packaging structure and packaging module Download PDF

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Publication number
CN112992776A
CN112992776A CN201911283550.8A CN201911283550A CN112992776A CN 112992776 A CN112992776 A CN 112992776A CN 201911283550 A CN201911283550 A CN 201911283550A CN 112992776 A CN112992776 A CN 112992776A
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CN
China
Prior art keywords
packaging
package
substrate
component
interconnection structure
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Pending
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CN201911283550.8A
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Chinese (zh)
Inventor
李衡军
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ZTE Corp
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ZTE Corp
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Publication date
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Priority to CN201911283550.8A priority Critical patent/CN112992776A/en
Priority to PCT/CN2020/135264 priority patent/WO2021115377A1/en
Publication of CN112992776A publication Critical patent/CN112992776A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5386—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1305—Moulding and encapsulation
    • H05K2203/1316—Moulded encapsulation of mounted components

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

The invention provides a packaging method, a packaging structure and a packaging module, wherein the packaging method comprises the following steps: providing a substrate; mounting a component and an interconnection structure on a substrate, wherein the opposite sides of the interconnection structure are respectively provided with a bonding pad; and packaging the substrate provided with the component and the interconnection structure to form a packaging body, and respectively exposing the bonding pads positioned on the opposite side of the interconnection structure from two mounting surfaces of the packaging body, which are deviated from each other, so as to be respectively interconnected with the stacked body and the printed circuit board. The packaging method, the packaging structure and the technical scheme of the packaging module can reduce interconnection paths, simplify the packaging structure and improve the connection reliability.

Description

Packaging method, packaging structure and packaging module
Technical Field
The present invention relates to the field of electronic packaging technologies, and in particular, to a packaging method, a packaging structure, and a packaging module.
Background
With the rapid development of electronic devices, the density of electronic components on a Printed Circuit Board (PCB) is increasing, and more electronic components are required to be mounted in the same or smaller space.
In the related art, there is a Package on Package (PoP) Package, for example, a substrate is molded to form a Package, and then the Package is subjected to laser drilling, and a conductive medium such as solder paste, silver paste, etc. is filled in the hole, and then a pad is formed on an outer surface of the Package. And electrically interconnecting the stacked components on the packaging body with a circuit in the substrate sequentially through the bonding pad, the conductive medium and the copper column.
However, the interconnection path is long, the package structure is complicated, and the connection between the conductive medium and the copper pillar in the package is located inside the package, which results in poor connection reliability.
Disclosure of Invention
The present invention is directed to at least one of the technical problems of the prior art, and provides a packaging method, a packaging structure and a packaging module, which can reduce the number of interconnection paths, simplify the packaging structure, and improve the connection reliability.
In order to achieve the above object, the present invention provides a packaging method, including:
providing a substrate;
mounting a component and an interconnection structure on the substrate, wherein the opposite sides of the interconnection structure are respectively provided with a bonding pad;
and packaging the base body provided with the component and the interconnection structure to form a packaging body, and respectively exposing the bonding pads positioned on the opposite side of the interconnection structure from two mounting surfaces of the packaging body, which are deviated from each other, so as to be respectively interconnected with the stacked body and the printed circuit board.
Optionally, opposite sides of the interconnect structure have two ends, respectively;
each of the end portions serves as the pad; or,
the step of encapsulating the substrate on which the component and the interconnection structure are mounted to form a package body, and exposing the pads on the opposite side of the interconnection structure from two mounting surfaces of the package body, which are away from each other, so as to interconnect the stacked body and the printed circuit board, specifically includes:
packaging the substrate provided with the component and the interconnection structure to form a packaging body, and exposing the two end parts relative to the packaging body;
the pads interconnected with the end portions are formed on both the mounting surfaces of the package body.
Optionally, the step of encapsulating the substrate on which the component and the interconnection structure are mounted to form an encapsulation body, and exposing the two end portions from two mounting surfaces of the encapsulation body, which are away from each other, specifically includes:
covering a mask on both of the end portions;
packaging the substrate provided with the component and the interconnection structure to form a packaging body, wherein the mask is exposed relative to the packaging body;
and removing the mask.
Optionally, the step of encapsulating the substrate on which the component and the interconnection structure are mounted to form an encapsulation body, and exposing the two end portions with respect to the encapsulation body specifically includes:
packaging the substrate provided with the component and the interconnection structure to form a packaging body, and enabling the packaging body to completely wrap the interconnection structure;
and respectively grinding the two mounting surfaces of the packaging body until the two end parts of the interconnection structure are exposed relative to the packaging body.
Optionally, after the step of forming the pads interconnected with the end portions on the two mounting surfaces of the package body, the method further includes:
and manufacturing a metal protection layer on the bonding pad.
Optionally, a wiring process is performed on at least one of the two mounting surfaces of the package body to form a lead structure.
Optionally, the step of mounting a component and an interconnection structure on the substrate, where the opposite sides of the interconnection structure are respectively provided with a pad, includes:
forming a through hole in the base body to penetrate through the base body;
arranging an adhesive film on the surface of the substrate, which is opposite to the surface of the component;
fixing the interconnection structure in the through hole through the adhesive film;
after the step of forming a package by packaging the base body on which the components and the interconnection structure are mounted, and exposing each of the pads from a corresponding mounting surface of the package to be capable of interconnection with the stacked body and the printed circuit board, respectively, the method further comprises:
and removing the adhesive film.
Optionally, the step of mounting a component and an interconnection structure on the substrate, where the opposite sides of the interconnection structure are respectively provided with a pad, includes:
setting a blind hole with a specified depth on the first surface of the substrate;
arranging colloid at the bottom of the blind hole;
the interconnection structure is fixed in the blind hole through the colloid;
the step of encapsulating the base body on which the component and the interconnection structure are mounted to form an encapsulation body and exposing each of the pads from a corresponding mounting surface of the encapsulation body to be capable of interconnection with the stacked body and the printed circuit board, respectively, includes:
packaging the base body provided with the component and the interconnection structure to form a packaging body, and exposing the bonding pad outside the blind hole from one of the mounting surfaces;
opening the blind hole from a second surface of the substrate, which is opposite to the first surface;
and removing the colloid to expose the bonding pad in the blind hole from the other mounting surface.
Optionally, the step of mounting a component and an interconnection structure on the substrate, where the opposite sides of the interconnection structure are respectively provided with a pad, includes:
setting a blind hole with a specified depth on the first surface of the substrate;
arranging colloid at the bottom of the blind hole;
the interconnection structure is fixed in the blind hole through the colloid;
the step of encapsulating the substrate on which the component and the interconnection structure are mounted to form an encapsulation body and exposing the two end portions from two mounting surfaces of the encapsulation body which are away from each other includes:
packaging the substrate provided with the component and the interconnection structure to form a packaging body, and exposing the end part outside the blind hole from one of the mounting surfaces;
etching a second surface of the substrate, which is far away from the first surface, so as to open the blind hole;
removing the colloid to expose the interconnection structure in the blind hole;
and forming an extending portion on the end portion located in the blind hole, wherein at least one part of the extending portion is used as the bonding pad and is exposed from the other mounting surface.
As another technical solution, the present invention also provides a package structure, including:
the device comprises a substrate, wherein a component and an interconnection structure are arranged on the substrate, and pads are respectively arranged on opposite sides of the interconnection structure;
and the packaging body is used for packaging the component, the interconnection structure and the base body into a whole, and the packaging body is arranged to enable the pads on the opposite side of the interconnection structure to be respectively exposed from two mounting surfaces of the packaging body, which are away from each other, so as to be respectively interconnected with the stacked body and the printed circuit board.
Optionally, the interconnect structure comprises a conductive pillar, a conductive sheet, or a conductive frame, wherein,
two end portions of the conductive pillar serve as the pads, or the pads are respectively provided at the end portions of the conductive pillar.
Optionally, the component is interconnected with the interconnection structure through a conductor disposed in the package, or at least a portion of the component is stacked on a surface of the pad inside the package and interconnected with the pad.
Optionally, a ball grid array structure or a grid array structure is disposed on the pad.
Optionally, the stacked body comprises stacked packages and/or stacked components.
Optionally, the package structures are at least two sets, and are stacked together in sequence, and the pads of two adjacent sets of the package structures opposite to each other are interconnected.
As another technical solution, the present invention also provides a package module, including:
the invention provides the packaging structure;
a stacked body stacked on the package structure and interconnected with one of the pads of the package structure.
The invention has the beneficial effects that:
according to the technical scheme of the packaging method, the packaging structure and the packaging module, the base body is used for mounting the components and the interconnection structure, the packaging body is used for packaging the base body provided with the components and the interconnection structure into a whole, so that the interconnection structure is fixed, and compared with the prior art, the fixing mode is more stable, so that the connection stability can be improved. At the same time, the two pads of the interconnect structure can be interconnected with the stack and the printed circuit board, respectively, by exposing them from the two mounting faces of the package, respectively, which face away from each other. Thereby, the stacked body can be directly interconnected with the printed circuit board through the interconnection structure, thereby reducing the interconnection path and simplifying the packaging structure.
Drawings
Fig. 1 is a flow chart of a packaging method according to an embodiment of the present invention;
FIG. 2 is a process diagram of a packaging method according to an embodiment of the present invention;
FIG. 3 is another process diagram of the packaging method according to the embodiment of the present invention;
fig. 4 is a cross-sectional view of a package structure according to an embodiment of the invention;
fig. 5 is another cross-sectional view of a package structure according to an embodiment of the invention.
Detailed Description
In order to make those skilled in the art better understand the technical solution of the present invention, the following describes the packaging method, the packaging structure and the packaging module provided by the present invention in detail with reference to the accompanying drawings.
Referring to fig. 1 and fig. 2 together, a packaging method according to an embodiment of the present invention includes:
step 101, providing a substrate 1.
In the present embodiment, the substrate 1 is a package substrate (a "finished substrate"), but in practical applications, the substrate 1 may also adopt any other structure, such as a lead frame (lead frame).
The base body 1 includes a component mounting surface 11, and the component mounting surface 11 may be subjected to necessary surface treatment before the component 2 is mounted, so as to realize interconnection processes of the component 2 such as soldering, wire bonding, and the like.
Step 102, mounting the component 2 and the interconnection structure 3 on the base 1.
Optionally, the component 2 includes a chip, a capacitor, a resistor, an inductor, and the like. Moreover, the components 2 may be soldered by wire bonding, flip chip bonding, SMT surface mount, or the like. In addition, the component 2 may be interconnected with the interconnection structure 3 by means of bonding, soldering, wire bonding, or the like, or may be directly soldered on a pad of the interconnection structure 3.
In this embodiment, step 102 specifically includes:
at step 1021, as shown in fig. 2 (a), a through hole 12 penetrating the base 1 is formed in the base 1.
Step 1022, a glue film (not shown in the figure) is disposed on the surface of the substrate 1 away from the plane where the component 2 is located. The adhesive film loses viscosity after being irradiated by UV light or baked at high temperature, so that the adhesive film can be stripped off.
In step 1023, as shown in fig. 2 (b), the component 2 is mounted on the base 1, and the interconnect structure 3 is fixed in the through-hole 12 by the adhesive film.
It should be noted that there is no electrical interconnection between the interconnection structure 3 and the substrate 1.
Step 103, as shown in fig. 2 (c), packages the base 1 mounted with the components 2 and the interconnect structures 3 to form a package 4, and exposes two end portions (31,32) of the interconnect structures 3 from two mounting surfaces (41,13) of the package 4, respectively, which are away from each other, so as to be capable of interconnecting the stacked body 5 and the printed circuit board 6, respectively.
In the present embodiment, the surface of the base 1 facing away from the component mounting surface 11 is not covered by the package 4, and this surface serves as one of the mounting surfaces 13 of the package 4 that interconnects with the printed circuit board 6. Of course, in practical applications, the substrate 1 may be completely encapsulated in the package 4.
Optionally, the package body 4 is formed by the above-mentioned packaging, for example, by plastic packaging.
Optionally, the package body 4 is made of an ABF-like material, and the ABF-like material has a good adhesion to copper and other interconnection materials, so that the reliability requirement is met.
Optionally, after step 103, the package 4 may be surface treated to facilitate interconnection with the stack. The surface treatment may be an electroplating process such as chemical tin, chemical silver, nickel gold, surface oxidation resistance, nickel palladium gold, and the like.
Optionally, after step 103, the method further includes:
and removing the adhesive film.
In this way, the interconnect structure 3 is completely fixed by the package body 4. This kind of fixed mode is more stable than prior art to can improve connection stability.
In the present embodiment, the interconnect 3 is a conductive pillar, and opposite sides of the interconnect 3 have two end portions (31,32), which are two end surfaces of the conductive pillar. However, the present invention is not limited to this, and in practical applications, the interconnect structure 3 may also be any other structure such as a conductive sheet or a conductive frame, and the opposite sides of the structure have pads respectively. The interconnect structure is made of a material such as copper.
In the present embodiment, the two end portions (31,32) of the interconnect structure 3 are exposed from the two mounting surfaces (41,13) of the package 4, respectively, which are away from each other, which means that the two end portions (31,32) are not covered by the package 4. Alternatively, the two ends (31,32) are flush with the two mounting surfaces (41,13) of the package body 4, respectively, or may protrude with respect to the two mounting surfaces (41, 13).
It should be noted that, in the present embodiment, two interconnect structures 3 are provided on the same substrate 1, but the present invention is not limited to this, and in practical applications, one or more than three interconnect structures 3 may be provided on the same substrate 1. And, the opposite sides of each interconnect structure 3 have pads.
Only any one of the interconnect structures 3 is described in detail below.
In step 103, a method of exposing both end portions (31,32) of the interconnect structure 3 specifically comprises:
covering both ends (31,32) with a mask;
packaging the substrate 1 provided with the component 2 and the interconnection structure 3 to form a packaging body 4, wherein the mask is exposed relative to the packaging body 4;
the mask is removed, thereby exposing both end portions (31,32) of the interconnect structure 3.
Alternatively, another method of exposing the two ends (31,32) of the interconnect structure 3 may be used, the method comprising in particular:
packaging the substrate 1 provided with the component 2 and the interconnection structure 3 to form a packaging body 4, and enabling the packaging body 4 to completely cover the interconnection structure 3;
the two mounting faces (41,13) of the package 4 are respectively ground until the two ends (31,32) of the interconnect structure 3 are exposed with respect to the package 4.
In the present embodiment, in step 103, after exposing two end portions (31,32) of the interconnect structure 3 from two mounting surfaces (41,13) of the package 4, the method further includes:
as shown in fig. 2 (d), two pads (33a,33b) respectively interconnected with the two end portions (31,32) are formed on the two mounting surfaces (41,13) of the package body 4. In practical application, the orthographic projection areas of the two bonding pads (33a,33b) on the two mounting surfaces (41,13) respectively can be larger or smaller than the orthographic projection areas of the two end parts (31,32) on the two mounting surfaces (41,13) respectively so as to meet different interconnection requirements. Specifically, the pads may be formed by printing solder paste, and by reflow soldering or the like.
In addition, optionally, the two pads (33a,33b) are surface treated to protect the pad surfaces and make them easy to solder.
In the present embodiment, in order to facilitate mounting of the base body 1 on the printed circuit board 6, one of the pads 33b is embedded in the base body 1. Also, the bottom surfaces of the pads 33b and the mounting surface 13 may be flush with each other or recessed with respect to the mounting surface 13.
Optionally, after completing the fabrication of the two pads (33a,33b), the method further includes:
a metal protective layer is formed on each of the two pads (33a,33 b).
Alternatively, the metal protection layer may be made by electrochemical processing, and the metal protection layer is, for example, a nickel-gold layer, a nickel-palladium-gold layer, a silver layer, an OSP layer, or the like.
Alternatively, a structure such as a Ball Grid Array (BGA) structure or a Land Grid Array (LGA) structure may be provided on each of the two pads (33a,33b), and the structure has advantages such as an improved assembly yield and an improved heat dissipation performance.
As shown in fig. 2 (e), a process diagram for completing interconnection of the stacked body 5 and the printed circuit board 6 is shown. Wherein the stack 5 is interconnected with the interconnect structure 3 by means of pads 33a and the printed circuit board 6 is interconnected with the interconnect structure 3 by means of pads 33b, thereby achieving an interconnection of the stack 5 with the printed circuit board 6. Compared with the prior art, the method reduces the interconnection path and simplifies the packaging structure.
It should be noted that, in the present embodiment, the stacked body 5 is interconnected with the interconnect structure 3 through the pad 33a, and the printed circuit board 6 is interconnected with the interconnect structure 3 through the pad 33b, however, the present invention is not limited to this, and in practical applications, the stacked body 5 may be interconnected with the interconnect structure 3 through the pad 33b, and the printed circuit board 6 may be interconnected with the interconnect structure 3 through the pad 33 a.
In practical applications, the stack 5 comprises stacked packages and/or stacked components. Specifically, the stacked components include chips, capacitors, resistors, inductors, and the like. The stacked package may be the same package as the package structure employed in the present embodiment.
In the present embodiment, wiring processing is performed on at least one of the two mounting surfaces (41,13) of the package body 4 to form a lead structure. The lead structure can be used for interconnection between different stacks and also for interconnection with the stack 5 or the printed circuit board 6, so that stacking of a plurality of devices can be realized, and space limitation is overcome.
In another embodiment, as shown in fig. 3, the step 102 may also adopt another implementation method, where the method specifically includes:
step 1021', as shown in fig. 3 (a), a blind hole 14 of a prescribed depth is provided on the first surface of the base 1 (i.e., the upward surface of the base 1 in fig. 3 (a)).
The above-mentioned specified depth may be set according to the specific thickness of the base 1.
Step 1022', a glue (not shown) is disposed on the bottom of the blind via 14.
The gel remains in the blind hole 14 and is not peeled off. The glue is for example an epoxy glue.
Step 1023', as shown in fig. 3 (b), the component 2 is mounted on the substrate 1, and the interconnect structure 3 is fixed in the blind via 14 by the above-mentioned glue.
One of the ends 32 of the interconnect structure 3 is located in the blind hole 14, and the other end 31 is located outside the blind hole 14.
It should be noted that there is no electrical interconnection between the interconnection structure 3 and the substrate 1.
As for the step 102, the step 103 specifically includes:
step 1031, as shown in fig. 3 (c), encapsulates the base 1 on which the component 2 and the interconnect structure 3 are mounted to form the package 4, and exposes the end 31 outside the blind via 14 from the mounting surface 41.
Step 1032, as shown in fig. 3 (d), forms a pad 33a interconnecting the end portion 31 on the mounting surface 41 of the package 4.
Step 1033, as shown in fig. 3 (e), etches a second surface of the base body 1 facing away from the first surface, i.e. one of the mounting surfaces 13 serving as the package body 4 for interconnecting with the printed circuit board 6, to open the blind holes 14 to form through holes 14 a. The etching method specifically uses a patterned mask to etch the package 4. Of course, in practical applications, a laser may be used to open the blind hole 14.
Step 1034 removes the glue on the end portion 32 of the interconnect structure 3, such that the end portion 32 of the interconnect structure 3 is exposed through the through hole 14 a. The removal of the colloid can be effected, for example, by laser ablation.
Optionally, after step 1034, the mounting surface 13 of the package 4 is ground and thinned integrally to the package 4 until the end 32 of the interconnect structure 3 is flush with the mounting surface 13. Alternatively, after step 1034, as shown in fig. 3 (f), an extension portion 34 may be further formed on the end portion 32 located in the through hole 14a, at least a portion of the extension portion 34 serving as a pad and being exposed from the other mounting surface 13, i.e., being flush with the mounting surface 13 or protruding with respect to the mounting surface 13. Of course, in practical applications, it is also possible to make pads with larger soldering areas on the mounting surface 13 and interconnect the extended portions.
As shown in fig. 3 (g), a process diagram for completing interconnection of the stacked body 5 and the printed circuit board 6 is shown. Wherein the stack 5 is interconnected with the interconnect structure 3 by the pads 33a and the printed circuit board 6 is interconnected with the interconnect structure 3 by the extensions 34, thereby achieving interconnection of the stack 5 with the printed circuit board 6. Compared with the prior art, the method reduces the interconnection path and simplifies the packaging structure.
It should be noted that, in the present embodiment, the stacked body 5 is interconnected with the interconnect structure 3 through the pad 33a, and the printed circuit board 6 is interconnected with the interconnect structure 3 through the extension portion 34, however, the present invention is not limited to this, and in practical applications, the stacked body 5 may be interconnected with the interconnect structure 3 through the extension portion 34, and the printed circuit board 6 may be interconnected with the interconnect structure 3 through the pad 33 a.
As another technical solution, referring to fig. 4, an embodiment of the present invention further provides a package structure, which includes a substrate 1 and a package 4, wherein a component 2 and an interconnect structure 3 having two pads (33a,33b) are disposed on the substrate 1; the package 4 is used for integrally packaging the component 2, the interconnection structure 3 and the base 4, and the package 4 is arranged such that two pads (33a,33b) are exposed from two mounting surfaces of the package 4 facing away from each other, respectively, so that the two pads (33a,33b) can be interconnected with the stack 5 and the printed circuit board 6, respectively.
In this embodiment, the substrate 1 is an organic package substrate, but in practical applications, the substrate 1 may also have any other structure, such as a frame structure.
Optionally, the component 2 includes a chip, a capacitor, a resistor, an inductor, and the like. The component 2 can be interconnected with the interconnection structure 3 by manufacturing conductors in the packaging body 4 in a bonding, welding, routing and other modes; alternatively, at least a part of the component 2 is stacked on the surface of the pad inside the package 4 and interconnected with the pad. In this way, the component 2 may be directly interconnected with the printed circuit board 6 via the interconnect structure 3.
Optionally, the interconnect structure 3 includes a conductive pillar, a conductive sheet, a conductive frame, or the like, in this embodiment, two pads (33a,33b) are respectively disposed at two ends of the conductive pillar, and an orthographic projection area of the two pads (33a,33b) on a radial cross section of the conductive pillar is larger than a radial cross section area of the conductive pillar. Therefore, the welding area can be enlarged to meet the welding requirement. Of course, in practical application, the orthographic projection area of the two pads (33a,33b) on the radial section of the conductive cylinder can be smaller than the radial section area of the conductive cylinder according to the requirement of the cloth strip.
In another embodiment, there are at least two sets of package structures, for example, in the present embodiment, as shown in fig. 5, there are two sets of package structures, namely, a first package structure 100a and a second package structure 100b, which are stacked in turn, and pads of the first package structure 100a and the second package structure 100b opposite to each other are interconnected, that is, a top pad of the first package structure 100a is interconnected with a bottom pad of the second package structure 100 b. The bottom pads of the first package structure 100a are interconnected with the printed circuit board 6.
It should be noted that, in practical applications, for each of two adjacent package structures, the pad on any side of one package structure may be interconnected with the pad on any side of the other package structure. The pads of each two adjacent packages on the side remote from each other may be used for interconnection with the printed circuit board 6.
In the package structure provided by the embodiment, the substrate 1 is used for mounting the component 2 and the interconnection structure 3, and the package body 4 is used for packaging the substrate 1 mounted with the component 2 and the interconnection structure 3 into a whole, so that the interconnection structure 3 is fixed, and the fixing mode is more stable than the prior art, so that the connection stability can be improved. Meanwhile, by exposing the two pads (33a,33b) of the interconnect structure 3 from the two mounting surfaces of the package body 4, respectively, which face away from each other, it is possible to interconnect the stacked body 5 and the printed circuit board 6, respectively. Thereby, the stack 5 may be directly interconnected with the printed circuit board 6 by the interconnect structure 3, thereby reducing interconnect paths and simplifying the packaging structure.
It should be noted that the shape and the internal structure of the package structure provided in the above embodiments are only an example, and besides, the package structure may have other shapes and internal structures, which is not limited in this embodiment.
As another technical solution, an embodiment of the present invention further provides a package module, which includes a package structure and a stack, where the stack is stacked on the package structure and interconnected with one of the pads of the package structure. Taking the package structure shown in fig. 4 as an example, the stack 5 is stacked on the package structure and interconnected with one of the pads 33a of the package structure.
The packaging module provided by the embodiment can reduce interconnection paths, simplify the packaging structure and improve the connection reliability.
It should be noted that the devices mentioned in the above embodiments include chips, passive devices, flip chips, and the like, and the present embodiment does not specifically limit the type and shape of the packaged device.
It will be understood that the above embodiments are merely exemplary embodiments taken to illustrate the principles of the present invention, which is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and substance of the invention, and these modifications and improvements are also considered to be within the scope of the invention.

Claims (16)

1. A method of packaging, the method comprising:
providing a substrate;
mounting a component and an interconnection structure on the substrate, wherein the opposite sides of the interconnection structure are respectively provided with a bonding pad;
and packaging the base body provided with the component and the interconnection structure to form a packaging body, and respectively exposing the bonding pads positioned on the opposite side of the interconnection structure from two mounting surfaces of the packaging body, which are deviated from each other, so as to be respectively interconnected with the stacked body and the printed circuit board.
2. The method of packaging of claim 1, wherein opposite sides of the interconnect structure each have two ends;
each of the end portions serves as the pad; or,
the step of encapsulating the substrate on which the component and the interconnection structure are mounted to form a package body, and exposing the pads on the opposite side of the interconnection structure from two mounting surfaces of the package body, which are away from each other, so as to interconnect the stacked body and the printed circuit board, specifically includes:
packaging the substrate provided with the component and the interconnection structure to form a packaging body, and exposing the two end parts relative to the packaging body;
the pads interconnected with the end portions are formed on both the mounting surfaces of the package body.
3. The packaging method according to claim 2, wherein the step of forming a package by packaging the substrate on which the component and the interconnect structure are mounted, and exposing the two end portions respectively from two mounting surfaces of the package facing away from each other includes:
covering a mask on both of the end portions;
packaging the substrate provided with the component and the interconnection structure to form a packaging body, wherein the mask is exposed relative to the packaging body;
and removing the mask.
4. The method according to claim 2, wherein the step of encapsulating the substrate on which the component and the interconnect structure are mounted to form an encapsulation body and exposing the two end portions with respect to the encapsulation body comprises:
packaging the substrate provided with the component and the interconnection structure to form a packaging body, and enabling the packaging body to completely wrap the interconnection structure;
and respectively grinding the two mounting surfaces of the packaging body until the two end parts of the interconnection structure are exposed relative to the packaging body.
5. The method of packaging according to claim 2, wherein after the step of forming the pads on the two mounting surfaces of the package body to interconnect the end portions, the method further comprises:
and manufacturing a metal protection layer on the bonding pad.
6. The packaging method according to any one of claims 1 to 5, wherein a wiring process is performed on at least one of the two mounting surfaces of the package body to form a lead structure.
7. The packaging method according to any one of claims 1 to 5, wherein the step of mounting a component and an interconnect structure on the substrate, the interconnect structure having pads provided on opposite sides thereof, respectively, comprises:
forming a through hole in the base body to penetrate through the base body;
arranging an adhesive film on the surface of the substrate, which is opposite to the surface of the component;
fixing the interconnection structure in the through hole through the adhesive film;
after the step of forming a package by packaging the base body on which the components and the interconnection structure are mounted, and exposing each of the pads from a corresponding mounting surface of the package to be capable of interconnection with the stacked body and the printed circuit board, respectively, the method further comprises:
and removing the adhesive film.
8. The packaging method according to any one of claims 1 to 5, wherein the step of mounting a component and an interconnect structure on the substrate, the interconnect structure having pads provided on opposite sides thereof, respectively, comprises:
setting a blind hole with a specified depth on the first surface of the substrate;
arranging colloid at the bottom of the blind hole;
the interconnection structure is fixed in the blind hole through the colloid;
the step of encapsulating the base body on which the component and the interconnection structure are mounted to form an encapsulation body and exposing each of the pads from a corresponding mounting surface of the encapsulation body to be capable of interconnection with the stacked body and the printed circuit board, respectively, includes:
packaging the base body provided with the component and the interconnection structure to form a packaging body, and exposing the bonding pad outside the blind hole from one of the mounting surfaces;
opening the blind hole from a second surface of the substrate, which is opposite to the first surface;
and removing the colloid to expose the bonding pad in the blind hole from the other mounting surface.
9. The packaging method according to any one of claims 2 to 5, wherein the step of mounting a component and an interconnect structure on the substrate, the interconnect structure having pads provided on opposite sides thereof, respectively, comprises:
setting a blind hole with a specified depth on the first surface of the substrate;
arranging colloid at the bottom of the blind hole;
the interconnection structure is fixed in the blind hole through the colloid;
the step of encapsulating the substrate on which the component and the interconnection structure are mounted to form an encapsulation body and exposing the two end portions from two mounting surfaces of the encapsulation body which are away from each other includes:
packaging the substrate provided with the component and the interconnection structure to form a packaging body, and exposing the end part outside the blind hole from one of the mounting surfaces;
etching a second surface of the substrate, which is far away from the first surface, so as to open the blind hole;
removing the colloid to expose the interconnection structure in the blind hole;
and forming an extending portion on the end portion located in the blind hole, wherein at least one part of the extending portion is used as the bonding pad and is exposed from the other mounting surface.
10. A package structure, comprising:
the device comprises a substrate, wherein a component and an interconnection structure are arranged on the substrate, and pads are respectively arranged on opposite sides of the interconnection structure;
and the packaging body is used for packaging the component, the interconnection structure and the base body into a whole, and the packaging body is arranged to enable the pads on the opposite side of the interconnection structure to be respectively exposed from two mounting surfaces of the packaging body, which are away from each other, so as to be respectively interconnected with the stacked body and the printed circuit board.
11. The package structure of claim 10, wherein the interconnect structure comprises a conductive post, a conductive strip, or a conductive frame, wherein,
two end portions of the conductive pillar serve as the pads, or the pads are respectively provided at the end portions of the conductive pillar.
12. The package structure according to claim 10, wherein the component is interconnected with the interconnect structure by a conductor provided in the package body, or at least a portion of the component is stacked on a surface of the pad inside the package body and interconnected with the pad.
13. The package structure of claim 10, wherein a ball grid array structure or a grid array structure is disposed on the pad.
14. The package structure according to claim 10, wherein the stack comprises stacked packages and/or stacked components.
15. The package structure according to claim 10, wherein the package structures are at least two sets and are stacked together in sequence, and the pads of each adjacent two sets of the package structures that are opposite to each other are interconnected.
16. A packaged module, comprising:
the encapsulation structure of any one of claims 10-15;
a stacked body stacked on the package structure and interconnected with one of the pads of the package structure.
CN201911283550.8A 2019-12-13 2019-12-13 Packaging method, packaging structure and packaging module Pending CN112992776A (en)

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TWI772170B (en) * 2021-09-06 2022-07-21 先豐通訊股份有限公司 Circuit board with embedded chips and manufacturing method

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CN101752353B (en) * 2008-12-19 2012-01-11 日月光封装测试(上海)有限公司 Packaging structure of multi-chip semiconductor
CN102456677B (en) * 2010-10-27 2013-08-21 三星半导体(中国)研究开发有限公司 Packaging structure for ball grid array and manufacturing method for same
CN104779220A (en) * 2015-03-27 2015-07-15 矽力杰半导体技术(杭州)有限公司 Chip packaging structure and manufacture method thereof
CN107919333B (en) * 2017-12-28 2023-08-29 江阴长电先进封装有限公司 Three-dimensional POP packaging structure and packaging method thereof
CN110211946A (en) * 2019-06-17 2019-09-06 上海先方半导体有限公司 A kind of chip-packaging structure and its manufacturing method

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TWI772170B (en) * 2021-09-06 2022-07-21 先豐通訊股份有限公司 Circuit board with embedded chips and manufacturing method

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