JP2002151615A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a small-sized and light-weight semiconductor device of high function which mounts semiconductor elements and includes chip components such as resistors, capacitors and inductors. SOLUTION: In this semiconductor device, circuit boards on which semiconductor elements are mounted are laminated in plural layers, and the circuit boards are mutually and electrically connected. Chip components are accommodated in a cavity which is formed penetrating at least two layers of the circuit boards, and electrically connected with the circuit boards.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device,
More specifically, the present invention relates to a small, lightweight, and highly functional semiconductor device having a semiconductor element mounted thereon and chip components such as a resistor, a capacitor, and an inductor built therein.
The present invention also relates to a semiconductor device that can be mounted at low cost and with high density using commercially available chip components and that can be easily reworked. The present invention further relates to a method for manufacturing such a semiconductor device.

[0002]

2. Description of the Related Art As is well known, the demand for smaller, thinner, lighter, faster, and more sophisticated electronic information devices is increasing, and semiconductor devices such as LSI chips are packaged in various packages. It is an important issue to satisfy those requirements in a semiconductor device mounted on a semiconductor device.

Conventionally, in order to reduce the size and thickness of a semiconductor device, improvements have been made at a package level, a chip level, and a wafer level. For example, regarding the chip level, the thickness of a conventional semiconductor chip is 40
It is about 0 to 500 μm, but attempts have been made to reduce this to a thickness of about 40 to 50 μm. In addition, although it is preferable to make the semiconductor device as thin as possible, it is difficult to make it thinner or to control its thickness, and it is also necessary to control the shape of the resin sealing. With difficulty. Further, in a completed semiconductor device, if a chip has a defect or the like, the semiconductor device must be disposed of, but if the chip can be replaced, that is, if rework is possible. Is economically advantageous. In addition, if a capacitor, a resistor, and the like can be built in by using a commercially available chip component, it is very advantageous since high-density mounting can be performed at low cost.

[0004]

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a small-sized, semiconductor device and a chip, such as a resistor, a capacitor and an inductor.
An object of the present invention is to provide a lightweight and high-performance semiconductor device. Another object of the present invention is to provide a semiconductor device that can be mounted at low cost and with high density by using commercially available chip components and that can be easily reworked.

Another object of the present invention is to provide a method useful for manufacturing the semiconductor device of the present invention. The above and other objects of the present invention can be easily understood from the following detailed description.

[0006]

According to the present invention, there is provided a semiconductor device comprising a plurality of circuit boards on each of which a semiconductor element is mounted and which are electrically connected to each other. A semiconductor device is provided in which a chip component is accommodated in a cavity formed through at least two layers of the above, and the chip component is electrically connected to the circuit board.

Further, according to the present invention, there is provided a semiconductor device in which a circuit board on which a semiconductor element is mounted is laminated in a plurality of layers, and the circuit boards are electrically connected to each other. In a method of manufacturing a semiconductor device in which a chip component is housed in a cavity formed through two layers, a predetermined portion of an insulating base material is provided.
Forming an opening for accommodating a semiconductor element, forming a cavity for accommodating a chip component in a predetermined part of the base material, and forming a cavity in a predetermined part of the base material, one opening end of which is a metal layer. A step of forming a closed through-hole, a step of filling the inside of the through-hole with a low-melting-point metal to form an external connection terminal, and electrically connecting a lead of the conductor to the semiconductor in the opening. Mounting a device, completing the circuit board, laminating a required number of circuit boards on which semiconductor elements are mounted, and electrically connecting the circuit boards to each other; and housing the chip component in the cavity. And a step of electrically connecting the chip component and the circuit board. A method of manufacturing a semiconductor device is provided.

According to the method of manufacturing a semiconductor device of the present invention, an adhesive is applied to one surface of the base material on which a conductor portion is to be formed to form an adhesive layer, and the metal layer is interposed via the adhesive layer. And a step of selectively removing the metal layer from the surface of the base material to form a conductor portion having a required circuit pattern.

Further, a method for manufacturing a semiconductor device according to the present invention
A step of forming a cavity penetrating at least two layers of the circuit board, in place of, or in combination with, a step of forming a cavity for accommodating a chip component in a predetermined portion of the base material. preferable.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor device according to the present invention has a structure in which circuit boards on which semiconductor elements are mounted are laminated in a plurality of layers, and each circuit board is preferably provided with a required circuit. A semiconductor package comprising an insulating base material having a conductor portion formed in a pattern, wherein the semiconductor package is designed so that a semiconductor element is housed in one or more openings of the base material, and the semiconductor package And a semiconductor element mounted in the opening.

In the semiconductor package used in the semiconductor device according to the present invention, a through hole having one open end closed by a conductor is formed in a predetermined portion of the insulating base material except for the opening. The through-hole is filled with a low melting point metal. The low melting point metal filled here serves as an external connection terminal in the semiconductor package of the present invention, and the filling depth is preferably equal to or greater than the thickness of the base material. Usually, a configuration in which the external connection terminal slightly protrudes from the surface of the base material is advantageous from the viewpoint of obtaining good electrical connection.

The semiconductor package can take various forms within the scope of the present invention. For example, in this semiconductor package, it is preferable that a part of the conductor is formed as a lead electrically connected to the electrode of the semiconductor element. However, in some cases, the lead may be replaced with a connection such as a bump. Means may be used. The semiconductor package is preferably a tape carrier type package (TCP) incorporating a TAB mounting method. The TAB tape includes an insulating base material and a conductor supported by the base material. The TAB tape is preferably formed by bonding a copper foil on a base material to form a conductor portion, and is generally a three-layer tape in which a copper foil is bonded via an adhesive layer. A three-layer tape can advantageously be used in the practice of the present invention. In the practice of the present invention, if possible, it is needless to say that the conductor may be formed by attaching copper to the surface of the base material by a sputtering method or the like without using an adhesive.

In the practice of the present invention, the filling depth of the low melting point metal when filling the through hole formed in the semiconductor package for forming the external connection terminals with the low melting point metal is important.
If the filling depth in the through hole is too small, sufficient electrical conduction cannot be achieved. Therefore, in the semiconductor package used in the present invention, it is an essential requirement that the low-melting point metal is filled in the through-hole so as to be equal to or thicker than the thickness of the base material. In addition, the term "thickness of the base material" used herein means that when an adhesive layer is used for bonding the base material and the conductor, the through-hole also passes through the adhesive. , The sum of the thickness of the base material and the thickness of the adhesive layer.

After forming the external connection terminals on the surface of the base material,
The desired conductor portion by removing unnecessary portions of copper foil on the base material,
That is, leads (inner leads connected to the electrodes of the semiconductor element and outer leads connected to the electrodes of the package or substrate), wiring, electrodes, and the like are formed. This step can be advantageously performed according to an etching process commonly used in the manufacture of semiconductor devices. That is, after an etching resist is coated on a copper foil to be left as a conductor, the exposed unnecessary copper foil is dissolved and removed with an appropriate etching solution (for example, an aqueous solution of ferric chloride). If necessary, a copper foil plating step may be performed after this etching step to prevent oxidation and improve bonding strength. In the specification of the present application, the pattern-shaped conductor formed in this manner is also referred to as a “circuit pattern” or a “circuit”.

Through a series of processing steps as described above, a semiconductor package is obtained. In such a semiconductor package, the upper surface of the conductor may be further covered with an insulating layer except for a part thereof (a region used for connection). This is because the selectively exposed conductor can be used for connection to another device or element.

One or more semiconductor elements are mounted in the openings of the obtained semiconductor package in accordance with the number of the openings to manufacture a circuit board (a precursor of a semiconductor device). The circuit board is preferably made of a TAB tape manufactured by the above-described process, that is, a semiconductor element is inserted into an opening (device hole) of an insulating tape-shaped base having a conductor formed in a required circuit pattern. It can be manufactured by housing and mounting. The semiconductor element used here is not particularly limited, and may be any element generally used for manufacturing a semiconductor device. Suitable semiconductor elements include, for example, LSI
And a semiconductor chip such as a VLSI chip. Although the size of such a semiconductor chip varies depending on the type, it is generally 40 to 5 mm.
It ranges from as thin as about 0 μm to as thick as about 500 μm. The above-described semiconductor package can correspond to a semiconductor element having any thickness.

Although the mounting of the semiconductor element on the semiconductor package can be performed in various forms and according to various methods, usually, an electrode of the semiconductor element is provided with an electrode of a metal layer in an opening formed in an insulating base material. Advantageously, it is accommodated on the side and electrically connected between the electrode and the lead of the conductor. Next, a conductor (usually an inner lead) of the TAB tape is electrically connected to a connection portion (usually an electrode) of the semiconductor element. Here, the electrode of the semiconductor element is usually in the form of a pad, and when it is connected to the inner lead, the element surface and the lead may come into direct contact with each other to cause a short circuit. It is preferable to provide in.
The bumps can be formed, preferably from gold, using conventional techniques. The bumps include mushroom bumps and straight wall bumps, and may be used as needed. In the present invention, if necessary, the connection can be made by using only the bumps without using the leads, which can greatly contribute to the miniaturization and thinning of the obtained package and device.

The step of connecting the conductor part of the TAB tape to the connection part of the semiconductor element can be advantageously performed by using an ILB (inner lead bonding) generally used in this technical field. For example, after aligning the connection part of the semiconductor element mounted on the bonding stage with the conductor part of the TAB tape, the bonding tool is pressed under heating conditions to perform connection at a plurality of sites in a short time. be able to.

Subsequently, the surface of the semiconductor element mounted on the circuit board is sealed with a resin to improve the moisture resistance. Although there are various forms of resin sealing, in the present invention, since the conductor portion (metal layer) is provided on the uppermost layer, it is sufficient to seal the connection portion of the semiconductor element and the vicinity thereof. There is no restriction on the shape, and therefore the sealing shape and its thickness can be arbitrarily controlled. As the sealing resin, an epoxy-based resin can be advantageously used. In addition,
This resin is classified into a one-pack type resin and a two-pack resin type, and can be used arbitrarily. For injection of such a sealing resin, a nozzle or other common injection means can be used.

Subsequently, a required number of the circuit boards manufactured as described above are laminated in a required pattern to form a semiconductor device. At this time, the circuit boards are electrically connected to each other via external connection terminals filled with the low melting point metal. Specifically, at least one, usually two or more semiconductor elements are mounted on each circuit board, and a plurality of layers of such a semiconductor element-mounted circuit board are laminated and mutually electrically connected. By connecting
A semiconductor device having a stacked structure is formed. Although various types of semiconductor devices having a laminated structure are included, usually, circuit boards of the same size are stacked by being stacked in the thickness direction, and each circuit board is externally connected to one of the circuit boards. What bonded the terminal and the conductor part of the other circuit board is preferable. Otherwise, in some cases, the circuit boards may be electrically connected by a suitable conducting means. Examples of the conductive means include a conductive paste, solder, and bump. The semiconductor device having such a laminated structure is particularly useful as a memory module or the like.

In the semiconductor device having the laminated structure of the present invention, the chip component is accommodated in the cavity formed through at least two layers of the circuit board, and the chip component and the conductor of the circuit board are electrically connected. Connected to. here,
A chip component refers to a resistor, a capacitor, an inductor, and the like, and at least one chip component is housed in one semiconductor device. The thickness of chip parts is usually 5
0 μm, and generally speaking, the smallest size at present is about 0.6 × 0.3 m
m, about 0.6 × 0.3 mm for the chip capacitor and about 0.6 × 0.3 mm for the chip inductor. When two or more chip components are housed in a semiconductor device, the chip components may be of the same type or a combination of different types. It can have any size depending on the type of semiconductor device and the like.

The cavity of the circuit board can have an arbitrary size according to the shape and size of the chip component housed therein. The size of the cavity is typically about 0.7-2.2 mm × about 0.4-1.5 mm. The cavity is preferably open at the top surface of the circuit board, as described below with reference to the drawings,
If necessary, it may be enclosed in the center of the circuit board. In the latter case, for example, the circuit board laminating process can be divided into several stages, the cavity is formed, the chip components are accommodated and connected on the way, and the circuit board can be laminated again.

Further, such a cavity can be formed by various techniques, but it is usually advantageous to use a press working or the like before mounting a semiconductor element in a state of a circuit board. it can. Otherwise,
After laminating a required number of circuit boards, a cavity may be formed by press working or the like. After the cavity is formed, the chip component is accommodated in the cavity and is electrically connected to the conductor of the circuit board. The connection between this chip component and the conductor is
Various methods can be used depending on the desired connection effect. Preferably, one chip component is connected only to one or more conductors of one circuit board, or A method in which one chip component is connected to each conductor of two or more different circuit boards can be adopted. In particular, it is preferable that the electrical connection between the chip component and the conductor is made via a lead extending from the conductor of any of the circuit boards into the cavity, that is, a so-called flying lead. In addition, in order to improve the electrical continuity at that time, it is preferable to use a pre-solder, a conductive paste, or the like at the connection part of the chip component in the cavity and, if necessary, at and near the tip of the lead.

Through a series of processing steps as described above, the semiconductor device of the present invention is completed. In this semiconductor device,
If a chip component is found to be defective in a subsequent performance test, the chip component can be removed by spot heating, for example, and replaced with a new chip component. The semiconductor device of the present invention is also provided with a normal thick semiconductor element mounted on a circuit board, and then ground and polished from the back surface of the element (opposite to the active surface) to a predetermined depth,
A thin semiconductor device can also be obtained.

The semiconductor device of the present invention is not particularly limited as long as it has the characteristic configuration as described above. Such a semiconductor device can be advantageously used in, for example, a mobile phone, a personal computer, particularly a portable personal computer, and other portable electric and electronic devices. In the semiconductor device of the present invention, since a capacitor, a resistor, an inductor, and the like can be built in a circuit board using a commercially available, that is, a general chip component, inexpensive and high-density mounting is possible, and packaging is also possible. By stacking the semiconductor elements thus formed, high-density and high-performance mounting is possible. Also,
Since the chip components mounted in the final stage are exposed from the surface of the semiconductor device, if the chip is rejected during the performance test, remove the defective chip component due to spot heating etc. It is also possible to easily attach a substitute chip component (so-called rework). Further, even when a defect of a chip component occurs during use of the semiconductor device, it can be easily replaced with a new chip component.

[0026]

Embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the illustrated embodiment is a typical example, and that various changes and improvements can be made within the scope of the present invention. For example, in the following, a module in which a chip capacitor is built in a cavity of a circuit board will be particularly described. However, other chip components, such as a resistor and an inductor, can also obtain satisfactory operation effects. . Various combinations of the semiconductor device of the present invention are possible depending on the form of the semiconductor package (for example, TCP, printed circuit board, etc.), connection method (TAB method, flip chip method, etc.), manufacturing method, and the like.

FIG. 1 shows a preferred example of a semiconductor device according to the present invention.
FIG. 2 is a cross-sectional view showing an embodiment, and FIG. 2 is a plan view showing a state of wiring connection between a semiconductor chip and a chip component in the semiconductor device of FIG. FIG. 1 shows the right half of the semiconductor device in an enlarged manner for the sake of simplicity.
The left half has the same configuration except that there is no chip component.

In the semiconductor device 20 shown in the figure, a total of four circuit boards 10 (first to fourth layers) are laminated in order from the bottom on an insulating board (here, a board made of FR-4) 21. I have. Each circuit board 10 is mutually connected by the external connection terminal 6. That is, the upper and lower circuit boards are connected by supplying the flux and the solder balls onto the connection terminals of each circuit board 10, aligning them with a jig, reflowing and melting the solder.

The second to fourth circuit boards 10 are provided with cavities 12 penetrating therethrough, in which spaces chip components (here, chip capacitors) 11 are accommodated and leads (not shown). The connection between the chip component 11 and a circuit portion (wiring or the like) of the circuit board 10 is performed via a not shown). Also, the connection shown is an example of a series connection, but a parallel connection may be adopted as necessary, or a combination of the series connection and the parallel connection may be used. The connection between the chip component and the circuit portion of the circuit board will be described below with reference to FIGS.

The size generally set in the semiconductor device 20 shown in FIG.
Is about 50 μm, the thickness of the circuit board 10 is about 150 to 250 μm, and the thickness of the semiconductor device 20 having the four-layer connection structure is about 1 mm. Further, although an example of a four-layer connection structure is shown in FIG.
It is also possible to change the connection structure to three layers, five layers, etc.
Further, instead of the structure in which the cavity is opened in the uppermost layer, it is also possible to change to a structure formed only in the intermediate layer (a structure closed in the uppermost layer).

More specifically, the circuit board 10 used in the present embodiment is one in which a semiconductor chip (here, an LSI chip) is mounted on a semiconductor package (TCP). The TCP includes a tape-shaped substrate 1 made of a polyimide resin film, and a conductor (metal wiring, specifically, copper foil) 3 is adhered to the surface of the substrate 1 via an adhesive layer 2. An LSI chip 4 is mounted in a device hole of the substrate 1. The LSI chip 4 is adhered to the conductor 3 by an adhesive layer 7. In addition, LSI
An electrode (not shown) is provided on the surface of the chip 4, and an inner lead 8 of TCP is connected to the electrode.
Although not shown, the inner lead 8 is further connected to an outer lead. The inner leads 8 are formed by etching a copper foil. Although the inner leads 8 are connected to the LSI chip 4 in the illustrated example, the LSI chip 4 may be connected to the conductor portion 3 thereon using solder bumps or the like instead.

The tape-shaped base material 1 has a device hole at the center thereof, and an outer lead hole (not shown) surrounding the device hole (not shown). On both sides of the substrate 1, sprocket holes for feeding a film are formed. In some cases, the outer lead hole does not have to be opened.

The tape-like substrate 1 has external connection terminals 6 formed of a low melting point metal or alloy (preferably solder) filled in the through holes. Here, the thickness of the external connection terminals 6, that is, the filling depth of the low melting point metal or alloy is important in order to secure reliable connection at the time of interconnection between circuit boards. According to the knowledge of the present inventors, the filling depth of the low melting point metal or alloy needs to be at least the same as the thickness of the base material 1, and as shown in the figure, the external connection terminals 6 slightly protrude. Is preferred.

A sealing resin 9 made of an epoxy resin is applied to the bonding portion between the LSI chip 4 and the inner lead 8 and the vicinity thereof in order to protect those portions from ambient humidity and contamination. However, in the case of the circuit board shown in the drawing, since the conductor portion 3 is coated on the surface thereof, unlike the conventional circuit board, it is sufficient to inject a necessary minimum amount of sealing resin. That is, with the configuration shown in the drawing, the control of the sealing shape and thickness can be easily performed.

As shown in FIGS. 1 and 2, the circuit board of the present invention not only has one semiconductor element mounted on one base material, but also has two or more semiconductor elements mounted on the same base material. It may be mounted on. FIG. 3 is a cross-sectional view illustrating the formation of a cavity during the manufacture of the semiconductor device of the present invention. That is, the three-layer circuit board 10
After laminating (partially shown), a cavity 12 having an appropriate shape and size for accommodating a chip component (not shown) is opened at a predetermined position by, for example, etching. The illustrated cavity 12 penetrates all three layers of the circuit board 10.

Subsequently, as shown in FIG. 4, the chip component (chip capacitor) 1 is
1 is housed and electrically connected to the circuit section 3 of the circuit board 10. In the illustrated example, the end of the circuit portion 3 of the uppermost circuit board 10 is extended to the gap in the cavity 12 to form a flying lead 18, and the flying lead 18 is connected to the chip component 11. In addition, flying lead 1
The connection between the chip 8 and the chip component 11 and the vicinity thereof are filled with a pre-solder 19 in order to enhance the electrical connection therebetween.

FIG. 5 shows the flying lead 1 shown in FIG.
8 shows a modification of the electrical connection between the chip component 8 and the chip component 11. As shown in the figure, the chip component 11 is connected to the circuit board 10 at two places, and one connection portion is formed of a lead and a chip extending from the circuit portion 3 of the first (lowest) circuit board 10. The connection part with the component 11 and the other connection part are the circuit part 3 of the circuit board 10 of the third layer (top layer).
And a connecting portion between the flying lead 18 and the chip component 11 extending from the connecting portion. Each of the connecting portions includes a pre-solder 19 as in the example of FIG.

Subsequently, the semiconductor device 2 shown in FIGS.
FIG. 6 shows a preferred method of manufacturing the circuit board 10 used in FIG.
8 will be described in order with reference to FIG. That is,
FIGS. 6, 7 and 8 show the first one-third, middle two-thirds, and last three-thirds, respectively, of the circuit board manufacturing process. First, as shown in step (A) of FIG. 6, a tape-shaped substrate 1 made of a polyimide resin is prepared. The thickness of the tape-shaped substrate 1 is usually about 50 to 150 μm, preferably about 75 to 100 μm.
m. Next, an adhesive is applied to one surface of the tape-shaped substrate 1 to form an adhesive layer 2. The adhesive used here is an epoxy-based thermosetting adhesive, and the thickness of the adhesive layer 2 is usually about 10 to 40 μm.

Next, as shown in the step (B), an opening 5 is provided in a predetermined portion of the film substrate 1 by punching. The opening 5 shown is an LSI chip (not shown)
It is a device hole for mounting. At this stage, a through-hole as described in the step (D) of FIG. 7 may be simultaneously formed. After the opening 5 is formed, a copper foil 3 is further adhered on the tape-shaped substrate 1 as shown in a step (C). The thickness of the copper foil 3 is usually about 10 to 30 μm, and a thickness of about 20 μm is preferable. The method of attaching the copper foil 3 may employ a method in which the adhesive layer 2 is heated to an elevated temperature to be softened and then cured.

Subsequently, the process proceeds to a step of forming external connection terminals at a predetermined portion of the tape-shaped base material 1. First, FIG.
As shown in step (D), the exposed portion of the copper foil 3 is covered with a plating resist 15 and masked, and in this state, a through-hole 16 is drilled in the tape-shaped base material 1. Here, laser drilling using an excimer laser was adopted. The through holes 16 also penetrate the adhesive layer 2 and stop at the copper foil 3. That is, the through hole 1
One end of 6 is open and the other end is closed by the copper foil 3.

After the formation of the through hole 16, as shown in step (E), a low melting point alloy (here, tin-
6), and electrolytic plating is performed using the copper foil 3 as an electrode. In this step, filling is performed with care so that the solder 6 slightly projects from the surface of the base material 1. Next, as shown in step (F), an etching resist 17 corresponding to the desired pattern is coated on the copper foil 3 to form a conductor having a desired pattern by removing unnecessary portions from the copper foil 3. (The figure shows the copper foil 3 after it has already been etched). The formation of the patterned resist film 17 can be performed, for example, by applying and curing a resist solution on the entire surface of the copper foil 3 and then dissolving and removing the resist film other than the desired pattern.

After masking the copper foil 3 as described above, unnecessary copper foil that is not covered with the resist film 17, that is, exposed, is removed with an etching solution (here, an aqueous solution of ferric chloride). Dissolve and remove). As shown in step (F), conductor portions 3 are formed on sheet-like substrate 1 in a desired pattern. Finally, by dissolving and removing the unnecessary resist film 17 with an appropriate solvent, a target semiconductor package (TCP) is obtained.

After the completion of the semiconductor package, as shown in FIG.
The chip 4 is mounted. First, as shown in step (G),
An adhesive is applied to a predetermined position of the conductor (copper foil) 3 to form an adhesive layer 7. The adhesive used here may be the same as that used for forming the adhesive layer 2. Then
As shown in the step (H), an LSI is formed using the adhesive layer 7.
The chip 4 is bonded to the conductor portion 3, and the inner leads 8 of the TCP are connected to the electrodes of the LSI chip 4. The connection of the leads can be performed by, for example, a single point bonding method by ILB (inner lead bonding).

Finally, in a step (I), a sealing resin 9 is injected by potting into a connection portion between the electrode of the LSI chip 4 and the inner lead 8 and the vicinity thereof, and is cured by heating. Thus, the circuit board 10 having the configuration described above with reference to FIGS. 1 and 2 is obtained. A required number of circuit boards 10 manufactured through the above-described series of processing steps are stacked and electrically connected to each other in order to manufacture the semiconductor device of the present invention. For example, when a total of four circuit boards 10 are stacked and the respective circuit boards 10 are interconnected by the external connection terminals 6, a semiconductor device 20 as shown in FIG. 9 is obtained. The connection between the upper and lower circuit boards 10 is as follows.
As described above, it can be advantageously performed by supplying the flux and the solder balls onto the connection terminals of each circuit board 10, aligning them with a jig, reflowing and melting the solder. Other connection methods may be used as needed.

In the semiconductor device 20 shown in FIG. 9, a cavity is opened at a predetermined place as described above with reference to FIGS. 3 and 4, for example, and a chip component is further housed in the cavity. By connecting, it can be completed as a final product. The method of manufacturing a semiconductor device according to the present invention has been described with reference to a method of manufacturing a circuit board by mounting a thinned semiconductor element. A method in which a semiconductor element is mounted and the back surface of the obtained circuit board is ground and polished to reduce the thickness may be used. Also, the formation of the cavity for accommodating the chip components has been described with reference to the method of performing etching by laminating a required number of circuit boards, but after forming an opening having a required profile in each circuit board, Combining these openings by lamination
A method of forming one cavity may be adopted.

FIGS. 10 to 14 show a preferred modification of the method shown in FIGS. That is,
In the illustrated example, a method is described in which cavities (openings) for mounting chip components are formed in advance on each circuit board and one cavity is formed by lamination. The illustrated method can be carried out in the same manner as the method already described with reference to FIGS. 6 to 9 except for the formation of a cavity for mounting a chip component, and thus will be briefly described below.

First, as shown in step (A) of FIG.
An adhesive layer 2 made of an epoxy-based thermosetting adhesive is formed on one surface of a tape-shaped substrate 1 made of a polyimide resin. Next, as shown in the step (B), the film substrate 1
A device hole (opening) 5 for mounting a semiconductor element and a cavity (opening) 12 for mounting a chip component are provided at predetermined positions by press working.

Thereafter, as shown in the step (C), a copper foil 3 is further applied on the tape-shaped substrate 1 so as to cover one end face of the two openings 5 and 12 with the copper foil. wear. Subsequently, as shown in a step (D) of FIG. 11, the exposed portion of the copper foil 3 is covered with a plating resist 15 and masked, and in this state, a through-hole 16 is drilled in the tape-shaped substrate 1. The through holes 16 also penetrate the adhesive layer 2 and stop at the copper foil 3. That is,
One end of the through hole 16 is open, and the other end is closed by the copper foil 3.

After the formation of the through hole 16, as shown in the step (E), a low melting point alloy (here, tin-
6), and electrolytic plating is performed using the copper foil 3 as an electrode. Next, as shown in step (F), an etching resist 17 corresponding to the desired pattern is coated on the copper foil 3 to form a conductor having a desired pattern by removing unnecessary portions from the copper foil 3. (The figure shows the copper foil 3 after it has already been etched). The formation of the patterned resist film 17 can be performed, for example, by applying and curing a resist solution on the entire surface of the copper foil 3 and then dissolving and removing the resist film other than the desired pattern.

After masking the copper foil 3 as described above, unnecessary copper foil not covered with the resist film 17, that is, exposed, is removed with an etching solution (here, an aqueous solution of ferric chloride). Dissolve and remove). As shown in step (F), conductor portions 3 are formed on sheet-like substrate 1 in a desired pattern. Finally, by dissolving and removing the unnecessary resist film 17 with an appropriate solvent, a target semiconductor package (TCP) is obtained.

After the completion of the semiconductor package, as shown in FIG.
The I chip 4 is mounted. First, as shown in step (G), an adhesive is applied to a predetermined position of the conductor portion (copper foil) 3 to form an adhesive layer 7. The adhesive used here may be the same as that used for forming the adhesive layer 2. Then, as shown in step (H), L
The SI chip 4 is bonded to the conductor portion 3, and the inner leads 8 of the TCP are connected to the electrodes of the LSI chip 4. The connection of the leads can be performed by, for example, a single point bonding method by ILB (inner lead bonding).

Finally, in step (I), a sealing resin 9 is injected by potting into a connection between the electrode of the LSI chip 4 and the inner lead 8 and the vicinity thereof, and is cured by heating. Thus, the circuit board 10 having the cavity (part) 12 for mounting the chip component is obtained. In addition,
The illustrated circuit board 10 is different from the semiconductor device of FIG.
It corresponds to the second layer from the top.

The circuit board with a cavity 10 manufactured through the above-described series of processing steps is used for manufacturing a semiconductor device of the present invention.
Are laminated together with the circuit board produced by the above method, and are electrically connected to each other. For example, when a total of four circuit boards 10 are stacked and the respective circuit boards 10 are interconnected by the external connection terminals 6, the semiconductor device 2 as shown in FIG.
0 is obtained. The connection between the upper and lower circuit boards 10 is preferably performed by supplying a flux and a solder ball onto the connection terminal of each circuit board 10, aligning with a jig, reflowing and melting the solder. be able to.

The semiconductor device 20 shown in FIG. 13 can be completed as a final product by storing chip components in the cavity 12 and electrically connecting them.
FIG. 14 shows a method of mounting a normal thick semiconductor element on a circuit board and then grinding and polishing the back surface of the element to reduce the thickness. This method is described halfway in FIGS.
And the method described above can be repeated.

After applying an adhesive to the conductor portion 3 to form an adhesive layer 7 as shown in step (G) of FIG.
As shown in step (A) of FIG.
To the electrodes of the LSI chip 4 and the TCP
Is connected to the inner lead 8. Note that the LSI chip 4 used here has a thickness t = about 0.
5 to 0.7 mm.

Next, as shown in the step (B), the LSI
The sealing resin 9 is injected into a wide portion including the connection portion between the electrode of the chip 4 and the inner lead 8 by potting, and is cured by heating. After the curing of the sealing resin 9 is confirmed,
The LSI chip 4 is ground and polished from the back surface (inactive surface) to the active surface, and the polishing is completed when the line reaches the line segment LL. As shown in the step (C), a circuit board 10 having a predetermined thickness is obtained. As described above, the circuit board 10 can be stacked with another circuit board to form a semiconductor device.

[0057]

As described above, according to the present invention, capacitors, resistors,
Since an inductor or the like can be built into the circuit board, low-cost and high-density mounting is possible, and high-density and high-performance mounting is also possible by stacking packaged semiconductor elements. Also, since the chip components mounted in the final stage are exposed from the surface of the semiconductor device, if the device is rejected during the performance test, the chip which has failed due to spot heating or the like. It is also possible to easily remove a component and attach a replacement chip component (so-called rework). Further, even when a defect of a chip component occurs during use of the semiconductor device, it can be easily replaced with a new chip component.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a preferred embodiment of a semiconductor device of the present invention.

FIG. 2 is a plan view showing a state of wiring connection between a semiconductor chip and a chip component in the semiconductor device of FIG. 1;

FIG. 3 is a cross-sectional view illustrating the formation of a cavity in the semiconductor device of the present invention.

FIG. 4 is a cross-sectional view illustrating a state in which a chip component is housed in a cavity of the semiconductor device illustrated in FIG. 3;

FIG. 5 is a sectional view showing another preferred embodiment of the semiconductor device of the present invention.

FIG. 6 is a sectional view sequentially showing a manufacturing process (first one-third process) of a circuit board used in the semiconductor device of the present invention.

FIG. 7 is a sectional view sequentially showing a manufacturing process (intermediate 2/3 process) of a circuit board used in the semiconductor device of the present invention.

FIG. 8 is a sectional view sequentially showing a manufacturing process (last 3/3 process) of a circuit board used in the semiconductor device of the present invention.

9 is a cross-sectional view illustrating an example in which four layers of the circuit board manufactured in FIG. 8 are stacked.

FIG. 10 is a sectional view sequentially showing a manufacturing process (first one-third process) of a circuit board with a cavity used in the semiconductor device of the present invention.

FIG. 11 is a sectional view sequentially showing a manufacturing process (intermediate 2/3 process) of a circuit board with a cavity used in the semiconductor device of the present invention.

FIG. 12 is a sectional view sequentially showing a manufacturing process (last 3/3 process) of a circuit board with a cavity used in the semiconductor device of the present invention.

13 is a cross-sectional view showing an example in which the circuit board with a cavity manufactured in FIG. 12 is laminated together with another circuit board.

FIG. 14 is a sectional view sequentially showing another manufacturing process of the circuit board used in the semiconductor device of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Base material 2 ... Adhesive layer 3 ... Conductor part (wiring etc.) 4 ... Semiconductor chip 5 ... Device hole 6 ... External connection terminal 7 ... Adhesive layer 8 ... Inner lead 9 ... Sealing resin 10 ... Semiconductor package 11 ... Chip parts 18 Flying leads 19 Pre-solders 20 Semiconductor devices

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 25/18 H01L 23/52 D 25/16 25/08 Z H05K 1/18

Claims (13)

[Claims] 1. A semiconductor device in which a circuit board on which a semiconductor element is mounted is laminated in a plurality of layers and the circuit boards are electrically connected to each other, wherein the circuit board penetrates at least two layers of the circuit board. A semiconductor device, wherein a chip component is accommodated in a cavity formed, and the chip component is electrically connected to the circuit board. 2. The semiconductor device according to claim 1, wherein the chip component is electrically connected to a single-layer circuit board. 3. The semiconductor device according to claim 1, wherein said chip component is electrically connected to at least two layers of circuit boards. 4. The semiconductor device according to claim 1, wherein the chip component is at least one of a resistor, a capacitor, and an inductor. 5. A semiconductor package in which an opening for accommodating a semiconductor element is formed in an insulating base material having a conductor formed in a required circuit pattern, and the circuit board is mounted in the opening. And a through hole whose one open end is closed by the conductor portion is formed in a predetermined portion of the base of the semiconductor package, and the inside of the through hole is filled. The semiconductor device according to claim 1, wherein an external connection terminal is formed of the low melting point metal. 6. The semiconductor device according to claim 5, wherein the conductor is formed by a metal layer bonded to the base via an adhesive layer. 7. The circuit board is a substrate having the conductor on one surface of the base material, and electrical connection between the chip component and the conductor extends from the conductor on one surface into the cavity. 7. The semiconductor device according to claim 5, wherein the operation is performed via an existing lead. 8. A semiconductor device in which a circuit board on which a semiconductor element is mounted is laminated in a plurality of layers, and the circuit boards are electrically connected to each other, wherein the circuit board penetrates at least two layers of the circuit board. A method of manufacturing a semiconductor device in which a chip component is housed in a cavity formed by forming an opening for housing a semiconductor element in a predetermined portion of an insulating base; Forming a cavity for accommodating a chip component in a portion of the base material; forming a through hole having one open end closed with a metal layer in a predetermined portion of the base material; inside the through hole, A step of forming an external connection terminal by filling a low-melting-point metal; a step of electrically connecting a lead of the conductor to mount a semiconductor element in the opening to complete the circuit board; Where was done Laminating a required number of circuit boards, electrically connecting the circuit boards to each other, and housing the chip component in the cavity, and electrically connecting the chip component and the circuit board, A method for manufacturing a semiconductor device, comprising: 9. A step of applying an adhesive to one surface of the base material on which a conductor portion is to be formed to form an adhesive layer, and attaching the metal layer via the adhesive layer; The method of manufacturing a semiconductor device according to claim 8, further comprising a step of selectively removing a layer from a surface of the base material to form a conductor portion having a required circuit pattern. 10. A cavity that penetrates at least two layers of the circuit board, instead of or in combination with a step of forming a cavity for accommodating a chip component in a predetermined portion of the base material. The method for manufacturing a semiconductor device according to claim 8, comprising a step. 11. A step of grinding the circuit board to a predetermined thickness after mounting a semiconductor element in the opening by electrically connecting to a lead of the conductor section. 11. The method for manufacturing a semiconductor device according to item 10. 12. The electrical connection between the chip component and the circuit board by means of a lead extending from a conductor of the circuit board into the cavity. A method for manufacturing a semiconductor device according to claim 1. 13. The semiconductor device according to claim 8, wherein at least one component of a resistor, a capacitor, and an inductor is mounted in said cavity as said chip component. Production method.