CN112968702A - Processing system and method for improving sampling precision of ADC (analog to digital converter) small signal in processor - Google Patents
Processing system and method for improving sampling precision of ADC (analog to digital converter) small signal in processor Download PDFInfo
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Abstract
本发明公开了一种提高处理器内部ADC小信号采样精度的处理系统及方法，包括：电压幅值调理模块、电压抬升模块和滤波及阻抗匹配模块；电压幅值调理模块接收交流模拟量信号并对其电压幅值进行处理；电压抬升模块接收电压幅值调理模块输出的经处理后的交流模拟量信号，并将其与直流偏置电压进行求和处理，其中，直流偏置电压数值小于ADC基准电压数值的1/2，二者差值的偏移量是一个预设电压数值；滤波及阻抗匹配模块接收电压抬升模块电压转换后的交流模拟量信号，并对其进行低通滤波和阻抗匹配后，传输至ADC。通过将直流偏置电压设定比ADC基准电压数值的一半小预设电压数值，在采样区间尽可能地避开ADC积分非线性特性最差区域的同时，最大化地利用ADC的量程，提高ADC处理精度。
The invention discloses a processing system and method for improving the sampling accuracy of ADC small signals inside a processor, comprising: a voltage amplitude conditioning module, a voltage boosting module and a filtering and impedance matching module; The voltage amplitude is processed; the voltage boosting module receives the processed AC analog signal output by the voltage amplitude conditioning module, and sums it with the DC bias voltage, wherein the DC bias voltage value is smaller than the ADC value 1/2 of the reference voltage value, the offset of the difference between the two is a preset voltage value; the filtering and impedance matching module receives the AC analog signal converted by the voltage of the voltage boosting module, and performs low-pass filtering and impedance on it. After matching, transfer to ADC. By setting the DC bias voltage to be less than half of the ADC reference voltage value, the preset voltage value can avoid the worst area of the ADC integral nonlinearity as much as possible in the sampling interval, and maximize the use of the ADC range to improve the ADC performance. Processing precision.
Description
Technical Field
The invention relates to the technical field of signal processing, in particular to a processing system and a method for improving sampling precision of ADC (analog to digital converter) small signals in a processor.
Background
At present, when an alternating current analog signal enters an ADC built in a processor for AD sampling, a sampling conversion circuit is shown in fig. 1, U1 is an alternating current voltage to be sampled, and a voltage amplitude conditioning circuit is used to amplify or attenuate a voltage amplitude so that the amplitude is consistent with the amplitude of a sampling range of the ADC; then, a voltage raising circuit is used for converting negative voltage in an alternating current signal into positive voltage, a voltage U2 is generally summed with a direct current bias voltage through a summing circuit, in order to utilize the full range of the ADC to the maximum extent, the direct current bias voltage generally selects 1/2 of ADC reference voltage Vref, namely 1/2Vref, U4 is output voltage of the voltage raising circuit, and the output voltage is input to an ADC chip built in a processor for monitoring and data processing after passing through a low-pass filter and an impedance matching circuit. Namely, conversion sampling of the alternating current analog quantity signal to the built-in ADC of the processor is completed.
When the AC analog quantity is boosted to positive voltage by the voltage boosting circuit, the reference voltage is generally 1/2 of ADC reference voltage Vref, that is, 0V input by the AC analog quantity corresponds to the middle of ADC range, that is, 1/2 Vref. The up and down of 0V input by the alternating current analog quantity correspond to mV level small signals, and the sampling precision of the analog quantity small signals is not high due to the influence of ADC resolution and integral nonlinear error. In particular, when the region where the on-chip ADC nonlinearity error is the largest is just around 1/2 of the ADC reference voltage Vref, the sampling accuracy of the analog small signal is more difficult to meet the design requirement.
The current commonly used solutions are: (1) by adopting the ADC with high resolution and high performance, the method can increase the hardware cost and is not suitable for cost-sensitive products; (2) the method is characterized in that a segmented sampling method is adopted for a signal to be detected, the signal to be detected is divided into a plurality of segments, a small range is amplified by a hardware amplifying circuit by a certain multiple, such as 10 times, and then the signal is sent to an ADC for sampling, and the method can also improve the cost of hardware.
Disclosure of Invention
The invention aims to provide a processing system and a method for improving sampling precision of an ADC (analog to digital converter) small signal in a processor, wherein a preset voltage value of a reference voltage in a voltage raising module is set to be smaller than 1/2 of an ADC reference voltage value by a preset voltage value, so that the range of the ADC is utilized to the maximum extent while a worst Integral nonlinear characteristic (Integral nonlinear INL) region of the ADC is avoided as much as possible in a sampling interval of an alternating current analog signal, and the precision of the alternating current analog signal in ADC processing is improved.
In order to solve the above technical problem, a first aspect of the embodiments of the present invention provides a processing system for improving sampling accuracy of an ADC small signal inside a processor, including: the voltage amplitude conditioning module, the voltage lifting module and the filtering and impedance matching module are sequentially connected in series;
the voltage amplitude conditioning module receives the alternating current analog quantity signal and processes the voltage amplitude of the alternating current analog quantity signal;
the voltage raising module receives the processed alternating current analog quantity signal output by the voltage amplitude conditioning module and sums the processed alternating current analog quantity signal with a direct current bias voltage, wherein the value of the direct current bias voltage is smaller than 1/2 of the ADC reference voltage value, and the difference value of the direct current bias voltage and 1/2 of the ADC reference voltage value is a preset voltage value;
and the filtering and impedance matching module receives the analog quantity signal converted by the voltage lifting circuit, performs low-pass filtering and impedance matching on the analog quantity signal, and transmits the analog quantity signal to the ADC.
Further, the range of the preset voltage value is 30mV-81 mV;
the preset voltage value is related to the non-linear error characteristic of the ADC, the resolution of the ADC and/or the sampling precision of the alternating current analog quantity signal. Further, the voltage amplitude conditioning module receives the alternating current analog quantity signal and amplifies or attenuates the voltage amplitude of the alternating current analog quantity signal, so that the processed voltage amplitude is consistent with the sampling range of the ADC.
Correspondingly, a second aspect of the embodiments of the present invention provides a processing method for improving sampling accuracy of an ADC small signal inside a processor, including the following steps:
receiving the alternating current analog quantity signal through a voltage amplitude value conditioning module and processing the voltage amplitude value of the alternating current analog quantity signal;
the control voltage raising module receives the processed alternating current analog quantity signal output by the voltage amplitude conditioning module and sums the processed alternating current analog quantity signal with a reference voltage, wherein the value of the direct current bias voltage is smaller than 1/2 of the ADC reference voltage value, and the difference value of the direct current bias voltage and 1/2 of the ADC reference voltage value is a preset voltage value;
and the control filtering and impedance matching module receives the alternating current analog quantity signal after the voltage of the voltage lifting module is converted, performs low-pass filtering and impedance matching on the alternating current analog quantity signal and transmits the alternating current analog quantity signal to the ADC.
Further, the range of the preset voltage value is 30mV-81 mV;
the preset voltage value is related to the non-linear error characteristic of the ADC, the resolution of the ADC and/or the sampling precision of the alternating current analog quantity signal.
Further, the receiving the ac analog signal and processing the voltage amplitude thereof by the voltage amplitude conditioning module includes:
the voltage amplitude conditioning module receives the alternating current analog quantity signal and amplifies or attenuates the voltage amplitude of the alternating current analog quantity signal, so that the processed voltage amplitude is consistent with the amplitude of the measuring range of the ADC.
The technical scheme of the embodiment of the invention has the following beneficial technical effects:
the preset voltage value of the direct current bias voltage in the voltage lifting module is set to be smaller than half of the reference voltage value of the ADC by the preset voltage value, so that the range of the ADC is utilized to the maximum extent while the worst integral nonlinear characteristic area of the ADC is avoided as far as possible in the sampling interval of the alternating current analog quantity signal, and the processing precision of the alternating current analog quantity signal in the ADC is improved.
Drawings
FIG. 1 is a schematic diagram of an AC analog signal conversion circuit in the prior art;
FIG. 2 is a schematic diagram of a processing system for improving sampling accuracy of ADC small signals in a processor according to an embodiment of the present invention;
FIG. 3 is a flowchart of a processing method for improving sampling accuracy of ADC small signals in a processor according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a circuit for acquiring + -10V (peak-to-peak) AC voltage by using a 12-bit ADC with a range of 0-3V according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the accompanying drawings in conjunction with the following detailed description. It should be understood that the description is intended to be exemplary only, and is not intended to limit the scope of the present invention. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present invention.
Fig. 2 is a schematic diagram of a processing system for improving sampling accuracy of an ADC small signal inside a processor according to an embodiment of the present invention.
Referring to fig. 2, a first aspect of an embodiment of the present invention provides a processing system for improving sampling accuracy of ADC small signals in a processor, including: the voltage amplitude conditioning module, the voltage lifting module and the filtering and impedance matching module are sequentially connected in series; the voltage amplitude conditioning module receives an alternating current analog quantity signal to be sampled and processes the voltage amplitude of the alternating current analog quantity signal; the voltage raising module receives the processed alternating current analog quantity signal output by the voltage amplitude conditioning module and sums the processed alternating current analog quantity signal with a direct current bias voltage, wherein the value of the direct current bias voltage is smaller than 1/2 of the value of the ADC reference voltage, and the difference value of 1/2 between the direct current bias voltage and the value of the ADC reference voltage is a preset voltage value; and the filtering and impedance matching module receives the alternating current analog quantity signal after the voltage of the voltage lifting module is converted, performs low-pass filtering and impedance matching on the alternating current analog quantity signal and transmits the alternating current analog quantity signal to the ADC.
According to the amplitude of the input signal, the sampling precision requirement, the amplification or reduction coefficient of the circuit conversion circuit and the area which is large in error and not suitable for collection on ADC device manual data, the range of the voltage rise value which should deviate relative to 1/2Vref is calculated, the worst INL area is avoided as far as possible in the sampling interval, and meanwhile the range of the ADC is maximally utilized.
The direct current bias voltage Ub is slightly smaller than 1/2 of the ADC reference voltage Vref, and the difference value of 1/2 between the direct current bias voltage Ub and the ADC reference voltage Vref is a preset voltage value; the purpose is to stagger the sampling point 1/2Vref of 0V input by the alternating current analog quantity and the worst nonlinear error in the ADC sampling range, and avoid the condition that the small mV level signals corresponding to the upper and lower parts of 0V are sampled by the region with the maximum nonlinear error of the ADC.
Optionally, the range of the preset voltage value is 30mV-81 mV; the preset voltage value is related to the non-linear error characteristic of the ADC, the resolution of the ADC and/or the sampling precision of the alternating current analog quantity signal.
According to the technical parameters of the ADC chip, when the preset voltage value is less than 30mV, the integral nonlinear characteristic of the ADC is the worst, and the ADC chip is not suitable for collecting alternating current analog quantity signals.
Specifically, the voltage amplitude conditioning module receives an alternating current analog signal to be sampled and amplifies or attenuates the voltage amplitude of the alternating current analog signal to make the processed voltage amplitude consistent with the amplitude of the ADC range.
FIG. 4 is a schematic diagram of a circuit for collecting + -10V (peak-to-peak) AC voltage by using a 12-bit ADC with a range of 0-3V according to an embodiment of the present invention
Referring to fig. 4, the circuit schematic diagram of the 12-bit ADC with a range of 0-3V shown in fig. 4, which collects ± 10V (peak-to-peak) ac voltage, can measure an analog signal with a range of 0.02-10V.
The following description is given by way of specific examples:
(1) analog quantity of AC small signal to be sampled
According to the product requirements, for An analog quantity to-be-sampled value with a rated value An, the transformer is required to be capable of measuring the precision of 20 times of rated overload and 0.04 times of rated small value, namely 0.04An-20 An; when the transformer transformation ratio is ± 20An/± 10V (alternating current, peak-to-peak value), and the primary side analog quantity value input is 0.04An, the transformer secondary side output voltage value is 10x0.04/20 ═ 0.02V, namely 20 mV.
(2) Analog quantity acquisition loop voltage transformation ratio
The analog value entering an analog quantity sampling channel of the ADC, which is U1 to be sampled, is U2, and the relation between U2 and U1 is as follows:
from (1), when U1 ═ 20mV, U2 ≈ 20mV/7.2 ≈ 2.778 mV. U2 is the voltage across the resistor R2 in fig. 4, i.e., the analog value U2 that the ADC needs to process is 2.778mV at the minimum U2 min.
(3) The reference voltage Vref range of 12-bit ADC is 0-3V, so that under the ideal condition without considering the signal-to-noise ratio,
0V corresponds to 0LSB, and 3V corresponds to 4096 LSB. According to the product specification of GD32F450ZI, the sampling precision of ADC can actually reach the level of 10.6 bits, and the actual minimum precision
(4) The dc bias voltage Vb is set to 1/2, i.e., 1.5V, of the reference voltage Vref (0-3V), ideally corresponding to 2048 LSB. According to the product specification of GD32F450ZI, since 1/2 of the reference voltage Vref is the worst region of the integrated nonlinearity INL of the ADC, the INL value reaches-1 LSB in this region, i.e., the integrated nonlinearity error E may reach 1LSB ≈ 1.933 mV.
(5) From (2), (3) and (4), when the analog quantity input is a small value, such as 0.04An, the analog quantity value U2min entering the ADC analog quantity sampling channel is approximately equal to 2.778 mV; and the small value of the analog quantity input is near the direct current bias voltage Vb, the integral nonlinear error E is approximately equal to 1.933mV, the caused analog quantity sampling error can reach E/U2min approximately equal to 69.6%, the analog input quantity of 0.04An, the ADC sampling value deviation can reach 0.012 An-0.068 An, and the requirement of the analog quantity sampling precision can not be met.
(6) When the direct-current bias voltage Vb is set at the reference voltage 1/2Vref with the maximum INL value according to (5), the precision can not meet the product requirement when sampling the small value area of the analog quantity.
The value of the dc bias voltage Vb is thus modified to deviate Vb from the reference voltage 1/2Vref as far as possible to avoid the worst INL region. The voltage division loop U2 is U1/7.2, and U1 is maximum 10V, and U2 is maximum 1.389V. Therefore, the offset needs to be smaller than (3/2-1.389), namely 111mV, and meanwhile, considering the non-linear region of the ADC reference, the 30mV region of the reference voltage edge is not suitable for analog quantity sampling. Therefore, the offset is smaller than (111mV-30mV), namely 81 mV.
The dc bias voltage Vb is generated by dividing the reference voltage Vref by two series resistors. When the resistance values of the two voltage-dividing resistors are equal, the dc bias voltage Vb is 1/2 of the reference voltage Vref. The resistance values of the 2 voltage dividing resistors are adjusted, for example, the direct current bias voltage Vb is 1.429V, the value deviated from the reference voltage 1/2Vref is 71mV, and the offset range requirement is met.
Fig. 3 is a flowchart of a processing method for improving sampling accuracy of an ADC small signal inside a processor according to an embodiment of the present invention.
Accordingly, referring to fig. 3, a second aspect of the embodiments of the present invention provides a processing method for improving sampling accuracy of an ADC small signal in a processor, where any one of the processing systems for sampling an ac small signal by using the ADC in the processor is used to process an ac analog signal, and the processing method includes the following steps:
and S100, receiving the alternating current analog quantity signal through a voltage amplitude conditioning module and conditioning the voltage amplitude of the alternating current analog quantity signal.
And S200, the voltage raising control module receives the processed alternating current analog quantity signal output by the voltage amplitude conditioning module and sums the processed alternating current analog quantity signal with a direct current bias voltage, wherein the value of the direct current bias voltage is smaller than 1/2 of the value of the ADC reference voltage, and the difference value of 1/2 between the direct current bias voltage and the value of the ADC reference voltage is a preset voltage value.
And S300, controlling the filtering and impedance matching module to receive the alternating current analog quantity signal after the voltage of the voltage raising module is converted, carrying out low-pass filtering and impedance matching on the alternating current analog quantity signal, and transmitting the alternating current analog quantity signal to the ADC.
Optionally, in the processing method for sampling the ac small signal by using the ADC built in the processor, the preset voltage value is in a range of 30mV to 81 mV; the preset voltage value is related to the non-linear error characteristic of the ADC, the resolution of the ADC and/or the sampling precision of the alternating current analog quantity signal. Specifically, in a specific implementation manner of the embodiment of the present invention, the receiving the ac analog signal and processing the voltage amplitude thereof by the voltage amplitude conditioning module in step S100 includes: the voltage amplitude conditioning module receives the alternating current analog quantity signal and amplifies or attenuates the voltage amplitude of the alternating current analog quantity signal, so that the processed voltage amplitude is consistent with the amplitude of the sampling range of the ADC.
The embodiment of the invention aims to protect a processing system and a method for improving sampling precision of ADC (analog to digital converter) small signals in a processor, wherein the processing system comprises: the voltage amplitude conditioning module, the voltage lifting module and the filtering and impedance matching module are sequentially connected in series; the voltage amplitude conditioning module receives the alternating current analog quantity signal and processes the voltage amplitude of the alternating current analog quantity signal; the voltage raising module receives the processed alternating current analog quantity signal output by the voltage amplitude conditioning module and sums the processed alternating current analog quantity signal with a direct current bias voltage, wherein the value of the direct current bias voltage is smaller than 1/2 of the value of the ADC reference voltage, and the difference value of 1/2 between the direct current bias voltage and the value of the ADC reference voltage is a preset voltage value; and the filtering and impedance matching module receives the alternating current analog quantity signal after the voltage of the voltage lifting module is converted, performs low-pass filtering and impedance matching on the alternating current analog quantity signal and transmits the alternating current analog quantity signal to the ADC. The technical scheme has the following effects:
by setting the preset voltage value of the DC bias voltage in the voltage raising module to be smaller than 1/2 of the ADC reference voltage value, the sampling interval of the AC analog signal avoids the worst integral nonlinear characteristic area of the ADC as much as possible, and simultaneously, the range of the ADC is utilized to the maximum extent, and the processing precision of the AC analog signal in the ADC is improved.
It is to be understood that the above-described embodiments of the present invention are merely illustrative of or explaining the principles of the invention and are not to be construed as limiting the invention. Therefore, any modification, equivalent replacement, improvement and the like made without departing from the spirit and scope of the present invention should be included in the protection scope of the present invention. Further, it is intended that the appended claims cover all such variations and modifications as fall within the scope and boundaries of the appended claims or the equivalents of such scope and boundaries.
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