CN113489466B - Circuit for eliminating signal offset of charge amplifier - Google Patents
Circuit for eliminating signal offset of charge amplifier Download PDFInfo
- Publication number
- CN113489466B CN113489466B CN202110799565.0A CN202110799565A CN113489466B CN 113489466 B CN113489466 B CN 113489466B CN 202110799565 A CN202110799565 A CN 202110799565A CN 113489466 B CN113489466 B CN 113489466B
- Authority
- CN
- China
- Prior art keywords
- signal
- circuit module
- circuit
- voltage
- module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000012544 monitoring process Methods 0.000 claims abstract description 47
- 238000012360 testing method Methods 0.000 claims abstract description 42
- 238000005070 sampling Methods 0.000 claims description 26
- 238000000034 method Methods 0.000 claims description 6
- 239000000463 material Substances 0.000 description 14
- 238000005259 measurement Methods 0.000 description 12
- 238000010586 diagram Methods 0.000 description 5
- 238000001914 filtration Methods 0.000 description 4
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 239000003381 stabilizer Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/70—Charge amplifiers
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/30—Structural combination of electric measuring instruments with basic electronic circuits, e.g. with amplifier
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R29/00—Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
- G01R29/22—Measuring piezoelectric properties
Abstract
The invention discloses a circuit for eliminating signal offset of a charge amplifier, which comprises a front circuit module, a back circuit module and a power supply module, wherein the front circuit module is used for outputting a first voltage signal according to a first charge signal; the monitoring circuit module is used for outputting a monitoring signal according to the first voltage signal; the control module is used for outputting a first control signal when the monitoring signal accords with a preset condition; the sample hold circuit module is used for outputting an offset signal according to the first control signal and the first voltage signal and keeping the magnitude of the offset signal unchanged in a certain time; the control module is also used for controlling the measuring equipment to perform variable test; the front circuit module is further used for outputting a second voltage signal to the subtracting circuit module according to the second charge signal; the subtracting circuit module is used for outputting variable signals according to the second voltage signals and the offset signals, and the offset of the charge amplifier can be effectively eliminated by adopting the circuit provided by the invention.
Description
Technical Field
The invention relates to the technical field of piezoelectric coefficient measurement, in particular to a circuit for eliminating signal offset of a charge amplifier.
Background
The existing charge amplifier generally comprises a charge conversion circuit, an amplifying circuit, a filter circuit, an overload indication, a stabilized voltage supply and the like.
Such an amplifier often requires that the input signal is a stable regular signal, but the input signal is subject to electromagnetic waves, environmental temperature, humidity and other changes, so that the input signal is variable, which limits the use scenarios thereof. For example, when the input signal has a certain offset to the ground, the amplifier amplifies the offset at the same time, and when the offset is small, the output is not affected; however, when the offset is large to a certain extent, the input signal is overloaded after being amplified, and the input signal exceeds the measuring range of the amplifier, and at this time, the amplifier cannot normally measure and output the signal.
Disclosure of Invention
The invention aims to provide a circuit for eliminating the offset of a charge amplifier, which can effectively eliminate the signal offset of the charge amplifier and ensure that the amplifier can output normal measurement of signals.
In order to achieve the above purpose, the technical scheme of the invention is as follows:
a circuit for canceling a charge amplifier signal offset, comprising:
the monitoring circuit module is electrically connected with the front circuit module; the control module is electrically connected with the monitoring circuit module; the sampling and holding circuit module is electrically connected with the control module; the subtracting circuit module is electrically connected with the sampling hold circuit module; the sampling hold circuit module and the subtracting circuit module are also electrically connected with the front circuit module;
the front circuit module is used for outputting a first voltage signal according to a first charge signal, wherein the first charge signal is generated before the variable test is carried out;
the monitoring circuit module is used for outputting a monitoring signal to the control module according to the first voltage signal;
the control module is used for outputting a first control signal to the sample hold circuit module when the monitoring signal accords with a preset condition;
the sample hold circuit module is used for outputting an offset signal to the subtracting circuit module according to the first control signal and the first voltage signal, and keeping the magnitude of the offset signal unchanged in a certain time;
the control module is also used for controlling the measuring equipment electrically connected with the monitoring signal to perform variable test when the monitoring signal accords with a preset condition;
the front circuit module is further configured to output a second voltage signal to the subtracting circuit module according to a second charge signal, where the second charge signal is generated during a variable test process;
the subtracting circuit module is used for outputting variable signals according to the second voltage signals and the offset signals.
Preferably, the circuit further comprises: the level lifting circuit module is electrically connected with the subtracting circuit module and the control module, and is used for lifting the level of the variable signal and outputting the level to the control module.
Preferably, the control module is further configured to output a second control signal to the sample-hold circuit module when the monitoring signal meets a non-preset condition;
the sampling hold circuit module is used for entering a sampling state according to the second control signal and outputting an offset signal according to the second control signal and the first voltage signal.
Preferably, the control module is further configured to control the measurement device not to perform the variable test when the monitoring signal does not meet a preset condition;
the subtracting circuit module is used for outputting a variable signal according to the first voltage signal and the offset signal, and the variable signal is zero at the moment.
Preferably, the monitoring circuit module comprises a voltage dividing circuit;
the monitoring signal is an intermediate voltage division value of the voltage division circuit,
the preset condition is that the intermediate partial pressure value is within a preset range;
the control module is configured to output the first control signal when the obtained intermediate partial pressure value is within a preset range: and when the obtained intermediate partial pressure value is in a preset range, controlling the measuring equipment to perform variable test.
Preferably, the monitoring circuit module comprises a voltage divider circuit, which comprises a first end, a second end and two resistors connected between the first end and the second end;
the first end inputs a preset fixed voltage;
the second end is connected with the front circuit module so as to be connected with the first voltage signal;
and a third end is connected between the two resistors, and the monitoring signal is output to the control module through the third end.
Preferably, the sample-and-hold circuit module includes:
the input end of the sample-hold amplifier is connected with the first voltage signal, and the output end of the sample-hold amplifier is connected with the subtracting circuit module:
and the base electrode of the triode is connected with the first control signal, the collector electrode of the triode is connected with an anode voltage, the emitter electrode of the triode is grounded, and the collector electrode of the triode is also connected with the logic end of the sample-hold amplifier.
The first control signal is high level;
when a high level is input, the triode of the sampling hold circuit module is conducted, at the moment, the sampling hold amplifier is in a hold state, and the offset signal output by the output end of the sampling hold amplifier is the same as the first voltage signal at the moment of conducting the triode.
Preferably, the second control signal is low;
when the control signal is at a low level, the triode of the sample hold circuit module is turned off, at this time, the sample hold amplifier is in a sampling state, and the offset signal output by the output end of the sample hold amplifier is the same as the first voltage signal in size and follows the change of the first voltage signal in size.
Preferably, the subtracting circuit module includes:
an operational amplifier;
the non-inverting input end of the operational amplifier is connected with a first branch and a second branch which are connected in parallel:
the reverse input end of the operational amplifier is connected with a third branch and a fourth branch;
the first branch is connected with a first resistor in series and is used for accessing a first voltage signal or a second voltage signal;
the second branch is connected in series with a second resistor for grounding;
the third branch is connected with a third resistor in series and is used for accessing an offset signal output by the sample hold circuit module;
and a fourth resistor is connected in series on the fourth branch, and the other end of the fourth branch is connected with the output end of the operational amplifier.
For a better understanding and implementation, the present invention is described in detail below with reference to the drawings.
Drawings
FIG. 1 is a block circuit diagram of an embodiment of the present application for canceling a signal offset of a charge amplifier;
FIG. 2 is a schematic circuit diagram of a front-end circuit module according to an embodiment of the present application;
FIG. 3 is a schematic circuit diagram of a monitoring circuit module according to an embodiment of the present application;
FIG. 4 is a schematic circuit diagram of an embodiment of the present application employing a hold circuit module;
fig. 5 is a schematic circuit diagram of a subtracting circuit module according to an embodiment of the present application.
Detailed Description
In order to better illustrate the present invention, the present invention will be described in further detail below with reference to the accompanying drawings.
It should be understood that the described embodiments are merely some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the embodiments of the present application, are within the scope of the embodiments of the present application.
The terminology used in the embodiments of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the embodiments of the application. As used in this application and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any or all possible combinations of one or more of the associated listed items.
When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples are not representative of all implementations consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with some aspects of the present application as detailed in the accompanying claims. In the description of this application, it should be understood that the terms "first," "second," "third," and the like are used merely to distinguish between similar objects and are not necessarily used to describe a particular order or sequence, nor should they be construed to indicate or imply relative importance. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art as the case may be.
Furthermore, in the description of the present application, unless otherwise indicated, "a plurality" means two or more. "and/or", describes an association relationship of an association object, and indicates that there may be three relationships, for example, a and/or B, and may indicate: a exists alone, A and B exist together, and B exists alone. The character "/" generally indicates that the context-dependent object is an "or" relationship.
The circuit of the embodiment of the application is suitable for measuring the piezoelectric coefficient of the piezoelectric material, and is also suitable for measuring infrared signals and the like by utilizing the thermoelectric property of the material.
The measurement device electrically connected with the control module in the embodiment of the present application may be a piezoelectric coefficient measurement device, or may be an infrared emissivity measurement device, etc.
Correspondingly, in the embodiment of the application, the variable test is carried out on the material, so that the charge quantity of the material is changed, a voltage signal is formed after passing through the front circuit module, and the variable signal is further obtained through the circuit of the application.
The variable test may be a stress test, a temperature test, a stress test, a deformation test, or the like.
The variable signal is the voltage signal variation caused by the charge change of the material before and after the material is subjected to the corresponding variable test.
For example: and when the piezoelectric coefficient of the piezoelectric material is measured by the piezoelectric coefficient measuring equipment, performing stress application test, wherein the variable signal is a stress application signal. Specifically, when the stress application test is performed on the piezoelectric material, the charge of the piezoelectric material changes, a voltage signal is formed after the charge change is amplified, and the stress application signal is further obtained after the circuit of the embodiment of the application. I.e. the amount of change in the voltage signal before and after the stress test. Similarly, if a temperature test is performed, the variable signal is a change in charge due to a change in temperature, and thus a change in voltage. Of course, the piezoelectric material may be tested for pressure, deformation, stress, temperature, etc. to cause a change in charge.
Preferably, the circuit is adapted for high temperature piezoelectric measurements of piezoelectric ceramics.
In the following, the circuit of the embodiment of the present application will be described by taking the example of performing stress test on a piezoelectric material by a piezoelectric coefficient measuring apparatus, and performing piezoelectric coefficient measurement on the piezoelectric material.
As shown in fig. 1, a circuit 1 for eliminating a signal offset of a charge amplifier according to an embodiment of the present application is shown. The circuit comprises:
the monitoring circuit module 200 is electrically connected with the front circuit module 100; the control module 300 is electrically connected with the monitoring circuit module; a sample-and-hold circuit module 400 electrically connected to the control module; a subtracting circuit module 500 electrically connected to the sample-and-hold circuit module; the sampling hold circuit module and the subtracting circuit module are also electrically connected with the front circuit module.
In the piezoelectric coefficient measurement, the front circuit module 100 can amplify a charge signal generated in the piezoelectric coefficient measurement and output a voltage signal to the rear circuit.
Specifically, if there is a ground offset signal, the front circuit module 100 can amplify and output the ground offset signal to a rear circuit. Specifically, in the embodiment of the present application, before the stress test is performed, the ground offset signal is defined as a first charge signal, that is, the first charge signal is measured for piezoelectric coefficient and is generated before the stress test. If there is no offset signal to ground, the first charge signal is 0.
When the piezoelectric material is subjected to stress test in the presence of the ground offset signal, the front circuit module 100 can amplify and output the charge signal generated at this time to the rear circuit. The charge signal generated at this time is defined as a second charge signal, that is, the second charge signal is measured for piezoelectric coefficient and generated during stress test. The second charge signal includes a stress signal generated by a stress test and a shift signal to ground, i.e., the second charge signal includes the first charge signal and the stress signal.
It should be noted that, in the embodiment of the present application, the stress test is performed to generate the second charge signal when the piezoelectric coefficient measurement is performed, which does not represent a limitation on the generation manner of the second charge signal. In other words, the second charge signal may also be generated when the piezoelectric material is subjected to a pressure, deformation, stress, temperature, or the like change test.
The front circuit module is used for outputting a first voltage signal according to a first charge signal;
the monitoring circuit module is used for outputting a monitoring signal to the control module according to the first voltage signal;
the control module is used for outputting a first control signal to the sample hold circuit module when the monitoring signal accords with a preset condition;
the sample hold circuit module is used for outputting an offset signal to the subtracting circuit module according to the first control signal and the first voltage signal, and keeping the magnitude of the offset signal unchanged in a certain time;
the control module is also used for controlling the piezoelectric coefficient measuring equipment electrically connected with the monitoring signal to carry out stress application test when the monitoring signal accords with a preset condition;
the front circuit module is further configured to output a second voltage signal to the subtracting circuit module according to the second charge signal;
the subtracting circuit module is used for outputting a boost signal according to the second voltage signal and the offset signal.
In the circuit, a first charge signal generated is amplified through a front circuit module and a first voltage signal is output; the monitoring circuit module outputs a first control signal according to the first voltage signal; the sampling hold circuit module outputs an offset signal according to the first control signal and the first voltage signal and keeps the offset signal unchanged for a certain time; meanwhile, the control module controls the piezoelectric coefficient measuring equipment to carry out stress application test, and the front circuit module amplifies the generated second charge signal and outputs a second voltage signal; the subtracting circuit outputs a boost signal according to the second voltage signal and the offset signal, so that the offset signal is effectively eliminated.
The control module is further used for outputting a second control signal to the sample hold circuit module when the monitoring signal meets a non-preset condition;
the sampling hold circuit module is used for entering a sampling state according to the second control signal and outputting an offset signal according to the second control signal and the first voltage signal.
The control module is also used for controlling the piezoelectric coefficient measuring equipment not to carry out stress application test when the monitoring signal does not accord with a preset condition;
the subtracting circuit module is used for outputting a boost signal according to the first voltage signal and the offset signal, and the boost signal is zero at the moment.
Specifically, when the monitor signal meets a non-preset condition, the piezoelectric coefficient measurement device does not perform stress test, and therefore, the stress signal thereof is zero. The first voltage signal generated by the offset signal to ground is cancelled in the subtracting circuit block. Specifically, the first voltage signal is divided into two paths, and one path of the first voltage signal passes through the monitoring circuit module, the control module and the sampling and holding circuit module and then is output to the subtracting circuit module; the other path is directly input into the subtracting circuit module from the front-path circuit module, and the two paths of signals are mutually counteracted to obtain a zero boosting signal.
Wherein the front circuit module 100 includes: an amplifying circuit unit for converting the first charge signal into a first voltage signal and amplifying the first voltage signal; the amplifying circuit unit is also used for converting the second charge signal into a second voltage signal and amplifying the second voltage signal.
Preferably, the amplifying circuit unit includes: a pre-stage charge amplifying unit 110 for converting a charge signal into a voltage signal; the post-stage voltage amplifying unit 120 is configured to amplify the voltage signal and output the amplified voltage signal to the filtering circuit unit.
Preferably, the front circuit module further comprises: the filter circuit unit 130 is electrically connected to the amplifying circuit unit, and is configured to perform a filtering process on the amplified first voltage signal or the amplified second voltage signal.
The filter circuit unit comprises a low-pass filter unit and a notch filter unit. Specifically, the filtering circuit unit can filter out 50HZ notch and 100HZ low-pass filtering, and effectively filter out high-frequency interference and power frequency interference in the first voltage signal or the second voltage signal.
The monitoring circuit 200 includes a voltage dividing circuit, the monitoring signal is an intermediate voltage dividing value of the voltage dividing circuit, and the preset condition is that the intermediate voltage dividing value is within a preset range.
Specifically, the control module 300 is configured to output the first control signal when the obtained intermediate partial pressure value is within a preset range: and when the obtained intermediate partial pressure value is in a preset range, controlling the piezoelectric coefficient measuring equipment to carry out stress application test.
The control module 300 is configured to output the second control signal when the obtained intermediate partial pressure value is not within a preset range: and when the obtained intermediate partial pressure value is not in the preset range, controlling the piezoelectric coefficient measuring equipment to not perform stress application test.
The monitor circuit module 200 includes: a voltage divider circuit including a first terminal, a second terminal, and two resistors connected between the first terminal and the second terminal; the first end inputs a preset fixed voltage; the second end is connected with the front circuit module so as to be connected with the first voltage signal; and a third end is connected between the two resistors, and the monitoring signal is output to the control module through the third end.
As shown, the monitoring circuit module 200 includes: the voltage divider circuit 210 has a first end connected to a voltage regulator circuit, and a predetermined fixed voltage of 3.2V is input to the voltage regulator circuit. Preferably, the voltage stabilizer is TL431. The second end is connected with the front circuit module, specifically, the filter circuit unit, so as to access the first voltage signal. The third terminal is arranged between the resistors R1 and R2, and outputs a control signal, namely an intermediate voltage division value, to the control module.
Taking the preset range of the intermediate partial pressure value as an example, if the intermediate partial pressure value is in the range of 0-1.6V, the control module outputs a first control signal; and the control module outputs a second control signal when the intermediate partial pressure value is not in the range of 0-1.6V. Preferably, the first control signal is a high level signal, and the second control signal is a low level signal.
Preferably, the control module 300 is a single-chip microcomputer.
Wherein the sample-and-hold circuit module 400 comprises:
the input end of the sample-hold amplifier is connected with the first voltage signal, and the output end of the sample-hold amplifier is connected with the subtracting circuit module:
and the base electrode of the triode is connected with the first control signal, the collector electrode of the triode is connected with an anode voltage, the emitter electrode of the triode is grounded, and the collector electrode of the triode is also connected with the logic end of the sample-hold amplifier.
As shown IN fig. 4, the input terminal IN of the sample-and-hold amplifier 410 is connected to the first voltage signal, and the output terminal OUT is connected to the subtracting circuit module; preferably, the sample-and-hold amplifier 410 is a LF398 formed using NOPB packages.
The base B of the NPN triode Q1 is connected with the first control signal; the collector C is connected with positive voltage of +5V, and the collector is also connected with a LOGIC end LOGIC of the sample-hold amplifier; the emitter E is grounded.
Specifically, the first control signal is high level;
when a high level is input, the triode is conducted, at the moment, the sampling and holding amplifier is in a holding state, and an offset signal output by the output end of the sampling and holding amplifier is the same as the first voltage signal at the moment of conducting the triode.
The second control signal is low;
when the control signal is at a low level, the triode of the sample hold circuit module is turned off, at this time, the sample hold amplifier is in a sampling state, and the offset signal output by the output end of the sample hold amplifier is the same as the first voltage signal in size and follows the change of the first voltage signal in size.
The subtracting circuit module 500 includes:
an operational amplifier 510; preferably, the operational amplifier 510 is an LF353.
The non-inverting input end of the operational amplifier is connected with a first branch 520 and a second branch 530 which are connected in parallel:
the inverting input terminal of the operational amplifier is connected with a third branch 540 and a fourth branch 550;
the first branch is connected in series with a first resistor 521 for connecting to a first voltage signal or a second voltage signal;
the second branch is connected in series with a second resistor 531 for grounding;
a third resistor 541 is connected in series to the third branch, and is used for accessing an offset signal output by the sample-hold circuit module;
and a fourth resistor 551 is connected in series on the fourth branch, and the other end of the fourth branch is connected with the output end of the operational amplifier.
When the control module outputs a first control signal with a high level, the sample-hold amplifier is in a hold state, and the magnitude of an offset signal output by the sample-hold circuit module is equal to the magnitude of a first voltage signal, preferably equal to the magnitude of the first voltage signal at the instant when the triode is turned on, namely, the magnitude of an instant voltage signal with a high level, namely, a jump. The offset signal is input to the third branch. When the stress test is performed, the first branch of the subtracting circuit inputs the second voltage signal. At this time, since the second voltage signal includes the boost signal and the first voltage signal, and the magnitude of the offset signal is equal to the magnitude of the first voltage signal, the second voltage signal and the offset signal are outputted from the output terminal of the operational amplifier 510 through the operational amplifier 510 in the subtracting circuit.
When the signal offset does not exist, the control module controls the piezoelectric measuring equipment to carry out stress application test because the intermediate partial pressure value is in a preset range, and outputs high level to enable the sample hold circuit module to enter a hold state, and the offset signal is 0. I.e. the offset signal to ground is 0. At this time, the second voltage signal connected to the first branch of the subtracting circuit is output from the output end as the boost signal.
When the control module outputs a low-level second control signal, the sample-hold amplifier is in an adopted state and changes according to the magnitude of the first voltage signal. At this time, the piezoelectric coefficient measuring device does not perform stress application test under the control of the control module, the first voltage signal is input into the first branch, the offset signal input into the third branch is equal to the first voltage signal, and the stress application signal is zero after passing through the subtracting circuit module.
The circuit further includes: the level lifting circuit module 600 is electrically connected to the subtracting circuit module 500 and the control module 300, and is configured to lift the level of the boost signal and output the level to the control module.
The level lifting circuit module can effectively lift the stress application signal to positive voltage, so that the identification requirement of the control module is met, the control module is convenient to collect digital or analog signals, and the waveform of the voltage signal is integrally lifted.
A method for canceling a signal offset of a charge amplifier of the present application, the method comprising:
the front circuit outputs a first voltage signal according to a first charge signal generated before stress application test;
the monitoring circuit outputs a monitoring signal according to the first voltage signal;
when the monitoring signal accords with a preset condition, the control module outputs a first control signal to the sample hold circuit; meanwhile, the control module controls the piezoelectric coefficient measuring equipment to carry out stress application test;
the sample hold circuit outputs an offset signal to the subtracting circuit according to the first control signal and the first voltage signal, and keeps the magnitude of the offset signal unchanged in a certain time;
the front circuit outputs a second voltage signal to the subtracting circuit according to a second charge signal generated during stress application test;
the subtracting circuit outputs a boost signal according to the second voltage signal and the offset signal.
Variations and modifications to the above would be obvious to persons skilled in the art to which the invention pertains from the foregoing description and teachings. Therefore, the invention is not limited to the specific embodiments disclosed and described above, but some modifications and changes of the invention should be also included in the scope of the claims of the invention. In addition, although specific terms are used in the present specification, these terms are for convenience of description only and do not limit the present invention in any way.
Claims (10)
1. A circuit for canceling a signal offset of a charge amplifier, the circuit comprising: the monitoring circuit module is electrically connected with the front circuit module;
the control module is electrically connected with the monitoring circuit module;
the sampling and holding circuit module is electrically connected with the control module;
the subtracting circuit module is electrically connected with the sampling hold circuit module;
the sampling hold circuit module and the subtracting circuit module are also electrically connected with the front circuit module;
the front circuit module is used for outputting a first voltage signal according to a first charge signal, wherein the first charge signal is generated before the variable test is carried out;
the monitoring circuit module is used for outputting a monitoring signal to the control module according to the first voltage signal; the control module is used for outputting a first control signal to the sample hold circuit module when the monitoring signal accords with a preset condition;
the sample hold circuit module is used for outputting an offset signal to the subtracting circuit module according to the first control signal and the first voltage signal, and keeping the magnitude of the offset signal unchanged in a certain time;
the control module is also used for controlling the measuring equipment electrically connected with the monitoring signal to perform variable test when the monitoring signal accords with a preset condition;
the front circuit module is further configured to output a second voltage signal to the subtracting circuit module according to a second charge signal, where the second charge signal is generated during a variable test process;
the subtracting circuit module is used for outputting variable signals according to the second voltage signals and the offset signals.
2. The circuit of claim 1, wherein the circuit further comprises:
the level lifting circuit module is electrically connected with the subtracting circuit module and the control module, and is used for lifting the level of the variable signal and outputting the level to the control module.
3. The circuit of claim 1, wherein:
the control module is also used for outputting a second control signal to the sample hold circuit module when the monitoring signal meets the non-preset condition;
the sampling hold circuit module is used for entering a sampling state according to the second control signal and outputting an offset signal according to the second control signal and the first voltage signal.
4. A circuit according to claim 3, wherein:
the control module is also used for controlling the measuring equipment not to perform variable test when the monitoring signal does not accord with a preset condition;
the subtracting circuit module is used for outputting a variable signal according to the first voltage signal and the offset signal, and the variable signal is zero at the moment.
5. The circuit of claim 1, wherein:
the monitoring circuit module comprises a voltage dividing circuit;
the monitoring signal is an intermediate voltage division value of the voltage division circuit,
the preset condition is that the intermediate partial pressure value is within a preset range;
the control module is configured to output the first control signal when the obtained intermediate partial pressure value is within a preset range: and when the obtained intermediate partial pressure value is in a preset range, controlling the measuring equipment to perform variable test.
6. The circuit of claim 5, wherein the monitor circuit module comprises:
a voltage divider circuit including a first terminal, a second terminal, and two resistors connected between the first terminal and the second terminal;
the first end inputs a preset fixed voltage;
the second end is connected with the front circuit module so as to be connected with the first voltage signal;
and a third end is connected between the two resistors, and the monitoring signal is output to the control module through the third end.
7. The circuit of any of claims 1-4, wherein the sample-and-hold circuit module comprises:
the input end of the sample-hold amplifier is connected with the first voltage signal, and the output end of the sample-hold amplifier is connected with the subtracting circuit module:
and the base electrode of the triode is connected with the first control signal, the collector electrode of the triode is connected with an anode voltage, the emitter electrode of the triode is grounded, and the collector electrode of the triode is also connected with the logic end of the sample-hold amplifier.
8. The circuit of claim 7, wherein:
the first control signal is high level;
when a high level is input, the triode of the sampling hold circuit module is conducted, at the moment, the sampling hold amplifier is in a hold state, and the offset signal output by the output end of the sampling hold amplifier is the same as the first voltage signal at the moment of conducting the triode.
9. The circuit of claim 8, wherein:
the second control signal is low;
when the control signal is at a low level, the triode of the sample hold circuit module is turned off, at this time, the sample hold amplifier is in a sampling state, and the offset signal output by the output end of the sample hold amplifier is the same as the first voltage signal in size and follows the change of the first voltage signal in size.
10. The circuit of claim 1, wherein the subtracting circuit module comprises:
an operational amplifier;
the non-inverting input end of the operational amplifier is connected with a first branch and a second branch which are connected in parallel:
the reverse input end of the operational amplifier is connected with a third branch and a fourth branch;
the first branch is connected with a first resistor in series and is used for accessing a first voltage signal or a second voltage signal;
the second branch is connected in series with a second resistor for grounding;
the third branch is connected with a third resistor in series and is used for accessing an offset signal output by the sample hold circuit module;
and a fourth resistor is connected in series on the fourth branch, and the other end of the fourth branch is connected with the output end of the operational amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110799565.0A CN113489466B (en) | 2021-07-15 | 2021-07-15 | Circuit for eliminating signal offset of charge amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110799565.0A CN113489466B (en) | 2021-07-15 | 2021-07-15 | Circuit for eliminating signal offset of charge amplifier |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113489466A CN113489466A (en) | 2021-10-08 |
| CN113489466B true CN113489466B (en) | 2023-12-22 |
Family
ID=77939492
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110799565.0A Active CN113489466B (en) | 2021-07-15 | 2021-07-15 | Circuit for eliminating signal offset of charge amplifier |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113489466B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114285385B (en) * | 2022-02-21 | 2022-06-03 | 成都芯翼科技有限公司 | Offset circuit of operational amplifier input current |
| CN117294262A (en) * | 2023-08-15 | 2023-12-26 | 北京思凌科半导体技术有限公司 | Arithmetic circuit and test circuit |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR940003386A (en) * | 1992-07-24 | 1994-02-21 | 양승택 | TV codec device for NTSC line with DS3 transmission speed |
| US6456954B1 (en) * | 1999-02-24 | 2002-09-24 | Denso Corporation | Sensing apparatus for detecting a physical quantity, including memory circuits storing characteristics adjusting data |
| CN101040441A (en) * | 2004-10-12 | 2007-09-19 | 索尼株式会社 | Sample hold circuit, and pipeline ad converter using the circuit |
| JP2010087542A (en) * | 2008-09-29 | 2010-04-15 | Toshiba Corp | Amplifier circuit |
| CN101882929A (en) * | 2010-06-30 | 2010-11-10 | 中国电子科技集团公司第五十八研究所 | Input common mode voltage offset compensation circuit of pipelined analog-to-digital converter |
| JP2014142303A (en) * | 2013-01-25 | 2014-08-07 | Renesas Electronics Corp | Semiconductor device and semiconductor testing system |
| CN108680778A (en) * | 2018-03-22 | 2018-10-19 | 河南科技大学 | A kind of portable waveform is shown and signal generation apparatus |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7026853B2 (en) * | 2004-06-15 | 2006-04-11 | Bae Systems Information And Electronic Systems Integration Inc | Automatic integration reset offset subtraction circuit |
| TW200629738A (en) * | 2004-10-12 | 2006-08-16 | Sony Corp | Sample hold circuit, and pipeline ad converter using the circuit |
-
2021
- 2021-07-15 CN CN202110799565.0A patent/CN113489466B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR940003386A (en) * | 1992-07-24 | 1994-02-21 | 양승택 | TV codec device for NTSC line with DS3 transmission speed |
| US6456954B1 (en) * | 1999-02-24 | 2002-09-24 | Denso Corporation | Sensing apparatus for detecting a physical quantity, including memory circuits storing characteristics adjusting data |
| CN101040441A (en) * | 2004-10-12 | 2007-09-19 | 索尼株式会社 | Sample hold circuit, and pipeline ad converter using the circuit |
| JP2010087542A (en) * | 2008-09-29 | 2010-04-15 | Toshiba Corp | Amplifier circuit |
| CN101882929A (en) * | 2010-06-30 | 2010-11-10 | 中国电子科技集团公司第五十八研究所 | Input common mode voltage offset compensation circuit of pipelined analog-to-digital converter |
| JP2014142303A (en) * | 2013-01-25 | 2014-08-07 | Renesas Electronics Corp | Semiconductor device and semiconductor testing system |
| CN108680778A (en) * | 2018-03-22 | 2018-10-19 | 河南科技大学 | A kind of portable waveform is shown and signal generation apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113489466A (en) | 2021-10-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN113489466B (en) | Circuit for eliminating signal offset of charge amplifier | |
| US10345384B2 (en) | Device, system, and method for measuring internal impedance of a test battery using frequency response | |
| US8710847B2 (en) | Self-correcting amplifier system | |
| JP6877131B2 (en) | Current detection circuit | |
| US9714962B2 (en) | Monitoring device and method for monitoring a line section using a monitoring device | |
| CN210155800U (en) | Circuit arrangement for a smoke sensor and smoke sensor having a measuring chamber | |
| CN114910808A (en) | Battery internal resistance detection method and battery internal resistance detection circuit | |
| CN111880052A (en) | Hand-held type partial discharge detection device based on bluetooth interconnection terminal cluster | |
| Nojdelov et al. | Capacitive-sensor interface with high accuracy and stability | |
| CN101359001A (en) | Method and apparatus for amplifying signal and testing device using the same | |
| JPH0394178A (en) | Measuring device for high frequency signal | |
| CN116930797A (en) | Detection circuit of internal resistance of battery | |
| CN108363445B (en) | Signal drift dynamic correction method and device | |
| CN218767097U (en) | Current detection device and electrical equipment | |
| CN114200287B (en) | Pulse waveform processing circuit of dTof chip | |
| CN210835177U (en) | Battery detection circuit | |
| CN113155159B (en) | Bridge detector | |
| US20170288439A1 (en) | Signal processing circuit, coulomb counter circuit, and electronic device | |
| CN209446663U (en) | A kind of analog signal monitoring of peak device | |
| CN112968702A (en) | Processing system and method for improving sampling precision of ADC (analog to digital converter) small signal in processor | |
| CN206489220U (en) | One kind is based on single-chip microcomputer microresistivity survey system | |
| CN217278623U (en) | Line load network detection and fault positioning device | |
| CN111342785A (en) | Signal conditioning circuit | |
| CN115951116B (en) | Peak current detection system and test method | |
| CN113252988B (en) | Handheld parameter tester and parameter testing method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |