CN112951746A - Wafer warpage correction mechanism and correction method - Google Patents

Wafer warpage correction mechanism and correction method Download PDF

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Publication number
CN112951746A
CN112951746A CN202110280610.1A CN202110280610A CN112951746A CN 112951746 A CN112951746 A CN 112951746A CN 202110280610 A CN202110280610 A CN 202110280610A CN 112951746 A CN112951746 A CN 112951746A
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China
Prior art keywords
sucker
wafer
negative pressure
correction
vacuum cavity
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Pending
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CN202110280610.1A
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Chinese (zh)
Inventor
沈达
薛亚玲
蒋人杰
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Wushi Microelectronics Suzhou Co ltd
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Wushi Microelectronics Suzhou Co ltd
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Priority to CN202110280610.1A priority Critical patent/CN112951746A/en
Publication of CN112951746A publication Critical patent/CN112951746A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67288Monitoring of warpage, curvature, damage, defects or the like
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/799Apparatus for disconnecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/7999Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto for disconnecting

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

The invention discloses a wafer warpage correcting mechanism and a correcting method, and the wafer warpage correcting mechanism comprises a lower vacuum cavity plate, a lower heating plate, a lower sucker, an upper porous negative sucker, an upper heating plate, a product debonding and accommodating area, a concentric circular groove, a connecting groove and a negative pressure source connecting hole, wherein the lower heating plate is assembled on the lower surface of the lower vacuum cavity plate, the lower sucker is placed on the upper surface of the lower vacuum cavity plate, the upper heating plate is assembled on the upper surface of the upper porous negative sucker, and the upper porous negative suckers are arranged right above the lower sucker and are concentrically matched with each other to form the product debonding and accommodating area. Through the mode, the wafer warpage correction mechanism and the wafer warpage correction method provided by the invention have the advantages that the upper porous negative pressure sucker is subjected to primary warpage correction, the lower sucker is subjected to secondary warpage correction, the wafer is protected from being scratched in the whole bonding and debonding operation process, the yield is greatly improved, and the production cost is effectively saved.

Description

Wafer warpage correction mechanism and correction method
Technical Field
The invention relates to the technical field of wafer debonding, in particular to a wafer warpage correcting mechanism and a correcting method.
Background
The wafer product after bonding has the warpage condition because the difference of different material expansion coefficients or the difference of the two different structures of same kind of material, traditional bonding equipment of separating directly places the wafer in carborundum suction disc face, at the in-process of placing, the process of placing itself has produced the fish tail owing to the horizontally friction, and the quotation at the carborundum sucking disc can't laminate completely of warped wafer, after carborundum sucking disc loading negative pressure, the wafer receives the negative pressure effect distortion deformation and laminates to the sucking disc quotation, distortion deformation's in-process wafer and quotation are scrapped because of the damage of scraping.
Disclosure of Invention
The invention mainly solves the technical problem of providing a wafer warping correction mechanism and a correction method, wherein a slide glass of a product to be debonded faces upwards, a wafer faces downwards, and the product to be debonded is fixed through the slide glass and an upper porous negative pressure sucker, so that one-time scratch generated when the wafer is placed is avoided; primary warping correction is carried out on the porous upper sucker, so that secondary scratching when warping products are forced to be parallel is avoided; and secondary warping correction is implemented on the silicon carbide lower sucker, so that tertiary scratch is avoided. And the wafer is protected from being scratched in the whole bonding-releasing operation, so that the yield is greatly improved, and the production cost is effectively saved.
In order to solve the technical problems, the invention adopts a technical scheme that: the wafer warping correction mechanism comprises a lower vacuum cavity plate, a lower heating plate, a lower sucker, an upper porous negative sucker, an upper heating plate, a product debonding and holding area, concentric circular grooves, connecting grooves and a negative pressure source connecting hole, wherein the lower heating plate is assembled on the lower surface of the lower vacuum cavity plate, the lower sucker is placed on the upper surface of the lower vacuum cavity plate, the upper heating plate is assembled on the upper surface of the upper porous negative sucker, the upper porous negative sucker is arranged right above the lower sucker and is in concentric fit with each other to form the product debonding and holding area, the lower surface of the upper porous negative sucker is parallel and right opposite to the lower sucker, a plurality of concentric circular grooves are formed in the upper surface of the lower vacuum cavity plate, the connecting grooves are formed between every two adjacent concentric circular grooves in a crossing manner along the radial direction, and one negative pressure source connecting hole is arranged in each concentric circular groove communicated and connected with the connecting grooves in a, the negative pressure source connecting hole vertically penetrates through the lower vacuum cavity plate and is independently and externally connected with a negative pressure source.
In a preferred embodiment of the present invention, at least 3 negative pressure source connection holes are provided.
In a preferred embodiment of the invention, the lower surface of the lower suction cup completely covers the concentric circular groove.
Meanwhile, a wafer warpage correction method is provided, which comprises the following steps:
preparing a wafer raw material which is warped and bonded on a slide glass;
step two, establishing a primary correction plane of high-temperature negative pressure on the upper porous negative pressure sucker;
step three, enabling the once-corrected plane to adsorb the slide glass without traces, and enabling the slide glass to be softened under the action of high-temperature negative pressure until the slide glass is flattened on the basis of deformation of the once-corrected plane to form an intermediate raw material;
establishing a secondary correction plane of high-temperature negative pressure on the lower sucker;
step five, absorbing the wafer on the intermediate raw material by the secondary correction plane without traces, and executing conventional de-bonding to obtain a de-bonded wafer;
step six, releasing negative pressure of the secondary correction plane acting on the debonding wafer from outside to inside in the radial direction of the debonding wafer;
and step seven, finishing the warpage correction and discharging the debonded wafer.
The invention has the beneficial effects that: according to the wafer warping correction mechanism and the wafer warping correction method, a slide glass of a product to be debonded is upward, a wafer is downward, the product to be debonded is fixed through the slide glass and an upper porous negative pressure sucker, and one-time scratching generated when the wafer is placed is avoided; primary warping correction is carried out on the porous upper sucker, so that secondary scratching when warping products are forced to be parallel is avoided; and secondary warping correction is implemented on the silicon carbide lower sucker, so that tertiary scratch is avoided. And the wafer is protected from being scratched in the whole bonding-releasing operation, so that the yield is greatly improved, and the production cost is effectively saved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without inventive efforts, wherein:
FIG. 1 is a block diagram of a preferred embodiment of a wafer warp calibration mechanism and method according to the present invention;
FIG. 2 is a block diagram of a preferred embodiment of a wafer warp calibration mechanism and method according to the present invention;
FIG. 3 is a block diagram of a preferred embodiment of a wafer warp calibration mechanism and method according to the present invention;
FIG. 4 is a block diagram of a preferred embodiment of a wafer warp calibration mechanism and method according to the present invention;
fig. 5 is a structural diagram of a wafer warpage calibration mechanism and a calibration method according to a preferred embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 1-5, embodiments of the present invention include:
a wafer warping correction mechanism comprises a lower vacuum cavity plate 1, a lower heating plate 2, a lower sucker 3, an upper porous negative sucker 4, an upper heating plate 5, a product bonding-releasing accommodating area 6, concentric circular grooves 7, connecting grooves 8 and a negative pressure source connecting hole 9, wherein the lower surface of the lower vacuum cavity plate 1 is assembled with the lower heating plate 2, the lower sucker 3 is placed on the upper surface of the lower vacuum cavity plate 1, the upper heating plate 5 is assembled on the upper surface of the upper porous negative sucker 4, the upper porous negative suckers 4 are arranged at positions right above the lower sucker 3 and are mutually and concentrically matched to form the product bonding-releasing accommodating area 6, the lower surfaces of the upper porous negative suckers 4 are parallel and just opposite to the lower sucker 3, the upper surface of the lower vacuum cavity plate 1 is provided with the concentric circular grooves 7, and the connecting grooves 8 are radially spanned between every two adjacent concentric circular grooves 7, a negative pressure source connecting hole 9 is arranged in each concentric circular groove 7 which is communicated and connected with the connecting groove 8 in series, and the negative pressure source connecting hole 9 vertically penetrates through the lower vacuum cavity plate 1 and is independently and externally connected with a negative pressure gas source.
Wherein, the lower sucker is a silicon carbide sucker or a porous ceramic sucker with similar functions, a porous sapphire sucker and the like.
Wherein, the negative pressure source connecting holes 9 are at least provided with 3.
Further, the lower surface of the lower suction cup 3 completely covers the concentric circular groove 7.
A wafer warpage correction method comprises the following steps:
preparing a wafer raw material which is warped and bonded on a slide glass;
establishing a primary correction plane of high-temperature negative pressure, wherein in the embodiment, the primary correction plane is the upper porous negative pressure sucker 4, a large number of vacuum round holes are uniformly distributed on the disc surface of the upper porous negative pressure sucker 4, the upper surface of the upper porous negative pressure sucker 4 and the lower surface of the heating plate are hermetically assembled to form an upper vacuum cavity, the heating plate provides a high-temperature environment, the upper vacuum cavity is externally connected with a negative pressure pump source to provide a negative pressure environment, the disc surface of the porous sucker is pure flat, and an absolute plane required for correction is provided;
and step three, adsorbing the slide glass by a first-time correction plane without a mark, softening the slide glass under the action of high-temperature negative pressure until the slide glass is flattened to form an intermediate raw material by taking the first-time correction plane as a deformation basis, in the embodiment, loading the warped wafer without a mark onto the first-time correction plane (namely the upper porous negative pressure sucker 4) by adopting a traceless concentric mechanism, wherein one surface of the slide glass of the wafer raw material is attached to the porous sucker, and the embodiment transfers the flattening treatment operation to the upper sucker to be carried out in a way different from the prior art, so that inevitable friction is generated between the slide glass and the porous upper sucker 4, and the wafer is protected. Under the action of vacuum and high temperature, the slide glass is softened and slowly flattened on the correction plane.
Step four, establishing a secondary correction plane of high-temperature negative pressure; the secondary correction plane is the lower chuck 3 of this embodiment, and the lower chuck 3 is used for debonding and separately performing secondary warpage correction on the wafer after the debonding operation, and the steps are as follows.
Step five, absorbing the wafer on the intermediate raw material by the secondary correction plane without traces, and executing conventional de-bonding to obtain a de-bonded wafer; the effect achieved by the lower suction cup 3 in this step is a scratch-resistant, debonding process. Because the slide glass is softened and flattened in the third step, the intermediate raw material is completely parallel to the secondary correction plane to achieve the process condition required by bonding resolution, and because of the complete parallel, the process of sucking and fixing the wafer by the secondary correction plane (the lower sucker 3) only has the adsorption displacement of the z axis, so that the displacement of the x axis and the y axis caused by warping is completely avoided, and the problem of scratching the wafer is effectively avoided.
Step six, the negative pressure of the secondary correction plane acting on the debonding wafer is gradually released from the outside of the circle to the center of the circle along the radial direction of the debonding wafer; the effect achieved by the lower suction cup 3 in this step is a second warpage correction. The negative pressure of the lower suction cup 3 is provided by the lower vacuum cavity plate 1, and as shown in fig. 4 and 5, the lower vacuum cavity plate 1 is divided into a first-stage cavity 21, a second-stage cavity 22 and a third-stage cavity 23 which are independent from each other. Depending on the size of the wafer, debonding of a 4 "wafer uses primary and secondary cavities 22 for vacuum adsorption, and debonding of a 6" wafer uses primary, secondary and tertiary cavities 23 for vacuum adsorption. After bonding is released, in order to prevent the wafer from warping and recurring under the action of stress, the negative pressure in the cavity needs to be released from outside to inside in a grading manner. Firstly contacting the negative pressure of the third-stage cavity 23, then relieving the negative pressure of the second-stage cavity 22, and finally relieving the negative pressure of the first-stage cavity 21.
And step seven, finishing the warpage correction and discharging the debonded wafer.
In summary, the invention provides a wafer warpage correction mechanism and a correction method, wherein a slide glass of a product to be debonded faces upwards, and a wafer faces downwards, the product to be debonded is fixed by the slide glass and an upper porous negative pressure chuck, so that a scratch generated when the wafer is placed is avoided; primary warping correction is carried out on the porous upper sucker, so that secondary scratching when warping products are forced to be parallel is avoided; and secondary warping correction is implemented on the silicon carbide lower sucker, so that tertiary scratch is avoided. And the wafer is protected from being scratched in the whole bonding-releasing operation, so that the yield is greatly improved, and the production cost is effectively saved.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by the present specification, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.

Claims (4)

1. A wafer warping correction mechanism is characterized by comprising a lower vacuum cavity plate, a lower heating plate, a lower sucker, an upper porous negative sucker, an upper heating plate, a product debonding and bonding accommodating area, concentric circular grooves, connecting grooves and a negative pressure source connecting hole, wherein the lower surface of the lower vacuum cavity plate is assembled with the lower heating plate, the lower sucker is placed on the upper surface of the lower vacuum cavity plate, the upper heating plate is assembled on the upper surface of the upper porous negative sucker, the upper porous negative sucker is arranged at a position right above the lower sucker and is in concentric fit with each other to form the product debonding and bonding accommodating area, the lower surface of the upper porous negative sucker is parallel and right opposite to the lower sucker, a plurality of concentric circular grooves are formed in the upper surface of the lower vacuum cavity plate, the connecting grooves are formed between every two adjacent concentric circular grooves in a radial crossing manner, and one negative pressure source connecting hole is arranged in each concentric circular groove communicated with the connecting grooves, the negative pressure source connecting hole vertically penetrates through the lower vacuum cavity plate and is independently and externally connected with a negative pressure source.
2. The wafer warp correction mechanism as claimed in claim 1, wherein at least 3 negative pressure source connection holes are provided.
3. The wafer warp correction mechanism of claim 1, wherein the lower surface of the lower chuck completely covers the concentric circular groove.
4. A wafer warpage correction method is characterized by comprising the following steps:
preparing a wafer raw material which is warped and bonded on a slide glass;
step two, establishing a primary correction plane of high-temperature negative pressure on the upper porous negative pressure sucker;
step three, enabling the once-corrected plane to adsorb the slide glass without traces, and enabling the slide glass to be softened under the action of high-temperature negative pressure until the slide glass is flattened on the basis of deformation of the once-corrected plane to form an intermediate raw material;
establishing a secondary correction plane of high-temperature negative pressure on the lower sucker;
step five, absorbing the wafer on the intermediate raw material by the secondary correction plane without traces, and executing conventional de-bonding to obtain a de-bonded wafer;
step six, releasing negative pressure of the secondary correction plane acting on the debonding wafer from outside to inside in the radial direction of the debonding wafer;
and step seven, finishing the warpage correction and discharging the debonded wafer.
CN202110280610.1A 2021-03-16 2021-03-16 Wafer warpage correction mechanism and correction method Pending CN112951746A (en)

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Application Number Priority Date Filing Date Title
CN202110280610.1A CN112951746A (en) 2021-03-16 2021-03-16 Wafer warpage correction mechanism and correction method

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Application Number Priority Date Filing Date Title
CN202110280610.1A CN112951746A (en) 2021-03-16 2021-03-16 Wafer warpage correction mechanism and correction method

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CN112951746A true CN112951746A (en) 2021-06-11

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115547897A (en) * 2022-11-30 2022-12-30 长电集成电路(绍兴)有限公司 Wafer leveling device and method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115547897A (en) * 2022-11-30 2022-12-30 长电集成电路(绍兴)有限公司 Wafer leveling device and method

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