CN112867228A - Ceramic wiring board and method for manufacturing ceramic wiring board - Google Patents
Ceramic wiring board and method for manufacturing ceramic wiring board Download PDFInfo
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- CN112867228A CN112867228A CN202010954233.0A CN202010954233A CN112867228A CN 112867228 A CN112867228 A CN 112867228A CN 202010954233 A CN202010954233 A CN 202010954233A CN 112867228 A CN112867228 A CN 112867228A
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- 239000000919 ceramic Substances 0.000 title claims abstract description 94
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 30
- 238000000034 method Methods 0.000 title claims description 63
- 239000004020 conductor Substances 0.000 claims abstract description 174
- 239000000758 substrate Substances 0.000 claims abstract description 70
- 230000002093 peripheral effect Effects 0.000 claims abstract description 47
- 230000007423 decrease Effects 0.000 claims abstract description 17
- 230000000149 penetrating effect Effects 0.000 claims abstract description 15
- 238000007639 printing Methods 0.000 claims description 32
- 238000004080 punching Methods 0.000 claims description 10
- 238000010304 firing Methods 0.000 claims description 8
- 239000000203 mixture Substances 0.000 claims description 6
- 238000009413 insulation Methods 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 218
- 239000000463 material Substances 0.000 description 13
- 230000000694 effects Effects 0.000 description 8
- 239000011521 glass Substances 0.000 description 6
- 238000005266 casting Methods 0.000 description 5
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- 238000012986 modification Methods 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 229910052709 silver Inorganic materials 0.000 description 4
- 239000004332 silver Substances 0.000 description 4
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 description 3
- 239000005751 Copper oxide Substances 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 3
- 229910000431 copper oxide Inorganic materials 0.000 description 3
- 238000001035 drying Methods 0.000 description 3
- 239000011229 interlayer Substances 0.000 description 3
- 238000003754 machining Methods 0.000 description 3
- 239000002245 particle Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 230000001737 promoting effect Effects 0.000 description 2
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- 238000010345 tape casting Methods 0.000 description 2
- 239000000654 additive Substances 0.000 description 1
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- 238000000576 coating method Methods 0.000 description 1
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- 230000003247 decreasing effect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000007606 doctor blade method Methods 0.000 description 1
- 239000002241 glass-ceramic Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
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Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
- H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0094—Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09563—Metal filled via
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Structure Of Printed Boards (AREA)
Abstract
The invention provides a ceramic wiring substrate capable of reducing the resistance of a through conductor part penetrating an insulating layer and a manufacturing method of the ceramic wiring substrate. The first peripheral portion of the first insulating layer is provided around the first through hole portion of the first insulating layer. The first flat plate portion of the first insulating layer is disposed around the first peripheral portion and has a flat plate shape of a first thickness. The first through conductor portion is provided in the first through hole portion. The first conductor layer is disposed on the first surface of the first insulating layer and connected to the first through conductor portion. The second conductor layer is disposed on the second surface of the first insulating layer and connected to the first through conductor portion. The first peripheral portion has, in at least one cross-sectional view, a thickness that continuously decreases in a direction from the first flat plate portion toward the first through hole portion, and a first width that is larger than the first thickness of the first flat plate portion.
Description
Technical Field
The present invention relates to a ceramic wiring board and a method for manufacturing the ceramic wiring board.
Background
Japanese patent laid-open No. 2016-25200 discloses a wiring board. The wiring substrate is provided with: an insulating substrate including a plurality of insulating layers made of a glass ceramic sintered body and laminated with each other; a wiring conductor provided on a main surface of the insulating layer; and a through conductor which contains silver as a main component and contains glass and copper oxide as additive materials, and which penetrates at least one of the plurality of insulating layers in a thickness direction. The glass is biased at an interface portion with the insulating layer in the through conductor, and particles of the glass are dispersed between the silver at the interface portion.
According to the above publication, the glass contained in the through conductor is biased to the interface portion with the insulating layer in the through conductor, and is dispersed as particles between the silver at the interface portion, so that the bonding strength between the through conductor and the insulating layer is improved as compared with the conventional one. In this case, the presence of copper oxide can prevent the glass of the through conductor from being bulky and separated from silver, and can disperse as particles.
Japanese patent laid-open publication No. 2005-136266 discloses a ceramic multilayer wiring substrate. In the ceramic multilayer wiring substrate, a wiring printing green sheet (first insulating layer) in which a wiring layer made of a conductive material is formed and an insulating green sheet (second insulating layer) made of ceramic having a thickness different from that of the wiring printing green sheet are alternately laminated.
In the manufacturing method, the wiring printing green sheet and the insulating green sheet are formed into a sheet by a doctor blade method or the like. Next, a through hole for wiring connection filled with the conductor paste is formed in the wiring printing green sheet by a press working method. Next, wiring conductors are formed on both the front surface and the back surface of the wiring printing green sheet. Specifically, a conductive paste obtained by adding and mixing an organic solvent and a solvent to a high-melting metal powder is applied to the green sheet by screen printing or the like. On the other hand, through holes for electrically connecting the upper and lower wiring conductors are formed in the insulating green sheets having a thickness smaller than that of the wiring printing green sheets by a press working method, and the through holes are filled with a conductor paste serving as a connecting conductor. Next, the wiring printing green sheets are stacked with insulating green sheets interposed therebetween, thereby producing a ceramic green laminate. Next, the ceramic green laminate is fired to complete the ceramic multilayer wiring board.
According to the above publication, by setting the thickness of the insulating green sheet to 15 μm or less, even if the through-hole is not filled with the conductive paste, the conductive paste serving as a conductor for providing the upper and lower wiring conductors at the time of stacking the green sheets flows into the through-hole. This allows the through-hole to be filled with the conductive paste to obtain connection between the upper and lower layers. Therefore, the step of filling the through-holes of the insulating green sheet with the conductive paste can be omitted, and productivity can be improved.
Disclosure of Invention
(problems to be solved by the invention)
According to the technique of the above-mentioned Japanese patent laid-open publication No. 2016 and 25200, the through conductor portion contains glass and copper oxide. This makes it easy to suppress a defective peeling of the through conductor portion from the insulating layer. However, since the conductivity of the through conductor portion decreases, the resistance of the through conductor portion becomes high.
According to the technique of japanese patent application laid-open No. 2005-136266, when the thickness of the insulating green sheet is 15 μm or less, the conductor paste for providing the wiring conductors on the upper and lower sides thereof flows into the through-holes, whereby the upper and lower layers can be connected, that is, the through-conductor portion can be formed. In this case, since the material of the through conductor portion is the same as that of the wiring conductors in the upper and lower layers, the electrical conductivity of the through conductor portion becomes high to the same extent as that of the wiring conductors as long as the conductor paste is sufficiently filled in the through holes. However, in practice, the inflow of the conductive paste into the through-hole may be insufficient, and this problem becomes more pronounced as the diameter of the through-hole is smaller. In this case, an increase in resistance or disconnection may occur.
The present invention has been made to solve the above-described problems, and an object thereof is to provide a ceramic wiring board capable of reducing the resistance of a through conductor portion penetrating an insulating layer.
(means for solving the problems)
The ceramic wiring substrate in one embodiment is a ceramic wiring substrate having a mounting surface on which an electronic component is mounted. The ceramic wiring substrate has a first insulating layer, a first through conductor portion, a first conductor layer, and a second conductor layer. The first insulating layer has a first surface and a second surface opposite to the first surface. The first insulating layer includes a first through hole portion, a first peripheral portion, and a first flat plate portion. The first through hole portion is disposed between the first surface and the second surface. The first peripheral portion is provided around the first through-hole portion. The first flat plate portion is disposed around the first peripheral portion and has a flat plate shape of a first thickness. The first through conductor portion is provided in the first through hole portion of the first insulating layer. The first conductor layer is disposed on the first surface of the first insulating layer and connected to the first through conductor portion. The second conductor layer is disposed on the second surface of the first insulating layer and connected to the first through conductor portion. The first peripheral portion has, in at least one cross-sectional view, a thickness that continuously decreases in a direction from the first flat plate portion toward the first through hole portion, and a first width that is larger than the first thickness of the first flat plate portion.
The method for manufacturing a ceramic wiring substrate according to one embodiment includes the following steps. A first insulating paste layer is formed by a printing method, the first insulating paste layer having a first surface and a second surface opposite to the first surface and including a first through hole provided between the first surface and the second surface. A through conductor paste portion is formed in the first through hole portion of the first insulating paste layer. The first insulating paste layer and the through conductor paste portion are fired.
(effect of the invention)
According to one embodiment, the ceramic wiring substrate has a thickness that continuously decreases in a direction from the first flat plate portion toward the first through hole portion. In the production of the ceramic wiring board, the conductor paste is likely to flow into the first through hole portion as the thickness decreases. Further, since the first peripheral edge portion has the first width larger than the first thickness of the first flat plate portion, the region into which the conductor paste easily flows is secured sufficiently wide in accordance with the thickness of the first insulating layer as described above. This allows the first through-hole portion to be sufficiently filled with the conductive paste throughout the entire thickness direction. Therefore, the resistance of the first through conductor portion can be reduced.
According to the method of manufacturing a ceramic wiring substrate of one embodiment, the first insulating paste layer including the first through hole portion is formed by a printing method. By using the printing method, the first peripheral portion having the thickness continuously decreasing in the direction toward the first through hole portion can be easily formed around the first through hole portion. When the penetrating conductor paste portion is formed in the first through hole portion of the first insulating paste layer, the conductor paste easily flows into the first through hole portion as the thickness decreases. Further, by using the printing method as described above, the first peripheral portion into which the conductive paste easily flows as described above is secured to be sufficiently wide in accordance with the thickness of the first insulating paste layer. This allows the first through-hole portion to be sufficiently filled with the conductive paste throughout the entire thickness direction. Therefore, the resistance of the first through conductor portion formed by firing the first through conductor paste portion can be reduced.
The objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description and the accompanying drawings.
Drawings
Fig. 1 is a cross-sectional view schematically showing the configuration of an electronic device including a ceramic wiring board according to embodiment 1 of the present invention.
Fig. 2 is a cross-sectional view schematically showing the structure of the ceramic wiring substrate of fig. 1.
Fig. 3 is an enlarged view of a dotted line portion III of fig. 2.
Fig. 4 is an enlarged view of a dotted line portion IV of fig. 2.
Fig. 5 is a partial cross-sectional view schematically showing a step of the method for manufacturing the ceramic wiring substrate of fig. 2.
Fig. 6 is a partial cross-sectional view schematically showing a step of the method for manufacturing the ceramic wiring substrate of fig. 2.
Fig. 7 is an enlarged view of a dashed line portion VII of fig. 6.
Fig. 8 is a partial cross-sectional view schematically showing a step of the method for manufacturing the ceramic wiring substrate of fig. 2.
Fig. 9 is a partial cross-sectional view schematically showing a first stage in the process of fig. 8 from a perspective corresponding to fig. 7.
Fig. 10 is a partial sectional view schematically showing a second stage in the process of fig. 8 from a perspective corresponding to fig. 7.
Fig. 11 is a partial cross-sectional view schematically showing a third stage in the process of fig. 8, from a perspective corresponding to fig. 7.
Fig. 12 is a partial cross-sectional view schematically showing a step of the method for manufacturing the ceramic wiring substrate of fig. 2.
Fig. 13 is an enlarged view of a dotted line portion XIII of fig. 12.
Fig. 14 is a partial cross-sectional view schematically showing a step of the method for manufacturing the ceramic wiring substrate of fig. 2.
Fig. 15 is an enlarged view of a dotted line portion XV of fig. 14.
Fig. 16 is a partial cross-sectional view schematically showing a step of the method for manufacturing the ceramic wiring substrate of fig. 2.
Fig. 17 is a diagram showing a modification of the configuration of fig. 4.
Fig. 18 is a cross-sectional view schematically showing the structure of a ceramic wiring substrate of a comparative example.
Fig. 19 is a cross-sectional view schematically showing the structure of a ceramic wiring board according to embodiment 2 of the present invention.
Fig. 20 is a cross-sectional view schematically showing the structure of a ceramic wiring board according to embodiment 3 of the present invention.
Fig. 21 is a cross-sectional view schematically showing the structure of a ceramic wiring board according to embodiment 4 of the present invention.
Fig. 22 is a cross-sectional view schematically showing the structure of a ceramic wiring board according to embodiment 5 of the present invention.
Detailed Description
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
< embodiment 1 >
(constitution)
Fig. 1 is a cross-sectional view schematically showing the structure of an electronic device 900 including a ceramic wiring substrate 801 according to embodiment 1. Electronic device 900 includes ceramic wiring board 801, electronic component 902, and lid 907. The ceramic wiring substrate 801 has a mounting surface MS and a space CV above it. The ceramic wiring substrate 801 has a frame portion 190 surrounding these components. An electronic component 902 is mounted on the mounting surface MS of the ceramic wiring substrate 801 via a bonding layer 901. The lid 907 is bonded to the frame 190 via the bonding layer 906, thereby sealing the space CV.
Fig. 2 is a cross-sectional view schematically showing the structure of the ceramic wiring substrate 801 shown in fig. 1. The ceramic wiring board 801 has a base PB and a frame 190. The base PB has a mounting surface MS on which the electronic component 902 (fig. 1) is mounted. The base PB includes the first insulating layer 110, the first through conductor portion 310, the first conductor layer 210, and the second conductor layer 220. The base PB further includes a second insulating layer 120 laminated on the first insulating layer 110. The base PB may further include a second through conductor portion 320 and a third conductor layer 230. In the present embodiment, the first insulating layer 110 is disposed between the mounting surface MS and the second insulating layer 120, and specifically, the second conductor layer 220 on the first insulating layer 110 constitutes the mounting surface MS.
Fig. 3 is an enlarged view of a dotted line portion III of fig. 2. The first insulating layer 110 has a first face S1 and a second face S2 opposite to the first face S1. The first insulating layer 110 includes a first through-hole portion 111, a first peripheral portion 112, and a first flat plate portion 113. The first through hole portion 111 is disposed between the first surface S1 and the second surface S2. The first peripheral portion 112 is provided around the first through-hole portion 111. The first flat plate portion 113 is provided around the first peripheral portion 112. The first flat plate portion 113 has a flat plate shape with a first thickness T13. The first peripheral portion 112 has, in at least one cross-sectional view (fig. 3), a thickness that continuously decreases in a direction from the first flat plate portion 113 toward the first through-hole portion 111, and a first width W12 that is larger than the first thickness T13 of the first flat plate portion 113.
The first thickness T13 is preferably 5 μm or more and 40 μm or less, and more preferably 5 μm or more and 20 μm or less. The first peripheral portion 112 may have parallel inner surfaces facing the first through hole portion 111 and extending in parallel in the thickness direction. The parallel inner surfaces preferably have a dimension T11 in the thickness direction that is less than one fifth of the first thickness T13. The first surface S1 and the second surface S2 preferably each have a surface inclined toward the first through hole 111 in the first peripheral portion 112.
The first through conductor portion 310 is provided in the first through hole portion 111 of the first insulating layer 110. The first conductor layer 210 is disposed on the first surface S1 of the first insulating layer 110 and connected to the first through conductor portion 310. The second conductive layer 220 is disposed on the second surface S2 of the first insulating layer 110 and connected to the first through conductor portion 310.
Fig. 4 is an enlarged view of a dotted line portion IV of fig. 2. The second insulating layer 120 has a third surface S3 and a fourth surface S4 on the opposite side of the third surface S3. The second insulating layer 120 may also have a second through hole portion 121, a second peripheral portion 122, and a second flat plate portion 123. The second through hole 121 is provided between the third surface S3 and the fourth surface S4. The width W11 of the first through hole 111 is smaller than the width W21 (fig. 3) of the second through hole 121. The second peripheral portion 122 is provided around the second through hole portion 121. The second flat plate portion 123 is provided around the second peripheral portion 122 to have a flat plate shape with the second thickness T23. The second thickness T23 may be greater than the first thickness T13 (fig. 3), e.g., greater than 40 μm. Therefore, the second insulating layer 120 includes the second flat plate portion 123 having a flat plate shape with the second thickness T23 larger than the first thickness T13. The second rim portion 122 has, in at least one cross-sectional view (fig. 4), a thickness that continuously decreases in a direction from the second flat plate portion 123 toward the second through-hole portion 121 and a second width W22 that is smaller than the second thickness T23 of the second flat plate portion 123.
The second through conductor portion 320 is provided in the second through hole portion 121 of the second insulating layer 120. The third conductor layer 230 is disposed on the fourth face S4 of the second insulating layer 120, and is connected to the second through conductor portion 320. The first conductor layer 210 is disposed on the third face S3 of the second insulating layer 120. The second through conductor portion 320 is connected to the first conductor layer 210.
The first insulating layer 110 and the second insulating layer 120 preferably have the same composition. In addition, the first insulating layer 110 and the second insulating layer 120 preferably have the same sintered structure. Here, the uniformity of the sintered structure means that, for example, the porosity and the crystal grain size are substantially the same. The first through conductor portion 310, the first conductor layer 210, and the second conductor layer 220 preferably have the same composition.
(production method)
Next, a method for manufacturing the ceramic wiring substrate 801 (fig. 2) will be described with reference to fig. 5 to 16. In addition, although a method of manufacturing one ceramic wiring substrate 801 will be described below for simplification of description, the ceramic wiring substrate may be collectively manufactured as a multi-electronic component substrate in which a plurality of ceramic wiring substrates 801 are laid out in the same plane in order to improve manufacturing efficiency.
Referring to fig. 5, the insulating paste tape 120t is formed by a casting molding method. The tape casting method is a technique of forming a thin tape on a thin sheet by conveying the thin sheet at a constant speed while placing a slurry (a raw material having fluidity) in a gap between a doctor blade and the thin sheet on a belt conveyor.
Referring to fig. 6 and fig. 7 which is an enlarged view of a dashed line portion VII (fig. 6), the insulating paste tape 120t is cut out in a predetermined size. In addition, the second insulating paste layer 120p is formed by forming through holes in the insulating paste tape 120t by a punching method. The punching method is performed by, for example, laser machining or mechanical machining. In particular, as shown in fig. 7, a through hole having a monotone tapered shape from the third surface S3 to the fourth surface S4 can be easily formed by laser processing. The second insulating paste layer 120p is an element that becomes the second insulating layer 120 (fig. 2 and 4) by firing, and thus has a configuration corresponding to the second insulating layer 120. In the present specification, the "paste tape" and the "paste layer" refer to an unfired layer formed from a paste (slurry) and substantially losing fluidity by drying, in other words, a green sheet.
Specifically, the second insulating paste layer 120p has the third surface S3 and a fourth surface S4 on the opposite side of the third surface S3. The second insulating paste layer 120p may have a second through hole portion 121p, a second peripheral portion 122p, and a second flat plate portion 123 p. The second through hole 121p is formed by the pressing method as described above, and is provided between the third surface S3 and the fourth surface S4. The width of the second through hole 121p that is the smallest is W21 p. The second peripheral portion 122p is provided around the second through hole portion 121 p. The second flat plate portion 123p is provided around the second peripheral portion 122p to have a flat plate shape with the second thickness T23 p. The second peripheral portion 122p has, in at least one cross-sectional view (fig. 7), a thickness that continuously decreases in a direction from the second flat plate portion 123p toward the second through hole portion 121p and a second width W22p that is smaller than the second thickness T23p of the second flat plate portion 123 p.
Referring to fig. 8, the third conductive paste layer 230p, the penetrating conductive paste portion 320p, and the first conductive paste layer 210p are provided on the second insulating paste layer 120 p. This step will be described in more detail with reference to fig. 9 to 11. Referring to fig. 9, the through conductor paste portion 320p is formed in the second through hole portion 121p of the second insulating paste layer 120 p. This formation may be performed by a printing method. Referring to fig. 10, a third conductive paste layer 230p is formed on the fourth face S4 of the second insulating paste layer 120 p. This formation may be performed by a printing method. Referring to fig. 11, the first conductor paste layer 210p is formed on the third surface S3 of the second insulating paste layer 120 p. This formation may be performed by a printing method. The printing method in each step may be performed by applying a conductive paste to a screen provided with an opening pattern.
Referring to fig. 12 and fig. 13 which is an enlarged view of a dotted line portion XIII (fig. 12), a first insulating paste layer 110p is formed on the second insulating paste layer 120p provided with the first conductor paste layer 210p by a printing method. Specifically, the first insulating paste layer 110p is formed by applying an insulating paste on a screen provided with an opening pattern. The first insulating paste layer 110p is an element that becomes the first insulating layer 110 (fig. 2 and 3) by firing, and thus has a configuration corresponding to the first insulating layer 110.
Specifically, the first insulating paste layer 110p has a first surface S1 and a second surface S2 opposite to the first surface S1. The first insulating paste layer 110p includes a first through hole 111p, a first peripheral portion 112p, and a first flat plate portion 113 p. The first through hole portion 111p is disposed between the first surface S1 and the second surface S2. The first peripheral portion 112p is provided around the first through-hole portion 111 p. The first flat plate portion 113p is provided around the first peripheral portion 112 p. The first flat plate portion 113p has a flat plate shape with a first thickness T13 p. The first peripheral portion 112p has, in at least one cross-sectional view (fig. 13), a thickness that continuously decreases in a direction from the first flat plate portion 113p toward the first through-hole portion 111p, and a first width W12p that is greater than the first thickness T13p of the first flat plate portion 113 p.
The width W11p of the first through hole 111p is smaller than the width W21p of the second through hole 121p (fig. 7). In addition, the second thickness T23p (fig. 7) is greater than the first thickness T13 p. Therefore, the second insulating paste layer 120p (fig. 7) includes the second flat plate portion 123p having a flat plate shape with the second thickness T23p larger than the first thickness T13 p.
As shown in fig. 13, the conductive paste applied when printing the first conductive paste layer 210p may penetrate into the first through-hole 111p of the first insulating paste layer 110 p. The step of pressing the first insulating paste layer 110p may be performed after printing the first insulating paste layer 110p, and in this case, the above-described penetration is particularly likely to occur.
Referring to fig. 14 and fig. 15, which is an enlarged view of the dashed line portion XV (fig. 14), a conductor paste is applied on the second surface S2 of the first insulating paste layer 110 p. Thereby, the second conductor paste layer 220p is formed on the second surface S2 of the first insulation paste layer 110p, and the through conductor paste portion 310p is formed in the first through hole portion 111p by the conductor paste penetrating into the first through hole portion 111p and reaching the first conductor paste layer 210 p. In other words, the unfired base PBp serving as the base PB (fig. 2) is formed by firing.
As described above, in the present embodiment, the step of forming the penetrating conductor paste portion 310p includes the step of applying the conductor paste on the second surface S2 of the first insulating paste layer 110 p. As a modification, a step of applying a conductive paste to form the penetrating conductive paste portion 310p may be performed after the step of applying a conductive paste to form the first conductive paste layer 210p and before the step of applying a conductive paste to form the second conductive paste layer 220 p. In this case, the manufacturing method is complicated, and a material different from the materials of the first and second conductive paste layers 210p and 220p can be selected as the material of the penetrating conductive paste portion 310 p. As a result, a material different from the materials of the first conductor layer 210 and the second conductor layer 220 can be selected as the material of the first through conductor portion 310 (fig. 2).
Referring to fig. 16, the unfired base portion PBp is fired to form an unfired frame portion 190p serving as the frame portion 190. Specifically, a green sheet having a predetermined shape is stacked on the unfired base PBp as the unfired frame 190 p. The structure shown in fig. 16 includes the first insulating paste layer 110p and the penetrating conductor paste portion 310p (fig. 15). By firing this structure, a ceramic wiring substrate 801 (fig. 2) can be obtained.
(modification example)
Fig. 17 is a diagram showing a ceramic wiring board 802 according to a modification of the configuration of fig. 4. The second insulating layer 120 of the ceramic wiring substrate 802 has the second through hole 121V and the second peripheral portion 122V instead of the second through hole 121 and the second peripheral portion 122 of the ceramic wiring substrate 801 (fig. 4). The width W11 of the first through hole portion 111 is smaller than the width W21V (fig. 3) of the second through hole portion 121V. The second rim portion 122V has, in at least one cross-sectional view (fig. 17), a thickness that continuously decreases in a direction from the second flat plate portion 123 toward the second through-hole portion 121V and a second width W22V that is smaller than the second thickness T23 of the second flat plate portion 123.
The second peripheral portion 122V has parallel inner surfaces facing the second through hole portion 121V and extending in parallel in the thickness direction. The parallel inner surfaces have a dimension T21V in the thickness direction that is greater than one fifth of the second thickness T23. The third surface S3 and the fourth surface S4 each have a surface inclined toward the second through hole 121V in the second margin portion 122V.
The configuration of the above-described modification can be easily obtained by performing the through-hole of the second insulating layer 120 by machining using a die instead of laser processing.
Comparative example
Fig. 18 is a cross-sectional view schematically showing the structure of a ceramic wiring substrate 800C of a comparative example. The ceramic wiring substrate 800C has a first insulating layer 110C instead of the first insulating layer 110 (fig. 2). The first insulating layer 110C is formed using a casting method and a punching method instead of a printing method. In the case of using the punching method, the shape of the periphery of the through hole formed in the insulating layer is not the shape as shown in fig. 3, but is easily the shape as shown in fig. 7 or 17. As a result, the inflow of the conductor paste into the through-hole tends to be insufficient, and the problem becomes more pronounced as the diameter of the through-hole becomes smaller. In this case, an increase in resistance or disconnection of an electrical path passing through the through-hole is likely to occur.
The stacked structure of the second insulating layer 120 and the first insulating layer 110C is formed not by a step of a printing method but by a step of stacking green sheets. In this case, since the green sheet is an unfired layer which substantially loses fluidity by drying, interlayer peeling may easily occur as compared with a case where the first insulating layer 110 is formed on the second insulating layer 120 by a printing method.
(Effect)
According to the ceramic wiring substrate 801 (fig. 3) of the present embodiment, the first peripheral portion 112 of the first insulating layer 110 has a thickness that continuously decreases in a direction from the first flat plate portion 113 toward the first through-hole portion 111. In the production of the ceramic wiring board 801, the conductor paste tends to flow into the first through-hole portion 111p of the first insulating paste layer 110p (fig. 15) as the thickness decreases. Further, since the first peripheral edge portion 112 (fig. 3) has the first width W12 larger than the first thickness T13 of the first flat plate portion 113, the region in which the inflow of the conductor paste is promoted as described above is secured sufficiently wide by the thickness of the first insulating layer 110 (in other words, by the thickness of the first insulating paste layer 110 p). This allows the first through hole 111p of the first insulating paste layer 110p (fig. 15) to be sufficiently filled with the conductive paste throughout the thickness direction. Therefore, the resistance of the first through conductor portion 310 (fig. 3) can be reduced.
The second insulating layer 120 (fig. 2) includes a second flat plate portion 123 (fig. 4) having a flat plate shape with a second thickness T23 (fig. 4) greater than the first thickness T13 (fig. 3). In this way, the second insulating layer 120 has a large thickness, and thus the mechanical strength of the ceramic wiring substrate 801 can be ensured with a small number of layers.
The first insulating layer 110 and the second insulating layer 120 of the ceramic wiring substrate 801 (fig. 2) preferably have the same composition. In addition, the first insulating layer 110 and the second insulating layer 120 preferably have the same sintered structure. This can avoid the formation of a portion having locally weak insulation reliability depending on the material.
The width W11 of the first through hole portion 111 of the first insulating layer 110 (fig. 3) may be smaller than the width W21 of the second through hole portion 121 of the second insulating layer 120 (fig. 4). Even if the width W11 of the first through-hole portion 111 is small, according to the present embodiment, the conductor paste can be sufficiently filled in the first through-hole portion 111p of the first insulating paste layer 110p (fig. 15) for the reasons described above. On the other hand, the second peripheral portion 122 of the second insulating layer 120 (fig. 4) has a second width W22 smaller than the second thickness T23 of the second flat plate portion 123. In this case, although the effect of promoting the inflow of the conductor paste as described above is not obtained, since the width W21 of the second through hole portion 121 (fig. 4) is relatively large (in other words, the width W21p of the second through hole portion 121p (fig. 9) is relatively large), it is relatively easy to sufficiently fill the conductor paste without greatly depending on the effect. The second insulating paste layer 120p (fig. 7) having such a shape can be easily obtained by forming a through hole by a punching method. In the case of using the stamping method, the stamped base material can be produced with high production efficiency by using the tape casting method.
By disposing the first insulating layer 110 (fig. 2) between the mounting surface MS and the second insulating layer 120, a fine wiring structure using the first insulating layer 110 can be provided in the vicinity of the mounting surface MS. Specifically, the second conductor layer 220 (fig. 2) on the first insulating layer 110 constitutes the mounting surface MS. This is particularly advantageous in the case where the mounting surface MS has a fine electrode structure, for example.
The parallel inner surfaces of the primary peripheral portion 112 of the first insulating layer 110 (fig. 3) preferably have a dimension T11 in the thickness direction that is less than one fifth of the first thickness T13. Thereby, the depth of the portion surrounded by the parallel inner surfaces becomes small. Therefore, in the steps of fig. 13 and 15, the conductor paste can be easily filled into the portion surrounded by the parallel inner surfaces. Therefore, the resistance of the first through conductor portion 310 (fig. 3) can be further reduced.
The first surface S1 and the second surface S2 (fig. 3) each preferably have a surface inclined toward the first through hole 111 in the first peripheral portion 112. Thereby, the inflow of the conductor paste into the first through-hole portion 111p (fig. 15) is promoted by both the first surface S1 and the second surface S2. Therefore, the first through-hole portion 111p can be filled with the conductor paste more sufficiently. Therefore, the resistance of the first through conductor portion 310 (fig. 3) can be further reduced.
The first thickness T13 (fig. 3) is preferably 5 μm or more and 40 μm or less, and more preferably 5 μm or more and 20 μm or less. When the first thickness T13 is 5 μm or more, sufficient insulation reliability of the first insulating layer 110 can be easily ensured. Since the first thickness T13 is not excessively large, the conductor paste easily flows into the first through-hole portion 111p (fig. 15) sufficiently. In addition, since the first thickness T13 is not excessively large, the size of the ceramic wiring substrate 801 in the thickness direction can be reduced.
The first through conductor portion 310, the first conductor layer 210, and the second conductor layer 220 (fig. 3) preferably have the same composition. Thereby, the conductivity of the first through conductor portion 310 becomes high to the same extent as the conductivity of the second conductor layer 220. Therefore, the resistance of the first through conductor portion 310 is easily reduced.
According to the method of manufacturing the ceramic wiring board 801 of the present embodiment, the first insulating paste layer 110p including the first through hole 111p is formed by a printing method (fig. 13). By using the printing method, the first peripheral portion 112p having a thickness that continuously decreases in a direction toward the first through-hole portion 111p can be easily formed around the first through-hole portion 111 p. When the penetrating conductor paste portion 310p (fig. 15) is formed in the first through hole portion 111p of the first insulating paste layer 110p, the conductor paste easily flows into the first through hole portion 111p as the thickness decreases. Further, by using the printing method as described above, the first peripheral portion 112p that promotes the inflow of the conductive paste as described above is secured to be sufficiently wide in accordance with the thickness of the first insulating paste layer 110 p. This allows the first through hole 111p to be sufficiently filled with the conductive paste throughout the entire thickness direction. Therefore, the resistance of the first through conductor portion 310 (fig. 3) formed by firing the through conductor paste portion 310p (fig. 15) can be reduced.
In the step of applying the conductor paste (fig. 15), the second conductor paste layer 220p is preferably formed on the second surface S2 of the first insulating paste layer 110p, and the through conductor paste portion 310p is preferably formed by the conductor paste penetrating into the first through hole portion 111p and reaching the first conductor paste layer 210 p. The manufacturing method is thereby simplified. Further, since the material of the first through conductor portion 310 (fig. 3) is the same as the material of the first conductor layer 210 and the second conductor layer 220, the conductivity of the first through conductor portion 310 becomes high to the same extent as the conductivity of the first conductor layer 210 and the second conductor layer 220.
The width W11p (fig. 13) of the first through hole portion 111p may be smaller than the width W21p (fig. 9) of the second through hole portion 121p, and the second through hole portion 121p may be formed by a punching method. Even if the width W11p of the first through-hole portion 111p is small, according to the present embodiment, the conductor paste can be sufficiently filled in the first through-hole portion 111p of the first insulating paste layer 110p for the reasons described above. On the other hand, since the second insulating paste layer 120p (fig. 9) is formed by a press-forming method, although it is difficult to obtain a shape effect of promoting the inflow of the conductor paste, since the width W21p of the second through hole 121p is relatively large, it is relatively easy to sufficiently fill the conductor paste without largely depending on the above effect. In addition, when the punching method is used, the punched base material can be produced with high production efficiency by using the casting method. Therefore, by appropriately combining the printing method and the punching method, the above-described resistance reduction effect can be obtained, and the manufacturing efficiency can be improved.
Further, by forming the second through holes 121p of the second insulating paste layer 120p by the press method, the dimensional accuracy of the second through holes 121p can be improved as compared with the case of using the printing method in which the shrinkage at the time of drying is large. After that, by forming the first insulating paste layer 110p on the second insulating paste layer 120p as the base by a printing method, the dimensional accuracy of the first through hole portion 111p of the first insulating paste layer 110p can be easily ensured.
< embodiment 2 >
Fig. 19 is a sectional view schematically showing the structure of a ceramic wiring substrate 803 according to embodiment 2. In the present embodiment, the third conductor layer 230 on the second insulating layer 120 constitutes the mount surface MS. This is advantageous in the case where, for example, the strength of the insulating layer exposed at the periphery of the mounting surface MS is required. Further, by disposing the first insulating layer 110 between the substrate bottom surface (the surface facing the mounting surface MS) and the second insulating layer 120, a fine wiring structure using the first insulating layer 110 can be provided in the vicinity of the substrate bottom surface. Specifically, the first insulating layer 110 is disposed on the bottom surface of the substrate, which is particularly advantageous when, for example, a fine electrode structure needs to be disposed on the bottom surface of the substrate.
Since the other configurations are substantially the same as those of embodiment 1 described above, the same or corresponding elements are denoted by the same reference numerals, and a description thereof will not be repeated.
< embodiment 3 >
Fig. 20 is a cross-sectional view schematically showing the structure of the ceramic wiring substrate 804 according to embodiment 3. In this embodiment, the insulating layer 140, the through conductor portion 340, and the conductor layer 240 are provided in addition to the configuration of the ceramic wiring substrate 803 (fig. 19). The insulating layer 140 has a fifth face S5 joined to the second face S2 of the first insulating layer 110 and a sixth face S6 opposite to the fifth face S5. The conductor layer 240 is disposed on the sixth face S6 of the insulating layer 140. The through conductor portion 340 connects the second conductor layer 220 on the fifth surface S5 and the conductor layer 240 on the sixth surface S6. The insulating layer 140 is formed by a casting method and a punching method. Since the other configurations are substantially the same as those of embodiment 2 described above, the same or corresponding elements are denoted by the same reference numerals, and a description thereof will not be repeated.
According to the present embodiment, the second insulating layer 120 and the insulating layer 140, both formed by the casting method, are bonded to each other by the first insulating layer 110 formed by the printing method. In this case, by adjusting the organic component in the paste used in the printing method, it is easy to secure a desired interlayer adhesion strength. Thereby preventing interlayer peeling.
< embodiment 4 >
Fig. 21 is a cross-sectional view schematically showing the structure of a ceramic wiring board 805 in embodiment 4. The ceramic wiring substrate 805 has a side conductor portion 270. The side conductor part 270 is disposed on a side of the second insulating layer 120. In this embodiment, the first conductor layer 210 and the third conductor layer 230 each reach the side surface of the second insulating layer 120. The side conductor portion 270 is connected to the first conductor layer 210 and the third conductor layer 230, respectively. In the ceramic substrate 805 of the present embodiment, unlike the ceramic wiring substrate 801 (fig. 2: embodiment 1), the second insulating layer 120 may not have a through hole in which the second through conductor part 320 (fig. 2) is provided. Since the other configurations are substantially the same as those of embodiment 1 described above, the same or corresponding elements are denoted by the same reference numerals, and a description thereof will not be repeated.
According to this embodiment, the ceramic wiring substrate 805 has the side surface conductor portion 270 provided on the side surface of the second insulating layer 120 and connected to the first conductor layer 210 and the third conductor layer 230. The side conductor part 270 can be formed by applying a conductor paste to the side surface of the second insulating layer 120, unlike the second through conductor part 320 (fig. 2). Since the side surface of the second insulating layer 120 is a wide open region unlike the inner surface of the through hole, the above-described coating step can be easily performed. Therefore, even if the thickness of the second insulating layer 120 is large, a conductor portion having a small resistance can be easily formed.
< embodiment 5 >
Fig. 22 is a cross-sectional view schematically showing the structure of a ceramic wiring substrate 806 in embodiment 5. The ceramic wiring board 806 also has a base portion PB having a mounting surface MS, as in the above-described embodiments. The frame 190 is supported by the base PB and has an inner wall surface SW facing the space CV on the mounting surface MS of the base PB.
In the present embodiment, the ceramic wiring board 806 has the third insulating layer 130 provided on the base PB. The third insulating layer 130 has a support surface SS that supports the frame portion 190 and an inner end surface SE that faces the space CV on the mounting surface MS of the base portion PB and is inclined from the inner wall surface SW of the frame portion 190. By providing the inclined inner wall surface SW in this manner, the curvature of the corner between the upper surface (surface facing the space CV) of the base PB and the inner wall surface SW of the frame 190 is gentle. Preferably, the inner end surface SE is a curved surface convex toward the base PB.
In the production of the ceramic wiring board 806, the portion to be the third insulating layer 130 by firing is formed by printing an insulating paste layer. The member to be the frame 190 is pressed against the insulating paste layer after printing, thereby deforming the insulating paste layer. By this deformation, the curved surface can be formed.
Since the other configurations are substantially the same as those of embodiment 2 (fig. 19), the same or corresponding elements are denoted by the same reference numerals, and a description thereof will not be repeated. The configuration in which the third insulating layer 130 is provided between the base PB and the frame 190 is not limited to embodiment 2, and may be applied to other embodiments. In embodiment 1 (fig. 16), when a green sheet having a predetermined shape is stacked on the unfired base PBp as the unfired frame 190p, part of the first insulating paste layer 110p may be deformed to form the curved surface. In this case, the same effect as that of the third insulating layer 130 can be obtained.
According to the present embodiment, by providing the inner wall surface SW by the third insulating layer 130, the curvature of the corner portion between the upper surface (the surface facing the space CV) of the base PB and the inner wall surface SW of the frame 190 is made gentle. This can suppress the occurrence of cracks at the bottom of the space CV from the corner formed between the base PB and the frame 190.
In the above embodiments, the package, which is the ceramic wiring substrate having the frame portion 190, is described in detail, but the ceramic wiring substrate may not have the frame portion.
Although the present invention has been described in detail, the above description is illustrative in all aspects, and the present invention is not limited thereto. It is understood that numerous variations not illustrated can be devised without departing from the scope of the invention.
Description of the symbols
110: a first insulating layer
110 p: first insulating paste layer
111. 111 p: the first through hole part
112. 112p, 112 p: a first peripheral part
113. 113 p: first flat plate part
120: a second insulating layer
120 p: second insulating paste layer
120 t: insulating paste tape
121. 121V, 121 p: second through hole portion
122. 122V, 122 p: second peripheral part
123. 123p of: second flat plate part
130: a third insulating layer
140: insulating layer
190: frame part
190 p: unfired frame part
210: first conductor layer
210 p: first conductive paste layer
220: second conductor layer
220p, and (2): second conductive paste layer
230: third conductor layer
230 p: a third conductive paste layer
240: conductive layer
270: side conductor part
310: a first through conductor part
310 p: through conductor paste portion
320: second through conductor part
320p, and (3): through conductor paste portion
340: through conductor part
801-806: ceramic wiring board
900: electronic device
901: bonding layer
902: electronic component
906: bonding layer
907: cover body
CV: space(s)
MS: mounting surface
PB: base part
PBp: unfired base
S1-S6: first to sixth surfaces
And SE: inner end surface
And SS: support surface
SW: an inner wall surface.
Claims (15)
1. A ceramic wiring board having a mounting surface on which an electronic component is mounted, comprising:
a first insulating layer having a first surface and a second surface opposite to the first surface, and including a first through hole provided between the first surface and the second surface, a first peripheral portion provided around the first through hole, and a first flat plate portion provided around the first peripheral portion and having a flat plate shape with a first thickness;
a first through conductor portion provided in the first through hole portion of the first insulating layer;
a first conductor layer provided on the first surface of the first insulating layer and connected to the first through conductor portion; and
a second conductor layer provided on the second surface of the first insulating layer and connected to the first through conductor portion,
the first peripheral portion has, in at least one cross-sectional view, a thickness that continuously decreases in a direction from the first flat plate portion toward the first through hole portion, and a first width that is larger than the first thickness of the first flat plate portion.
2. The ceramic wiring substrate as claimed in claim 1,
the ceramic wiring board further includes a second insulating layer laminated on the first insulating layer, and the second insulating layer includes a second flat plate portion having a flat plate shape with a second thickness larger than the first thickness.
3. The ceramic wiring substrate according to claim 2,
the first insulating layer and the second insulating layer have the same composition.
4. The ceramic wiring substrate as claimed in claim 2 or 3,
the second insulating layer includes a second through hole portion and a second peripheral portion provided around the second through hole portion, the second flat plate portion is provided around the second peripheral portion, a width of the first through hole portion is smaller than a width of the second through hole portion,
the ceramic wiring board further includes a second through conductor portion provided in the second through hole portion of the second insulating layer and connected to the first conductor layer,
the second peripheral portion has, in at least one cross-sectional view, a thickness that continuously decreases in a direction from the second flat plate portion toward the second through hole portion, and a second width that is smaller than the second thickness of the second flat plate portion.
5. The ceramic wiring substrate as claimed in claim 2 or 3,
the ceramic wiring board further includes a side conductor portion provided on a side surface of the second insulating layer and connected to the first conductor layer.
6. The ceramic wiring substrate according to any one of claims 2 to 5,
the first insulating layer is disposed between the mounting surface and the second insulating layer.
7. The ceramic wiring substrate according to any one of claims 1 to 6,
the second conductor layer on the first insulating layer constitutes the mounting surface.
8. The ceramic wiring substrate as claimed in any one of claims 1 to 7,
the first peripheral portion of the first insulating layer has parallel inner surfaces facing the first through hole portion and extending in parallel in a thickness direction, the parallel inner surfaces having a dimension in the thickness direction smaller than one fifth of the first thickness.
9. The ceramic wiring substrate according to any one of claims 1 to 8,
the first surface and the second surface each have a surface inclined toward the first through-hole portion side in the first peripheral portion.
10. The ceramic wiring substrate according to any one of claims 1 to 9,
the first thickness is 5 [ mu ] m or more and 40 [ mu ] m or less.
11. The ceramic wiring substrate according to any one of claims 1 to 10,
the first through conductor portion and the first and second conductor layers have the same composition.
12. The ceramic wiring substrate according to any one of claims 1 to 11,
a base portion having the mounting surface is formed in the ceramic wiring substrate,
the ceramic wiring substrate further includes:
a frame portion supported by the base portion and having an inner wall surface facing a space on the mounting surface of the base portion; and
and a third insulating layer provided on the base portion and having a support surface that supports the frame portion and an inner end surface that faces a space on the mounting surface of the base portion and is inclined from the inner wall surface of the frame portion.
13. A method for manufacturing a ceramic wiring substrate, comprising the steps of:
a step of forming a first insulating paste layer by a printing method, the first insulating paste layer having a first surface and a second surface opposite to the first surface, and including a first through-hole provided between the first surface and the second surface;
forming a penetrating conductor paste portion in the first through hole portion of the first insulating paste layer; and
and a step of firing the first insulating paste layer and the through conductor paste portion.
14. The method of manufacturing a ceramic wiring substrate according to claim 13,
the method for manufacturing a ceramic wiring substrate further comprises the steps of:
forming a second insulating paste layer; and
a step of forming a first conductive paste layer on the second insulating paste layer,
the step of forming the first insulating paste layer is performed on the second insulating paste layer provided with the first conductive paste layer,
the step of forming the through conductor paste portion includes a step of applying a conductor paste on the second surface of the first insulating paste layer,
the step of applying the conductor paste forms a second conductor paste layer on the second surface of the first insulation paste layer, and the penetrating conductor paste portion is formed by the conductor paste penetrating into the first penetrating hole portion and reaching the first conductor paste layer.
15. The method for manufacturing a ceramic wiring substrate according to claim 14,
the second insulating paste layer has a second through hole portion, the width of the first through hole portion is smaller than the width of the second through hole portion,
the step of forming the second insulating paste layer includes a step of forming the second through hole by a punching method.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2019213315A JP7449076B2 (en) | 2019-11-26 | 2019-11-26 | Ceramic wiring board manufacturing method |
| JP2019-213315 | 2019-11-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN112867228A true CN112867228A (en) | 2021-05-28 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010954233.0A Pending CN112867228A (en) | 2019-11-26 | 2020-09-11 | Ceramic wiring board and method for manufacturing ceramic wiring board |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JP7449076B2 (en) |
| CN (1) | CN112867228A (en) |
| TW (1) | TWI749872B (en) |
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| JPH0391291A (en) * | 1989-09-04 | 1991-04-16 | Toshiba Corp | Wiring board |
| TW201112906A (en) * | 2009-06-09 | 2011-04-01 | Ibiden Co Ltd | Double-sided circuit board and manufacturing method thereof |
| JP2016115795A (en) * | 2014-12-15 | 2016-06-23 | 京セラ株式会社 | Ceramic wiring board and electronic component mounting package |
| JP2017175095A (en) * | 2016-03-26 | 2017-09-28 | 日本カーバイド工業株式会社 | Laminated circuit board |
| JP2018018886A (en) * | 2016-07-26 | 2018-02-01 | 日本特殊陶業株式会社 | Mask and manufacturing method of wiring board |
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| JPH08125297A (en) * | 1994-10-21 | 1996-05-17 | Nippondenso Co Ltd | Through-hole double-sided board |
| JPH11289149A (en) * | 1998-04-06 | 1999-10-19 | Hitachi Ltd | Manufacturing device for thin electronic circuit component, and the thin electronic circuit component |
| US6211468B1 (en) * | 1998-08-12 | 2001-04-03 | 3M Innovative Properties Company | Flexible circuit with conductive vias having off-set axes |
| US6187418B1 (en) * | 1999-07-19 | 2001-02-13 | International Business Machines Corporation | Multilayer ceramic substrate with anchored pad |
| JP2002353160A (en) * | 2001-05-28 | 2002-12-06 | Murata Mfg Co Ltd | Circuit substrate and manufacturing method therefor |
| JP3998984B2 (en) * | 2002-01-18 | 2007-10-31 | 富士通株式会社 | Circuit board and manufacturing method thereof |
| JP4764718B2 (en) * | 2005-12-28 | 2011-09-07 | 新光電気工業株式会社 | Through-hole filling method |
| JP2012238837A (en) * | 2011-04-28 | 2012-12-06 | Maruwa Co Ltd | Ceramic green sheet with through holes and manufacturing method thereof and ceramic substrate obtained thereby |
| JP2012234897A (en) * | 2011-04-28 | 2012-11-29 | Panasonic Corp | Substrate, and electronic circuit module using the same |
| JP6870608B2 (en) * | 2015-02-23 | 2021-05-12 | 凸版印刷株式会社 | Printed wiring board and its manufacturing method |
| JP6408423B2 (en) | 2015-04-24 | 2018-10-17 | 京セラ株式会社 | Package and electronic equipment |
| JP7007882B2 (en) * | 2017-12-08 | 2022-01-25 | 新光電気工業株式会社 | Wiring board and its manufacturing method |
| JP2019186441A (en) | 2018-04-13 | 2019-10-24 | 日本特殊陶業株式会社 | Wiring board and manufacturing method of the same |
-
2019
- 2019-11-26 JP JP2019213315A patent/JP7449076B2/en active Active
-
2020
- 2020-09-11 CN CN202010954233.0A patent/CN112867228A/en active Pending
- 2020-11-16 TW TW109139837A patent/TWI749872B/en active
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JPH0391291A (en) * | 1989-09-04 | 1991-04-16 | Toshiba Corp | Wiring board |
| TW201112906A (en) * | 2009-06-09 | 2011-04-01 | Ibiden Co Ltd | Double-sided circuit board and manufacturing method thereof |
| JP2016115795A (en) * | 2014-12-15 | 2016-06-23 | 京セラ株式会社 | Ceramic wiring board and electronic component mounting package |
| JP2017175095A (en) * | 2016-03-26 | 2017-09-28 | 日本カーバイド工業株式会社 | Laminated circuit board |
| JP2018018886A (en) * | 2016-07-26 | 2018-02-01 | 日本特殊陶業株式会社 | Mask and manufacturing method of wiring board |
Also Published As
| Publication number | Publication date |
|---|---|
| TW202121945A (en) | 2021-06-01 |
| TWI749872B (en) | 2021-12-11 |
| JP7449076B2 (en) | 2024-03-13 |
| JP2021086880A (en) | 2021-06-03 |
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