JP2016115795A - Ceramic wiring board and electronic component mounting package - Google Patents

Ceramic wiring board and electronic component mounting package Download PDF

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JP2016115795A
JP2016115795A JP2014253102A JP2014253102A JP2016115795A JP 2016115795 A JP2016115795 A JP 2016115795A JP 2014253102 A JP2014253102 A JP 2014253102A JP 2014253102 A JP2014253102 A JP 2014253102A JP 2016115795 A JP2016115795 A JP 2016115795A
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conductor
wiring board
conductor layer
ceramic wiring
ceramic
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JP6495643B2 (en
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征憲 岡本
Masanori Okamoto
征憲 岡本
山元 泉太郎
Sentaro Yamamoto
泉太郎 山元
洋二 古久保
Yoji Furukubo
洋二 古久保
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Kyocera Corp
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Kyocera Corp
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Abstract

PROBLEM TO BE SOLVED: To provide a ceramic wiring board capable of suppressing occurrence of cracking on the joint surface of a conductor layer and a through conductor, and to provide an electronic component mounting package.SOLUTION: A conductor layer 3 is embedded in a ceramic insulation layer 1 while being exposed partially, when viewing the cross section in the thickness direction. When the exposed surface of the conductor layer 3 is a first surface 3a, and the surface on the through conductor 5 side is a second surface 3b, the width w1 of the first surface 3a is larger than the width w2 of the second surface 3b. The side surface 3s of the conductor layer 3 is an inclined plane 7 from the first surface 3a across the second surface 3b, and the angle formed by the inclined plane 7 and the side surface 5s of the through conductor 5 is larger than 90°. The inclined plane 7 is a concave curved surface.SELECTED DRAWING: Figure 1

Description

本発明は、セラミック配線基板および電子部品実装パッケージに関する。   The present invention relates to a ceramic wiring board and an electronic component mounting package.

従来より、半導体素子や水晶振動子などの電子部品を搭載する配線基板として、セラミック配線基板が多用されている。   Conventionally, ceramic wiring boards have been widely used as wiring boards on which electronic components such as semiconductor elements and crystal resonators are mounted.

図7(a)は、従来のセラミック配線基板を示す断面模式図であり、(b)は、(a)の導体層および貫通導体を抜き出した模式図である。図7に示すように、セラミック配線基板100は、一般に、セラミック絶縁層101と、この表面に設けられた導体層103と、導体層103と接合され、セラミック絶縁層101を厚み方向に貫通するように設けられた貫通導体105と、を有する構成を基本としている。   FIG. 7A is a schematic cross-sectional view showing a conventional ceramic wiring board, and FIG. 7B is a schematic view in which the conductor layer and the through conductor of FIG. As shown in FIG. 7, the ceramic wiring board 100 is generally bonded to the ceramic insulating layer 101, the conductor layer 103 provided on the surface, and the conductor layer 103 so as to penetrate the ceramic insulating layer 101 in the thickness direction. And a through conductor 105 provided in the base.

セラミック配線基板100は、近年、携帯電話に代表される移動端末装置の小型化および高機能化に伴い、さらなる小型化が要求されており、このためセラミック配線基板100の表面や内部に形成される導体層103および貫通導体105についても、さらなる微細化が検討されている。   In recent years, with the miniaturization and high functionality of mobile terminal devices typified by mobile phones, the ceramic wiring substrate 100 has been required to be further miniaturized. For this reason, the ceramic wiring substrate 100 is formed on the surface or inside of the ceramic wiring substrate 100. Further miniaturization of the conductor layer 103 and the through conductor 105 is also being studied.

特開2001−15895号公報Japanese Patent Laid-Open No. 2001-15895

図7(a)(b)に示すセラミック配線基板100は、導体層103と貫通導体105との接合面S付近で幅がwからwへ急激に変化する形状である。このようなセラミック配線基板100を厚み方向に断面視したときに、導体層103のセラミック絶縁層101の内部側(貫通導体105側)の表面103sと貫通導体105の側面105sとが接した部分(以下、角部106という。)は接触角がほぼ直角であり、曲率半径Rが限りなく0に近い構造である。このため、セラミック配線基板100に急激な熱衝撃が加わり熱応力が発生した場合には、導体層103と貫通導体105との角部106に応力集中(矢印Scで示している)が起こりやすく、接合面S付近にクラックが入りやすいという問題がある。 The ceramic wiring substrate 100 shown in FIGS. 7A and 7B has a shape in which the width changes abruptly from w 4 to w 5 in the vicinity of the joint surface S between the conductor layer 103 and the through conductor 105. When such a ceramic wiring substrate 100 is viewed in a cross section in the thickness direction, a portion (surface 105s on the inner side (through conductor 105 side) of the ceramic insulating layer 101 of the conductor layer 103 is in contact with the side surface 105s of the through conductor 105 ( Hereinafter, the corner portion 106) has a structure in which the contact angle is almost a right angle and the radius of curvature R is as close to 0 as possible. For this reason, when a sudden thermal shock is applied to the ceramic wiring substrate 100 and a thermal stress is generated, stress concentration (indicated by the arrow Sc) is likely to occur at the corner portion 106 between the conductor layer 103 and the through conductor 105, There is a problem that cracks are likely to occur near the joint surface S.

従って、本発明は、上記課題に鑑み案出されたものであり、その目的は、導体層と貫通導体との間の接合面でのクラックの発生を抑えることのできるセラミック配線基板および電子部品実装パッケージを提供することである。   Accordingly, the present invention has been devised in view of the above problems, and the object thereof is to mount a ceramic wiring board and an electronic component capable of suppressing the occurrence of cracks at the joint surface between the conductor layer and the through conductor. Is to provide a package.

本発明のセラミック配線基板は、セラミック絶縁層と、該セラミック絶縁層を厚み方向に貫通するように設けられた貫通導体と、該貫通導体の前記厚み方向の端面に接合してなる導体層と、を備えているセラミック配線基板であって、前記導体層は、厚み方向に断面視したときに、一部が露出した状態で前記セラミック絶縁層に埋まっており、前記導体層の露出した表面を第1面、前記貫通導体側の表面を第2面としたときに、前記第1面の幅が前記第2面の幅よりも大きくなっているとともに、前記導体層の側面が前記第1面側から前記第2面側にかけて傾斜面とされ、該傾斜面と前記貫通導体の側面との角度が90°よりも大きい。   The ceramic wiring board of the present invention includes a ceramic insulating layer, a through conductor provided so as to penetrate the ceramic insulating layer in the thickness direction, and a conductor layer bonded to the end face in the thickness direction of the through conductor; The conductor layer is embedded in the ceramic insulating layer in a partially exposed state when viewed in cross-section in the thickness direction, and the exposed surface of the conductor layer is 1 surface, when the surface on the through conductor side is the second surface, the width of the first surface is larger than the width of the second surface, and the side surface of the conductor layer is the first surface side To the second surface side, and the angle between the inclined surface and the side surface of the through conductor is greater than 90 °.

本発明の電子部品搭載パッケージは、上記のセラミック配線基板の前記導体層上に電子部品が配置されている。   In the electronic component mounting package of the present invention, the electronic component is disposed on the conductor layer of the ceramic wiring board.

本発明によれば、導体層と貫通導体との間の接合面でのクラックの発生を抑えることができる。   According to the present invention, the occurrence of cracks at the joint surface between the conductor layer and the through conductor can be suppressed.

(a)は、本発明のセラミック配線基板の第1の実施形態を模式的に示す斜視図であり、(b)は、(a)のA−A線断面図であり、(c)は、(b)の導体層および貫通導体を抜き出した模式図である。(A) is a perspective view which shows typically 1st Embodiment of the ceramic wiring board of this invention, (b) is the sectional view on the AA line of (a), (c), It is the schematic diagram which extracted the conductor layer and through-conductor of (b). (a)は、第2の実施形態のセラミック配線基板を示す断面模式図であり、(b)は、(a)の導体層および貫通導体を抜き出した模式図である。(A) is a cross-sectional schematic diagram which shows the ceramic wiring board of 2nd Embodiment, (b) is the schematic diagram which extracted the conductor layer and penetration conductor of (a). (a)は、第3の実施形態のセラミック配線基板を示す断面模式図であり、(b)は、(a)の導体層および貫通導体を抜き出した模式図である。(A) is a cross-sectional schematic diagram which shows the ceramic wiring board of 3rd Embodiment, (b) is the schematic diagram which extracted the conductor layer and penetration conductor of (a). (a)は、第4の実施形態のセラミック配線基板を模式的に示す斜視図であり、(b)は、(a)のB−B線断面図である。(A) is a perspective view which shows typically the ceramic wiring board of 4th Embodiment, (b) is the BB sectional drawing of (a). 本発明の電子部品実装パッケージの一実施形態を示す断面模式図である。It is a cross-sectional schematic diagram which shows one Embodiment of the electronic component mounting package of this invention. 第1の実施形態のセラミック配線基板の製造工程を示す模式図である。It is a schematic diagram which shows the manufacturing process of the ceramic wiring board of 1st Embodiment. (a)は、従来のセラミック配線基板を示す断面模式図であり、(b)は、(a)の導体層および貫通導体を抜き出した模式図である。(A) is a cross-sectional schematic diagram which shows the conventional ceramic wiring board, (b) is the schematic diagram which extracted the conductor layer and penetration conductor of (a).

図1(a)は、本発明のセラミック配線基板の第1の実施形態を模式的に示す斜視図であり、(b)は、(a)のA−A線断面図であり、(c)は、(b)の導体層および貫通導体を抜き出した模式図である。   FIG. 1A is a perspective view schematically showing a first embodiment of the ceramic wiring board of the present invention, FIG. 1B is a sectional view taken along line AA in FIG. FIG. 4 is a schematic view of the conductor layer and the through conductor extracted from (b).

第1の実施形態のセラミック配線基板は、平板上のセラミック絶縁層1を基体とし、基体であるセラミック絶縁層1の表面1aに複数の円板状の導体層3が離間されて設けられている。セラミック絶縁層1は、その内部に、セラミック絶縁層1を厚み方向に貫通するように設けられた円柱状の貫通導体5を有している。貫通導体5はセラミック絶縁層1の表面1aに設けられた導体層3とセラミック絶縁層1の表面1a付近で接合されている。   The ceramic wiring board of the first embodiment has a ceramic insulating layer 1 on a flat plate as a base, and a plurality of disk-like conductor layers 3 are provided on the surface 1a of the ceramic insulating layer 1 as a base so as to be spaced apart. . The ceramic insulating layer 1 has a columnar through conductor 5 provided therein so as to penetrate the ceramic insulating layer 1 in the thickness direction. The through conductor 5 is joined to the conductor layer 3 provided on the surface 1 a of the ceramic insulating layer 1 in the vicinity of the surface 1 a of the ceramic insulating layer 1.

この場合、導体層3は、セラミック絶縁層1を厚み方向に断面視したときに、その一部が露出した状態でセラミック絶縁層1に埋まった状態にある。   In this case, the conductor layer 3 is embedded in the ceramic insulating layer 1 with a part thereof exposed when the ceramic insulating layer 1 is viewed in cross section in the thickness direction.

また、この導体層3について、セラミック絶縁層1の表面1a側の表面(露出した表面)を第1面3a、セラミック絶縁層1の内部側の表面(貫通導体5側の表面)を第2面3bとすると、導体層3の第1面3aの幅w(または直径D)が貫通導体5側の第2面3bの幅w(直径D)よりも大きくなっている。 Further, regarding the conductor layer 3, the surface (exposed surface) on the surface 1a side of the ceramic insulating layer 1 is the first surface 3a, and the surface on the inner side of the ceramic insulating layer 1 (surface on the through conductor 5) is the second surface. 3b, the width w 1 (or diameter D 1 ) of the first surface 3a of the conductor layer 3 is larger than the width w 2 (diameter D 2 ) of the second surface 3b on the through conductor 5 side.

また、導体層3の側面3sは、第1面3a側から第2面3b側に向けて、貫通導体5の側面5sとの間で傾斜した面(以下、傾斜面7という場合がある。)となっている。このとき、導体層3の側面3s(傾斜面7)と貫通導体5の側面5aとの角度は90°よりも大きい。   Further, the side surface 3s of the conductor layer 3 is a surface that is inclined with respect to the side surface 5s of the through conductor 5 from the first surface 3a side to the second surface 3b side (hereinafter may be referred to as an inclined surface 7). It has become. At this time, the angle between the side surface 3s (inclined surface 7) of the conductor layer 3 and the side surface 5a of the through conductor 5 is greater than 90 °.

第1の実施形態のセラミック配線基板は、導体層と貫通導体の側面との接した部分の接触角がほぼ直角であるような図7(a)(b)に示した従来のセラミック配線基板に比べて、導体層3の側面3sと貫通導体5の側面5sとの間の角度が大きくなっている。   The ceramic wiring board according to the first embodiment is different from the conventional ceramic wiring board shown in FIGS. 7A and 7B in which the contact angle of the portion where the conductor layer and the side surface of the through conductor are in contact with each other is almost right. In comparison, the angle between the side surface 3s of the conductor layer 3 and the side surface 5s of the through conductor 5 is large.

このような構成によれば、セラミック配線基板に急激な熱衝撃が加わり、熱応力が発生し、接合面S付近に応力Scが集中するような場合でも、その集中した応力Scは、導体層3および貫通導体5の内部において、図1(c)に示すように、例えば、断面視で平行四辺形を形成する辺a、辺aおよび辺aの方向に分散されることになる。このように応力Scが接合面S付近で分散されるためクラックの発生を抑えることができる。 According to such a configuration, even when a sudden thermal shock is applied to the ceramic wiring substrate, a thermal stress is generated, and the stress Sc is concentrated in the vicinity of the joint surface S, the concentrated stress Sc is applied to the conductor layer 3. In addition, in the inside of the through conductor 5, as shown in FIG. 1C, for example, it is dispersed in the directions of the side a 1 , the side a 2, and the side a 3 that form a parallelogram in a sectional view. Thus, since the stress Sc is dispersed in the vicinity of the joint surface S, generation of cracks can be suppressed.

ここで、接合面S付近とは、導体層3の側面3s(傾斜面7)と貫通導体5の側面5sとが交わる部分から上下に±10μm以内の領域が目安になる。また、導体層3の側面3s(傾斜面7)と貫通導体5の側面5aとの角度θとしては、導体層3の第1面3aの幅w(直径D)が第2面3bの幅w(D)よりも大きくなる角度θを有していれば良く、例えば、100°〜160°が望ましい。 Here, the vicinity of the bonding surface S is a region within ± 10 μm vertically from the portion where the side surface 3s (inclined surface 7) of the conductor layer 3 and the side surface 5s of the through conductor 5 intersect. In addition, the angle θ between the side surface 3s (inclined surface 7) of the conductor layer 3 and the side surface 5a of the through conductor 5 is such that the width w 1 (diameter D 1 ) of the first surface 3a of the conductor layer 3 is the second surface 3b. width w 2 (D 2) only to have a made angle θ larger than, for example, is preferable 100 ° to 160 °.

図2(a)は、第2の実施形態のセラミック配線基板を示す断面模式図であり、(b)は、(a)の導体層および貫通導体を抜き出した模式図である。第2の実施形態のセラミック配線基板の外観形状は、図1に示したセラミック配線基板と同様であるため省略した。   FIG. 2A is a schematic cross-sectional view showing the ceramic wiring board of the second embodiment, and FIG. 2B is a schematic view of the conductor layer and the through conductor in FIG. The appearance of the ceramic wiring board of the second embodiment is omitted because it is the same as the ceramic wiring board shown in FIG.

第2の実施形態のセラミック配線基板は、図2(a)(b)に示すように、導体層3の側面3sが、導体層3の表面である第1面3a側から貫通導体5との接合面S側の表面である第2面3bにかけて凹状の曲面を成す形状である。この場合、導体層3の側面3sは貫通導体5の側面5sにかけて滑らかな曲面を有している。   In the ceramic wiring board of the second embodiment, as shown in FIGS. 2A and 2B, the side surface 3 s of the conductor layer 3 is connected to the through conductor 5 from the first surface 3 a side which is the surface of the conductor layer 3. It is a shape which forms a concave curved surface over the 2nd surface 3b which is the surface by the side of the joining surface S. In this case, the side surface 3s of the conductor layer 3 has a smooth curved surface over the side surface 5s of the through conductor 5.

導体層3の側面3sが凹状の曲面を有し、さらに貫通導体5の側面5sにかけて連続した曲面を成す形状であると、導体層3の側面3sと貫通導体5の側面5sとの間で図1(a)(b)(c)に示すセラミック配線基板の場合とは異なり、導体層3の側面3sと貫通導体5の側面5sとの間で角度θを有しない形状となる。これにより接合面S付近においても湾曲した側面3sにおいて無数の法線方向に応力が分散されるため、導体層3と貫通導体5との接合面S付近における応力Scをより分散させることができる。その結果、クラックの発生をより抑制することができる。   When the side surface 3 s of the conductor layer 3 has a concave curved surface and has a shape that forms a continuous curved surface over the side surface 5 s of the through conductor 5, it is between the side surface 3 s of the conductor layer 3 and the side surface 5 s of the through conductor 5. Unlike the ceramic wiring substrate shown in 1 (a), (b), and (c), the shape does not have an angle θ between the side surface 3s of the conductor layer 3 and the side surface 5s of the through conductor 5. As a result, stress is distributed in innumerable normal directions on the curved side surface 3s even in the vicinity of the joint surface S, so that the stress Sc in the vicinity of the joint surface S between the conductor layer 3 and the through conductor 5 can be further dispersed. As a result, the occurrence of cracks can be further suppressed.

この場合、導体層3の側面3sの曲面の曲率半径Rとしては、少なくとも導体層3の第1面3a側の幅w(直径D)が貫通導体5の直径Dよりも大きくなる凹状の曲面を有するものであれば良く、セラミック配線基板に形成された導体層3のサイズによって変化するが、後述する具体例のセラミック配線基板の場合には、例えば、5〜30μm、特に、7〜25μmであることが望ましい。 In this case, the curvature radius R of the curved surface of the side surface 3 s of the conductor layer 3 is a concave shape in which at least the width w 1 (diameter D 1 ) on the first surface 3 a side of the conductor layer 3 is larger than the diameter D 3 of the through conductor 5. However, in the case of a ceramic wiring board of a specific example described later, for example, 5 to 30 μm, particularly 7 to It is desirable to be 25 μm.

図3(a)は、第3の実施形態のセラミック配線基板を示す断面模式図であり、(b)は、(a)の導体層および貫通導体を抜き出した模式図である。第3の実施形態のセラミック配線基板についても、その外観形状は、図1に示したセラミック配線基板と同様であるため省略した。   FIG. 3A is a schematic cross-sectional view showing the ceramic wiring board of the third embodiment, and FIG. 3B is a schematic view of the conductor layer and the through conductor in FIG. The external shape of the ceramic wiring board of the third embodiment is omitted because it is the same as the ceramic wiring board shown in FIG.

第3の実施形態のセラミック配線基板は、貫通導体5の側面5sが、導体層3の側面3sに続いて曲面を有する形状となっている。例えば、図3(a)(b)に示すように、貫通導体5はセラミック配線基板の厚み方向の中央部5cにおける幅w(直径D)が導体層3との接合面Sとなっている端面5b(導体層3の第2面3bの幅w(直径D))よりも大きくなっている。この場合、導体層3の側面3sから貫通導体5の中央部5cまでの側面5sが連続した曲面となっている。 In the ceramic wiring board of the third embodiment, the side surface 5s of the through conductor 5 has a curved surface following the side surface 3s of the conductor layer 3. For example, as shown in FIGS. 3A and 3B, in the through conductor 5, the width w 3 (diameter D 3 ) at the central portion 5 c in the thickness direction of the ceramic wiring board is a bonding surface S with the conductor layer 3. It is larger than the end face 5b (the width w 2 (diameter D 2 ) of the second face 3b of the conductor layer 3). In this case, the side surface 5s from the side surface 3s of the conductor layer 3 to the central portion 5c of the through conductor 5 is a continuous curved surface.

導体層3から貫通導体5までの側面3s、側面5sが、上述のような曲面を有する構造
であると、上層側の導体層3から貫通導体5を介した下層側の導体層3に至る範囲において、これらの導体層3の幅w(直径D)、幅w(直径D)および貫通導体5の幅w(直径D)が変化する境界をさらに緩やかにすることができる。これにより導体層3と貫通導体5との接合面S付近のみならず、接合面S付近の貫通導体5側に応力集中が及ぶ場合にもその応力集中をさらに緩和することができる。これによりクラックの発生をさらに抑制することが可能になる。
When the side surface 3s and the side surface 5s from the conductor layer 3 to the through conductor 5 have a curved surface as described above, the range from the upper conductor layer 3 to the lower conductor layer 3 via the through conductor 5 , The boundary where the width w 1 (diameter D 1 ), the width w 2 (diameter D 2 ) of the conductor layer 3 and the width w 3 (diameter D 3 ) of the through conductor 5 change can be further relaxed. . As a result, not only the vicinity of the joint surface S between the conductor layer 3 and the through conductor 5 but also the stress concentration on the side of the through conductor 5 near the joint surface S can be further relaxed. This makes it possible to further suppress the occurrence of cracks.

図4(a)は、第4の実施形態のセラミック配線基板を模式的に示す斜視図であり、(b)は、(a)のB−B線断面図である。第1〜第3の実施形態のセラミック配線基板は、上記したセラミック絶縁層1の周縁部1bに枠体9が設けられた構造にも適用することができる。   FIG. 4A is a perspective view schematically showing a ceramic wiring board according to the fourth embodiment, and FIG. 4B is a cross-sectional view taken along line BB in FIG. The ceramic wiring boards of the first to third embodiments can be applied to a structure in which the frame body 9 is provided on the peripheral edge portion 1b of the ceramic insulating layer 1 described above.

図4(a)(b)では、セラミック配線基板が加熱された際に、セラミック絶縁層1および枠体9が熱膨張する方向を矢印a、aとして示している。この場合、熱膨張する方向がセラミック配線基板の外側に向く矢印をaとし、セラミック配線基板の内側に向く矢印をaとして表している。図4(a)に示すように、セラミック配線基板が加熱された場合には、セラミック絶縁層1は導体層3および貫通導体5を含め中実体であるため、熱膨張は外側のみに向くが、枠体9は導体層3の設けられている電子部品の搭載領域1c側に空間を有することから、枠体9の内壁側に向けた方向にも熱膨張する。このため、枠体9に発生する熱膨張の方向とセラミック絶縁層1に発生する熱膨張の方向とは反対の向きとなる。 4A and 4B, arrows a 4 and a 5 indicate directions in which the ceramic insulating layer 1 and the frame body 9 thermally expand when the ceramic wiring board is heated. In this case, the arrow direction of thermal expansion faces the outside of the ceramic wiring board and a 4, represents the arrow facing the inside of the ceramic wiring board as a 5. As shown in FIG. 4 (a), when the ceramic wiring substrate is heated, the ceramic insulating layer 1 is solid including the conductor layer 3 and the through conductor 5, so that the thermal expansion is directed only to the outside. Since the frame body 9 has a space on the electronic component mounting area 1c side where the conductor layer 3 is provided, the frame body 9 also thermally expands in the direction toward the inner wall side of the frame body 9. For this reason, the direction of thermal expansion occurring in the frame body 9 is opposite to the direction of thermal expansion occurring in the ceramic insulating layer 1.

その結果、枠体9はセラミック絶縁層1に対して熱膨張を拘束するように作用することになるため、図4に示した第4の実施形態のセラミック配線基板は、上記した枠体9を有しない平板型のセラミック配線基板に比較して、電子部品の搭載領域1c内に設けられた導体層3と貫通導体5との接合部S付近は熱膨張に起因する熱応力が高くなる。   As a result, the frame body 9 acts to restrain thermal expansion with respect to the ceramic insulating layer 1, and therefore the ceramic wiring board of the fourth embodiment shown in FIG. Compared to a flat-type ceramic wiring substrate that does not have, the thermal stress due to thermal expansion is higher in the vicinity of the junction S between the conductor layer 3 and the through conductor 5 provided in the mounting region 1c of the electronic component.

これに対し、第4の実施形態のセラミック配線基板では、導体層3の側面3sと貫通導体5の側面5sとの間の角度θが90°よりも大きくなっていることから、接合面S付近における応力Scを分散させることができる。   On the other hand, in the ceramic wiring board of the fourth embodiment, the angle θ between the side surface 3s of the conductor layer 3 and the side surface 5s of the through conductor 5 is larger than 90 °. The stress Sc in can be dispersed.

こうして、セラミック絶縁層1の電子部品の搭載領域1cを囲む周縁部1bに枠体9を有する構造の場合にも導体層3と貫通導体5との間の接合面S付近にクラックが発生するのを抑制することができる。   In this way, cracks are also generated in the vicinity of the joint surface S between the conductor layer 3 and the through conductor 5 even in the case of the structure having the frame body 9 on the peripheral edge 1b surrounding the electronic component mounting region 1c of the ceramic insulating layer 1. Can be suppressed.

ここでは、枠体9を備えたセラック配線基板について、第1の実施形態のセラミック配線基板に枠体9を設けた例を示して説明したが、枠体9を備えた構造については、第2および第3の実施形態のセラミック配線基板に枠体9を設けた構造でも同様の効果を得ることができる。   Here, the shellac wiring board provided with the frame body 9 has been described with reference to an example in which the frame body 9 is provided on the ceramic wiring board of the first embodiment. The same effect can be obtained with the structure in which the frame body 9 is provided on the ceramic wiring board of the third embodiment.

また、上記した第1〜4の本実施形態のセラミック配線基板では、導体層3(第1面3a)はセラミック絶縁層1の表面1aに面一となるように埋設されていることが望ましい。導体層3(第1面3a)がセラミック絶縁層1の表面1aに面一となるように埋設されている状態であると、導体層3と貫通導体5との接合面S付近の熱変形(収縮、膨張)が
セラミック絶縁層1に拘束されやすくなるため、接合面S付近におけるセラミック絶縁層1と、導体層3および貫通導体5である金属部材との間の熱変形による収縮量の差(または膨張量の差)を小さくすることができる。これにより接合面S付近におけるクラックの発生をさらに抑制することができる。
In the ceramic wiring boards of the first to fourth embodiments described above, it is desirable that the conductor layer 3 (first surface 3 a) is embedded so as to be flush with the surface 1 a of the ceramic insulating layer 1. When the conductor layer 3 (first surface 3a) is embedded in the surface 1a of the ceramic insulating layer 1 so as to be flush with each other, thermal deformation in the vicinity of the joint surface S between the conductor layer 3 and the through conductor 5 ( (Shrinkage and expansion) are easily constrained by the ceramic insulating layer 1, so that the difference in shrinkage due to thermal deformation between the ceramic insulating layer 1 in the vicinity of the joint surface S and the metal member which is the conductor layer 3 and the through conductor 5 ( Alternatively, the difference in expansion amount can be reduced. Thereby, generation | occurrence | production of the crack in the joint surface S vicinity can be suppressed further.

セラミック配線基板のサイズとしては、セラミック絶縁層1の面積が0.5〜5mm
、平均厚みが0.05〜1mmであり、枠体9の高さが0.25〜1.0mm、枠体9の平均厚みが0.05〜0.15mmと、セラミック絶縁層1および枠体部9の厚みが薄い小型の電子部品実装パッケージを構成する配線基板に適したものとなる。
As the size of the ceramic wiring board, the area of the ceramic insulating layer 1 is 0.5 to 5 mm 2.
The average thickness is 0.05 to 1 mm, the height of the frame 9 is 0.25 to 1.0 mm, the average thickness of the frame 9 is 0.05 to 0.15 mm, the ceramic insulating layer 1 and the frame The portion 9 is suitable for a wiring board constituting a small electronic component mounting package with a small thickness.

つまり、電子部品実装パッケージの外形のサイズ(体積)としては10mm以下が好ましく、さらには、枠体9の上面に蓋体が設けられて、蓋体とセラミック配線基板との熱膨張差が大きい構造の場合にさらに好適なものとなる。 That is, the size (volume) of the outer shape of the electronic component mounting package is preferably 10 mm 3 or less, and further, a lid is provided on the upper surface of the frame body 9 so that the thermal expansion difference between the lid and the ceramic wiring board is large. In the case of a structure, it becomes more suitable.

図5は、本発明の電子部品実装パッケージの一実施形態を示す断面模式図である。図5に示す電子部品実装パッケージ(以下、符号Bを付す。)は、セラミック配線基板(以下、符号Aを付す。)として、上記した第4の実施形態のセラミック配線基板Aを適用した例である。この電子部品実装パッケージBは搭載面1cに電子部品11が実装されており、さらに枠体9の上面に蓋体13が接着されている。   FIG. 5 is a schematic cross-sectional view showing an embodiment of the electronic component mounting package of the present invention. The electronic component mounting package shown in FIG. 5 (hereinafter referred to as “B”) is an example in which the ceramic wiring substrate A of the above-described fourth embodiment is applied as a ceramic wiring substrate (hereinafter referred to as “A”). is there. In this electronic component mounting package B, the electronic component 11 is mounted on the mounting surface 1 c, and the lid body 13 is bonded to the upper surface of the frame body 9.

本実施形態の電子部品実装パッケージBによれば、第4の実施形態のセラミック配線基板Aの構造に基づき、導体層3と貫通導体5との間の接合面S付近におけるクラックの発生を抑えることが可能となり、これにより電子部品11の作動安定性の高い電子部品実装パッケージBを得ることができる。   According to the electronic component mounting package B of the present embodiment, the generation of cracks in the vicinity of the joint surface S between the conductor layer 3 and the through conductor 5 is suppressed based on the structure of the ceramic wiring board A of the fourth embodiment. Accordingly, the electronic component mounting package B with high operational stability of the electronic component 11 can be obtained.

作製したセラミック配線基板Aおよび電子部品実装パッケージBを構成する導体層3および貫通導体5の形状等については、セラミック配線基板Aおよび電子部品実装パッケージBの断面を観察した写真から判定する。   The shapes of the conductor layer 3 and the through conductor 5 constituting the produced ceramic wiring board A and the electronic component mounting package B are determined from photographs obtained by observing cross sections of the ceramic wiring board A and the electronic component mounting package B.

セラミック絶縁層1および枠体9は、高い熱伝導性を有し、かつ高強度であるという点でアルミナを主成分とし、これにSiおよびMgなどの添加剤を含有するものが望ましい。導体層3および貫通導体5の材料としては、モリブデン(Mo)、タングステン(W)と銅(Cu)との複合金属などが好適である。蓋体13としては、種々のセラミック材料や金属材料を適用することが可能であるが、セラミック絶縁層1にアルミナを適用したときに好適な材料としてコバール(Fe-Ni-Co)を挙げることができる。   The ceramic insulating layer 1 and the frame body 9 are preferably made of alumina as a main component and having additives such as Si and Mg in view of high thermal conductivity and high strength. As the material of the conductor layer 3 and the through conductor 5, molybdenum (Mo), a composite metal of tungsten (W) and copper (Cu), or the like is preferable. As the lid 13, various ceramic materials and metal materials can be applied, and Kovar (Fe—Ni—Co) is a preferable material when alumina is applied to the ceramic insulating layer 1. it can.

次に、本実施形態のセラミック配線基板および電子部品実装パッケージの製造方法について説明する。図6は、第1の実施形態のセラミック配線基板の製造工程を示す模式図である。   Next, a method for manufacturing the ceramic wiring board and the electronic component mounting package of the present embodiment will be described. FIG. 6 is a schematic view showing a manufacturing process of the ceramic wiring board according to the first embodiment.

まず、セラミック絶縁層1を形成するためのシート状成形体21を作製する。その組成は、例えば、Al粉末を主成分とし、これにSiO粉末およびMgO粉末を所定量添加した混合粉末を用いる。 First, a sheet-like molded body 21 for forming the ceramic insulating layer 1 is produced. The composition is, for example, a mixed powder in which Al 2 O 3 powder is a main component and a predetermined amount of SiO 2 powder and MgO powder is added thereto.

次に、この混合粉末に対して、有機バインダーを溶媒とともに添加してスラリーや混練物を調製した後、これをプレス法、ドクターブレード法、圧延法、射出法などの成形方法を用いてシート状成形体21を形成する。   Next, an organic binder is added to the mixed powder together with a solvent to prepare a slurry or a kneaded product, which is then formed into a sheet using a molding method such as a press method, a doctor blade method, a rolling method, or an injection method. Formed body 21 is formed.

次に、図6(a)に示すように、シート状成形体21の表面に、導体層3となるパッドパターン23および貫通導体5となるビアパターン25を形成してパターンシート26を形成する。この場合、パッドパターン23およびビアパターン25はシート状成形体21の表面に印刷などにより直接形成しても良いが、パッドパターン23およびビアパターン25を予め別のフィルム27上に形成し、パッドパターン23およびビアパターン25の付いた方のフィルム27面をシート状成形体21の表面に転写する方法を用いても良い。   Next, as shown in FIG. 6A, a pattern sheet 26 is formed by forming a pad pattern 23 to be the conductor layer 3 and a via pattern 25 to be the through conductor 5 on the surface of the sheet-like molded body 21. In this case, the pad pattern 23 and the via pattern 25 may be directly formed on the surface of the sheet-like molded body 21 by printing or the like. However, the pad pattern 23 and the via pattern 25 are formed on another film 27 in advance, Alternatively, a method of transferring the surface of the film 27 having the surface 23 and the via pattern 25 to the surface of the sheet-like molded body 21 may be used.

シート状成形体21の主成分がアルミナである場合には、導体ペーストとしては、同時
焼成を可能にするという点で、モリブデン(Mo)を主成分とする金属材料か、または銅(Cu)とタングステン(W)との複合金属を主成分とするものが適している。
When the main component of the sheet-like molded body 21 is alumina, the conductor paste is a metal material containing molybdenum (Mo) as a main component or copper (Cu) in terms of enabling simultaneous firing. What has a composite metal with tungsten (W) as a main component is suitable.

次に、図6(b)に示すように、一方の面に凹部を有する外側金型29aと凹部に嵌る内側金型29bとを用意し、この一組の金型29a、29bを用いて、作製したパターンシート26をプレス成形する。こうして、図6(c)に示すような成形体31を作製することができる。   Next, as shown in FIG. 6B, an outer mold 29a having a recess on one surface and an inner mold 29b that fits into the recess are prepared, and using this set of molds 29a and 29b, The produced pattern sheet 26 is press-molded. In this way, a molded body 31 as shown in FIG. 6C can be manufactured.

第1〜第4の実施形態のセラミック配線基板に形成される導体層3および貫通導体5の形状は、以下のような条件により形成される。   The shapes of the conductor layer 3 and the through conductor 5 formed on the ceramic wiring boards of the first to fourth embodiments are formed under the following conditions.

シート状成形体21は、後述するプレス成形において変形性が高いことが必要なため、弾性率の低いものが望ましい。例えば、70℃における貯蔵弾性率が10〜50MPaの範囲にあるものが良い。シート状成形体21の貯蔵弾性率は、レオメータによって、温度25〜125℃の範囲で測定した粘度特性から求める。   Since the sheet-like molded body 21 needs to have high deformability in press molding described later, one having a low elastic modulus is desirable. For example, it is preferable that the storage elastic modulus at 70 ° C. is in the range of 10 to 50 MPa. The storage elastic modulus of the sheet-like molded body 21 is determined from the viscosity characteristics measured in the temperature range of 25 to 125 ° C. with a rheometer.

導体層3を形成するための導体パターン23は、金属粉末を主成分とする固形分比率が60〜70体積%の導体ペーストを用いて形成する。一方、貫通導体5を形成するための導体パターン25は、金属粉末を主成分とする固形分比率が導体パターン用の導体ペーストの約1/2のものを用いる。その固形分比率は30〜40体積%であるのが良い。   The conductor pattern 23 for forming the conductor layer 3 is formed using a conductor paste having a solid content ratio of 60 to 70% by volume mainly composed of metal powder. On the other hand, the conductive pattern 25 for forming the through conductor 5 is one having a solid content ratio of metal powder as a main component and about 1/2 that of the conductive paste for the conductive pattern. The solid content ratio is preferably 30 to 40% by volume.

こうした条件のシート状成形体21および導体ペーストを用いて、シート状成形体21に導体パターン23およびビアパターン25を形成し、プレス成形を行う際の圧縮率(圧下率とも言う。)を調整することによって、第1〜第4の実施形態のセラミック配線基板を得ることができる。この場合、枠体9を備えたセラミック配線基板を作製する場合には、断面が凸の形状をした内側金型29bを用いる。   Using the sheet-like molded body 21 and the conductor paste under such conditions, the conductor pattern 23 and the via pattern 25 are formed on the sheet-like molded body 21, and the compression rate (also referred to as the rolling reduction) when performing press molding is adjusted. Thus, the ceramic wiring boards of the first to fourth embodiments can be obtained. In this case, when producing a ceramic wiring board provided with the frame 9, an inner mold 29b having a convex cross section is used.

Al粉末93質量%に対して、SiO粉末を5質量%、MgO粉末を2質量%の割合で混合した後、さらに、固形分比率100質量部に対し、有機バインダーとしてアクリル系バインダーを19質量部添加してスラリーを調製した。その後、ドクターブレード法にて平均厚みが400μmのシート状成形体を作製した。シート状成形体の温度70℃における貯蔵弾性率は45MPaであった。 After mixing SiO 2 powder at 5% by mass and MgO powder at 2% by mass with respect to 93% by mass of Al 2 O 3 powder, acrylic binder as an organic binder with respect to 100% by mass of solid content ratio. Was added to prepare a slurry. Then, the sheet-like molded object whose average thickness is 400 micrometers was produced by the doctor blade method. The storage elastic modulus at a temperature of 70 ° C. of the sheet-like molded body was 45 MPa.

次に、得られたシート状成形体に、図6(b)に示すように、導体パターンおよびビアパターンを形成してパターンシートを作製した。導体パターンの形成には、固形分比率は65体積%の導体ペーストを用い、ビアパターンの形成には固形分比率が35体積%の導体ペーストを用いた。   Next, as shown in FIG.6 (b), the conductor sheet and the via pattern were formed in the obtained sheet-like molded object, and the pattern sheet was produced. A conductor paste having a solid content ratio of 65% by volume was used for forming the conductor pattern, and a conductor paste having a solid content ratio of 35% by volume was used for forming the via pattern.

次に、金型を用いて、80℃の温度でプレス成形を行うことによって導体パターンおよびビアパターンを有する母体成形体を作製した。次いで、母体成形体を所定のサイズに切断して、図1、図2、図3および図4にそれぞれ示す構造の成形体を作製した。   Next, using a metal mold, press molding was performed at a temperature of 80 ° C., thereby producing a mother molded body having a conductor pattern and a via pattern. Next, the mother molded body was cut into a predetermined size, and molded bodies having structures shown in FIGS. 1, 2, 3 and 4 were produced.

プレス成形したときの圧下率は、プレス成形前のパターンシート中央部の厚み(平均厚み)に対するプレス成形後のパターンシート中央部の厚み(平均厚み)として求めた。   The reduction ratio when the press molding was performed was determined as the thickness (average thickness) of the pattern sheet central portion after press molding with respect to the thickness (average thickness) of the pattern sheet central portion before press molding.

次に、これらの成形体を還元雰囲気中、最高温度が1400℃となる条件にて1時間の焼成を行った。焼成して得られたセラミック配線基板の導体層の表面にはニッケル、金めっきを順に施した。図1、図2、図3および図4の構造を有するセラミック配線基板は導体層の表面とセラミック絶縁層の表面とが面一となっていた。   Next, these molded bodies were fired for 1 hour in a reducing atmosphere under conditions where the maximum temperature was 1400 ° C. The surface of the conductor layer of the ceramic wiring board obtained by firing was subjected to nickel and gold plating in this order. In the ceramic wiring board having the structure of FIGS. 1, 2, 3 and 4, the surface of the conductor layer and the surface of the ceramic insulating layer are flush with each other.

得られたセラミック配線基板は、平面の面積が2mm×2mm、セラミック絶縁層の厚み(平均厚み)が0.1mmであった。なお、図4に示すセラミック配線基板の枠体の平均厚みは0.15mm、枠体の搭載面からの高さは0.5mmであった。   The obtained ceramic wiring board had a plane area of 2 mm × 2 mm and a ceramic insulating layer thickness (average thickness) of 0.1 mm. In addition, the average thickness of the frame body of the ceramic wiring board shown in FIG. 4 was 0.15 mm, and the height from the mounting surface of the frame body was 0.5 mm.

次に、得られたセラミック配線基板の搭載領域に電子部品として水晶発振素子を実装し、ロウ材(銀ロウ)を介して蓋体を接合して電子部品搭載パッケージを作製した。   Next, a crystal oscillation element was mounted as an electronic component on the mounting region of the obtained ceramic wiring board, and a lid was joined via a brazing material (silver brazing) to produce an electronic component mounting package.

次に、作製した電子部品搭載用基板を300℃に加熱した半田槽に約1秒間浸漬する方法で耐熱衝撃試験を行った。クラックの確認はセラミック配線基板を断面研磨した試料を用いて行った。試料数は各100個とした。   Next, a thermal shock test was performed by immersing the produced electronic component mounting substrate in a solder bath heated to 300 ° C. for about 1 second. The crack was confirmed using a sample obtained by polishing a cross section of a ceramic wiring board. The number of samples was 100 each.

作製したセラミック配線基板を構成する導体層および貫通導体の形状等について、導体層を厚み方向に断面視したときに、一部が露出した状態でセラミック絶縁層に埋まっている状態、導体層の露出した表面を第1面、貫通導体側の表面を第2面としたときに、第1面の幅が第2面の幅よりも大きくなっている状態、導体層が第1面側から前記第2面側にかけて傾斜面となっている状態、傾斜面と貫通導体の側面との角度が90°よりも大きいといった状態は、セラミック配線基板の断面を観察した写真から判定した。   Regarding the shape of the conductor layer and the through conductor constituting the fabricated ceramic wiring board, when the conductor layer is viewed in cross section in the thickness direction, a part of the conductor layer is exposed and embedded in the ceramic insulating layer, and the conductor layer is exposed. When the first surface is the first surface and the surface on the through conductor side is the second surface, the width of the first surface is larger than the width of the second surface. The state where the surface is inclined toward the two surfaces and the state where the angle between the inclined surface and the side surface of the through conductor is greater than 90 ° were determined from photographs obtained by observing the cross section of the ceramic wiring board.

この際に、導体層と貫通導体との接合面付近の導体層の幅w(直径)、貫通導体の中央部の幅w(直径)、接合面付近の導体層の側面と貫通導体の側面との角度、導体層の側面から貫通導体の側面にかけての曲率半径を算出した。 At this time, the width w 2 (diameter) of the conductor layer near the joint surface between the conductor layer and the through conductor, the width w 3 (diameter) of the central portion of the through conductor, the side surface of the conductor layer near the joint surface and the through conductor The angle with the side surface and the radius of curvature from the side surface of the conductor layer to the side surface of the through conductor were calculated.

作製した試料(試料No.2〜7)は、導体層が露出した状態でセラミック絶縁層に埋まっていた。また、これらの試料では第1面の幅が第2面の幅よりも大きいものであった。試料No.2および試料No.7のセラミック配線基板は、導体層の側面が第1面側から第2面側にかけて傾斜面をなす形状であった。試料No.3〜6のセラミック配線基板は、導体層の傾斜面が凹状の曲面をなしていた。この中で、試料No.5、6は、貫通導体の側面が中央部から導体層側にかけて曲面をなしていた。   The produced samples (Sample Nos. 2 to 7) were buried in the ceramic insulating layer with the conductor layer exposed. Moreover, in these samples, the width of the first surface was larger than the width of the second surface. Sample No. 2 and Sample No. 7 had a shape in which the side surface of the conductor layer formed an inclined surface from the first surface side to the second surface side. Sample No. In the ceramic wiring boards of 3 to 6, the inclined surface of the conductor layer had a concave curved surface. Among these, sample No. In 5 and 6, the side surface of the through conductor was curved from the center to the conductor layer side.

比較例として、図7に示す構造のセラミック配線基板を従来法により作成し、同様の評価を行った。従来法とは、シート状成形体に貫通孔を形成し、この貫通孔に導体ペーストを充填し、次いで、この表面に導体パターンを形成する製法である。   As a comparative example, a ceramic wiring board having the structure shown in FIG. 7 was prepared by a conventional method, and the same evaluation was performed. The conventional method is a manufacturing method in which a through hole is formed in a sheet-like molded body, a conductive paste is filled in the through hole, and then a conductive pattern is formed on the surface.

表1から明らかなように、図1〜4の構造のセラミック配線基板(試料No.2〜7)では、クラックの発生率が11%以下であった。   As is apparent from Table 1, in the ceramic wiring board (sample Nos. 2 to 7) having the structure shown in FIGS. 1 to 4, the crack generation rate was 11% or less.

この中で、圧下率を大きくした図2および図3の構造の試料(試料No.3、4、5、6)は、図2の構造の試料(試料No.2、7)に比較して、導体層から貫通導体にかけての側面の曲率半径が次第に小さくなり、クラック発生率が低下していた。   2 and 3 (samples Nos. 3, 4, 5, and 6) having a larger rolling reduction than the samples (samples No. 2 and 7) having the structure of FIG. The curvature radius of the side surface from the conductor layer to the through conductor gradually decreased, and the crack generation rate was reduced.

これに対し、図7の構造の試料(試料No.1)はクラックの発生率が49%であった。   In contrast, the sample having the structure of FIG. 7 (sample No. 1) had a crack generation rate of 49%.

A・・・・・・・・・・・セラミック配線基板
B・・・・・・・・・・・電子部品実装パッケージ
・ 101・・・・・・・セラミック絶縁層
1a・・・・・・・・・・(セラミック絶縁層の)表面
3、103・・・・・・・導体層
3s・・・・・・・・・・(導体層の)側面
5、105・・・・・・・貫通導体
5s・・・・・・・・・・(貫通導体の)側面
5c・・・・・・・・・・(貫通導体の)中央部
7・・・・・・・・・・・傾斜面
9・・・・・・・・・・・枠体
11・・・・・・・・・・電子部品
13・・・・・・・・・・蓋体
、w・・・・・・・(導体層の)幅
・・・・・・・・・・(貫通導体の)幅

、D・・・・・・・(導体層の)直径
・・・・・・・・・・(貫通導体の)直径
S・・・・・・・・・・・接合面
Sc・・・・・・・・・・応力
21・・・・・・・・・・シート状成形体
23、25・・・・・・・導体パターン
26・・・・・・・・・・パターンシート
27・・・・・・・・・・フィルム
29a・・・・・・・・・外側金型
29b・・・・・・・・・内側金型
31・・・・・・・・・・成形体
A ... Ceramic wiring board B ... Electronic component mounting package 101 ... Ceramic insulating layer 1a ... .... Surface 3, (ceramic insulating layer) 3, 103 ... Conductor layer 3s ... (Conductor layer) side face 5, 105 ... Penetration conductor 5s ... side face 5c (through conductor) ... center part (through conductor) 7 ... inclined Surface 9 ··········································································· lids w 1 , w 2 ... Width (of conductor layer) w 3 ..... Width of (through conductor)

D 1 , D 2 ... (Diameter of conductor layer) D 3 ... (Diameter of through conductor) S. Sc ··· Stress 21 ·········· Sheets 23, 25 ······ Conductor pattern 26 ··· Pattern sheet 27 ... film 29a ... outer mold 29b ... inner mold 31 ...・ Molded body

Claims (6)

セラミック絶縁層と、該セラミック絶縁層を厚み方向に貫通するように設けられた貫通導体と、該貫通導体の前記厚み方向の端面に接合してなる導体層と、を備えているセラミック配線基板であって、前記導体層は、厚み方向に断面視したときに、一部が露出した状態で前記セラミック絶縁層に埋まっており、前記導体層の露出した表面を第1面、前記貫通導体側の表面を第2面としたときに、前記第1面の幅が前記第2面の幅よりも大きくなっているとともに、前記導体層の側面が前記第1面側から前記第2面側にかけて傾斜面とされ、該傾斜面と前記貫通導体の側面との角度が90°よりも大きいことを特徴とするセラミック配線基板。   A ceramic wiring board comprising: a ceramic insulating layer; a through conductor provided so as to penetrate the ceramic insulating layer in the thickness direction; and a conductor layer bonded to the end face in the thickness direction of the through conductor. The conductor layer is embedded in the ceramic insulating layer in a partially exposed state when viewed in cross-section in the thickness direction, and the exposed surface of the conductor layer is formed on the first surface and the through conductor side. When the surface is the second surface, the width of the first surface is larger than the width of the second surface, and the side surface of the conductor layer is inclined from the first surface side to the second surface side. A ceramic wiring board, wherein the angle between the inclined surface and the side surface of the through conductor is greater than 90 °. 前記導体層の傾斜面は凹状の曲面をなしていることを特徴とする請求項1に記載のセラミック配線基板。   The ceramic wiring board according to claim 1, wherein the inclined surface of the conductor layer has a concave curved surface. 前記貫通導体を厚み方向に断面視したときに、前記厚み方向の中央部の幅が前記導体層の第1面の幅よりも大きく、前記貫通導体の側面は前記中央部から前記導体層側にかけて曲面をなしていることを特徴とする請求項1または2に記載のセラミック配線基板。   When the through conductor is viewed in cross section in the thickness direction, the width of the central portion in the thickness direction is larger than the width of the first surface of the conductor layer, and the side surface of the through conductor extends from the central portion to the conductor layer side. The ceramic wiring board according to claim 1, wherein the ceramic wiring board has a curved surface. 前記導体層の前記第1面は、前記セラミック絶縁層の表面と同一面となるように前記セラミック絶縁層内に埋設されていることを特徴とする請求項1乃至3のうちいずれかに記載のセラミック配線基板。   The said 1st surface of the said conductor layer is embed | buried in the said ceramic insulating layer so that it may become the same surface as the surface of the said ceramic insulating layer, The Claim 1 thru | or 3 characterized by the above-mentioned. Ceramic wiring board. 前記セラミック絶縁層の周縁部に沿って枠体が設けられていることを特徴とする請求項1乃至4のうちいずれかに記載のセラミック配線基板。   The ceramic wiring board according to claim 1, wherein a frame body is provided along a peripheral edge portion of the ceramic insulating layer. 請求項1乃至5のうちいずれかに記載のセラミック配線基板の前記導体層上に電子部品が配置されていることを特徴とする電子部品実装パッケージ。   6. An electronic component mounting package, wherein an electronic component is disposed on the conductor layer of the ceramic wiring substrate according to claim 1.
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