CN112864285A - Preparation method of light emitting diode epitaxial wafer - Google Patents

Preparation method of light emitting diode epitaxial wafer Download PDF

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CN112864285A
CN112864285A CN202011564481.0A CN202011564481A CN112864285A CN 112864285 A CN112864285 A CN 112864285A CN 202011564481 A CN202011564481 A CN 202011564481A CN 112864285 A CN112864285 A CN 112864285A
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layer
emitting diode
time
epitaxial wafer
source
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CN112864285B (en
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王群
郭炳磊
葛永晖
董彬忠
李鹏
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HC Semitek Suzhou Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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Abstract

The disclosure provides a preparation method of a light-emitting diode epitaxial wafer, belonging to the field of light-emitting diode manufacturing. When an InGaN well layer In the multi-quantum well layer grows, reaction gas and an organic metal source are alternately introduced into the reaction cavity, the organic metal source is intensively adsorbed on the surface of the n-type GaN layer, and a large amount of In atoms are incorporated In a short time to capture electrons. And part of the organic metal source reacts with a large amount of reaction gas to generate the InGaN film, the content of nitrogen In the InGaN film is higher than that of In, and the possibility that In the InGaN film migrates to the GaN barrier layer is reduced. The interface between the InGaN well layer and the GaN barrier layer is relatively clear, impurities in the GaN barrier layer can be reduced, and the overall crystal quality of the multiple quantum well layer is improved so as to improve the overall quality of the light-emitting diode epitaxial wafer.

Description

Preparation method of light emitting diode epitaxial wafer
Technical Field
The disclosure relates to the field of light emitting diode manufacturing, in particular to a method for preparing a light emitting diode epitaxial wafer.
Background
A light emitting diode is a semiconductor electronic component that can emit light. As a novel high-efficiency, environment-friendly and green solid-state illumination light source, the solid-state illumination light source is rapidly and widely applied, such as traffic signal lamps, automobile interior and exterior lamps, urban landscape illumination, mobile phone backlight sources and the like, and the aim of improving the light emitting efficiency of a chip is continuously pursued by light emitting diodes.
The light emitting diode epitaxial wafer is a primary finished product in the light emitting diode preparation process. The conventional light emitting diode epitaxial wafer comprises a substrate, and an n-type GaN layer, a multi-quantum well layer and a p-type GaN layer which are sequentially laminated on the substrate.
Due to the difference between the lattice constants of the substrate and the gallium nitride, stress and defects are accumulated in the epitaxial process, and the stress and the defects can reduce the crystal growth quality and element doping of the epitaxial epitaxy, thereby affecting the quantum efficiency of the light-emitting diode.
Disclosure of Invention
The embodiment of the disclosure provides a method for preparing a light emitting diode epitaxial wafer, which can improve the growth quality of the light emitting diode epitaxial wafer so as to improve the luminous efficiency of the light emitting diode epitaxial wafer. The technical scheme is as follows:
the embodiment of the disclosure provides a light emitting diode epitaxial wafer, and a preparation method of the light emitting diode epitaxial wafer comprises the following steps:
providing a substrate;
growing an n-type GaN layer on the substrate;
growing a multi-quantum well layer on the n-type GaN layer, the multi-quantum well layer comprising GaN barrier layers and InGaN well layers which are alternately grown, wherein growing the InGaN well layer comprises:
alternately introducing reaction gas and an organic metal source into the reaction cavity until the InGaN well layer is formed;
and growing a p-type GaN layer on the multi-quantum well layer.
Optionally, the ratio of the time for introducing the organic metal source into the reaction cavity each time to the time for introducing the reaction gas into the reaction cavity each time is 1:1 to 5: 1.
Optionally, the time for introducing the organic metal source into the reaction cavity each time is 3-10 s.
Optionally, the time for introducing the reaction gas into the reaction cavity each time is 3-8 s.
Optionally, introducing an organic metal source and a reaction gas into the reaction chamber, including:
the time length of each time of introducing the reaction gas is shorter than the time length of each time of introducing the organic metal source.
Optionally, the reaction gas includes an ammonia source, the organic metal source includes a Ga source and an In source, the organic metal source and the reaction gas are introduced into the reaction chamber, and the method further includes:
the flow of the Ga source introduced into the reaction cavity is unchanged, and the flow of the In source introduced into the reaction cavity is gradually increased every time.
Optionally, the flow rate of the Ga source is 150-500 sccm.
Optionally, the flow rate of the In source is gradually increased from 100-4000 sccm to 150-6000 sccm.
Optionally, the introducing an organic metal source and a reaction gas into the reaction chamber further includes:
the flow of the ammonia source which is introduced into the reaction cavity at each time is gradually reduced to zero.
Optionally, the flow of the ammonia source fed into the reaction cavity every time is gradually reduced to zero from 60-80L.
The technical scheme provided by the embodiment of the disclosure has the following beneficial effects:
when an InGaN well layer in the multi-quantum well layer grows, reaction gas and an organic metal source are alternately introduced into the reaction cavity, the organic metal source is adsorbed on the surface of the n-type GaN layer and reacts with part of the introduced reaction gas, and the InGaN film grows on the surface of the n-type GaN layer in a reaction mode. The organic metal source is adsorbed on the surface of the n-type GaN layer In a concentrated way, so that the great incorporation of In atoms In a short time can be realized, and a sufficient low barrier region for capturing electrons In the InGaN film is ensured. And a part of organic metal source accumulated on the surface far away from the n-type GaN layer reacts with a large amount of subsequently introduced reaction gas to generate the InGaN film, the content of nitrogen In the InGaN film is more than that of In, and the possibility that In the InGaN film migrates into the GaN barrier layer is reduced. The steps are repeated until the InGaN thin film is accumulated to form an InGaN well layer, the obtained InGaN well layer is provided with alternately laminated low barrier regions for capturing electrons, In atoms In the InGaN well layer are low In possibility of permeating into the GaN barrier layer, the interface between the InGaN well layer and the GaN barrier layer can be ensured to be clear, impurities In the GaN barrier layer can be reduced, and the overall crystal quality of the multiple quantum well layer is improved so as to improve the overall quality of the light emitting diode epitaxial wafer.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and it is obvious for those skilled in the art to obtain other drawings based on the drawings without creative efforts.
Fig. 1 is a flowchart of a method for manufacturing an epitaxial wafer of a light emitting diode according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of an led epitaxial wafer according to an embodiment of the present disclosure;
fig. 3 is a flowchart of another method for manufacturing an epitaxial wafer of a light emitting diode according to an embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of another light emitting diode epitaxial wafer according to an embodiment of the present disclosure.
Detailed Description
To make the objects, technical solutions and advantages of the present disclosure more apparent, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.
Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The use of "first," "second," "third," and similar terms in the description and claims of the present disclosure are not intended to indicate any order, quantity, or importance, but rather are used to distinguish one element from another. Also, the use of the terms "a" or "an" and the like do not denote a limitation of quantity, but rather denote the presence of at least one. The word "comprise" or "comprises", and the like, means that the element or item listed before "comprises" or "comprising" covers the element or item listed after "comprising" or "comprises" and its equivalents, and does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", "top", "bottom", and the like are used merely to indicate relative positional relationships, which may also change accordingly when the absolute position of the object being described changes.
Fig. 1 is a flowchart of a method for manufacturing an led epitaxial wafer according to an embodiment of the present disclosure, and as shown in fig. 1, the method for manufacturing an led epitaxial wafer includes:
s101: a substrate is provided.
S102: an n-type GaN layer is grown on the substrate.
S103: growing a multi-quantum well layer on the n-type GaN layer, wherein the multi-quantum well layer comprises GaN barrier layers and InGaN well layers which are alternately grown, and the InGaN well layer is grown and comprises the following steps: and alternately introducing reaction gas and an organic metal source into the reaction cavity until an InGaN well layer is formed.
S104: and growing a p-type GaN layer on the multi-quantum well layer.
When an InGaN well layer in the multi-quantum well layer grows, reaction gas and an organic metal source are alternately introduced into the reaction cavity, the organic metal source is adsorbed on the surface of the n-type GaN layer and reacts with part of the introduced reaction gas, and the InGaN film grows on the surface of the n-type GaN layer in a reaction mode. The organic metal source is adsorbed on the surface of the n-type GaN layer In a concentrated way, so that the great incorporation of In atoms In a short time can be realized, and a sufficient low barrier region for capturing electrons In the InGaN film is ensured. And a part of organic metal source accumulated on the surface far away from the n-type GaN layer reacts with a large amount of subsequently introduced reaction gas to generate the InGaN film, the content of nitrogen In the InGaN film is more than that of In, and the possibility that In the InGaN film migrates into the GaN barrier layer is reduced. The steps are repeated until the InGaN thin film is accumulated to form an InGaN well layer, the obtained InGaN well layer is provided with alternately laminated low barrier regions for capturing electrons, In atoms In the InGaN well layer are low In possibility of permeating into the GaN barrier layer, the interface between the InGaN well layer and the GaN barrier layer can be ensured to be clear, impurities In the GaN barrier layer can be reduced, and the overall crystal quality of the multiple quantum well layer is improved so as to improve the overall quality of the light emitting diode epitaxial wafer.
The multiple quantum well layers are grown In the above mode, the situation that In atoms In InGaN well layers In the multiple quantum well layers are precipitated and permeate into other layers is less, the distribution of the In atoms In each InGaN thin film In the InGaN well layers can be ensured to be uniform, the distribution of the In atoms In the finally obtained InGaN well layers is uniform, the distribution and the content of the In atoms directly influence the wavelength of light of the light-emitting diode, therefore, the uniformity of the distribution of the In atoms can also ensure that the wavelength of the light emitted by the light-emitting diode is good, and the overall light emission of the light-emitting diode is relatively uniform.
The led epitaxial wafer structure after step S104 is executed can be seen in fig. 2.
Fig. 2 is a schematic structural diagram of an led epitaxial wafer according to an embodiment of the present disclosure, and as can be seen from fig. 2, an led epitaxial wafer according to an embodiment of the present disclosure includes a substrate 1, and an n-type GaN layer 2, a multi-quantum well layer 3, and a p-type GaN layer 4 sequentially stacked on the substrate 1. The multiple quantum well layer 3 includes InGaN well layers and GaN barrier layers alternately stacked.
It should be noted that fig. 2 is provided herein for illustrating a specific possible basic structure of the light emitting diode epitaxial wafer, and in other implementations provided by the present disclosure, the light emitting diode epitaxial wafer may also include other hierarchical structures, which are not limited by the present disclosure.
Fig. 3 is a flowchart of another method for manufacturing an led epitaxial wafer according to an embodiment of the present disclosure, and as shown in fig. 3, the method for manufacturing an led epitaxial wafer includes:
s201: a substrate is provided.
Wherein the substrate may be a sapphire substrate. Easy to realize and manufacture.
Optionally, step S201 may further include: and under the hydrogen atmosphere, the time for treating the surface of the substrate is 6-10 min.
For example, the temperature of the reaction chamber may be 1000 to 1200 ℃ and the pressure of the reaction chamber may be 200to 500Torr when processing the surface of the substrate.
In one implementation provided by the present disclosure, the temperature of the reaction chamber may also be 1100 ℃ when processing the substrate, and the time period for processing the surface of the substrate may be 8 min.
Step S201 may further include: and nitriding the surface of the substrate, and paving a layer of nitrogen atoms on the surface of the substrate. Rapid growth of gallium nitride material may be facilitated.
S202: a buffer layer is grown on a substrate.
Optionally, controlling the temperature of the reaction cavity to be 450-600 ℃, and the pressure of the reaction cavity to be 200-500 torr, and growing a GaN three-dimensional nucleation layer; and then raising the temperature of the reaction cavity to 950-1200 ℃ to sequentially grow the GaN filling layer and the non-doped GaN layer. And obtaining the buffer layer with better quality.
S203: and growing an n-type GaN layer on the buffer layer.
Alternatively, the growth temperature of the n-type GaN layer may be 950 to 1200 deg.C, and the growth pressure of the n-type GaN layer may be 200to 500 Torr.
S204: and growing a multi-quantum well layer on the n-type GaN layer.
In step S204, the multiple quantum well layer includes an InGaN well layer and a GaN barrier layer that are alternately grown.
Optionally, the growth temperature of the InGaN well layer is the same as the growth temperature of the GaN barrier layer.
The growth temperature of the InGaN well layer is the same as that of the GaN barrier layer, so that the growth quality of the InGaN well layer can be guaranteed, In atoms can be prevented from permeating into the GaN barrier layer due to the fact that the growth temperature of the GaN barrier layer is too high, the decomposition condition of the In atoms In the InGaN well layer is light, impurity doping of the In atoms which can enter the GaN barrier layer is small, and meanwhile the growth quality of the InGaN well layer and the GaN barrier layer is guaranteed. The growth quality of the whole multi-quantum well layer is integrally and effectively improved.
Illustratively, the growth temperature of the InGaN well layer and the growth temperature of the GaN barrier layer are 700-800 ℃.
When the growth temperature of the InGaN well layer and the growth temperature of the GaN barrier layer are within the above range, the obtained InGaN well layer and the obtained GaN barrier layer have good growth quality, and the interface between the InGaN well layer and the GaN barrier layer is clear.
Optionally, the thickness of the InGaN well layer is 2-4.5 nm, and the thickness of the GaN barrier layer is 4-7 nm.
The thickness of the InGaN well layer is within the range of 2-4.5 nm, the InGaN well layer is good In electron capturing capacity by combining the growth mode of the InGaN well layer, a potential barrier can be kept In a low state, the GaN barrier layer is good In quality due to less penetration of In atoms, and the potential barrier of the GaN barrier layer is much higher than that of the InGaN well layer, so that the thickness of the GaN barrier layer can be a little thinner than that of the barrier layer In the conventional multiple quantum well layer, the light emitting efficiency of the light emitting diode is guaranteed, and meanwhile the preparation cost of the light emitting diode epitaxial wafer is reduced.
Illustratively, the growth pressure of the InGaN well layer and the GaN barrier layer is 100-200 Torr, and the growth rotation speed of the InGaN well layer and the GaN barrier layer is 500-800 r/min. The obtained InGaN well layer and the obtained GaN barrier layer have better quality.
In an implementation mode provided by the disclosure, the growth pressure of the InGaN well layer and the GaN barrier layer is 150-300 mbarr, and the growth rotation speed of the InGaN well layer and the GaN barrier layer is 80-150 r/min. And the InGaN well layer and the GaN barrier layer with better quality can be obtained.
Optionally, the ratio of the time for introducing the organic metal source into the reaction chamber each time to the time for introducing the reaction gas into the reaction chamber each time is 1:1 to 5: 1.
The ratio of the time length of introducing the organic metal source each time to the time length of introducing the reaction gas into the reaction cavity each time is in the range, so that the thickness of the organic metal source adsorbed in the reaction cavity can be ensured to be enough, the introduced reaction gas has enough time to react with the adsorbed organic metal source, and the InGaN well layer with better quality can be finally generated through reaction.
The organic metal source includes a Ga source and an In source, and the reaction gas includes ammonia gas. The following description is set forth on the premise that the organometallic source includes a Ga source and an In source, and the reaction gas includes ammonia gas.
Optionally, the time period of introducing the organic metal source into the reaction cavity each time is 3-10 s.
The time for introducing the organic metal source into the reaction cavity each time is within the range, the organic metal source has enough time to be adsorbed on the surface of the n-type GaN layer or adsorbed on the surface of the GaN barrier layer and forms a certain thickness, the thickness is moderate, the adsorbed organic metal source can be ensured to react with subsequently introduced reaction gas to generate an InGaN well layer, and the obtained InGaN well layer has good quality.
Illustratively, the time for introducing the reaction gas into the reaction cavity each time is 3-8 s.
The time for introducing the reaction gas into the reaction cavity each time is within the range, the reaction gas can fully react with the organic metal source, and the quality of the finally obtained InGaN well layer is ensured.
Optionally, introducing an organic metal source and a reaction gas into the reaction chamber, including: the time period for each introduction of the reaction gas is shorter than the time period for each introduction of the organometallic source.
The time length of introducing the reaction gas is shorter than the time length of introducing the organic metal source every time, so that the reaction process in the reaction cavity can be reasonably controlled, the stable generation of the InGaN well layer can be ensured, and the waste caused by excessive introduction of the reaction gas is avoided.
Optionally, the reactant gas comprises a source of ammonia, further comprising: the flow rate of the Ga source introduced into the reaction cavity is unchanged, and the flow rate of the In source introduced into the reaction cavity is gradually increased every time.
Under the condition that the flow of the Ga source is not changed, the flow of the In source introduced into the reaction cavity is gradually increased every time, the content of In at one side of the InGaN film, which is close to the n-type GaN layer, obtained every time is relatively low, the phenomenon that In atoms excessively permeate the n-type GaN layer or the GaN barrier layer In front of the InGaN film can be avoided, and the permeation and mixing of the In atoms are reduced. In atoms on the side far away from the n-type GaN layer mainly react with ammonia gas to generate an InGaN film, and the nitrogen atoms In the InGaN film have high proportion, so that the In atoms can be prevented from permeating into the GaN barrier layer behind the InGaN film. The quality of the multiple quantum well layer can be further improved.
Optionally, the flow rate of the Ga source is 150-500 sccm.
When the flow rate of the Ga source is in the range, the obtained InGaN well layer can be ensured to have better quality.
Illustratively, the flow rate of the In source is gradually increased from 100to 4000sccm to 150 to 6000 sccm.
The flow rate of the In source is In the range, the InGaN well layer with good quality can be obtained, and the capability of the InGaN well layer for capturing electrons is good.
Optionally, step S204 further includes: the flow of the ammonia source introduced into the reaction chamber at each time is gradually reduced to zero.
The flow of the ammonia source introduced into the reaction cavity is gradually reduced to zero every time, so that the complete reaction of the ammonia gas and the organic metal source can be ensured, and the phenomenon that the residual ammonia gas reacts with the subsequently introduced organic metal source to influence the adsorption process of the organic metal source is avoided.
Optionally, the flow of the ammonia source introduced into the reaction cavity at each time is gradually reduced to zero from 60-80L.
The crystal quality of the finally obtained multiple quantum well layer can be improved.
S205: and growing an AlGaN electronic barrier layer on the multi-quantum well layer.
The growth temperature of the AlGaN electron blocking layer can be 600-1000 ℃, and the growth pressure of the AlGaN electron blocking layer can be 100-300 Torr. The AlGaN electron blocking layer grown under the condition has good quality, and is beneficial to improving the luminous efficiency of the light-emitting diode.
S206: and growing a p-type GaN layer on the AlGaN electron blocking layer.
Alternatively, the growth pressure of the p-type GaN layer may be 100Torr to 300Torr, and the growth temperature of the p-type GaN layer may be 800 ℃ to 950 ℃.
In one implementation provided by the present disclosure, the growth temperature of the p-type GaN layer may be 900 ℃, and the growth pressure of the p-type GaN layer may be 200 Torr.
S207: and growing a p-type contact layer on the p-type GaN layer.
Alternatively, the growth pressure of the p-type contact layer may be 100Torr to 300Torr, and the growth temperature of the p-type contact layer may be 850 ℃ to 1050 ℃.
In one implementation provided by the present disclosure, the growth temperature of the p-type contact layer may be 950 ℃, and the growth pressure of the p-type contact layer may be 200 Torr.
The method for manufacturing the light emitting diode epitaxial wafer shown in fig. 3 provides a more detailed method for growing the light emitting diode epitaxial wafer compared to the method for manufacturing the light emitting diode shown in fig. 1.
S208: and annealing the light emitting diode epitaxial wafer.
Step S208 may include: adjusting the temperature to 650-850 ℃, and annealing the light-emitting diode epitaxial wafer for 5-15 minutes in a hydrogen atmosphere.
In one implementation provided by the present disclosure, the annealing temperature may be 750 ℃ and the annealing time may be 10 min.
The structure of the led epitaxial wafer after step S208 is completed can be seen in fig. 4.
Fig. 4 is a schematic structural diagram of another light emitting diode epitaxial wafer according to an embodiment of the present disclosure, and as can be seen from fig. 4, in another implementation manner provided by the present disclosure, the light emitting diode epitaxial wafer may include a substrate 1, and a buffer layer 5, an n-type GaN layer 2, a multi-quantum well layer 3, an AlGaN electron blocking layer 6, a p-type GaN layer 4, and a p-type contact layer 7 grown on the substrate 1.
Alternatively, the substrate 1 may be a sapphire substrate 1. Easy to manufacture and obtain.
Illustratively, the buffer layer 5 may include a GaN three-dimensional nucleation layer 51, a GaN fill-up layer 52, and an undoped GaN layer 53 sequentially stacked on the substrate 1. The lattice mismatch can be effectively alleviated.
In other implementations provided by the present disclosure, the buffer layer 5 may also be one of aluminum nitride, aluminum gallium nitride, or aluminum indium gallium nitride. The present disclosure is not so limited.
Alternatively, the doping element of the n-type GaN layer 2 may be Si, and the doping concentration of the Si element may be 1 × 1018～1×1019cm-3. The overall quality of the n-type GaN layer 2 is good.
Illustratively, the thickness of the n-type GaN layer 2 may be 1 to 5 μm. The obtained n-type GaN layer 2 has good overall quality.
In one implementation provided by the present disclosure, the thickness of the n-type GaN layer 2 may be 3 μm. The present disclosure is not so limited.
Illustratively, the MQW layer 3 includes a plurality of InGaN well layers 31 and GaN barrier layers 32 alternately stacked, the thickness of the InGaN well layers 31 may be 2-5 nm, and the thickness of the GaN barrier layers 32 may be 8-20 nm.
Illustratively, the overall thickness of the multiple quantum well layer 3 may be 50 to 130nm, and the In molar content may be 13 to 25%.
Optionally, the Al content of the AlGaN electron blocking layer 6 may be 0.15 to 0.25. The effect of blocking electrons is better.
Optionally, the thickness of the AlGaN electron blocking layer 6 can be 20-100 nm. The obtained AlGaN electron blocking layer 6 has better quality.
Enough cavities can be provided, and the overall cost of the light-emitting diode epitaxial wafer is not too high.
Optionally, the p-type GaN layer 4 can be doped with Mg, and the thickness of the p-type GaN layer 4 can be 100-200 nm.
Illustratively, the thickness of the p-type contact layer 7 may be 10 to 50 nm.
In the epitaxial wafer structure shown in fig. 3, compared with the epitaxial wafer structure shown in fig. 1, a buffer layer 5 is added between the substrate 1 and the n-type GaN layer 2, an AlGaN electron blocking layer 6 for preventing electron overflow is added between the multi-quantum well layer 3 and the p-type GaN layer 4, and a p-type contact layer 7 is further grown on the p-type GaN layer 4. The obtained epitaxial wafer has better quality and luminous efficiency.
It should be noted that, in other implementations provided by the present disclosure, the light emitting diode epitaxial wafer may also include other hierarchical structures, which is not limited by the present disclosure.
It should be noted that, in the embodiments of the present disclosure, the VeecoK465iorC4 orrbmcvd (metal organic chemical vapor deposition) apparatus is used to realize the generation of the light emitting diodeAnd (4) a growing method. By using high-purity H2(Hydrogen) or high purity N2(Nitrogen) or high purity H2And high purity N2The mixed gas of (2) is used as a carrier gas, high-purity NH3As an N source, trimethyl gallium (TMGa) and triethyl gallium (TEGa) as gallium sources, trimethyl indium (TMIn) as indium sources, silane (SiH4) as an N-type dopant, trimethyl aluminum (TMAl) as an aluminum source, and magnesium dicylocene (CP)2Mg) as a P-type dopant.
Although the present disclosure has been described with reference to specific embodiments, it will be understood by those skilled in the art that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the disclosure.

Claims (10)

1. A preparation method of a light emitting diode epitaxial wafer is characterized by comprising the following steps:
providing a substrate;
growing an n-type GaN layer on the substrate;
growing a multi-quantum well layer on the n-type GaN layer, the multi-quantum well layer comprising GaN barrier layers and InGaN well layers which are alternately grown, wherein growing the InGaN well layer comprises:
alternately introducing reaction gas and an organic metal source into the reaction cavity until the InGaN well layer is formed;
and growing a p-type GaN layer on the multi-quantum well layer.
2. The method for preparing the light-emitting diode epitaxial wafer according to claim 1, wherein the ratio of the time for introducing the organic metal source into the reaction cavity each time to the time for introducing the reaction gas into the reaction cavity each time is 1: 1-5: 1.
3. The method for preparing the light-emitting diode epitaxial wafer according to claim 1, wherein the time for introducing the organic metal source into the reaction chamber each time is 3-10 s.
4. The method for preparing the light-emitting diode epitaxial wafer according to claim 3, wherein the time for introducing the reaction gas into the reaction chamber each time is 3-8 s.
5. The method for preparing the light-emitting diode epitaxial wafer according to any one of claims 1 to 4, wherein the step of introducing an organic metal source and a reaction gas into the reaction chamber comprises the following steps:
the time length of each time of introducing the reaction gas is shorter than the time length of each time of introducing the organic metal source.
6. The method for preparing the light-emitting diode epitaxial wafer according to any one of claims 1 to 4, wherein the reaction gas comprises an ammonia source, the organic metal source comprises a Ga source and an In source, the organic metal source and the reaction gas are introduced into the reaction chamber, and the method further comprises:
the flow of the Ga source introduced into the reaction cavity is unchanged, and the flow of the In source introduced into the reaction cavity is gradually increased every time.
7. The method for preparing the epitaxial wafer of the light-emitting diode as claimed in claim 6, wherein the flow rate of the Ga source is 150-500 sccm.
8. The method for preparing an epitaxial wafer for light-emitting diode according to claim 6, wherein the flow rate of the In source is gradually increased from 100to 4000sccm to 150 to 6000 sccm.
9. The method for preparing the light-emitting diode epitaxial wafer according to claim 6, wherein an organic metal source and a reaction gas are introduced into the reaction chamber, and further comprising:
the flow of the ammonia source which is introduced into the reaction cavity at each time is gradually reduced to zero.
10. The method for preparing the light-emitting diode epitaxial wafer as claimed in claim 9, wherein the flow rate of the ammonia source introduced into the reaction chamber at each time is gradually reduced from 60-80L to zero.
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