CN112820644B - Gallium nitride PN diode with high blocking voltage and preparation method thereof - Google Patents

Gallium nitride PN diode with high blocking voltage and preparation method thereof Download PDF

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CN112820644B
CN112820644B CN202011638920.8A CN202011638920A CN112820644B CN 112820644 B CN112820644 B CN 112820644B CN 202011638920 A CN202011638920 A CN 202011638920A CN 112820644 B CN112820644 B CN 112820644B
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layer
drift
active region
gan
channel
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CN112820644A (en
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赵成
韩亚
孙越
王思元
王毅
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Yangzhou Yangjie Electronic Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/66196—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices with an active layer made of a group 13/15 material
    • H01L29/66204—Diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/8613—Mesa PN junction diodes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

A gallium nitride PN diode with high blocking voltage and a preparation method thereof relate to gallium nitride power semiconductor devices. The device comprises a substrate, a transition layer, a drift layer, an active region, a drift channel, a field plate and a metal electrode layer; the second semiconductor layer of the active region, the drift layer and the two drift channels form an annular drift region structure, and compared with a gallium nitride PN diode with a transverse structure and only a transverse drift region or a gallium nitride PN diode with a vertical structure and only a vertical drift region, the total path length of the drift region in the invention is larger than the path length of the drift region in the gallium nitride PN diode with the transverse structure or the vertical structure, which are manufactured on the same substrate and epitaxial layer size, so that the blocking voltage of the gallium nitride PN diode is increased. The invention has the characteristics of improving the blocking voltage of the device, simultaneously converging the anode electrode, the cathode electrode and the field plate electrode on the top surface of the device structure to form a coplanar device input/output electrode structure, facilitating the realization of planar integration of the device, being applied to a power integrated circuit and the like.

Description

Gallium nitride PN diode with high blocking voltage and preparation method thereof
Technical Field
The invention relates to a gallium nitride power semiconductor device, in particular to a gallium nitride PN diode with high blocking voltage and a preparation method thereof, belonging to the technical field of power electronic devices.
Background
Gallium nitride semiconductor typically represented by third-generation semiconductor has the advantages of large forbidden bandwidth, high breakdown electric field, large thermal conductivity, high electron saturation drift rate, strong radiation resistance and the like, and gallium nitride PN diode has wide application in the fields of power management, 5G mobile communication, semiconductor illumination, consumer electronics and the like due to excellent characteristics of high blocking voltage, low reverse leakage current, high switching speed and the like.
The gallium nitride PN diode in the prior art mainly adopts two structural forms of transverse and vertical.
The gallium nitride PN diode with the transverse structure is manufactured on a heteroepitaxial gallium nitride semiconductor substrate, and the substrate is a silicon substrate, a silicon carbide substrate or a sapphire substrate which is low in cost. In the prior art, the gallium nitride PN diode with a transverse structure generally obtains higher blocking voltage by increasing the inter-electrode spacing, namely increasing the length of a drift region, but increases the chip size and on-resistance of the device and reduces the effective current density and the chip performance on the unit chip area.
The gallium nitride PN diode with the vertical structure is manufactured on a gallium nitride semiconductor substrate with the homoepitaxy, the length of a drift region of the gallium nitride PN diode with the vertical structure in the prior art is generally increased by increasing the thickness of an epitaxial layer to obtain higher blocking voltage, but the defect density of the gallium nitride epitaxial layer is in direct proportion to the thickness of the epitaxial layer, and the existing gallium nitride epitaxial technology is insufficient for preparing a self-supporting gallium nitride epitaxial wafer with large size, high performance and low cost, so that the performance and the application of the gallium nitride PN diode with the vertical structure are limited.
The anode electrode and the cathode electrode of the gallium nitride PN diode with the early transverse structure are distributed on the top surfaces of two sides of the device structure, the anode electrode and the cathode electrode of the gallium nitride PN diode with the mesa structure are distributed on the bottoms of two sides of the mesa, and the cathode electrode, the substrate, the drift layer, the device active layer and the anode electrode which form the device structure in the gallium nitride PN diode with the vertical structure are sequentially connected from bottom to top along the vertical direction, the anode electrode is positioned on the top surface of the device structure, the cathode electrode is positioned on the bottom surface of the device structure, or the cathode electrode is positioned on two sides of the bottom by manufacturing the mesa, and the anode electrode and the cathode electrode are of non-coplanar input-output electrode structures, so that the plane integration of the device and the application of the device in a power integrated circuit are inconvenient.
Disclosure of Invention
The invention aims at the problems and provides a gallium nitride PN diode which increases the path length of a drift region through an annular drift region structure so as to improve the blocking voltage of a device, and simultaneously, an anode electrode, a cathode electrode and a field plate electrode are converged on the top surface of the device structure to form a coplanar device input/output electrode structure, so that the planar integration of the device and the application of the gallium nitride PN diode in a power integrated circuit are realized conveniently, and the preparation method of the gallium nitride PN diode is provided.
The technical scheme of the invention is as follows: a preparation method of a gallium nitride PN diode with high blocking voltage comprises the following steps:
1) Preparing a substrate;
2) Growing an AlN transition layer with the thickness of 0.5 mu m on the substrate;
3) Growing an N8 μm thick on the transition layer ― GaN drift layer with Si doping concentration of 1x10 16 cm -3 ；
4) Growing N with a thickness of 0.5 μm on the drift layer + GaN ohmic contact layer with Si doping concentration of 6x10 19 cm -3 ；
5) Etching N + GaN ohmic contact layer and N ― -a GaN drift layer forming a drift channel inner isolation layer trench and a drift channel outer isolation layer trench;
6) Silicon dioxide or silicon nitride is deposited to fill the isolation layer groove in the drift channel and the isolation layer groove outside the drift channel, so as to form an isolation layer in the drift channel and an isolation layer outside the drift channel;
7) Etching an isolation layer in the drift channel to form a field plate groove;
8) Depositing Ti/Au to fill the field plate groove to form a field plate metal layer;
9) Etching N between isolation layers in drift channel + GaN ohmic contact layer and N ― -a GaN drift layer forming an active region recess;
10 N of 4 μm thick communication drift layer grown in active region recess ― A second semiconductor layer of GaN active region with Si doping concentration of 1x10 16 cm -3 ；
11 Growing a 1 μm thick P-GaN active region first semiconductor layer on the active region second semiconductor layer in the active region groove, wherein the Mg doping concentration is 3 x10 19 cm -3 ；
12 In the active region recess)P grown to a thickness of 0.5 μm on the first semiconductor layer of the active region + GaN active region ohmic contact layer with Mg doping concentration of 1x10 20 cm -3 ；
13 A photoresist mask layer for manufacturing an anode electrode, a cathode electrode and a field plate electrode;
14 Depositing Ti/Al/Ti/Au multi-metal layer on the photoresist mask layer to form an anode electrode, a cathode electrode and a field plate electrode.
15 600 ℃ and N 2 And annealing in atmosphere to form ohmic contact between the anode and cathode electrodes and the corresponding semiconductor layers.
A gallium nitride PN diode with high blocking voltage comprises a substrate, a transition layer, a drift layer, an active region, a drift channel, a field plate and a metal electrode layer;
the substrate, the transition layer and the drift layer are sequentially connected from bottom to top;
the active region comprises an active region second semiconductor layer, an active region first semiconductor layer and an active region ohmic contact layer which are sequentially connected from bottom to top;
the drift channel comprises a channel drift layer and a drift channel ohmic contact layer which are connected from bottom to top, and a drift channel inner isolation layer and a drift channel outer isolation layer which are positioned on the inner side and the outer side of the channel drift layer and the drift channel ohmic contact layer;
the active region and the drift channel are respectively connected with the upper end of the drift layer, and the two drift channels are arranged and positioned on two sides of the active region; the drift channel is isolated from the active region through an isolation layer in the drift channel;
the field plates are two and are respectively embedded in the corresponding isolation layers in the drift channels;
the metal electrode layer comprises an anode electrode, a cathode electrode and a field plate electrode;
the anode electrode is positioned on the top of the active region and is connected with the ohmic contact layer of the active region;
the cathode electrode is positioned at the top of the drift channel and is connected with the ohmic contact layer of the drift channel;
the field plate electrode is positioned on the top of the isolation layer and the field plate in the drift channel and is connected with the field plate.
The substrate is a Si substrate, a SiC substrate or a sapphire substrate.
The transition layer includes an AlN epitaxial layer.
The transition layer also comprises an AlGaN epitaxial layer connected to the AlN epitaxial layer from bottom to top.
The first semiconductor layer of the active region is a P-GaN epitaxial layer or an N-GaN epitaxial layer;
the active region second semiconductor layer, the drift layer and the channel drift layer are respectively N ― GaN epitaxial layer or P ― -a GaN epitaxial layer;
the ohmic contact layer of the active region is P + GaN epitaxial layer or N + -a GaN epitaxial layer;
the ohmic contact layer of the drift channel is N + GaN epitaxial layer or P + -a GaN epitaxial layer.
The isolation layer in the drift channel and the isolation layer outside the drift channel are respectively a silicon dioxide layer or a silicon nitride layer.
The field plate is a Ti/Au bimetallic layer.
The anode electrode, the cathode electrode and the field plate electrode are respectively Ti/Al/Ti/Au multi-metal layers.
The anode electrode, the cathode electrode and the field plate electrode are Cr/Al/Ti/Au multi-metal layers respectively.
The semiconductor device comprises a substrate, a transition layer, a drift layer, an active region, a drift channel, a field plate and a metal electrode layer; the second semiconductor layer of the active region, the drift layer and the two drift channels form an annular drift region structure, and compared with a gallium nitride PN diode with a transverse structure and only a transverse drift region or a gallium nitride PN diode with a vertical structure and only a vertical drift region, the total path length of the drift region in the invention is larger than the path length of the drift region in the gallium nitride PN diode with the transverse structure or the vertical structure, which are manufactured on the same substrate and epitaxial layer size, so that the blocking voltage of the gallium nitride PN diode is increased. The invention has the characteristics of improving the blocking voltage of the device, simultaneously converging the anode electrode, the cathode electrode and the field plate electrode on the top surface of the device structure to form a coplanar device input/output electrode structure, facilitating the realization of planar integration of the device, being applied to a power integrated circuit and the like.
Drawings
Figure 1 is a schematic view of the structure of the present invention,
figure 2 is a schematic diagram of the structure of step 4 of the present invention,
figure 3 is a schematic diagram of the structure of step 6 of the present invention,
figure 4 is a schematic diagram of the structure of step 8 of the present invention,
figure 5 is a schematic diagram of the structure of step 12 of the present invention,
fig. 6 is a schematic structural diagram of step 14 of the present invention.
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative only and are not to be construed as limiting the invention.
The invention discloses a preparation method of a gallium nitride PN diode with high blocking voltage, which is shown in figures 1-6, and comprises the following steps:
1) Preparing a 6-inch Si substrate, a SiC substrate or a sapphire substrate;
2) Growing an AlN transition layer with the thickness of 0.5 mu m on the substrate by adopting a Metal Organic Chemical Vapor Deposition (MOCVD) method;
3) Growing N with thickness of 8 mu m on the transition layer by adopting MOCVD method ― GaN drift layer with Si doping concentration of 1x10 16 cm -3 (including the channel drift layer);
4) Growing N with thickness of 0.5 mu m on the drift layer by adopting MOCVD method + GaN ohmic contact layer with Si doping concentration of 6x10 19 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the As shown in fig. 2;
5) Etching N by adopting a Reactive Ion Etching (RIE) or Inductively Coupled Plasma (ICP) plasma dry etching method + GaN ohmic contact layer and N ― -GaN drift layer formingAn isolation layer groove in the drift channel and an isolation layer groove outside the drift channel;
6) Silicon dioxide or silicon nitride is deposited by adopting a Plasma Enhanced Chemical Vapor Deposition (PECVD) method to fill the isolation layer groove in the drift channel and the isolation layer groove outside the drift channel, so as to form an isolation layer in the drift channel and an isolation layer outside the drift channel; as shown in fig. 3;
7) Etching an isolation layer in the drift channel by adopting an RIE (reactive ion etching) or ICP (inductively coupled plasma) method to form a field plate groove;
8) Adopting an electron beam sputtering or magnetron sputtering method to deposit Ti/Au to fill the field plate groove, and forming a field plate metal layer; as shown in fig. 4;
9) Etching N between isolation layers in drift channel by RIE or ICP method + GaN ohmic contact layer and part of N ― -a GaN drift layer forming an active region recess;
10 N of 4 μm thick communication drift layer grown in the active region groove by MOCVD ― A second semiconductor layer of GaN active region with Si doping concentration of 1x10 16 cm -3 ；
11 MOCVD method is adopted to grow a 1 μm thick P-GaN active region first semiconductor layer on the active region second semiconductor layer in the active region groove, and the doping concentration of Mg is 3 x10 19 cm -3 ；
12 P with thickness of 0.5 μm is grown on the first semiconductor layer of the active region in the groove of the active region by MOCVD method + GaN active region ohmic contact layer with Mg doping concentration of 1x10 20 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the As shown in fig. 5;
13 Forming a photoresist mask layer for manufacturing an anode electrode, a cathode electrode and a field plate electrode by adopting a photoetching method;
14 A Ti/Al/Ti/Au multi-metal layer is deposited on the photoresist mask layer by adopting an electron beam sputtering or magnetron sputtering method, and an anode electrode, a cathode electrode and a field plate electrode are formed by adopting a stripping method, as shown in figure 6.
15 600 ℃ and N 2 And annealing in atmosphere to form ohmic contact between the anode and cathode electrodes and the corresponding semiconductor layers.
A gallium nitride PN diode with high blocking voltage comprises a substrate, a transition layer, a drift layer, an active region, a drift channel, a field plate and a metal electrode layer;
the substrate, the transition layer and the drift layer are sequentially connected from bottom to top;
the active region comprises an active region second semiconductor layer, an active region first semiconductor layer and an active region ohmic contact layer which are sequentially connected from bottom to top;
the drift channel comprises a channel drift layer and a drift channel ohmic contact layer which are connected from bottom to top, and a drift channel inner isolation layer and a drift channel outer isolation layer which are positioned on the inner side and the outer side of the channel drift layer and the drift channel ohmic contact layer;
the active region and the drift channel are respectively connected with the upper end of the drift layer, and the two drift channels are arranged and positioned on two sides of the active region; the drift channel is isolated from the active region through an isolation layer in the drift channel;
the field plates are two and are respectively embedded in the corresponding isolation layers in the drift channels;
the metal electrode layer comprises an anode electrode, a cathode electrode and a field plate electrode;
the anode electrode is positioned on the top of the active region and is connected with the ohmic contact layer of the active region;
the cathode electrode is positioned at the top of the drift channel and is connected with the ohmic contact layer of the drift channel;
the field plate electrode is positioned on the top of the isolation layer and the field plate in the drift channel and is connected with the field plate.
The substrate is a Si substrate, a SiC substrate or a sapphire substrate.
The transition layer includes an AlN epitaxial layer.
The transition layer also comprises an AlGaN epitaxial layer connected to the AlN epitaxial layer from bottom to top.
The first semiconductor layer of the active region is a P-GaN epitaxial layer or an N-GaN epitaxial layer, and is used as a polar region of the gallium nitride PN diode;
the active region second semiconductor layer, the drift layer, and the channel drift layer are eachIs N ― GaN epitaxial layer or P ― A GaN epitaxial layer, which serves as the other polar region and drift layer of the gallium nitride PN diode of the present invention;
the ohmic contact layer of the active region is P + GaN epitaxial layer or N + -a GaN epitaxial layer for forming an ohmic contact to the anode electrode;
the ohmic contact layer of the drift channel is N + GaN epitaxial layer or P + -a GaN epitaxial layer for forming an ohmic contact to the cathode electrode.
The inner isolation layer of the drift channel and the outer isolation layer of the drift channel are silicon dioxide layers;
the isolation layer in the drift channel and the isolation layer outside the drift channel are silicon nitride layers.
The field plate is a Ti/Au bimetallic layer.
The anode electrode, the cathode electrode and the field plate electrode are respectively Ti/Al/Ti/Au multi-metal layers.
The anode electrode, the cathode electrode and the field plate electrode are Cr/Al/Ti/Au multi-metal layers respectively.
The first semiconductor layer and the second semiconductor layer respectively serve as two polar regions and a drift layer of the gallium nitride PN diode of the invention to form a functional region structure of the gallium nitride PIN diode of the invention. And in forward bias, the gallium nitride PN diode is conducted. In reverse bias, the gallium nitride PN diode has higher blocking voltage due to the characteristics of large forbidden band width and high breakdown electric field of the gallium nitride material, and the path total length of the special annular drift region is larger than the path length of the drift region in the gallium nitride PN diode with a transverse structure or a vertical structure manufactured on a substrate and an epitaxial layer with the same size, so that the blocking voltage of the gallium nitride PN diode is further improved, and meanwhile, the anode electrode, the cathode electrode and the field plate electrode of the device are gathered on the top surface of the structure to form a coplanar device input/output electrode structure, so that the planar integration of the device and the application in a power integrated circuit are conveniently realized.
The second semiconductor layer of the active region, the drift layer and the two drift channels form an annular drift region structure, and compared with a gallium nitride PN diode with a transverse structure and only a transverse drift region or a gallium nitride PN diode with a vertical structure and only a vertical drift region, the total path length of the drift region is larger than that of the drift region in the gallium nitride PN diode with the transverse structure or the vertical structure, which are manufactured on the same substrate and epitaxial layer in size, so that the blocking voltage of the gallium nitride PN diode is increased.
According to the invention, the field plate is used for applying potential independently through the field plate electrode, or is connected with the anode electrode for applying potential, or is connected with the cathode electrode for applying potential, so that the electric field distribution on the annular drift path is optimized, and the blocking voltage of the gallium nitride PN diode is further improved.
Compared with a gallium nitride PN diode with a transverse structure requiring a longer transverse drift region or a gallium nitride PN diode with a vertical structure requiring a thicker vertical drift region, the special annular current drift region structure does not require a longer or thicker gallium nitride epitaxial layer, can be manufactured into a gallium nitride PN diode with high blocking voltage by using a silicon-based gallium nitride substrate material with relatively mature process and relatively low cost in the prior art, and meets the requirement of large-scale application.
Meanwhile, the special annular current drift region structure can lead the anode electrode, the cathode electrode and the field plate electrode of the device to be gathered on the top surface of the device structure, namely the gallium nitride PN diode has the coplanar input and output electrode structure characteristics, and is convenient for realizing the planar integration of the device and being applied to a power integrated circuit.
The field plate used for adjusting the junction termination electric field can be independently applied with power through the field plate electrode, or connected with the anode electrode to apply the same power potential, or connected with the cathode electrode to apply the same power potential.
For the purposes of this disclosure, the following points are also described:
(1) The drawings of the embodiments disclosed in the present application relate only to the structures related to the embodiments disclosed in the present application, and other structures can refer to common designs;
(2) The embodiments disclosed herein and features of the embodiments may be combined with each other to arrive at new embodiments without conflict;
the above is only a specific embodiment disclosed in the present application, but the protection scope of the present disclosure is not limited thereto, and the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (10)

1. The preparation method of the gallium nitride PN diode with high blocking voltage is characterized by comprising the following steps of:
1) Preparing a substrate;
2) Growing an AlN transition layer with the thickness of 0.5 mu m on the substrate;
3) Growing an N8 μm thick on the transition layer ― GaN drift layer with Si doping concentration of 1x10 16 cm -3 ；
4) Growing N with a thickness of 0.5 μm on the drift layer + GaN ohmic contact layer with Si doping concentration of 6x10 19 cm -3 ；
5) Etching N + GaN ohmic contact layer and N ― -a GaN drift layer forming a drift channel inner isolation layer trench and a drift channel outer isolation layer trench;
6) Silicon dioxide or silicon nitride is deposited to fill the isolation layer groove in the drift channel and the isolation layer groove outside the drift channel, so as to form an isolation layer in the drift channel and an isolation layer outside the drift channel;
7) Etching an isolation layer in the drift channel to form a field plate groove;
8) Depositing Ti/Au to fill the field plate groove to form a field plate metal layer;
9) Etching N between isolation layers in drift channel + GaN ohmic contact layer and N ― -a GaN drift layer forming an active region recess;
10 N of 4 μm thick communication drift layer grown in active region recess ― A second semiconductor layer of GaN active region with Si doping concentration of 1x10 16 cm -3 ；
11 Growing a 1 μm thick P-GaN active region first semiconductor layer on the active region second semiconductor layer in the active region groove, wherein the Mg doping concentration is 3 x10 19 cm -3 ；
12 0.5 μm thick P is grown on the active region first semiconductor layer in the active region groove + GaN active region ohmic contact layer with Mg doping concentration of 1x10 20 cm -3 ；
13 A photoresist mask layer for manufacturing an anode electrode, a cathode electrode and a field plate electrode;
14 Depositing a Ti/Al/Ti/Au multi-metal layer on the photoresist mask layer to form an anode electrode, a cathode electrode and a field plate electrode;
15 600 ℃ and N 2 And annealing in atmosphere to form ohmic contact between the anode and cathode electrodes and the corresponding semiconductor layers.
2. The high blocking voltage gallium nitride PN diode prepared by the preparation method of the high blocking voltage gallium nitride PN diode according to claim 1, which is characterized by comprising a substrate, a transition layer, a drift layer, an active region, a drift channel, a field plate and a metal electrode layer;
the substrate, the transition layer and the drift layer are sequentially connected from bottom to top;
the active region comprises an active region second semiconductor layer, an active region first semiconductor layer and an active region ohmic contact layer which are sequentially connected from bottom to top;
the drift channel comprises a channel drift layer and a drift channel ohmic contact layer which are connected from bottom to top, and a drift channel inner isolation layer and a drift channel outer isolation layer which are positioned on the inner side and the outer side of the channel drift layer and the drift channel ohmic contact layer;
the active region and the drift channel are respectively connected with the upper end of the drift layer, and the two drift channels are arranged and positioned on two sides of the active region; the drift channel is isolated from the active region through an isolation layer in the drift channel;
the field plates are two and are respectively embedded in the corresponding isolation layers in the drift channels;
the metal electrode layer comprises an anode electrode, a cathode electrode and a field plate electrode;
the anode electrode is positioned on the top of the active region and is connected with the ohmic contact layer of the active region;
the cathode electrode is positioned at the top of the drift channel and is connected with the ohmic contact layer of the drift channel;
the field plate electrode is positioned on the top of the isolation layer and the field plate in the drift channel and is connected with the field plate.
3. The high blocking voltage gallium nitride PN diode of claim 2, wherein said substrate is a Si substrate, a SiC substrate or a sapphire substrate.
4. A high blocking voltage gallium nitride PN diode according to claim 2, wherein said transition layer comprises an AlN epitaxial layer.
5. The high blocking voltage gan PN diode of claim 4 wherein said transition layer further comprises an AlGaN epitaxial layer connected bottom-up to an AlN epitaxial layer.
6. The high blocking voltage GaN PN diode of claim 2 wherein said active region first semiconductor layer is a P-GaN epitaxial layer or an N-GaN epitaxial layer;
the active region second semiconductor layer, the drift layer and the channel drift layer are respectively N ― GaN epitaxial layer or P ― -a GaN epitaxial layer;
the ohmic contact layer of the active region is P + GaN epitaxial layer or N + -a GaN epitaxial layer;
the ohmic contact layer of the drift channel is N + GaN epitaxial layer or P + -a GaN epitaxial layer.
7. The high blocking voltage gan PN diode of claim 2 wherein said intra-drift channel isolation layer and said extra-drift channel isolation layer are silicon dioxide or silicon nitride layers.
8. A high blocking voltage gan PN diode of claim 2 wherein said field plate is a Ti/Au bi-metal layer.
9. A high blocking voltage gan PN diode of claim 2 wherein said anode electrode, cathode electrode and field plate electrode are Ti/Al/Ti/Au multimetal layers, respectively.
10. A high blocking voltage gan PN diode of claim 2 wherein said anode electrode, cathode electrode and field plate electrode are each Cr/Al/Ti/Au multimetal layers.
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102810566A (en) * 2011-06-03 2012-12-05 英飞凌科技奥地利有限公司 Power semiconductor device with high blocking voltage capacity
CN103107151A (en) * 2011-11-11 2013-05-15 万国半导体股份有限公司 Termination structure for gallium nitride Schottky diode
US9093568B1 (en) * 2014-04-16 2015-07-28 Infineon Technologies Ag Semiconductor diode
JP2015198133A (en) * 2014-03-31 2015-11-09 株式会社東芝 semiconductor device
CN111211160A (en) * 2020-01-15 2020-05-29 电子科技大学 Vertical GaN power diode
CN111919281A (en) * 2018-02-12 2020-11-10 克罗米斯有限公司 Method and system for forming doped regions in gallium nitride materials by diffusion

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109979935A (en) * 2017-12-28 2019-07-05 富士电机株式会社 The manufacturing method of semiconductor device and semiconductor device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102810566A (en) * 2011-06-03 2012-12-05 英飞凌科技奥地利有限公司 Power semiconductor device with high blocking voltage capacity
CN103107151A (en) * 2011-11-11 2013-05-15 万国半导体股份有限公司 Termination structure for gallium nitride Schottky diode
JP2015198133A (en) * 2014-03-31 2015-11-09 株式会社東芝 semiconductor device
US9093568B1 (en) * 2014-04-16 2015-07-28 Infineon Technologies Ag Semiconductor diode
CN111919281A (en) * 2018-02-12 2020-11-10 克罗米斯有限公司 Method and system for forming doped regions in gallium nitride materials by diffusion
CN111211160A (en) * 2020-01-15 2020-05-29 电子科技大学 Vertical GaN power diode

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
硅基AlGaN/GaN功率二极管研究;张安邦;《中国博士学位论文全文数据库》;全文 *

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