CN112736852B

CN112736852B - Overcurrent detection protection circuit

Info

Publication number: CN112736852B
Application number: CN202011595316.1A
Authority: CN
Inventors: 徐镇乾; 黄腾云; 刘斌彬; 吴宏达; 何月青; 卢林辉
Original assignee: United Automotive Electronic Systems Co Ltd
Current assignee: United Automotive Electronic Systems Co Ltd
Priority date: 2020-12-29
Filing date: 2020-12-29
Publication date: 2024-04-26
Anticipated expiration: 2040-12-29
Also published as: CN112736852A

Abstract

The invention discloses an overcurrent detection protection circuit which is used for carrying out overcurrent detection and protection on a circuit to be detected. The control logic module firstly acquires the duration of the overcurrent fault of the circuit to be detected, judges whether the duration exceeds the transient anti-current time of the electronic device in the circuit to be detected, and immediately turns off the circuit through hardware once the threshold value exceeding the transient anti-current time is found. By utilizing the technical scheme of the invention, the overcurrent fault processing time of the circuit to be detected can be shortened from the original hundred millisecond level to the microsecond level, and the damage of electronic devices in the circuit to be detected is effectively avoided. In addition, since the overcurrent fault processing time for the circuit to be detected is shortened to microsecond level, the electronic device with proper parameters (such as transient anti-current time) can be selected in the hardware type selection process applied to a specific platform or item.

Description

Overcurrent detection protection circuit

Technical Field

The invention belongs to the field of circuits, and particularly relates to an overcurrent detection protection circuit.

Background

Fig. 1 is a schematic diagram of a synchronous Buck circuit in the prior art, and it can be seen from fig. 1 that the synchronous Buck circuit mainly comprises a pulse width modulation transistor, a freewheel transistor, a current acquisition module, a voltage acquisition module, a feedback loop and a logic control module. Wherein U1 is the NOT gate and is used for reversing control signals, U2 is the control logic module, U3 is the input voltage acquisition module, U4 is the control loop module, U5 is the output voltage acquisition module, M1 is the Buck pulse width modulation transistor, M2 is the Buck freewheel transistor, I1 is the current acquisition module of pulse width modulation transistor M1, I2 is the current acquisition module of freewheel transistor M2, L1 and C1 are energy storage and filter inductance and capacitance respectively.

The current acquisition module I1 and the output voltage acquisition module U5 respectively transmit the acquired current and output voltage to the control loop module U4, and the control logic module U2 calculates a duty ratio signal required by the pulse width modulation transistor M1 in the switching period according to the inductance current and output voltage acquired by the control loop module U4 when the Buck pulse width modulation transistor is conducted and the input voltage value acquired by the input voltage acquisition module U3, and directly performs switching control on the Buck pulse width modulation transistor M1. The control signal sent by the control logic module U2 passes through the NOT gate U1, namely after the control of the follow current transistor M2 is reversed, the duty ratio of the control signal of the pulse width modulation transistor M1 and the duty ratio of the control signal of the follow current transistor M2 are complementary, and due to the existence of dead zones of the high and low switching tubes, the starting signal sent by the control logic module U2 to the follow current transistor M2 can be delayed for a period of time, so that direct conduction between a power supply and GND can be effectively prevented, and further a switching device is protected. When the input voltage changes suddenly, the output load changes suddenly (inductance current changes due to sudden load current changes) or the output voltage shakes due to other conditions, the duty ratio of the switching power device can be adjusted through the closed-loop feedback of the loop information, and the output voltage is kept stable within the precision range.

According to the technical scheme provided in the prior art, closed-loop control of the Buck circuit can be realized, and when the input voltage is suddenly changed or the output load current is suddenly changed, the stability of the output voltage is effectively maintained. However, in practical applications, the inventor finds that, due to different load requirements of different platform projects, the use of current resources of the SBC (System Basis Chips, system base chip) will also be different due to the differences between the platform and the projects. Generally, the current collection module I1 and the current collection module I2 are used in the SBC to limit the output according to the maximum current allowed to flow through the circuit, so that different platform projects can be selected according to the maximum current capability, and power devices such as transistors M1 and M2 and an inductor L1 are prevented from being burnt out due to long-time action response of the MCU in fault. However, the actual current is much smaller than the maximum current in the application, the probability of overcurrent is also smaller, and if the inductor and the capacitor are selected according to the maximum current, the cost of circuit hardware is increased, so that the resource waste is caused.

From the above analysis, the technical solutions proposed in the prior art have the following drawbacks: although the SBC is internally provided with current limiting, the current limiting is set according to the maximum output current, and the overcurrent detection mechanism is inconsistent with the application of actual projects and can cause excessive hardware cost and resource waste of the selection; in addition, once an overcurrent fault occurs, a fault code (i.e., OC flag) of the overcurrent fault is generated in the SBC, then the OC flag needs to be read through a MCU (Microcontroller Unit) task period and the device is turned off through a software instruction, and the process at least needs to be in hundred milliseconds, during which the service life of the electronic device can be shortened due to the overlarge current, and the electronic device can be broken down and damaged directly seriously, so that the safety of the circuit cannot be effectively ensured.

Therefore, there is a need to propose a solution that can reduce hardware cost and has high security.

Disclosure of Invention

The invention aims to provide an overcurrent detection protection circuit which is used for solving the problems of the prior art that an overcurrent detection mechanism is inconsistent with actual application, high cost of selected hardware and poor safety.

In order to solve the technical problems, the invention provides an overcurrent detection protection circuit for detecting and protecting an overcurrent of a circuit to be detected, wherein the overcurrent detection protection circuit comprises a first current acquisition module, an amplifying and comparing module, a control chip module and a control logic module;

The first current acquisition module is used for acquiring a first current flowing through the circuit to be detected and transmitting the first current to the amplifying and comparing module;

The amplifying and comparing module is used for amplifying the value of the first current, comparing the value with a first threshold value and outputting a comparison result to the control chip module and the control logic module;

the control chip module is used for selecting whether to perform software turn-off protection on the circuit to be detected or not based on the comparison result;

The control logic module is used for obtaining the duration time of the overcurrent fault of the circuit to be detected, and performing hardware shutdown protection on the circuit to be detected when the duration time is longer than a first time;

the first threshold is a value allowing the maximum current to flow through the circuit to be detected, and the first time is a transient anti-current time of an electronic device in the circuit to be detected.

Optionally, the amplifying and comparing module comprises a differential amplifier circuit and a comparator circuit;

The differential amplifier circuit is used for amplifying the value of the first current and transmitting the amplified current value to the comparator circuit;

The comparator circuit is used for comparing the amplified current value with the first threshold value and outputting the comparison result to the control chip module and the control logic module.

Optionally, the differential amplifier circuit includes an amplifier, a first resistor, a second resistor, a third resistor, and a fourth resistor;

The in-phase end of the amplifier is connected with one end of the first resistor, the other end of the first resistor is connected with the first current acquisition module, one end of the first resistor is also connected with one end of the fourth resistor, and the other end of the fourth resistor is grounded;

The inverting terminal of the amplifier is connected with one end of the second resistor and one end of the third resistor, and the other end of the second resistor is connected with the first current acquisition module;

the output end of the amplifier is connected with the other end of the third resistor, and the output end of the amplifier is also connected with the comparator circuit.

Optionally, the comparator circuit includes a comparator, a fifth resistor, and a sixth resistor;

the comparator has two input terminals and an output terminal;

one input end of the comparator is connected with one end of the fifth resistor, and the other end of the fifth resistor is connected with the output end of the amplifier;

the other input end of the comparator is connected with one end of the sixth resistor, and the other end of the sixth resistor is used for acquiring the first threshold value;

the output end of the comparator is used for outputting the comparison result to the control chip module and the control logic module.

Optionally, the control chip module comprises an SBC and is in communication connection with the SBC;

the SBC is used for outputting a corresponding first instruction to the MCU based on the comparison result, and the MCU is used for selecting whether to perform software turn-off protection on the circuit to be detected or not according to the first instruction.

Optionally, the SBC is further configured to store a corresponding fault code when the circuit to be detected has an overcurrent fault, and the MCU is further configured to read the fault code;

the SBC is provided with a counter, and the counter is used for acquiring and storing the times of overcurrent faults of the circuit to be detected in the restarting process and judging the fault type of the circuit to be detected;

and the fault code and the times of overcurrent faults of the circuit to be detected stored in the counter in the restarting process are cleared through the action of writing commands to the MCU.

Optionally, the MCU is further configured to provide and adjust a value of the first threshold, and the MCU is connected to the other end of the sixth resistor.

Optionally, the overcurrent detection protection circuit further comprises a filtering module;

the filtering module is respectively connected with the output end of the comparator, the SBC and the MCU.

Optionally, the filtering module comprises a filtering resistor and a filtering capacitor;

One end of the filter resistor is connected with the output end of the comparator, and the other end of the filter resistor is connected with the SBC and the control logic module;

One end of the filter capacitor is connected with the other end of the filter resistor, and the other end of the filter capacitor is grounded.

Optionally, the number of the filter capacitors is a plurality;

the filter capacitors are connected in parallel and are respectively connected with a switching device;

The switching device is also connected with the MCU, and the MCU is used for controlling the on-off of the switching device so as to control the on-off of the corresponding filter capacitor.

Optionally, the control logic module comprises a timer, a pulse generator, a driving circuit and a logic chip;

The timer is used for acquiring the duration time of the overcurrent fault of the circuit to be detected;

The logic chip is used for controlling the working state of the pulse generator and sending a turn-off instruction to the pulse generator when the duration time is longer than a first time;

the pulse generator is used for transmitting pulse control current to the driving circuit;

the driving circuit is used for controlling the on-off of the circuit to be detected based on the pulse control current;

And if the pulse generator receives the turn-off instruction, sending a corresponding pulse control current to the driving circuit to turn off the circuit to be detected so as to perform hardware turn-off protection on the circuit to be detected.

Optionally, the circuit to be detected comprises a Buck circuit;

The Buck circuit comprises a first power supply, an input voltage acquisition module, an output voltage acquisition module, a control loop module, a pulse width modulation transistor, a follow current transistor, an inverter, a first inductor, a first capacitor and a load;

The positive electrode of the first power supply is connected with the input ends of the first current acquisition module and the input voltage acquisition module respectively;

The input end of the pulse width modulation transistor is connected with the first current acquisition module, the output end of the pulse width modulation transistor is respectively connected with the input end of the freewheel transistor and one end of the first inductor, and the control end of the pulse width modulation transistor is connected with the output end of the control logic module;

The control end of the freewheel transistor is connected with the negative electrode of the inverter, and the output end of the freewheel transistor, one end of the first capacitor, one end of the load and the negative electrode of the first power supply are grounded;

The other end of the first inductor is connected with the other end of the first capacitive load, the other end of the load and the input end of the output voltage acquisition module;

The positive electrode of the inverter is connected with the output end of the control logic module;

the input end of the control loop module is respectively connected with the output end of the output voltage acquisition module and the first current acquisition module;

the output end of the input voltage acquisition module is connected with the input end of the control logic module.

Optionally, the Buck circuit further includes a second current acquisition module;

The second current acquisition module is arranged between the output end of the pulse width modulation transistor and the input end of the follow current transistor, and is connected with the input end of the control logic module.

Compared with the prior art, the invention has the following beneficial effects:

1. The invention provides an overcurrent detection protection circuit which is used for carrying out overcurrent detection and protection on a circuit to be detected. Besides the scheme of software turn-off protection through the control chip module in the prior art, a hardware turn-off protection scheme is additionally arranged. The control logic module firstly acquires the duration of the overcurrent fault of the circuit to be detected, judges whether the duration exceeds the transient anti-current time of the electronic device in the circuit to be detected, and immediately turns off the circuit through hardware once the threshold value exceeding the transient anti-current time is found. By utilizing the technical scheme of the invention, the overcurrent fault processing time of the circuit to be detected can be shortened from the original hundred millisecond level to the microsecond level, and the damage of electronic devices in the circuit to be detected is effectively avoided. In addition, since the overcurrent fault processing time for the circuit to be detected is shortened to microsecond level, the electronic device with proper parameters (such as transient anti-current time) can be selected when the method is applied to the hardware type selection process of a specific platform or item. For example, in the conventional technology, an inductance or a capacitance with a transient anti-current time of several hundred milliseconds may need to be selected, and after the technical scheme of the present invention is applied, only an inductance or a capacitance with a transient anti-current time of several tens of microseconds needs to be selected. According to the technical scheme, when the hardware is selected, the transient anti-current time is selected, compared with the mode selection according to the maximum current in the prior art, the hardware cost and the mode selection difficulty are greatly reduced, the hardware cost can be effectively reduced by 20% in actual application, and the implementation of projects is more beneficial. If the transient anti-current time of the selected hardware can meet the whole processing time of the software turn-off protection, the circuit to be detected is turned off through the software, and the software can process and record some overcurrent fault data before the turn-off; if the transient anti-current time of the selected hardware cannot meet the response time of the software, the hardware is used for quick turn-off, and the configuration can be carried out according to different requirements, so that the flexibility of the system is improved.

2. The filter module can be arranged at the output end of the comparator, and can effectively filter out high-frequency noise signals in the circuit, so that the accuracy of overcurrent fault judgment is further ensured, and the robustness of the circuit is improved.

3. The filter capacitors are connected in parallel, and are respectively connected with a switching device, the switching devices are also connected with the MCU, and the MCU is used for controlling the on-off of the switching devices so as to control the on-off of the corresponding filter capacitors. Through the circuit structure, the MCU can be used for controlling the configuration of the capacitor in the filtering module, so that the filtering time is effectively controlled, and the requirements of the circuit to be detected with different transient anti-current time performances can be met.

4. The software turn-off protection scheme in the technical scheme is realized through the SBC and the MCU, the SBC stores corresponding fault codes when the circuit to be detected has overcurrent faults, and the MCU reads the fault codes. Because if the fault is closed through hardware when overcurrent fault occurs, the processing time is very short, the MCU is not as short as storing the fault type in the processing process, and at the moment, if the input voltage is in a normal range, the fault code of the SBC can be stored in the SBC first and cannot be lost, and the fault code can be read after the MCU is powered on normally next time, so that the fault type can be traced. This corresponds to an increased monitoring and diagnosis mechanism, further improving the safety level of the circuit function. And the fault codes in the SBC cannot be cleared through reading and can only be cleared through the MCU writing command, so that the reliability of the fault codes is ensured.

5. The counter in the SBC can be used for acquiring and storing the times of overcurrent faults of the circuit to be detected in the restarting process, and judging the fault type of the circuit to be detected. After the circuit to be detected is powered down, the hardware is automatically protected and started quickly, so that the normal starting process from the restarting of the SBC to the overcurrent diagnosis function after the last overcurrent fault processing is closed can be prevented from requiring tens of milliseconds (the restarting of the SBC requires the triggering of a wake-up signal), and if the overcurrent fault exists all the time, the inductor can be damaged. Because of the overcurrent fault code triggered by the overcurrent, the number of overcurrent times in the restarting process can be recorded through a counter in the SBC, and the MCU can judge whether the overcurrent fault is recovered or not through the number of overcurrent times. And the fault type of the circuit to be detected can be judged according to the times recorded by the counter. Because the circuit may have an excessively high pulse current at the moment of starting, the overcurrent fault protection is likely to be triggered, but the process is not always long, and the circuit may be recovered to be normal at the next starting, and by reading the overcurrent fault code in the MCU, a technician can infer that the last overcurrent fault may be caused by the excessively high pulse current at the moment of starting. And the data in the counter can be cleared only through the MCU write command, so that the reliability of the fault code is ensured.

Drawings

FIG. 1 is a schematic diagram of a synchronous Buck circuit in the prior art;

Fig. 2 is a schematic diagram of an overcurrent detection protection circuit according to an embodiment of the present invention;

wherein, in fig. 1: the device comprises a U1-NOT gate, a U2-control logic module, a U3-input voltage acquisition module, a U4-control loop module, a U5-output voltage acquisition module, an M1-Buck pulse width modulation transistor, an M2-Buck freewheel transistor, an I1-current acquisition module, an I2-current acquisition module, an L1-energy storage filter inductor and a C1 energy storage filter capacitor;

In fig. 2: 100-amplifying and comparing module, 200-control chip module, 300-filtering module, I1-first current acquisition module, I2-second current acquisition module, R1-first resistor, R2-second resistor, R3-third resistor, R4-fourth resistor, R5-fifth resistor, R6-sixth resistor, R7-filtering resistor, C1-first capacitor, C2, C3-filtering capacitor, M1-pulse width modulation transistor, M2-freewheel transistor, V1-first power supply, U1-inverter, U2-control logic module, U3-comparator, U4-control loop module, U5-output voltage acquisition module, U6-SBC, U7-MCU, U8-input voltage acquisition module, U9-amplifier.

Detailed Description

Specific embodiments of the present invention will be described in more detail below with reference to the drawings. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the invention.

In the description of the present invention, it should be understood that the directions or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", etc., are based on the directions or positional relationships shown in the drawings, are merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present invention.

Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.

Referring to fig. 2, an embodiment of the present invention provides an overcurrent detection protection circuit for detecting and protecting an overcurrent of a circuit to be detected, where the overcurrent detection protection circuit includes a first current acquisition module I1, an amplifying and comparing module 100, a control chip module 200, and a control logic module U2. The first current acquisition module I1 is configured to acquire a first current flowing through the circuit to be detected, and transmit the first current to the amplifying and comparing module 100. The amplifying and comparing module 100 is configured to amplify the value of the first current, compare the value with a first threshold, and output a comparison result to the control chip module 200 and the control logic module U2. The control chip module 200 is configured to select whether to perform software shutdown protection on the circuit to be detected based on the comparison result. The control logic module U2 is configured to obtain a duration of an overcurrent fault of the circuit to be detected, and perform hardware shutdown protection on the circuit to be detected when the duration is greater than a first time. The first threshold is a value allowing the maximum current to flow through the circuit to be detected, and the first time is a transient anti-current time of an electronic device in the circuit to be detected.

Compared with the prior art, the embodiment of the invention provides an overcurrent detection protection circuit which is used for carrying out overcurrent detection and protection on a circuit to be detected. In addition to the scheme of software shutdown protection by the control chip module 200 in the prior art, a hardware shutdown protection scheme is additionally provided. The control logic module U2 firstly acquires the duration of the overcurrent fault of the circuit to be detected, judges whether the duration exceeds the transient anti-current time of the electronic device in the circuit to be detected, and immediately turns off the circuit through hardware once the threshold value exceeding the transient anti-current time is found. By utilizing the technical scheme of the embodiment of the invention, the overcurrent fault processing time of the circuit to be detected can be shortened from the original hundred millisecond level to the microsecond level, and the damage of electronic devices in the circuit to be detected is effectively avoided. In addition, since the overcurrent fault processing time for the circuit to be detected is shortened to microsecond level, the electronic device with proper parameters (such as transient anti-current time) can be selected in the hardware type selection process applied to a specific platform or item. For example, in the conventional technology, an inductance or a capacitance with a transient anti-current time of several hundred milliseconds may need to be selected, and after the technical scheme of the present invention is applied, only an inductance or a capacitance with a transient anti-current time of several tens of microseconds needs to be selected. According to the technical scheme, when the hardware is selected, the transient anti-current time is selected, compared with the mode selection according to the maximum current in the prior art, the hardware cost and the mode selection difficulty are greatly reduced, the hardware cost can be effectively reduced by 20% in actual application, and the implementation of projects is more beneficial. If the transient anti-current time of the selected hardware can meet the whole processing time of the software turn-off protection, the circuit to be detected is turned off by the software, and the software can process and record some data before the turn-off; if the transient anti-current time of the selected hardware cannot meet the response time of the software, the hardware is used for quick turn-off, and the configuration can be carried out according to different requirements, so that the flexibility of the system is improved.

Further, the amplifying and comparing module 100 may include a differential amplifier circuit for amplifying the value of the first current and transmitting the amplified value of the first current to the comparator circuit. The comparator circuit is configured to compare the amplified current value with the first threshold value, and output the comparison result to the control chip module 200 and the control logic module U2. It will be appreciated by those skilled in the art that in some circuits to be tested, such as a Buck circuit, the magnitude of the current flowing through the Buck circuit is small during normal operation, and if an amplifier circuit is not connected for amplification, the current is directly connected to the comparator circuit, and since the comparators in a general comparator circuit are voltage comparators, the voltage drop of a small magnitude of the current after passing through a resistor may be only a few millivolts, and the comparing function of the comparator U3 may not be reliably triggered.

Further, referring to fig. 2, the differential amplifier circuit includes an amplifier U9, a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4. The in-phase end of the amplifier U9 is connected with one end of the first resistor R1, the other end of the first resistor R1 is connected with the first current acquisition module I1, one end of the first resistor R1 is also connected with one end of the fourth resistor R4, and the other end of the fourth resistor R4 is grounded. The inverting terminal of the amplifier U9 is connected with one end of the second resistor R2 and one end of the third resistor R3, and the other end of the second resistor R2 is connected with the first current acquisition module I1. The output end of the amplifier U9 is connected with the other end of the third resistor R3, and the output end of the amplifier U9 is also connected with the comparator circuit. It should be noted that, in the embodiment of the present invention, the inventor considers that the differential amplifying circuit has the advantage of eliminating zero drift, and the differential amplifying circuit effectively stabilizes the static operating point by using symmetry of circuit parameters and negative feedback effect, so as to amplify the differential mode signal and inhibit the common mode signal. Of course, in other embodiments of the present invention, other types of amplifier circuits may be selected, and are not limited to differential amplifier circuits, which may be implemented as preferred embodiments of the present invention.

Further, the comparator circuit includes a comparator U3, a fifth resistor R5, and a sixth resistor R6. The comparator U3 has two input ends and an output end, one input end of the comparator U3 is connected with one end of the fifth resistor R5, and the other end of the fifth resistor R5 is connected with the output end of the amplifier U9. The other input end of the comparator U3 is connected with one end of the sixth resistor R6, and the other end of the sixth resistor R6 is used for acquiring the first threshold value. The output end of the comparator U3 is configured to output the comparison result to the control chip module 200 and the control logic module U2.

In practical applications, the comparator U3 is mostly a voltage comparator, and therefore, a resistor is connected to the input terminal of the comparator, so that a voltage drop occurs after the current flows. It will be appreciated that the comparator U3 actually compares the voltage drop value after the first threshold and the amplified current pass through the resistor, respectively. For example, if the first threshold, that is, the value allowing the maximum current to flow through the circuit to be detected, is 1mA, the resistance values of the fifth resistor R5 and the sixth resistor R6 are both 1kΩ, and if the current amplified by the differential amplifier circuit is 2mA, the two voltage values actually compared by the comparator U3 are 1V and 2V. If the input of the comparator U3 is connected in accordance with fig. 2, the output of the amplifier U9 is connected to the non-inverting terminal of the comparator U3, and the first threshold is connected to the inverting terminal of the comparator U3, the output of the comparator U3 is at a high level. It should be noted that, in the embodiment of the present invention, the connection manner of the input terminal of the comparator U3 is set as described above, but the connection method is not limited to this connection method, and in other embodiments, the output terminal of the amplifier U9 may be connected to the inverting terminal of the comparator U3, and the first threshold is connected to the non-inverting terminal of the comparator U3, so that if the input parameter is set as described above, the output of the comparator U3 is at the low level. For convenience of description, in the embodiment of the present invention, the output end of the amplifier U9 is connected to the in-phase end of the comparator U3, and the scheme of accessing the first threshold value to the inverting end of the comparator U3 is described, and the implementation of another scheme is similar to the description thereof and is not repeated herein.

Optionally, referring to fig. 2, the control chip module 200 includes an SBC (U6) and an MCU (U7) communicatively connected to the SBC (U6). The SBC (U6) is used for outputting a corresponding first instruction to the MCU (U7) based on the comparison result, and the MCU (U7) is used for selecting whether to perform software turn-off protection on the circuit to be detected according to the first instruction. For example, if the first threshold, that is, the value allowing the maximum current to flow through the circuit to be detected, is 1mA, the resistance values of the fifth resistor R5 and the sixth resistor R6 are both 1kΩ, and if the current amplified by the differential amplifier circuit is 2mA, the output of the comparator U3 is high, which means that an overcurrent fault occurs. After receiving the high level, the SBC (U6) generates an overcurrent fault code (namely OC flag) internally, and sends a corresponding fault instruction (first instruction) to the MCU (U7), and after receiving the OC flag, the MCU (U7) reads the OC flag through a task cycle of the MCU (U7) and turns off the device through a software instruction. But this process typically requires hundreds of milliseconds, if the process is not continued for longer than the transient anti-current time of the electronic device in the circuit to be tested, the device can be turned off by software instructions. It is noted that in case of an overcurrent fault, the SBC (U6) may inform the MCU (U7) by setting an interrupt (instruction INTN) in the program or otherwise.

The software turn-off protection scheme in the technical scheme of the embodiment of the invention is realized by the SBC (U6) and the MCU (U7), the SBC (U6) stores corresponding fault codes when the circuit to be detected has overcurrent faults, and the MCU (U7) reads the fault codes. Because if the over-current fault occurs, the processing time is very short, and the MCU (U7) is not in time for storing the fault type in the processing process, if the input voltage is in the normal range, the fault code of the SBC (U6) can be stored in the SBC (U6) first and cannot be lost, and the fault code can be read after the MCU (U7) is powered on normally next time, so that the fault type can be traced. This corresponds to an increased monitoring and diagnosis mechanism, further improving the safety level of the circuit function. And the fault code in the SBC (U6) can not be cleared through reading and can only be cleared through the MCU (U7) write command, so that the reliability of the fault code is ensured.

Preferably, the SBC (U6) is further configured to store a corresponding fault code when the circuit to be detected has an overcurrent fault, and the MCU (U7) is further configured to read the fault code. The SBC (U6) is provided with a counter, and the counter is used for acquiring and storing the times of overcurrent faults of the circuit to be detected in the restarting process and judging the fault type of the circuit to be detected. The fault code and the times of overcurrent faults of the circuit to be detected stored in the counter in the restarting process are cleared through the action of writing commands to the MCU (U7).

And the counter in the SBC (U6) is used for acquiring and storing the times of overcurrent faults of the circuit to be detected in the restarting process, and judging the fault type of the circuit to be detected. After the circuit to be detected is powered down, the hardware is automatically protected and started quickly, so that the SBC (U6) needs tens of milliseconds to restart the normal starting process of the overcurrent diagnosis function after the last overcurrent fault treatment is closed (wake-up signal trigger is needed to restart the SBC (U6)), and if the overcurrent fault exists all the time, the inductor can be damaged. Because of the overcurrent fault code triggered by overcurrent, the number of overcurrent times in the restarting process can be recorded through a counter in the SBC (U6), and the MCU (U7) can judge whether the overcurrent fault is recovered or not through the number of overcurrent times. And the fault type of the circuit to be detected can be judged according to the times recorded by the counter. Since the circuit may have an excessively high pulse current at the moment of starting, the over-current fault protection is likely to be triggered by mistake, but the process is not always long, and the circuit may be recovered to be normal at the next starting, and by reading the over-current fault codes in the MCU (U7), it can be deduced that the last over-current fault may be caused by the excessively high pulse current at the moment of starting. And the data in the counter can be cleared only through the MCU (U7) write command, so that the reliability of the fault code is ensured.

Preferably, the value of the first threshold value may be provided by the MCU (U7), referring to fig. 2, a corresponding current value is output by using an AD inside the MCU (U7), and the MCU (U7) is connected to the other end of the sixth resistor R6. It is understood that the value of the first threshold is not limited to be obtained in this way, but may be obtained directly through some external device without using the MCU (U7), which is not described herein.

Preferably, please continue to refer to fig. 2, the over-current detection protection circuit further includes a filtering module 300, and the filtering module 300 is respectively connected to the output end of the comparator U3, the SBC (U6), and the MCU (U7). The filtering module 300 may be disposed at the output end of the comparator U3, where the filtering module 300 effectively filters out the high-frequency noise signal in the circuit, for example, as mentioned above, in the process of starting the circuit to be detected, an excessive pulse current may occur, and at this time, after the high-frequency signal is filtered out by the filtering module 300, a false triggering over-current fault will not occur. Further ensuring the accuracy of overcurrent fault judgment and improving the robustness of the circuit.

Preferably, the filtering module 300 includes a filtering resistor R7 and a filtering capacitor C2, one end of the filtering resistor R7 is connected to the output end of the comparator U3, and the other end of the filtering resistor R7 is connected to the SBC (U6) and the control logic module U2. One end of the filter capacitor C2 is connected with the other end of the filter resistor R7, and the other end of the filter capacitor C2 is grounded. It should be noted that the types of the filter circuits in the filter module 300 include, but are not limited to, a filter circuit formed by a resistor and a capacitor, and filtering implemented by only using a capacitor, and the specific types of the filter circuits in the filter module 300 are not limited and may be specifically selected according to actual needs. In the embodiment of the present invention, the first-order RC low-pass filter utilized by the filtering module 300 is not limited to the first-order RC low-pass filter, but other types of low-pass filters may be utilized, for example, a second-order RC low-pass filter or a third-order RC low-pass filter may be utilized, which is specifically selected according to practical needs. But it should be noted that the higher the order (number of elements) of the low-pass filter, the shorter the transition band thereof. Determining the transition zone may generally be performed in the following manner: the transition zone is required to be short in both cases, one being: when the frequency of the interference signal is close to the frequency of the working signal; for example, the useful signal has a frequency of 10-50MHz, the interference has a frequency of 100MHz, and the interference needs to be suppressed by 20dB (which is a lower requirement), and the order of the filter is required to be at least 4. Another case is: the interference intensity is strong, and the required inhibition amount is large; for example, if the frequency of the useful signal is 10MHz or less and the frequency of the interference is 100MHz, and it is necessary to suppress the interference by 60dB, the order of the filter is required to be at least 3.

Preferably, the number of the filter capacitors C2 is plural, please continue to refer to fig. 2, and the plural filter capacitors C2 are connected in parallel with each other and are respectively connected with a switching device. The switching device is also connected with the MCU (U7), and the MCU (U7) is used for controlling the on-off of the switching device so as to control the on-off of the corresponding filter capacitor C2.

In the embodiment of the present invention, the number of the filter capacitors C2 is two, in other embodiments, the number of the filter capacitors C2 may be more than two, and a plurality of the filter capacitors C2 may be connected in parallel with each other and connected to a switching device, where the switching device is further connected to the MCU (U7), and the MCU (U7) is configured to control on/off of the switching device to control on/off of the corresponding filter capacitor C2. Through the circuit structure, the MCU (U7) can be used for controlling the configuration of the capacitor in the filter module 300, so that the filter time is effectively controlled, and the requirements of the circuits to be detected with different transient anti-current time performances can be met. It can be understood that when the number of the filter capacitors is multiple, each filter capacitor can be connected with one switching device respectively, the MCU (U7) is used to control the on-off of each switching device respectively, all or part of the filter capacitors can be connected with one switching device, at this time, the switching devices can be logic circuits formed by some gates, the on-off of each switching device is controlled by controlling the output of the logic circuits through the MCU, and many other schemes are not repeated herein, which can be specifically selected according to the actual needs.

Preferably, the control logic module U2 includes a timer, a pulse generator, a driving circuit, and a logic chip. The timer is used for obtaining the duration time of the overcurrent fault of the circuit to be detected, and the logic chip is used for controlling the working state of the pulse generator and sending a turn-off instruction to the pulse generator when the duration time is longer than the first time. The pulse generator is used for transmitting pulse control current to the driving circuit, and the driving circuit is used for controlling the on-off of the circuit to be detected based on the pulse control current. And if the pulse generator receives the turn-off instruction, sending a corresponding pulse control current to the driving circuit to turn off the circuit to be detected so as to perform hardware turn-off protection on the circuit to be detected.

Since the filtering process of the filtering circuit in the filtering module 300 requires a period of time, the timer needs to consider the filtering time when acquiring the duration of the overcurrent fault, if the duration of the overcurrent fault is smaller than the first time and the filtering time, the overcurrent fault action may be triggered by mistake due to ripple jitter at this time, so that the counter can be reset, and the robustness of the circuit is further improved through the setting. In addition, in the implementation process of the overcurrent detection protection circuit provided by the invention, when judging whether to trigger the hardware shutdown protection, the sum value of the fault duration threshold value and the filtering time acquired by the timer is set to be less than or equal to the transient current resistance time of the electronic device in the circuit to be detected, so that the safety of the circuit can be ensured. If the transient anti-current time of the selected hardware can meet the whole processing time of the software turn-off protection, the circuit to be detected is turned off by the software, and the software can process and record some data before the turn-off; if the transient anti-current time of the selected hardware cannot meet the response time of the software, the hardware is used for quick turn-off, and the configuration can be carried out according to different requirements, so that the flexibility of the system is improved.

Optionally, please continue to refer to fig. 2, the circuit to be detected includes a Buck circuit, where the Buck circuit includes a first power supply V1, an input voltage acquisition module U8, an output voltage acquisition module U5, a control loop module U4, a pulse width modulation transistor M1, a freewheeling transistor M2, an inverter U1, a first inductor, a first capacitor, and a load. The positive electrode of the first power supply V1 is respectively connected with the input ends of the first current acquisition module I1 and the input voltage acquisition module U8. The input end of the pulse width modulation transistor M1 is connected with the first current acquisition module I1, the output end of the pulse width modulation transistor M1 is respectively connected with the input end of the freewheel transistor M2 and one end of the first inductor, and the control end of the pulse width modulation transistor M1 is connected with the output end of the control logic module U2. The control end of the freewheel transistor M2 is connected with the negative electrode of the inverter U1, and the output end of the freewheel transistor M2, one end of the first capacitor, one end of the load and the negative electrode of the first power supply V1 are all grounded. The other end of the first inductor is connected with the other end of the first capacitive load, the other end of the load and the input end of the output voltage acquisition module U5. The positive pole of the inverter U1 is connected with the output end of the control logic module U2, and the input end of the control loop module U4 is respectively connected with the output end of the output voltage acquisition module U5 and the first current acquisition module I1. The output end of the input voltage acquisition module U8 and the output end of the control loop module U4 are connected with the input end of the control logic module U2.

The pwm transistor M1 and the freewheel transistor M2 may be MOS transistors, and it is to be understood that the pwm transistor M1 and the freewheel transistor M2 may be NMOS transistors or PMOS transistors, and specifically, any MOS transistor is selected, which is not limited herein, and may be specifically selected according to actual needs. Referring to fig. 2, in the embodiment of the invention, the pwm transistor M1 and the freewheel transistor M2 are both illustrated as NMOS transistors. As can be seen from fig. 2, the drain of the pulse width modulation transistor M1 is connected to the first current collecting module I1, the source of the pulse width modulation transistor M1 is connected to the drain of the freewheel transistor M2 and one end of the first inductor, respectively, and the gate of the pulse width modulation transistor M1 is connected to the output end of the control logic module U2. The gate of the freewheel transistor M2 is connected to the negative electrode of the inverter U1, and the source of the freewheel transistor M2, one end of the first capacitor, one end of the load, and the negative electrode of the first power supply V1 are all grounded.

It should be noted that in the embodiment of the present application, only the case where the overcurrent detection protection circuit provided by the present application is applied to a Buck circuit is given, and it can be understood that the technical solution of the present application may be applied to other types of circuits, for example, in other embodiments, may also be applied to a BOOST circuit, or other types of switching power supply circuits, and may also perform overcurrent detection and protection on all power devices by using split DC-DC.

Optionally, the Buck circuit further includes a second current collecting module I2, where the second current collecting module I2 is disposed between the output end of the pulse width modulation transistor M1 and the input end of the freewheel transistor M2, and is connected to the input end of the control logic module U2.

With continued reference to fig. 2, in order to describe the technical solution of the present application in more detail, the following description is given of a technical solution of a synchronous Buck circuit to which the overcurrent detection protection circuit is added:

Fig. 2 is a synchronous Buck circuit diagram added with the overcurrent detection protection circuit, wherein the hardware protection is based on the current collected by the first current collection module I1 and the second current collection module I2 under the condition that the pulse width modulation transistor M1 is turned on and off, amplified by the amplifier U9, transmitted to the in-phase end of the comparator U3, compared with the reference voltage Vref of the inverting end, if the amplified voltage is smaller than the reference voltage Vref, the comparator U3 outputs a low level, and the overcurrent fault protection is not triggered under the condition, and the circuit works normally; when the voltage of the in-phase end is greater than or equal to the reference voltage Vref, the output end of the comparator U3 outputs a high level, the SBC (U6) is triggered to set an OC flag, meanwhile, the timer of the logic module U2 is controlled to start timing, the SBC (U6) can be informed to the MCU (U7) through INTN pull-down, and the MCU (U7) can read back fault codes in the SBC (U6) at the moment (the situation is based on required hardware turn-off time and software response time). If the duration of the high level output by the comparator U3 exceeds the timer setting time of the control logic module U2 and the filtering time formed by R7, C2 or C3 and other resistance capacitors, the Buck output is turned off through the hardware of the control logic module U2, so that the long-time overload operation of power devices such as transistors M1, M2 and L1 in the Buck circuit is prevented; because the MCU (U7) has longer fault corresponding time, the overcurrent time can be flexibly set according to the transient performance (namely transient anti-current time parameter) of an external device through a timer and a filter circuit of the control logic module U2, so that the damage of the device in a fault state can be avoided, the working performance under normal conditions can be met, the redundant design of the device is reduced, and the project cost is further reduced; if the failure time is less than the timer set time and the filter time, the counter is reset to clear the malfunction due to ripple jitter.

In addition, the Vref threshold of the inverting terminal of the comparator U3 can be set through the MCU (U7), so that different current requirements of the Buck circuit are met. The timer time of the control logic module U2 can be set through the MCU (U7), the filtering time of the filtering circuit can be controlled by the MCU (U7) to switch the capacitance configuration of the filtering circuit through the switch K, and the requirements of different transient current resistance performance inductors are met. The hardware is turned off rapidly, and meanwhile, the software processing of the MCU (U7) can be realized. The on/off of the hardware protection function can be set by the MCU (U7). If the transient current resisting time of the inductance with the hardware type can meet the whole processing time of MCU (U7) software, the Buck output is closed by the software, and the software can process and record some data before closing; if the transient anti-current time of the selected inductor cannot meet the response time of MCU (U7) software, hardware is used for quick turn-off, configuration can be carried out according to different requirements, and system flexibility is improved. Because if the overcurrent faults are closed through hardware, the time is very short, the MCU (U7) can not store the fault types, and if the input voltage is in a normal range, the OC flag of the SBC (U6) can be stored in the SBC (U6) for the MCU (U7) to read after the next normal power-on so as to trace the fault types. After the Buck is powered down, the SBC (U6) is automatically started in a hardware fast protection mode, and the design is because tens of milliseconds are needed from the restart of the SBC (U6) to the normal start of the overcurrent diagnosis function after the last overcurrent is closed (the restart of the SBC (U6) needs to be triggered by a wake-up signal), and if the overcurrent fault exists all the time, the inductor can be damaged. Because the OC flag triggered by the overcurrent can be used for recording the restarting overcurrent times through a counter, the MCU (U7) can judge whether the overcurrent fault is recovered or not through the overcurrent times, the OC flag of the SBC (U6) can not be read and can only be cleared through the MCU (U7) write command, the overcurrent counter also needs the MCU (U7) write command to be cleared, and the reliability of the fault code is ensured.

In summary, the invention has the following beneficial effects:

1. The invention provides an overcurrent detection protection circuit which is used for carrying out overcurrent detection and protection on a circuit to be detected. Besides the scheme of software turn-off protection through the control chip module in the prior art, a hardware turn-off protection scheme is additionally arranged. The control logic module firstly acquires the duration of the overcurrent fault of the circuit to be detected, judges whether the duration exceeds the transient anti-current time of the electronic device in the circuit to be detected, and immediately turns off the circuit through hardware once the threshold value exceeding the transient anti-current time is found. By utilizing the technical scheme of the invention, the overcurrent fault processing time of the circuit to be detected can be shortened from the original hundred millisecond level to the microsecond level, and the damage of electronic devices in the circuit to be detected is effectively avoided. In addition, since the overcurrent fault processing time for the circuit to be detected is shortened to microsecond level, the electronic device with proper parameters (such as transient anti-current time) can be selected in the hardware type selection process applied to a specific platform or item. For example, in the conventional technology, an inductance or a capacitance with a transient anti-current time of several hundred milliseconds may need to be selected, and after the technical scheme of the present invention is applied, only an inductance or a capacitance with a transient anti-current time of several tens of microseconds needs to be selected. When the hardware is selected, the hardware cost and the difficulty in selecting the hardware are greatly reduced, and the hardware cost can be effectively reduced by 20% in practical application, so that the method is more beneficial to implementation of projects. If the transient anti-current time of the selected hardware can meet the whole processing time of the software turn-off protection, the circuit to be detected is turned off by the software, and the software can process and record some data before the turn-off; if the transient anti-current time of the selected hardware cannot meet the response time of the software, the hardware is used for quick turn-off, and the configuration can be carried out according to different requirements, so that the flexibility of the system is improved.

In the description of the present specification, a description of the terms "one embodiment," "some embodiments," "examples," or "particular examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments. Further, one skilled in the art can engage and combine the different embodiments or examples described in this specification.

The foregoing is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Any person skilled in the art will make any equivalent substitution or modification to the technical solution and technical content disclosed in the invention without departing from the scope of the technical solution of the invention, and the technical solution of the invention is not departing from the scope of the invention.

Claims

1. The overcurrent detection protection circuit is characterized by being used for carrying out overcurrent detection and protection on a circuit to be detected, and comprises a first current acquisition module, an amplifying and comparing module, a control chip module and a control logic module;

the control logic module is used for acquiring the duration time of the overcurrent fault of the circuit to be detected based on the comparison result, and performing hardware shutdown protection on the circuit to be detected when the duration time is longer than a first time;

2. The overcurrent detection protection circuit of claim 1, wherein the amplifying and comparing module comprises a differential amplifier circuit, a comparator circuit;

3. The overcurrent detection protection circuit of claim 2, wherein the differential amplifier circuit comprises an amplifier, a first resistor, a second resistor, a third resistor, and a fourth resistor;

4. The overcurrent detection protection circuit of claim 3, wherein the comparator circuit comprises a comparator, a fifth resistor, and a sixth resistor;

the comparator has two input terminals and an output terminal;

5. The overcurrent detection protection circuit of claim 4 wherein the control chip module comprises an SBC and an MCU communicatively coupled to the SBC;

6. The overcurrent detection protection circuit of claim 5, wherein the SBC is further configured to store a corresponding fault code when the circuit to be detected has an overcurrent fault, and the MCU is further configured to read the fault code;

7. The overcurrent detection protection circuit of claim 5 wherein the MCU is further configured to provide and adjust the value of the first threshold, the MCU being coupled to the other end of the sixth resistor.

8. The overcurrent detection protection circuit of claim 7, wherein the overcurrent detection protection circuit further comprises a filtering module;

9. The overcurrent detection protection circuit of claim 8, wherein the filter module comprises a filter resistor and a filter capacitor;

10. The overcurrent detection protection circuit of claim 9 wherein the number of filter capacitors is a plurality;

11. The overcurrent detection protection circuit of claim 1, wherein the control logic module comprises a timer, a pulse generator, a driving circuit, and a logic chip;

12. The overcurrent detection protection circuit of claim 1, wherein the circuit to be detected comprises a Buck circuit;

13. The overcurrent detection protection circuit of claim 12, wherein the Buck circuit further includes a second current acquisition module;