CN112736852A

CN112736852A - Overcurrent detection protection circuit

Info

Publication number: CN112736852A
Application number: CN202011595316.1A
Authority: CN
Inventors: 徐镇乾; 黄腾云; 刘斌彬; 吴宏达; 何月青; 卢林辉
Original assignee: United Automotive Electronic Systems Co Ltd
Current assignee: United Automotive Electronic Systems Co Ltd
Priority date: 2020-12-29
Filing date: 2020-12-29
Publication date: 2021-04-30
Anticipated expiration: 2040-12-29
Also published as: CN112736852B

Abstract

The invention discloses an overcurrent detection protection circuit which is used for carrying out overcurrent detection and protection on a circuit to be detected. The control logic module firstly obtains the duration time of the overcurrent fault of the circuit to be detected, judges whether the duration time exceeds the transient anti-current time of an electronic device in the circuit to be detected, and immediately turns off the circuit through hardware once the duration time exceeds the threshold value of the transient anti-current time. By using the technical scheme of the invention, the processing time of the overcurrent fault of the circuit to be detected can be shortened from the original hundred milliseconds level to the microsecond level, and the damage to an electronic device in the circuit to be detected is effectively avoided. In addition, because the processing time of the overcurrent fault of the circuit to be detected is shortened to the microsecond level, the electronic device with proper parameters (such as transient current resisting time) can be selected in the hardware model selection process applied to a specific platform or item.

Description

Overcurrent detection protection circuit

Technical Field

The invention belongs to the field of circuits, and particularly relates to an overcurrent detection protection circuit.

Background

Fig. 1 is a schematic diagram of a synchronous Buck circuit in the prior art, and it can be seen from fig. 1 that the synchronous Buck circuit mainly comprises a pulse width modulation transistor, a freewheeling transistor, a current acquisition module, a voltage acquisition module, a feedback loop and a logic control module. The U1 is a NOT gate used for inverting a control signal, the U2 is a control logic module, the U3 is an input voltage acquisition module, the U4 is a control loop module, the U5 is an output voltage acquisition module, the M1 is a Buck pulse width modulation transistor, the M2 is a Buck freewheeling transistor, the I1 is a current acquisition module of the pulse width modulation transistor M1, the I2 is a current acquisition module of the freewheeling transistor M2, and the L1 and the C1 are respectively an energy storage and filter inductor and a capacitor.

The current acquisition module I1 and the output voltage acquisition module U5 respectively transmit the acquired current and output voltage to the control loop module U4, and the control logic module U2 calculates a duty ratio signal required by the pulse width modulation transistor M1 in the switching period according to the inductive current and output voltage acquired by the control loop module U4 when the Buck pulse width modulation transistor is turned on and the input voltage value acquired by the input voltage acquisition module U3, and directly performs switching control on the Buck pulse width modulation transistor M1. The control signal sent by the control logic module U2 passes through the NOT gate U1, namely controls the freewheeling transistor M2 after inversion, the duty ratios of the control signals of the pulse width modulation transistor M1 and the freewheeling transistor M2 are complementary, and due to the existence of the dead zone of the high-low switching tube, the turn-on signal sent by the control logic module U2 to the freewheeling transistor M2 can delay a period of time, so that direct conduction between a power supply and GND can be effectively prevented, and the switching device is protected. When the input voltage suddenly changes, the output load suddenly changes (the load current suddenly changes to cause the inductance current to change) or the output voltage shakes due to other conditions, the duty ratio of the switching power device can be adjusted through the closed-loop feedback of the loop information, and the output voltage is kept stable in the precision range.

According to the technical scheme provided by the prior art, the closed-loop control of the Buck circuit can be realized, and the stability of the output voltage is effectively maintained when the input voltage suddenly changes or the output load current suddenly changes. However, in practical applications, the inventor finds that, due to the different load requirements of different platform projects, the use of SBC (System base Chips) current resources may also differ due to the differences between platforms and projects. Generally, a current collection module I1 and a current collection module I2 are used inside the SBC to limit the output current according to the maximum current allowed to flow through the circuit, so different platform items are selected according to the maximum current capability, and power devices such as transistors M1 and M2 and an inductor L1 are prevented from being burned out due to long-time action response of the MCU during a fault. However, in application, the actual current is much smaller than the maximum current, the probability of occurrence of an overcurrent condition is relatively low, and if the inductor and the capacitor are selected according to the maximum current, the hardware cost of the circuit is increased, so that the resource waste is caused.

From the above analysis, the technical solutions proposed in the prior art have the following drawbacks: although the SBC has a limited current, the SBC is set according to the maximum output current, and the overcurrent detection mechanism is not in accordance with the actual application, and the hardware cost for model selection is too high and resources are wasted; in addition, once an overcurrent fault occurs, a fault code (i.e., an OC flag) of the overcurrent fault is generated inside the SBC, and then the OC flag needs to be read through a task cycle of an mcu (microcontroller unit) and the device needs to be turned off through a software instruction, which requires at least hundred milliseconds, and during the process, the service life of the electronic device may be shortened due to an excessive current, and the electronic device may be directly broken down, so that the safety of the circuit cannot be effectively ensured.

Therefore, it is necessary to provide a solution that can reduce hardware cost and has high safety.

Disclosure of Invention

The invention aims to provide an overcurrent detection protection circuit which is used for solving the problems that an overcurrent detection mechanism is not in accordance with practical application, the hardware cost of model selection is high and the safety is poor in the prior art.

In order to solve the technical problem, the invention provides an over-current detection protection circuit which is used for performing over-current detection and protection on a circuit to be detected and comprises a first current acquisition module, an amplification and comparison module, a control chip module and a control logic module;

the first current acquisition module is used for acquiring a first current flowing through the circuit to be detected and transmitting the first current to the amplification and comparison module;

the amplifying and comparing module is used for amplifying the value of the first current, comparing the value of the first current with a first threshold value and outputting a comparison result to the control chip module and the control logic module;

the control chip module is used for selecting whether to perform software turn-off protection on the circuit to be detected based on the comparison result;

the control logic module is used for acquiring the duration time of the overcurrent fault of the circuit to be detected and performing hardware turn-off protection on the circuit to be detected when the duration time is longer than the first time;

the first threshold is a value of the maximum current allowed to flow through the circuit to be detected, and the first time is the transient current-resisting time of an electronic device in the circuit to be detected.

Optionally, the amplifying and comparing module comprises a differential amplifier circuit and a comparator circuit;

the differential amplifier circuit is used for amplifying the value of the first current and transmitting the amplified current value to the comparator circuit;

the comparator circuit is used for comparing the amplified current value with the first threshold value and outputting the comparison result to the control chip module and the control logic module.

Optionally, the differential amplifier circuit comprises an amplifier, a first resistor, a second resistor, a third resistor and a fourth resistor;

the in-phase end of the amplifier is connected with one end of the first resistor, the other end of the first resistor is connected with the first current acquisition module, one end of the first resistor is also connected with one end of the fourth resistor, and the other end of the fourth resistor is grounded;

the inverting end of the amplifier is connected with one end of the second resistor and one end of the third resistor, and the other end of the second resistor is connected with the first current acquisition module;

the output end of the amplifier is connected with the other end of the third resistor, and the output end of the amplifier is further connected with the comparator circuit.

Optionally, the comparator circuit comprises a comparator, a fifth resistor and a sixth resistor;

the comparator has two input ends and one output end;

one input end of the comparator is connected with one end of the fifth resistor, and the other end of the fifth resistor is connected with the output end of the amplifier;

the other input end of the comparator is connected with one end of the sixth resistor, and the other end of the sixth resistor is used for acquiring the first threshold;

and the output end of the comparator is used for outputting the comparison result to the control chip module and the control logic module.

Optionally, the control chip module comprises an SBC and an MCU in communication connection with the SBC;

the SBC is used for outputting a corresponding first instruction to the MCU based on the comparison result, and the MCU is used for selecting whether to carry out software turn-off protection on the circuit to be detected according to the first instruction.

Optionally, the SBC is further configured to store a corresponding fault code when the circuit to be detected has an overcurrent fault, and the MCU is further configured to read the fault code;

the SBC is provided with a counter, and the counter is used for acquiring and storing the times of overcurrent faults of the circuit to be detected in the restarting process and judging the fault type of the circuit to be detected according to the times;

and the fault code and the frequency of the overcurrent faults of the circuit to be detected in the restarting process, which are stored in the counter, are cleared by writing a command action to the MCU.

Optionally, the MCU is further configured to provide and adjust a value of the first threshold, and the MCU is connected to the other end of the sixth resistor.

Optionally, the over-current detection protection circuit further includes a filtering module;

and the filtering module is respectively connected with the output end of the comparator, the SBC and the MCU.

Optionally, the filtering module includes a filtering resistor and a filtering capacitor;

one end of the filter resistor is connected with the output end of the comparator, and the other end of the filter resistor is connected with the SBC and the control logic module;

one end of the filter capacitor is connected with the other end of the filter resistor, and the other end of the filter capacitor is grounded.

Optionally, the number of the filter capacitors is multiple;

the filter capacitors are connected in parallel with each other and are respectively connected with a switch device;

the switch device is further connected with the MCU, and the MCU is used for controlling the on-off of the switch device so as to control the on-off of the corresponding filter capacitor.

Optionally, the control logic module includes a timer, a pulse generator, a driving circuit, and a logic chip;

the timer is used for acquiring the duration time of the overcurrent fault of the circuit to be detected;

the logic chip is used for controlling the working state of the pulse generator and sending a turn-off instruction to the pulse generator when the duration is longer than a first time;

the pulse generator is used for transmitting pulse control current to the driving circuit;

the driving circuit is used for controlling the on-off of the circuit to be detected based on the pulse control current;

and if the pulse generator receives the turn-off instruction, sending corresponding pulse control current to the driving circuit to turn off the circuit to be detected so as to perform hardware turn-off protection on the circuit to be detected.

Optionally, the circuit to be detected comprises a Buck circuit;

the Buck circuit comprises a first power supply, an input voltage acquisition module, an output voltage acquisition module, a control loop module, a pulse width modulation transistor, a follow current transistor, a phase inverter, a first inductor, a first capacitor and a load;

the positive electrode of the first power supply is respectively connected with the first current acquisition module and the input end of the input voltage acquisition module;

the input end of the pulse width modulation transistor is connected with the first current acquisition module, the output end of the pulse width modulation transistor is respectively connected with the input end of the follow current transistor and one end of the first inductor, and the control end of the pulse width modulation transistor is connected with the output end of the control logic module;

the control end of the follow current transistor is connected with the negative electrode of the phase inverter, and the output end of the follow current transistor, one end of the first capacitor, one end of the load and the negative electrode of the first power supply are all grounded;

the other end of the first inductor is connected with the other end of the first capacitive load, the other end of the load and the input end of the output voltage acquisition module;

the positive electrode of the phase inverter is connected with the output end of the control logic module;

the input end of the control loop module is respectively connected with the output end of the output voltage acquisition module and the first current acquisition module;

the output end of the input voltage acquisition module and the output end of the control loop module are connected with the input end of the control logic module.

Optionally, the Buck circuit further comprises a second current collection module;

the second current collection module is arranged between the output end of the pulse width modulation transistor and the input end of the follow current transistor and is connected with the input end of the control logic module.

Compared with the prior art, the invention has the following beneficial effects:

1. the invention provides an overcurrent detection protection circuit which is used for carrying out overcurrent detection and protection on a circuit to be detected. Besides the scheme of performing software turn-off protection through a control chip module in the prior art, a hardware turn-off protection scheme is additionally arranged. The control logic module firstly obtains the duration time of the overcurrent fault of the circuit to be detected, judges whether the duration time exceeds the transient anti-current time of an electronic device in the circuit to be detected, and immediately turns off the circuit through hardware once the duration time exceeds the threshold value of the transient anti-current time. By using the technical scheme of the invention, the processing time of the overcurrent fault of the circuit to be detected can be shortened from the original hundred milliseconds level to the microsecond level, and the damage to an electronic device in the circuit to be detected is effectively avoided. In addition, because the processing time of the overcurrent fault of the circuit to be detected is shortened to the microsecond level, when the method is applied to the hardware model selection process of a specific platform or item, an electronic device with appropriate parameters (such as transient current withstanding time) can be selected. For example, in the conventional technology, an inductor or a capacitor with a transient current withstanding time of several hundred milliseconds may need to be selected, and after the technical scheme of the present invention is applied, an inductor or a capacitor with a transient current withstanding time of several tens of microseconds only needs to be selected. According to the technical scheme, when the hardware is selected, selection is carried out according to the transient anti-current time, compared with the mode selection carried out according to the maximum current in the prior art, the hardware cost and the mode selection difficulty are greatly reduced, 20% of the hardware cost can be effectively reduced in the actual application, and the method is more beneficial to project implementation. If the transient current resisting time of the selected hardware can meet the whole processing time of software turn-off protection, the circuit to be detected is closed through software, and the software can process and record some overcurrent fault data in advance before closing; if the transient current resisting time of the selected hardware cannot meet the response time of software, the hardware is used for fast switching off, configuration can be carried out according to different requirements, and the flexibility of the system is improved.

2. The output end of the comparator can be provided with the filtering module which effectively filters high-frequency noise signals in the circuit, so that the accuracy of overcurrent fault judgment is further ensured, and the robustness of the circuit is improved.

3. The number of the filter capacitors can be set to be multiple, the multiple filter capacitors are connected in parallel and are respectively connected with a switch device, the switch device is also connected with the MCU, and the MCU is used for controlling the on-off of the switch device so as to control the on-off of the corresponding filter capacitors. Through the circuit structure, the configuration of the capacitor in the filtering module can be controlled by the MCU, the filtering time is effectively controlled, and the requirements of the circuit to be detected on different transient current-resisting time performances can be met.

4. The software turn-off protection scheme in the technical scheme of the invention is realized by the SBC and the MCU, wherein the SBC stores a corresponding fault code when the overcurrent fault occurs in the circuit to be detected, and the MCU reads the fault code. If the input voltage is in a normal range, the fault code of the SBC can be stored in the SBC firstly and cannot be lost, and can be read by the MCU after the MCU is normally electrified next time, so that the fault type can be traced. This is equivalent to an added monitoring and diagnostic mechanism, further improving the safety level of the circuit function. And the fault code in the SBC can not be cleared by reading, and can only be cleared by the MCU write command, thereby ensuring the reliability of the fault code.

5. And a counter inside the SBC can be used for acquiring and storing the times of overcurrent faults of the circuit to be detected in the restarting process, and the fault type of the circuit to be detected is judged according to the times. After the SBC is powered off in the circuit to be detected, the hardware is quickly protected and automatically started, dozens of milliseconds are needed in the process from the SBC being restarted to the normal starting of the overcurrent diagnosis function (the SBC being restarted needs to be triggered by a wake-up signal) in order to prevent the SBC from being restarted to the normal starting of the overcurrent diagnosis function after the current overcurrent fault is processed and closed, and the inductor can be damaged if the overcurrent fault exists all the time. Due to the overcurrent fault code triggered by overcurrent, the number of times of overcurrent in the restarting process can be recorded by a counter inside the SBC, and the MCU can judge whether the overcurrent fault is recovered or not through the number of times of overcurrent. And the fault type of the circuit to be detected can be judged according to the times recorded by the counter. Because the circuit may have a high pulse current at the starting moment, the overcurrent fault protection is likely to be triggered, but the process is not likely to last too long, and the circuit may recover to normal at the next starting moment, and by reading an overcurrent fault code in the MCU, a technician can conclude that the last overcurrent fault is probably caused by the high pulse current at the starting moment. And the data in the counter can only be cleared through the MCU write command, so that the reliability of the fault code is ensured.

Drawings

FIG. 1 is a schematic diagram of a prior art synchronous Buck circuit;

fig. 2 is a schematic diagram of an over-current detection protection circuit according to an embodiment of the present invention;

wherein, in fig. 1: U1-NOT gate, U2-control logic module, U3-input voltage acquisition module, U4-control loop module, U5-output voltage acquisition module, M1-Buck pulse width modulation transistor, M2-Buck freewheeling transistor, I1-current acquisition module, I2-current acquisition module, L1-energy storage filter inductor and C1 are energy storage filter capacitors respectively;

in fig. 2: 100-amplification and comparison module, 200-control chip module, 300-filtering module, I1-first current acquisition module, I2-second current acquisition module, R1-first resistor, R2-second resistor, R3-third resistor, R4-fourth resistor, R5-fifth resistor, R6-sixth resistor, R7-filtering resistor, C1-first capacitor, C2, c3-filter capacitor, M1-pulse width modulation transistor, M2-follow current transistor, V1-first power supply, U1-inverter, U2-control logic module, U3-comparator, U4-control loop module, U5-output voltage acquisition module, U6-SBC, U7-MCU, U8-input voltage acquisition module and U9-amplifier.

Detailed Description

The following describes in more detail embodiments of the present invention with reference to the schematic drawings. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.

In the description of the present invention, it is to be understood that the terms "center", "upper", "lower", "left", "right", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience in describing the present invention and simplifying the description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.

Referring to fig. 2, an embodiment of the invention provides an overcurrent detection protection circuit for performing overcurrent detection and protection on a circuit to be detected, where the overcurrent detection protection circuit includes a first current collection module I1, an amplification and comparison module 100, a control chip module 200, and a control logic module U2. The first current collection module I1 is used to obtain the first current flowing through the circuit to be tested and transmit the first current to the amplification and comparison module 100. The amplifying and comparing module 100 is configured to amplify the value of the first current, compare the amplified value with a first threshold, and output a comparison result to the control chip module 200 and the control logic module U2. The control chip module 200 is configured to select whether to perform software turn-off protection on the circuit to be detected based on the comparison result. The control logic module U2 is configured to acquire a duration of the overcurrent fault of the circuit to be detected, and perform hardware turn-off protection on the circuit to be detected when the duration is greater than a first time. The first threshold is a value of the maximum current allowed to flow through the circuit to be detected, and the first time is the transient current-resisting time of an electronic device in the circuit to be detected.

The embodiment of the invention provides an overcurrent detection protection circuit which is used for carrying out overcurrent detection and protection on a circuit to be detected. Besides the scheme of performing software shutdown protection by controlling the chip module 200 in the prior art, a hardware shutdown protection scheme is additionally provided. The control logic module U2 firstly obtains the duration of the overcurrent fault of the circuit to be detected, and judges whether the duration exceeds the transient current-resisting time of the electronic device in the circuit to be detected, and once the duration exceeds the threshold of the transient current-resisting time, the circuit is immediately turned off through hardware. By using the technical scheme of the embodiment of the invention, the overcurrent fault processing time of the circuit to be detected can be shortened from the original hundred milliseconds level to the microsecond level, and the damage to electronic devices in the circuit to be detected is effectively avoided. In addition, because the processing time of the overcurrent fault of the circuit to be detected is shortened to the microsecond level, the electronic device with proper parameters (such as transient current resisting time) can be selected in the hardware model selection process applied to a specific platform or item. For example, in the conventional technology, an inductor or a capacitor with a transient current withstanding time of several hundred milliseconds may need to be selected, and after the technical scheme of the present invention is applied, an inductor or a capacitor with a transient current withstanding time of several tens of microseconds only needs to be selected. According to the technical scheme of the embodiment of the invention, when the hardware is selected, the selection is carried out according to the transient anti-current time, compared with the prior art in which the selection is carried out according to the maximum current, the hardware cost and the selection difficulty are greatly reduced, and the hardware cost can be effectively reduced by 20% in the actual application, so that the method is more beneficial to the implementation of projects. If the transient current-resisting time of the selected hardware can meet the whole processing time of software turn-off protection, the circuit to be detected is closed through software, and the software can process and record some data in advance before closing; if the transient current resisting time of the selected hardware cannot meet the response time of software, the hardware is used for fast switching off, configuration can be carried out according to different requirements, and the flexibility of the system is improved.

Further, the amplifying and comparing module 100 may include a differential amplifier circuit and a comparator circuit, wherein the differential amplifier circuit is configured to amplify the value of the first current and transmit the amplified current value to the comparator circuit. The comparator circuit is configured to compare the amplified current value with the first threshold value, and output the comparison result to the control chip module 200 and the control logic module U2. It will be understood by those skilled in the art that in some circuits to be tested, such as the Buck circuit, during normal operation, the magnitude of the current flowing through the Buck circuit is very small, and if an amplifier circuit is not connected to amplify the current, the current is directly connected to the comparator circuit, and since the comparators in the general comparator circuit are all voltage comparators, the voltage drop of the current with a very small magnitude passing through a resistor may be only a few millivolts, and the comparison function of the comparator U3 may not be reliably triggered.

Further, referring to fig. 2, the differential amplifier circuit includes an amplifier U9, a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4. The in-phase end of the amplifier U9 is connected with one end of the first resistor R1, the other end of the first resistor R1 is connected with the first current acquisition module I1, one end of the first resistor R1 is also connected with one end of the fourth resistor R4, and the other end of the fourth resistor R4 is grounded. The inverting terminal of the amplifier U9 is connected to one terminal of the second resistor R2 and one terminal of the third resistor R3, and the other terminal of the second resistor R2 is connected to the first current collecting module I1. The output end of the amplifier U9 is connected with the other end of the third resistor R3, and the output end of the amplifier U9 is also connected with the comparator circuit. It should be noted that, the differential amplifier circuit in the embodiment of the present invention is considered by the inventor to have the advantage of eliminating the zero drift, and the differential amplifier circuit effectively stabilizes the quiescent operating point by using the symmetry of the circuit parameters and the negative feedback effect to amplify the differential mode signal and suppress the common mode signal. Of course, in other embodiments of the present invention, other types of amplifier circuits can be selected, and are not limited to the differential amplifier circuit, and the differential amplifier circuit can be implemented as a preferred embodiment of the present invention.

Further, the comparator circuit includes a comparator U3, a fifth resistor R5, and a sixth resistor R6. The comparator U3 has two input terminals and an output terminal, one input terminal of the comparator U3 is connected with one end of the fifth resistor R5, and the other end of the fifth resistor R5 is connected with the output terminal of the amplifier U9. The other input end of the comparator U3 is connected to one end of the sixth resistor R6, and the other end of the sixth resistor R6 is used for obtaining the first threshold. The output end of the comparator U3 is used for outputting the comparison result to the control chip module 200 and the control logic module U2.

In practical applications, the comparator U3 is mostly a voltage comparator, and therefore, a resistor is connected to its input terminal, so that there is a voltage drop after the current flows through it. It will be appreciated that the comparator U3 actually compares the first threshold value to the voltage drop across the resistor after the amplified current has passed through the resistor. For example, if the first threshold value, that is, the value of the maximum current allowed to flow through the circuit to be detected, is 1mA, the resistances of the fifth resistor R5 and the sixth resistor R6 are both 1k Ω, and at this time, if the current amplified by the differential amplifier circuit is 2mA, the two voltage values actually compared by the comparator U3 are 1V and 2V. If the input terminal of the comparator U3 is connected as shown in FIG. 2, the output terminal of the amplifier U9 is connected to the non-inverting terminal of the comparator U3, and the first threshold is connected to the inverting terminal of the comparator U3, the output of the comparator U3 is high. It should be noted that, in the embodiment of the present invention, the input terminal of the comparator U3 is connected as described above, but is not limited to this connection, and in other embodiments, the output terminal of the amplifier U9 may be connected to the inverting terminal of the comparator U3, and the first threshold value is connected to the non-inverting terminal of the comparator U3, so that the output of the comparator U3 is at a low level if the input parameters are as described above. For convenience of illustration, in the embodiments of the present invention, the output terminal of the amplifier U9 is connected to the non-inverting terminal of the comparator U3, and the inverting terminal of the comparator U3 is connected to the first threshold, which is similar to the first threshold.

Optionally, with continued reference to fig. 2, the control chip module 200 includes an SBC (U6) and an MCU (U7) communicatively connected to the SBC (U6). The SBC (U6) is used for outputting a corresponding first instruction to the MCU (U7) based on the comparison result, and the MCU (U7) is used for selecting whether to perform software shutdown protection on the circuit to be detected according to the first instruction. For example, if the first threshold value, that is, the value of the maximum current allowed to flow through the circuit to be detected, is 1mA, the resistances of the fifth resistor R5 and the sixth resistor R6 are both 1k Ω, and at this time, if the current amplified by the differential amplifier circuit is 2mA, the output of the comparator U3 is a high level, which means that an overcurrent fault occurs. After receiving the high level, the SBC (U6) internally generates an overcurrent fault code (i.e., OC flag), and sends a corresponding fault instruction (first instruction) to the MCU (U7), and after receiving the OC flag, the MCU (U7) reads the OC flag through a task cycle of the MCU (U7) and turns off the device through a software instruction. But this process typically takes on the order of hundreds of milliseconds, and if the process does not last longer than the transient current immunity time of the electronic device in the circuit under test, the device can be turned off by software instructions. It should be noted that, in the event of an overcurrent fault, the SBC (U6) may notify the MCU (U7) by setting an interrupt (instruction INTN) in the program or by other means.

The software turn-off protection scheme in the technical scheme of the embodiment of the invention is realized by an SBC (U6) and an MCU (U7), wherein the SBC (U6) stores a corresponding fault code when the circuit to be detected has an overcurrent fault, and the MCU (U7) reads the fault code. Because the processing time is very short if the hardware is closed when overcurrent fault occurs, and the MCU (U7) cannot store the fault type in time in the processing process, at the moment, if the input voltage is in a normal range, the fault code of the SBC (U6) can be stored in the SBC (U6) firstly and cannot be lost, and can be read by the MCU (U7) after the MCU is normally powered on next time, so that the fault type can be traced. This is equivalent to an added monitoring and diagnostic mechanism, further improving the safety level of the circuit function. And the fault code in the SBC (U6) can not be cleared by reading, and can only be cleared by the MCU (U7) write command, thereby ensuring the reliability of the fault code.

Preferably, the SBC (U6) is further configured to store a corresponding fault code when the circuit to be detected has an overcurrent fault, and the MCU (U7) is further configured to read the fault code. The SBC (U6) is provided with a counter which is used for acquiring and storing the times of overcurrent faults of the circuit to be detected in the restarting process, and therefore the fault type of the circuit to be detected is judged. Wherein the fault code and the number of times of overcurrent faults of the circuit to be detected in the restarting process stored in the counter are cleared by writing command actions to the MCU (U7).

A counter inside the SBC (U6) is used for acquiring and storing the times of overcurrent faults of the circuit to be detected in the restarting process, and therefore the fault type of the circuit to be detected is judged. After the SBC (U6) is powered off in a circuit to be detected, hardware is protected and automatically started quickly, tens of milliseconds are needed in the process that the SBC (U6) is restarted to normally start an overcurrent diagnosis function (the SBC (U6) is restarted and needs to be triggered by a wake-up signal) after the current overcurrent fault processing is stopped last time, and if the overcurrent fault exists all the time at the moment, the inductor can be damaged. Due to the existence of an overcurrent fault code triggered by overcurrent, the number of overcurrent times in the restarting process can be recorded by a counter inside the SBC (U6), and the MCU (U7) can judge whether the overcurrent fault is recovered or not through the number of overcurrent times. And the fault type of the circuit to be detected can be judged according to the times recorded by the counter. Because the circuit may have a situation that the pulse current is high at the starting moment, the overcurrent fault protection is likely to be triggered by mistake, but the process is not likely to last too long, and the circuit can be recovered to be normal at the next starting moment, and the overcurrent fault codes in the MCU (U7) are read, so that the overcurrent fault codes can be used for deducing that the last overcurrent fault is probably caused by the reason that the pulse current is high at the starting moment. And the data in the counter can be cleared only through the MCU (U7) write command, so that the reliability of the fault code is ensured.

Preferably, the value of the first threshold may be provided by the MCU (U7), referring to fig. 2, the MCU (U7) is connected to the other end of the sixth resistor R6 by using an AD inside the MCU (U7) to output a corresponding current value. It is understood that the value of the first threshold is not limited to be obtained in this way, and may also be obtained directly through some external devices without using the MCU (U7), which is not described herein.

Preferably, with continued reference to fig. 2, the over-current detection protection circuit further includes a filtering module 300, and the filtering module 300 is respectively connected to the output terminal of the comparator U3, the SBC (U6), and the MCU (U7). The filtering module 300 may be disposed at the output end of the comparator U3, and the filtering module 300 effectively filters the high-frequency noise signal in the circuit, for example, as mentioned above, in the process of starting the circuit to be detected, a situation that the pulse current flows greatly may occur, and at this time, after the high-frequency signal is filtered by the filtering module 300, a situation that the overcurrent fault is erroneously triggered may not occur. The accuracy of overcurrent fault judgment is further ensured, and the robustness of the circuit is improved.

Preferably, the filter module 300 includes a filter resistor R7 and a filter capacitor C2, one end of the filter resistor R7 is connected to the output end of the comparator U3, and the other end of the filter resistor R7 is connected to the SBC (U6) and the control logic module U2. One end of the filter capacitor C2 is connected with the other end of the filter resistor R7, and the other end of the filter capacitor C2 is grounded. It should be noted that the types of the filter circuit in the filter module 300 include, but are not limited to, a filter circuit formed by a resistor and a capacitor, a filter circuit formed by a resistor and a inductor, and filtering is implemented only by a capacitor, and the specific type of the filter circuit in the filter module 300 is not limited, and may be specifically selected according to actual needs. In the embodiment of the present invention, the filtering module 300 utilizes a first-order RC low-pass filter, but is not limited to utilize the first-order RC low-pass filter, and may also utilize other types of low-pass filters, for example, a second-order RC low-pass filter or a third-order RC low-pass filter, which is selected according to actual needs. It should be noted that the higher the order (number of elements) of the low-pass filter, the shorter its transition band. Determining the transition zone may generally be performed as follows: the transition zone is required to be short in two cases, one is: when the frequency of the interference signal is close to the frequency of the working signal; for example, if the frequency of the useful signal is 10-50MHz and the frequency of the interference is 100MHz, the interference needs to be suppressed by 20dB (which is a lower requirement), and the order of the filter is required to be at least 4. The other situation is that: the interference strength is strong, and the required inhibition amount is large; for example, if the frequency of the desired signal is 10MHz or less and the frequency of the interference is 100MHz, and the interference needs to be suppressed by 60dB, the order of the filter is required to be at least 3.

Preferably, the number of the filter capacitors C2 is plural, and with reference to fig. 2, the filter capacitors C2 are connected in parallel and are respectively connected to a switch device. The switching device is further connected with the MCU (U7), and the MCU (U7) is used for controlling the on-off of the switching device so as to control the on-off of the corresponding filter capacitor C2.

In the embodiment of the present invention, the number of the filter capacitors C2 is two, in other embodiments, the number of the filter capacitors C2 may be more than two, a plurality of the filter capacitors C2 are connected in parallel to each other and are respectively connected to a switching device, the switching device is further connected to the MCU (U7), and the MCU (U7) is configured to control on/off of the switching device to control on/off of the corresponding filter capacitor C2. Through the circuit structure, the MCU (U7) can be utilized to control the configuration of the capacitor in the filter module 300, the filtering time is effectively controlled, and the requirements of the circuit to be detected on different transient current-resisting time performances can be met. It can be understood that, when the number of the filter capacitors is plural, each filter capacitor may be connected to one of the switch devices, and the MCU (U7) is used to control the on/off of each switch device, and all or part of the filter capacitors may also be connected to one of the switch devices, at this time, the switch device may be a logic circuit formed by some gate circuits, and the MCU controls the output of the logic circuit to control the on/off of each switch device.

Preferably, the control logic module U2 includes a timer, a pulse generator, a driving circuit, and a logic chip. The timer is used for obtaining the duration time of the overcurrent fault of the circuit to be detected, and the logic chip is used for controlling the working state of the pulse generator and sending a turn-off instruction to the pulse generator when the duration time is longer than the first time. The pulse generator is used for transmitting pulse control current to the driving circuit, and the driving circuit is used for controlling the on-off of the circuit to be detected based on the pulse control current. And if the pulse generator receives the turn-off instruction, sending corresponding pulse control current to the driving circuit to turn off the circuit to be detected so as to perform hardware turn-off protection on the circuit to be detected.

Since the filtering process of the filter circuit in the filtering module 300 needs a period of time, the timer needs to consider the filtering time when acquiring the duration of the over-current fault, and if the duration of the over-current fault is less than the first time and the filtering time, the over-current fault action may be triggered by a false trigger caused by ripple jitter, so that the counter can be reset, and the robustness of the circuit is further improved by the setting. In addition, in the implementation process of the over-current detection protection circuit provided by the invention, when judging whether to trigger hardware turn-off protection, the sum of the fault duration threshold value and the filtering time acquired by the timer is set to be less than or equal to the transient anti-current time of an electronic device in the circuit to be detected, so that the safety of the circuit can be ensured. If the transient current-resisting time of the selected hardware can meet the whole processing time of software turn-off protection, the circuit to be detected is closed through software, and the software can process and record some data in advance before closing; if the transient current resisting time of the selected hardware cannot meet the response time of software, the hardware is used for fast switching off, configuration can be carried out according to different requirements, and the flexibility of the system is improved.

Optionally, with continued reference to fig. 2, the circuit to be detected includes a Buck circuit, where the Buck circuit includes a first power source V1, an input voltage acquisition module U8, an output voltage acquisition module U5, a control loop module U4, a pulse width modulation transistor M1, a freewheel transistor M2, an inverter U1, a first inductor, a first capacitor, and a load. The positive electrode of the first power source V1 is connected to the input ends of the first current collecting module I1 and the input voltage collecting module U8, respectively. The input end of the pulse width modulation transistor M1 is connected to the first current collecting module I1, the output end of the pulse width modulation transistor M1 is connected to the input end of the freewheel transistor M2 and one end of the first inductor, respectively, and the control end of the pulse width modulation transistor M1 is connected to the output end of the control logic module U2. The control end of the freewheeling transistor M2 is connected to the cathode of the inverter U1, and the output end of the freewheeling transistor M2, one end of the first capacitor, one end of the load and the cathode of the first power source V1 are all grounded. The other end of the first inductor is connected with the other end of the first capacitive load, the other end of the load and the input end of the output voltage acquisition module U5. The positive electrode of the inverter U1 is connected to the output end of the control logic module U2, and the input end of the control loop module U4 is connected to the output end of the output voltage acquisition module U5 and the first current acquisition module I1, respectively. The output end of the input voltage acquisition module U8 and the output end of the control loop module U4 are connected with the input end of the control logic module U2.

The pulse width modulation transistor M1 and the freewheel transistor M2 may be MOS transistors, and it is understood that the pulse width modulation transistor M1 and the freewheel transistor M2 may be NMOS transistors or PMOS transistors, and specifically, which kind of MOS transistor is selected, which is not limited herein and may be selected according to actual needs. Referring to fig. 2, in the embodiment of the present invention, the pwm transistor M1 and the freewheel transistor M2 are both specifically illustrated as NMOS transistors. As can be seen from fig. 2, the drain of the pwm transistor M1 is connected to the first current collecting module I1, the source of the pwm transistor M1 is connected to the drain of the freewheel transistor M2 and one end of the first inductor, respectively, and the gate of the pwm transistor M1 is connected to the output terminal of the control logic module U2. The gate of the freewheeling transistor M2 is connected to the cathode of the inverter U1, and the source of the freewheeling transistor M2, one end of the first capacitor, one end of the load, and the cathode of the first power source V1 are all grounded.

It should be noted that, in the embodiment of the present invention, only the case that the over-current detection protection circuit proposed in the present application is applied to a Buck circuit is given, and it can be understood that the technical solution of the present application can be applied to other types of circuits besides the Buck circuit, for example, in other embodiments, the present application can also be applied to a BOOST circuit or other types of switching power supply circuits, and over-current detection and protection can be performed on all power devices by using a separate DC-DC.

Optionally, the Buck circuit further includes a second current collecting module I2, and the second current collecting module I2 is disposed between the output terminal of the pulse width modulation transistor M1 and the input terminal of the freewheel transistor M2, and is connected to the input terminal of the control logic module U2.

With reference to fig. 2, in order to describe the technical solution of the present application in more detail, the following is a description of a technical solution of a synchronous Buck circuit added with the over-current detection protection circuit:

fig. 2 is a synchronous Buck circuit diagram added with the overcurrent detection protection circuit, wherein hardware protection is based on the current collected by the first current collection module I1 and the second current collection module I2 under the condition that the pulse width modulation transistor M1 is turned on and off, the current is amplified by the amplifier U9 and transmitted to the in-phase end of the comparator U3, the current is compared with the reference voltage Vref at the anti-phase end, if the amplified voltage is less than the reference voltage Vref, the comparator U3 outputs a low level, overcurrent fault protection cannot be triggered under the condition, and the circuit works normally; when the voltage of the in-phase end is larger than or equal to the reference voltage Vref, the output end of the comparator U3 outputs a high level to trigger the SBC (U6) to set the OC flag, and at the same time, the control logic module U2 timer starts to time, and the SBC (U6) pulls down to notify the MCU (U7) through the INTN, and the MCU (U7) can read back the fault code (the hardware turn-off time and the software response time according to the requirement) in the SBC (U6) at the moment. If the high level duration time output by the comparator U3 exceeds the timer setting time of the control logic module U2 and the filtering time formed by resistance capacitors such as R7, C2 or C3, the Buck output is closed through the hardware of the control logic module U2, and further power devices such as transistors M1, M2 and L1 in the Buck circuit are prevented from overload operation for a long time; because the fault corresponding time of the MCU (U7) is longer, the overcurrent time can be flexibly set by controlling a timer and a filter circuit of the logic module U2 according to the transient performance (namely transient current-resistant time parameter) of an external device, so that the device can be prevented from being damaged in a fault state, the working performance under a normal condition can be met, the redundant design of the device is reduced, and the project cost is further reduced; if the fault time is less than the timer set time and the filtering time, the counter is reset to eliminate the false operation caused by ripple jitter.

In addition, the Vref threshold of the inverting terminal of the comparator U3 can be set through the MCU (U7), so that different current requirements of the Buck circuit are met. The timer time of the control logic module U2 can be set through an MCU (U7), and the filtering time of the filter circuit can be switched through a switch K controlled by the MCU (U7) to switch the capacitor configuration of the filter circuit, so that the requirements of different transient current resistance performance inductors are met. The method not only realizes the quick hardware shutdown, but also can realize the software processing of the MCU (U7). The on and off of the hardware protection function can be set by the MCU (U7). If the hardware-selected transient anti-current time of the inductor can meet the whole processing time of MCU (U7) software, the Buck output is closed through the software, and the software can process and record some data in advance before closing; if the transient current resisting time of the selected inductor cannot meet the software response time of the MCU (U7), the hardware is used for fast switching off, and the hardware can be configured according to different requirements, so that the flexibility of the system is improved. Since the time is very short because the MCU (U7) is not in time to store the fault type if the overcurrent fault is shut down through hardware, if the input voltage is in the normal range, the OC flag of the SBC (U6) can be stored in the SBC (U6) for the MCU (U7) to read after the MCU (U7) is normally powered on next time, so as to trace the fault type. After Buck is powered off, hardware fast protection of the SBC (U6) is automatically started, and the design is that after the last overcurrent is closed, dozens of milliseconds are required for restarting the SBC (U6) until an overcurrent diagnosis function is normally started (the SBC (U6) is restarted and needs to be triggered by a wake-up signal), and if an overcurrent fault exists all the time at the moment, the inductor can be damaged. Because the OC flag triggered by overcurrent can record the restarting overcurrent times through the counter, the MCU (U7) can judge whether the overcurrent fault is recovered or not through the overcurrent times, the OC flag of the SBC (U6) can not be read and can not be cleared, and can only be cleared through the MCU (U7) write command, and the overcurrent counter also needs the MCU (U7) write command to be cleared, thereby ensuring the reliability of the fault code.

In conclusion, the invention has the following beneficial effects:

1. the invention provides an overcurrent detection protection circuit which is used for carrying out overcurrent detection and protection on a circuit to be detected. Besides the scheme of performing software turn-off protection through a control chip module in the prior art, a hardware turn-off protection scheme is additionally arranged. The control logic module firstly obtains the duration time of the overcurrent fault of the circuit to be detected, judges whether the duration time exceeds the transient anti-current time of an electronic device in the circuit to be detected, and immediately turns off the circuit through hardware once the duration time exceeds the threshold value of the transient anti-current time. By using the technical scheme of the invention, the processing time of the overcurrent fault of the circuit to be detected can be shortened from the original hundred milliseconds level to the microsecond level, and the damage to an electronic device in the circuit to be detected is effectively avoided. In addition, because the processing time of the overcurrent fault of the circuit to be detected is shortened to the microsecond level, the electronic device with proper parameters (such as transient current resisting time) can be selected in the hardware model selection process applied to a specific platform or item. For example, in the conventional technology, an inductor or a capacitor with a transient current withstanding time of several hundred milliseconds may need to be selected, and after the technical scheme of the present invention is applied, an inductor or a capacitor with a transient current withstanding time of several tens of microseconds only needs to be selected. When the hardware is selected, the hardware cost and the selection difficulty are greatly reduced, and 20% of the hardware cost can be effectively reduced in practical application, which is more beneficial to the implementation of projects. If the transient current-resisting time of the selected hardware can meet the whole processing time of software turn-off protection, the circuit to be detected is closed through software, and the software can process and record some data in advance before closing; if the transient current resisting time of the selected hardware cannot meet the response time of software, the hardware is used for fast switching off, configuration can be carried out according to different requirements, and the flexibility of the system is improved.

In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example" or "a specific example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. And the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments. Furthermore, various embodiments or examples described in this specification can be combined and combined by those skilled in the art.

The above description is only a preferred embodiment of the present invention, and does not limit the present invention in any way. It will be understood by those skilled in the art that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. An over-current detection protection circuit is characterized by being used for over-current detection and protection of a circuit to be detected, and comprising a first current acquisition module, an amplification and comparison module, a control chip module and a control logic module;

the control logic module is used for acquiring the duration of the overcurrent fault of the circuit to be detected based on the comparison result, and performing hardware turn-off protection on the circuit to be detected when the duration is greater than the first time;

2. The over-current detection protection circuit of claim 1, wherein the amplifying and comparing module comprises a differential amplifier circuit, a comparator circuit;

3. The over-current detection protection circuit of claim 2, wherein the differential amplifier circuit comprises an amplifier, a first resistor, a second resistor, a third resistor and a fourth resistor;

4. The over-current detection protection circuit of claim 3, wherein said comparator circuit comprises a comparator, a fifth resistor and a sixth resistor;

the comparator has two input ends and one output end;

5. The overcurrent detection protection circuit as recited in claim 4, wherein the control chip module comprises an SBC and an MCU communicatively connected to the SBC;

6. The over-current detection protection circuit of claim 5, wherein the SBC is further configured to store a corresponding fault code when the circuit to be detected has an over-current fault, and the MCU is further configured to read the fault code;

7. The over-current detection protection circuit of claim 5, wherein said MCU is further configured to provide and adjust a value of said first threshold, said MCU being connected to another end of said sixth resistor.

8. The over-current detection protection circuit of claim 7, wherein said over-current detection protection circuit further comprises a filtering module;

9. The over-current detection protection circuit of claim 8, wherein the filter module comprises a filter resistor and a filter capacitor;

10. The over-current detection protection circuit according to claim 9, wherein the number of the filter capacitors is plural;

11. The over-current detection protection circuit of claim 1, wherein the control logic module comprises a timer, a pulse generator, a driving circuit and a logic chip;

12. The over-current detection protection circuit according to claim 1, wherein the circuit to be tested comprises a Buck circuit;

13. The over-current detection protection circuit of claim 12, wherein said Buck circuit further comprises a second current collection module;