CN117420349B - Overcurrent detection circuit - Google Patents
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- CN117420349B CN117420349B CN202311732798.4A CN202311732798A CN117420349B CN 117420349 B CN117420349 B CN 117420349B CN 202311732798 A CN202311732798 A CN 202311732798A CN 117420349 B CN117420349 B CN 117420349B
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Abstract
The invention discloses an overcurrent detection circuit, which relates to the technical field of electronic circuits, and comprises: the current-to-voltage conversion module is used for converting the high-frequency current signal to be detected into a first voltage signal; the judging module is used for outputting a second voltage signal by detecting whether the voltage value of the first voltage signal is larger than a reference voltage or not; a stabilizing module, configured to output a third voltage signal when the second voltage signal changes from a low level to a high level, where the third voltage signal maintains the high level for a first period of time; and the microprocessor is used for determining whether the high-frequency current signal to be detected is larger than a first current threshold value according to the third voltage signal. The high-frequency current signal detection circuit has the advantages that the large current to be detected is converted into the small current through the current transformer module to be sampled to obtain the voltage signal, the voltage signal is judged through the judging module, the voltage signal is maintained for one time through the stabilizing module, and the detection precision of the high-frequency current signal by the overcurrent detection circuit is improved.
Description
Technical Field
The present invention relates to the field of electronic circuits, and in particular, to an overcurrent detection circuit.
Background
The common alternating current over-current detection technology in the prior art is to convert an alternating current signal into a direct current signal by using a bridge rectifier circuit, and convert the direct current signal into a voltage signal by using a sampling resistor.
Because the bridge rectifier circuit is composed of 4 rectifier diodes, the reverse recovery time is long, and the rectified current error is larger in the high-frequency circuit, so that the detection precision is affected. And when the large current is monitored, the sampling resistor R1 has power limitation, and when the current exceeds a certain value, the resistor cannot work normally. The output signal is an analog signal, and a microprocessor is required to autonomously judge whether overcurrent or not, so that the detection judgment time is increased.
Disclosure of Invention
The invention provides an overcurrent detection circuit, which converts a detected high-frequency current signal into a voltage signal to further carry out overcurrent detection, so that the detection precision of the overcurrent detection circuit on the high-frequency current signal is improved.
According to an aspect of the present disclosure, there is provided an overcurrent detection circuit including: the system comprises an electrorheological voltage module, a judging module, a stabilizing module and a microprocessor;
the current transformer module is used for converting a high-frequency current signal to be detected into a first voltage signal;
the judging module is used for outputting a second voltage signal by detecting whether the voltage value of the first voltage signal is larger than a reference voltage or not;
a stabilizing module, configured to output a third voltage signal when the second voltage signal changes from a low level to a high level, where the third voltage signal maintains the high level for a first period of time;
and the microprocessor is used for determining whether the high-frequency current signal to be detected is larger than a first current threshold value according to the third voltage signal.
In a possible implementation manner, the over-current detection circuit further comprises an isolation module, which is used for performing level conversion on the third voltage signal and is used for isolating interference of an output signal of the stabilization module on the microprocessor.
In one possible implementation, the current transformer module includes: the current transformer L1, sampling resistor R6, third filter capacitor C3, wherein, the primary coil of current transformer L1 is connected to load resistor R and forms the return circuit, the secondary coil of current transformer L1 connects in parallel on sampling resistor R6, sampling resistor R6 with third filter capacitor C3 connects in parallel, wherein, the first pin ground connection of the secondary coil of current transformer L1.
In one possible implementation manner, the current of the primary coil of the current transformer L1, which is to be detected and to which the high-frequency current signal flows, on the load resistor R is a first current, the current of the secondary coil of the current transformer L1 is determined to be a second current according to the turns ratio of the primary coil and the secondary coil of the current transformer L1, and the first voltage signal is determined according to the sampling resistor R6 and the second current.
In one possible implementation manner, the judging module includes a high-speed differential comparator U1, a second current-limiting resistor R2, a fourth pull-up resistor R4, a fifth current-limiting resistor R5, a fourth filter capacitor C4, a seventh filter capacitor C7, and an eighth filter capacitor C8;
the secondary side output high-frequency current signal of the current transformer L1 is connected with the positive input end of the high-speed differential comparator U1 through the second current limiting resistor R2, the negative input end of the high-speed differential comparator U1 is connected with a reference power supply through the fifth current limiting resistor R5, the positive power supply end of the high-speed differential comparator U1 is connected with a first power supply VCC, the positive power supply end of the high-speed differential comparator U1 is grounded through a seventh filter capacitor C7, the negative power supply end of the high-speed differential comparator U1 is connected with a second power supply, the negative power supply end of the high-speed differential comparator U1 is grounded through an eighth filter capacitor C8, the output end of the high-speed differential comparator U1 is grounded through a fourth filter capacitor C4, and the output end of the high-speed differential comparator U1 is connected with the first power supply VCC through a fourth pull-up resistor R4.
In one possible implementation manner, the output terminal of the high-speed differential comparator U1 outputs a second voltage signal; when the voltage value of the reference power supply is larger than the voltage value of the first voltage signal, the voltage value of the second voltage signal is in a low level; when the voltage value of the reference power supply is smaller than the voltage value of the first voltage signal, the voltage value of the second voltage signal is at a high level.
In one possible implementation, the stabilizing module includes a monostable multivibrator U2, a first pull-up resistor R1, a third resistor R3, a first capacitor C1, a second filter capacitor C2, a fifth capacitor C), and a seventh resistor R7;
the output end of the high-speed differential comparator U1 is connected with a fourth pin 4 of the monostable multivibrator U2, a first pin 1 of the monostable multivibrator U2 is grounded, a second pin 2 of the monostable multivibrator U2 is grounded through the first capacitor C1, the second pin 2 of the monostable multivibrator U2 is connected with the first power supply VCC through the first pull-up resistor R1, a third pin 3 of the monostable multivibrator U2 is connected with the first power supply VCC through the third resistor R3, a third pin 3 of the monostable multivibrator U2 is connected with a fifth pin 5 of the monostable multivibrator U2, a sixth pin 6 of the monostable multivibrator U2 is connected with a sixth pin 8 of the monostable multivibrator U2 through a seventh resistor R7 and a fifth capacitor C5 which are connected in series, and a sixteenth pin 16 of the monostable multivibrator U2 is connected with the sixteenth pin 16 of the monostable multivibrator U2 through a sixteenth capacitor C2.
In one possible implementation manner, the first pull-up resistor R1 and the first capacitor C1 form a steady-state time control circuit, and the steady-state time is the product of the resistance value of the first pull-up resistor R1 and the current value of the first capacitor C1; the fifth capacitor C5 and the seventh resistor R7 form a filter circuit; when the second voltage signal changes from low level to high level, the fourth pin 4 of the monostable multivibrator U2 outputs a third voltage signal, and the third voltage signal maintains the high level for a first duration, wherein the first duration is a steady state time.
In one possible implementation manner, the isolation module includes an optocoupler U3, an eighth pull-up resistor R8, a sixth filter capacitor C6, and a dual diode clamp chip D1; the third voltage signal passes through the seventh resistor R7 and then is connected to the first pin 1 of the optocoupler U3, the second pin 2 of the optocoupler U3 is grounded, the third pin 3 of the optocoupler U3 is grounded, the fourth pin 4 of the optocoupler U3 is grounded through the sixth filter capacitor C6, the fourth pin 4 of the optocoupler U3 is connected to a 3.3V power supply through the eighth pull-up resistor R8, the positive electrode of the dual diode clamp chip D1 is grounded, the negative electrode of the dual diode clamp chip D1 is connected to the 3.3V power supply, the contact between two diodes in the dual diode clamp chip D1 is connected to the fourth pin 4 of the optocoupler U3, and the fourth pin 4 of the optocoupler U3 is connected to the input end of the microprocessor.
Compared with the prior art, the invention has the beneficial effects that:
the overcurrent detection circuit disclosed by the embodiment of the disclosure realizes that the large current to be detected is converted into the small current through the current transformer module to be sampled to obtain the voltage signal, the voltage signal is judged through the judging module, and the voltage signal is maintained for a period of time through the stabilizing module, so that the detection precision of the overcurrent detection circuit to the high-frequency current signal is improved.
Drawings
Fig. 1 shows a circuit diagram of a prior art ac over-current detection.
Fig. 2 shows a block diagram of an overcurrent detection circuit of an embodiment of the present disclosure.
Fig. 3 shows a block diagram of an overcurrent detection circuit of an embodiment of the disclosure.
Fig. 4 shows a circuit diagram of an overcurrent detection circuit according to an embodiment of the present disclosure.
Detailed Description
Various exemplary embodiments, features and aspects of the disclosure will be described in detail below with reference to the drawings. In the drawings, like reference numbers indicate identical or functionally similar elements. Although various aspects of the embodiments are illustrated in the accompanying drawings, the drawings are not necessarily drawn to scale unless specifically indicated.
The word "exemplary" is used herein to mean "serving as an example, embodiment, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.
In addition, numerous specific details are set forth in the following detailed description in order to provide a better understanding of the present disclosure. It will be understood by those skilled in the art that the present disclosure may be practiced without some of these specific details. In some instances, methods, means, elements, and circuits well known to those skilled in the art have not been described in detail in order not to obscure the present disclosure.
Fig. 1 shows a circuit diagram of ac over-current detection in the prior art of the present disclosure. In the prior art, a common ac over-current detection technology is to convert an ac current signal I into a dc current signal I1 by using a bridge rectifier circuit, and convert the dc current signal I into a voltage signal U by using a sampling resistor.
Because bridge rectifier circuit D1 comprises 4 rectifier diodes, reverse recovery time is long, can make the electric current mistake I1 after rectification great in the high frequency circuit, influences the detection precision. And when the large current is monitored, the sampling resistor R1 has power limitation, and when the current exceeds a certain value, the resistor R1 cannot work normally. In addition, the output signal is an analog signal, and a microprocessor is required to autonomously judge whether overcurrent or not, so that the detection judgment time is increased.
Fig. 2 shows a block diagram of an overcurrent detection circuit of an embodiment of the present disclosure. As shown in fig. 1, the overcurrent detection circuit may include: the system comprises an electrorheological voltage module, a judging module, a stabilizing module and a microprocessor;
the current transformer module may be used to convert a high frequency current signal to be detected (corresponding to the current input in fig. 2) into a first voltage signal.
The judging module can be used for outputting a second voltage signal by detecting whether the voltage value of the first voltage signal is larger than a reference voltage or not; for example, the voltage value of the first voltage signal may be compared with the voltage value of the reference voltage by the voltage comparator, and the second voltage signal may be output as a result of the comparison.
A stabilizing module, configured to output a third voltage signal when the second voltage signal changes from a low level to a high level, the third voltage signal maintaining the high level for a first period of time; for example, a third voltage signal is output by the monostable multivibrator U2, which maintains a high level for a first period of time.
And the microprocessor can be used for determining whether the high-frequency current signal to be detected is larger than a first current threshold value according to the third voltage signal.
The overcurrent detection circuit disclosed by the embodiment of the disclosure realizes that the large current to be detected is converted into the small current through the current transformer module to be sampled to obtain the voltage signal, the voltage signal is judged through the judging module, and the voltage signal is maintained for a period of time through the stabilizing module, so that the detection precision of the overcurrent detection circuit to the high-frequency current signal is improved.
Fig. 3 shows a block diagram of an overcurrent detection circuit of an embodiment of the disclosure. In a possible implementation manner, as shown in fig. 3, the over-current detection circuit further includes an isolation module, configured to level-convert the third voltage signal, and configured to isolate the output signal of the stabilization module from interfering with the electrical signal of the microprocessor. For example, the isolation module may include a high-speed optocoupler circuit.
Fig. 4 shows a circuit diagram of an overcurrent detection circuit according to an embodiment of the disclosure, and as shown in fig. 4, the current transformer module includes: the current transformer L1, sampling resistor R6, third filter capacitor C3, wherein, the primary coil of current transformer L1 is connected to load resistor R and forms the return circuit, the secondary coil of current transformer L1 connects in parallel on sampling resistor R6, sampling resistor R6 with third filter capacitor C3 connects in parallel, wherein, the first pin Ground (GND) of the secondary coil of current transformer L1.
For example, the current-to-voltage module is composed of a current transformer L1 and a sampling resistor R6, wherein the sampling resistor can be a high-precision low-temperature drift sampling resistor, the ratio of the number of turns of primary and secondary side coils of L1 is N1 to N2, the primary side input current is I1, and then the secondary side output current. I2 is subjected to high-precision low-temperature drift sampling of a resistor R6 to measure the voltage at two ends of the R6. Compared with the primary side large high-frequency current signal I1, the secondary side current I2 is a small high-frequency current signal, and the resistance power required by the sampling resistor R6 is small, so that the detection accuracy of the overcurrent detection circuit on the high-frequency current signal is improved by converting the large current to be detected into the small current for signal sampling.
In one possible implementation manner, the high-frequency current signal to be detected on the load resistor R or the current flowing into the primary coil of the current transformer L1 is a first current, the current of the secondary coil of the current transformer L1 is determined to be a second current according to the turns ratio of the primary coil and the secondary coil of the current transformer L1, and the first voltage signal is determined according to the sampling resistor R6 and the second current.
In one possible implementation manner, the judging module includes a high-speed differential comparator U1, a second current-limiting resistor R2, a fourth pull-up resistor R4, a fifth current-limiting resistor R5, a fourth filter capacitor C4, a seventh filter capacitor C7, and an eighth filter capacitor C8;
the secondary side output high-frequency current signal of the current transformer L1 is connected with the positive input end of the high-speed differential comparator U1 through the second current limiting resistor R2, the negative input end of the high-speed differential comparator U1 is connected with a reference power supply through the fifth current limiting resistor R5, the positive power supply end of the high-speed differential comparator U1 is connected with a first power supply VCC, the positive power supply end of the high-speed differential comparator U1 is grounded through a seventh filter capacitor C7, the negative power supply end of the high-speed differential comparator U1 is connected with a second power supply, the negative power supply end of the high-speed differential comparator U1 is grounded through an eighth filter capacitor C8, the output end of the high-speed differential comparator U1 is grounded through a fourth filter capacitor C4, and the output end of the high-speed differential comparator U1 is connected with the first power supply VCC through a fourth pull-up resistor R4.
In one possible implementation manner, the output terminal of the high-speed differential comparator U1 outputs a second voltage signal; when the voltage value VREF of the reference power supply is larger than the voltage value V1 of the first voltage signal, the voltage value of the second voltage signal is in a low level; when the voltage value VREF of the reference power supply is smaller than the voltage value V1 of the first voltage signal, the voltage value V2 of the second voltage signal is at a high level.
For example, when VREF > V1, the V2 level value is zero; when VREF < V1, the V2 level value is VCC. Whether the primary side current I1 of the current transformer L1 exceeds a preset value is judged according to whether the voltage value of the first voltage signal exceeds the voltage value VREF of the reference power supply. If the primary current I1 of the current transformer L1 exceeds the preset value, the output value of the voltage comparator is high level, and if the primary current I1 does not exceed the output value of the comparator, the output value of the voltage comparator is low level zero.
In one possible implementation, the stabilizing module includes a monostable multivibrator U2, a first pull-up resistor R1, a third resistor R3, a first capacitor C1, a second filter capacitor C2, a fifth capacitor C), and a seventh resistor R7;
the output end of the high-speed differential comparator U1 is connected with a fourth pin 4 of the monostable multivibrator U2, a first pin 1 of the monostable multivibrator U2 is grounded, a second pin 2 of the monostable multivibrator U2 is grounded through the first capacitor C1, the second pin 2 of the monostable multivibrator U2 is connected with the first power supply VCC through the first pull-up resistor R1, a third pin 3 of the monostable multivibrator U2 is connected with the first power supply VCC through the third resistor R3, a third pin 3 of the monostable multivibrator U2 is connected with a fifth pin 5 of the monostable multivibrator U2, a sixth pin 6 of the monostable multivibrator U2 is connected with a sixth pin 8 of the monostable multivibrator U2 through a seventh resistor R7 and a fifth capacitor C5 which are connected in series, and a sixteenth pin 16 of the monostable multivibrator U2 is connected with the sixteenth pin 16 of the monostable multivibrator U2 through a sixteenth capacitor C2. The filter capacitor C2 has the function of improving the differential mode interference resistance.
In one possible implementation manner, the first pull-up resistor R1 and the first capacitor C1 form a steady-state time control circuit, and the steady-state time is the product of the resistance value of the first pull-up resistor R1 and the current value of the first capacitor C1; the fifth capacitor C5 and the seventh resistor R7 form a filter circuit; when the second voltage signal changes from low level to high level, the fourth pin 4 of the monostable multivibrator U2 outputs a third voltage signal, and the third voltage signal maintains the high level for a first duration, wherein the first duration is a steady state time.
For example, when the voltage value V2 of the second voltage signal changes from low level to high level, the level signal enters from the fourth pin 4 of the monostable multivibrator U2, the third voltage signal is output from the sixth pin 6 of the monostable multivibrator U2, and the high level signal with t=r1×c1 time is maintained.
In one possible implementation manner, the isolation module includes an optocoupler U3, an eighth pull-up resistor R8, a sixth filter capacitor C6, and a dual diode clamp chip D1; the third voltage signal passes through the seventh resistor R7 and then is connected to the first pin 1 of the optocoupler U3, the second pin 2 of the optocoupler U3 is grounded, the third pin 3 of the optocoupler U3 is grounded, the fourth pin 4 of the optocoupler U3 is grounded through the sixth filter capacitor C6, the fourth pin 4 of the optocoupler U3 is connected to a 3.3V power supply through the eighth pull-up resistor R8, the positive electrode of the dual diode clamp chip D1 is grounded, the negative electrode of the dual diode clamp chip D1 is connected to the 3.3V power supply, the contact between two diodes in the dual diode clamp chip D1 is connected to the fourth pin 4 of the optocoupler U3, and the fourth pin 4 of the optocoupler U3 is connected to the input end of the microprocessor.
For example U3 may be a fast optocoupler. The level of the third voltage signal is converted into 3.3V level through the optical coupler U3, when the third voltage signal is at a high level, the optical coupler U3 is conducted, the voltage signal DI output by the fourth pin 4 of the optical coupler U3 is at a low level, when the third voltage signal is at a low level, the optical coupler U3 is not conducted, and the voltage signal DI output by the fourth pin 4 of the optical coupler U3 is at a high level of 3.3V. D1 is a dual diode clamp chip that can be used to protect the input-output interface IO of the microprocessor. When the voltage signal DI exceeds 3.3V, the level signal of DI will be clamped at a voltage drop of 3.3v+d1, and when the voltage signal is below GND1 (representing the ground of the digital circuit), the level signal of DI will be clamped at a voltage drop of-D1.
When the current I1 to be detected exceeds a preset value, the voltage value V1 of the first voltage signal is greater than the voltage value VREF of the reference voltage, the voltage value V2 of the second voltage signal is at a high level VCC, the voltage value V3 of the third voltage signal is at a high level VCC and is maintained for a time t, and the voltage value DI is at a low level.
When the current I1 to be detected does not exceed the preset value, the voltage value V1 of the first voltage signal is smaller than the voltage value VREF of the reference voltage, the voltage value V2 of the second voltage signal is low, the voltage value V3 of the third voltage signal is low, and the DI level is 3.3V high.
The level DI characterizes whether the current I1 exceeds a preset value.
Therefore, the analog voltage signal is converted into the digital high-level signal and the digital low-level signal through the isolation module, the detection speed of overcurrent detection is improved, and the technical problem that whether the output signal is an analog signal or not needs a microprocessor to autonomously judge whether the overcurrent exists or not and the detection judging time is increased is solved.
It should be noted that, for simplicity of description, the foregoing method embodiments are all described as a series of acts, but it should be understood by those skilled in the art that the present disclosure is not limited by the order of acts described, as some steps may be performed in other orders or concurrently in accordance with the present disclosure. Further, those skilled in the art will also appreciate that the embodiments described in the specification are all alternative embodiments, and that the acts and modules referred to are not necessarily required by the present disclosure.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to related descriptions of other embodiments.
In the several embodiments provided in the present disclosure, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, such as the division of the units, merely a logical function division, and there may be additional manners of dividing the actual implementation, such as multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, or may be in electrical or other forms.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in each embodiment of the present disclosure may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units described above may be implemented either in hardware or in software program modules.
The integrated units, if implemented in the form of software program modules, may be stored in a computer-readable memory for sale or use as a stand-alone product. Based on such understanding, the technical solution of the present disclosure may be embodied in essence or a part contributing to the prior art or all or part of the technical solution in the form of a software product stored in a memory, comprising several instructions for causing a computer device (which may be a personal computer, a server or a network device, etc.) to perform all or part of the steps of the method described in the various embodiments of the present disclosure. And the aforementioned memory includes: a U-disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing program codes.
Those of ordinary skill in the art will appreciate that all or a portion of the steps in the various methods of the above embodiments may be implemented by a program that instructs associated hardware, and the program may be stored in a computer readable memory, which may include: flash disk, read-Only Memory (ROM), random access Memory (Random Access Memory, RAM), magnetic disk or optical disk.
The foregoing has described in detail embodiments of the present disclosure, with specific examples being employed herein to illustrate the principles and implementations of the present disclosure, the above examples being provided solely to assist in understanding the methods of the present disclosure and their core ideas; meanwhile, as one of ordinary skill in the art will have variations in the detailed description and the application scope in light of the ideas of the present disclosure, the present disclosure should not be construed as being limited to the above description.
Various aspects of the present disclosure are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the disclosure. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer-readable program instructions.
The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The foregoing description of the embodiments of the present disclosure has been presented for purposes of illustration and description, and is not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the various embodiments described. The terminology used herein was chosen in order to best explain the principles of the embodiments, the practical application, or the technical improvements in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
Claims (3)
1. An overcurrent detection circuit, characterized in that the overcurrent detection circuit comprises: the system comprises an electrorheological voltage module, a judging module, a stabilizing module and a microprocessor;
the current transformer module is used for converting a high-frequency current signal to be detected into a first voltage signal;
the judging module is used for outputting a second voltage signal by detecting whether the voltage value of the first voltage signal is larger than a reference voltage or not;
the stabilizing module is used for outputting a third voltage signal when the second voltage signal is changed from low level to high level, and the third voltage signal maintains the high level of the first duration;
the microprocessor is used for determining whether the high-frequency current signal to be detected is larger than a first current threshold value according to the third voltage signal;
the overcurrent detection circuit further comprises an isolation module, a control module and a control module, wherein the isolation module is used for performing level conversion on the third voltage signal and isolating the interference of the output signal of the stabilizing module on the microprocessor;
the current transformer module includes: the current transformer (L1), the sampling resistor (R6) and the third filter capacitor (C3), wherein a primary coil of the current transformer (L1) is connected to the load resistor (R) to form a loop, a secondary coil of the current transformer (L1) is connected to the sampling resistor (R6) in parallel, the sampling resistor (R6) is connected to the third filter capacitor (C3) in parallel, and a first pin of the secondary coil of the current transformer (L1) is grounded;
the method comprises the steps that a to-be-detected high-frequency current signal on a load resistor (R) or a current flowing into a primary side coil of a current transformer (L1) is a first current, the current of a secondary side coil of the current transformer (L1) is determined to be a second current according to the turns ratio of the primary side coil and the secondary side coil of the current transformer (L1), and a first voltage signal is determined according to a sampling resistor (R6) and the second current;
the judging module comprises a high-speed differential comparator (U1), a second current-limiting resistor (R2), a fourth pull-up resistor (R4), a fifth current-limiting resistor (R5), a fourth filter capacitor (C4), a seventh filter capacitor (C7) and an eighth filter capacitor (C8);
the secondary side of the current transformer (L1) outputs a high-frequency current signal, the high-frequency current signal is connected with the positive input end of the high-speed differential comparator (U1) through the second current limiting resistor (R2), the negative input end of the high-speed differential comparator (U1) is connected with a reference power supply through the fifth current limiting resistor (R5), the positive power supply end of the high-speed differential comparator (U1) is connected with a first power supply (VCC), the positive power supply end of the high-speed differential comparator (U1) is grounded through a seventh filter capacitor (C7), the negative power supply end of the high-speed differential comparator (U1) is connected with a second power supply, the negative power supply end of the high-speed differential comparator (U1) is grounded through an eighth filter capacitor (C8), the output end of the high-speed differential comparator (U1) is grounded through a fourth filter capacitor (C4), and the output end of the high-speed differential comparator (U1) is connected with the first power supply (VCC) through the fourth pull-up resistor (R4); the output end of the high-speed differential comparator (U1) outputs a second voltage signal; when the voltage value of the reference power supply is larger than the voltage value of the first voltage signal, the voltage value of the second voltage signal is in a low level; when the voltage value of the reference power supply is smaller than that of the first voltage signal, the voltage value of the second voltage signal is in a high level;
the stabilizing module comprises a monostable multivibrator (U2), a first pull-up resistor (R1), a third resistor (R3), a first capacitor (C1), a second filter capacitor (C2), a fifth capacitor (C5) and a seventh resistor (R7);
wherein the output end of the high-speed differential comparator (U1) is connected with a fourth pin (4) of the monostable multivibrator (U2), a first pin (1) of the monostable multivibrator (U2) is grounded, a second pin (2) of the monostable multivibrator (U2) is grounded through the first capacitor (C1), a second pin (2) of the monostable multivibrator (U2) is connected with the first power supply (VCC) through the first pull-up resistor (R1), a third pin (3) of the monostable multivibrator (U2) is connected with the first power supply (VCC) through the third resistor (R3), a third pin (3) of the monostable multivibrator (U2) is connected with a fifth pin (5) of the monostable multivibrator (U2), a sixth pin (6) of the monostable multivibrator (U2) is connected with the fifth pin (5) of the monostable multivibrator (U2) through the third resistor (R3), a third pin (6) of the monostable multivibrator (U2) is connected with the fifth pin (5) of the monostable multivibrator (U2), a sixteenth pin (16) of the monostable multivibrator (U2) is grounded through the second filter capacitor (C2).
2. The overcurrent detection circuit according to claim 1, wherein the first pull-up resistor (R1) and the first capacitor (C1) constitute a steady-state time control circuit, the steady-state time being a product of a resistance value of the first pull-up resistor (R1) and a current value of the first capacitor (C1); the fifth capacitor (C5) and the seventh resistor (R7) form a filter circuit; when the second voltage signal is changed from low level to high level, a fourth pin (4) of the monostable multivibrator (U2) outputs a third voltage signal, and the third voltage signal maintains high level for a first duration, wherein the first duration is steady state time.
3. The overcurrent detection circuit according to claim 2, wherein the isolation module includes an optocoupler (U3), an eighth pull-up resistor (R8), a sixth filter capacitor (C6), a dual diode clamp chip (D1); the third voltage signal passes through the seventh resistor (R7) and then is connected with the first pin (1) of the optocoupler (U3), the second pin (2) of the optocoupler (U3) is grounded, the third pin (3) of the optocoupler (U3) is grounded, the fourth pin (4) of the optocoupler (U3) is grounded through the sixth filter capacitor (C6), the fourth pin (4) of the optocoupler (U3) is connected with a 3.3V power supply through the eighth pull-up resistor (R8), the positive electrode of the dual diode clamp chip (D1) is grounded, the negative electrode of the dual diode clamp chip (D1) is connected with the 3.3V power supply, a contact between two diodes in the dual diode clamp chip (D1) is connected with the fourth pin (4) of the optocoupler (U3), and the fourth pin (4) of the optocoupler (U3) is connected with the input end of the microprocessor.
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