CN112640355B - A MAC device and time point estimation method - Google Patents

Abstract

A MAC device and a time point estimation method, the MAC device includes: a MAC core unit and a physical medium connection sublayer PMA unit; wherein the PMA unit is used to obtain a first time point of a first bit, and send the first time point to a MAC core unit; wherein, the first time point of the first bit is the time point when the PMA unit sends the first bit; the MAC core unit is used to receive the target bit to be sent, according to the first time point, and the target bit The number of bits spaced between the bit and the first bit, and the second time point at which the PMA unit transmits the target bit is estimated. Using the above solution is beneficial to improve the accuracy of the estimated second time point.

Description

A MAC device and time point estimation method

technical field

The present application relates to the technical field of electronic communication, and in particular, to a MAC device and a time point estimation method.

Background technique

In a wireless network communication system, message interaction between network elements is mostly realized through interface chips. Usually, the interface chip includes a media access control circuit (media access control, MAC) and a serializer/deserializer (serializer/deserializer, serdes), wherein the MAC circuit further includes a MAC core (core) unit, a physical coding sublayer (physical coding sublayer). coding sublayer, PCS) unit and physical medium attachment sublayer (physical medium attachment, PMA) unit.

In the interface chip, the MAC core unit often needs to estimate the time point at which the PMA unit sends a specific bit to the serdes. For example, based on the Institute of Electrical and Electronics Engineers (IEEE) 1588 protocol, the MAC core unit needs to estimate The time point when the PMA unit sends the start bit of the 1588 message to the serdes, and adds the timestamp generated according to the time point to the 1588 message. For another example, based on the y1731 protocol, the MAC core unit needs to estimate that the PMA unit sends y1731 to the serdes The time point of the start bit of the message, and the timestamp needs to be filled in the corresponding field of the y1731 message according to the y1731 protocol.

However, with the advent of the fifth generation ( ^5th generation, 5G) mobile communication, the existing estimation methods have been unable to meet the accuracy requirements of the time point estimated by the MAC core unit for 5G communication. The accuracy of the time point needs to be further improved.

SUMMARY OF THE INVENTION

Embodiments of the present application provide a MAC device and a time point estimation method, so as to improve the accuracy of the estimated time point.

In a first aspect, an embodiment of the present application provides a medium access control MAC device, including: a MAC core unit and a physical medium connection sublayer PMA unit; wherein the PMA unit is used to obtain the first time point of the first bit, Then, the first time point is sent to the MAC core unit; wherein, the first time point of the first bit is the time point when the PMA unit sends the first bit; the MAC core unit is used to receive the target bit to be sent. , according to the above-mentioned first time point, and the number of bits spaced between the target bit and the first bit, estimate the second time point at which the PMA unit sends the target bit; wherein, the first bit and the target bit are PMA Bits in the data stream that the unit sends continuously.

With the above solution, the acquired first time point at which the PMA unit sends the first bit is a relatively accurate time point. And on this basis, since the PMA unit in the MAC device can continuously send out the data stream, therefore, between the second time point when the PMA unit sends the target bit and the first time point when the first bit is sent. The time interval can be estimated more accurately by the number of bits in the interval between the target bit and the first bit. Therefore, the MAC core unit can more accurately estimate the number of bits between the target bit and the first bit, and the first time point when the PMA sends the first bit, to obtain the target bit sent by the PMA unit. The second time point is beneficial to improve the accuracy of the time point estimated by the MAC core unit.

In a possible implementation manner, the PMA unit is directly connected with the MAC core unit; the PMA unit may directly send the first time point to the MAC core unit through the connection with the MAC core unit.

Since part of the MAC core unit and the PMA unit are unidirectionally transmitted, there is no transmission path from the PMA unit to the MAC core unit. With the above solution, by adding a direct connection between the PMA unit and the MAC core unit, a path for the PMA unit to send the first time point to the MAC core unit is provided.

In another possible implementation manner, the PMA unit may send the first time point to the MAC core unit via the PCS unit.

In a possible implementation manner, the PMA unit is further configured to: receive the first signal and data stream sent by the MAC core unit to the PMA unit via the PCS unit; wherein the first signal is used to instruct the PMA unit to receive from the PCS unit the first bit in the data stream.

Most PMA units cannot identify the function of the first bit from the data stream. With the above solution, the PMA unit can determine and determine the first bit in the received data stream according to the first signal, and then can obtain the first time point of the first bit.

In a possible implementation manner, the first bit may be a bit that satisfies a preset rule in the data stream sent by the MAC core unit to the PCS unit; wherein the preset rule includes the interval between any adjacent first bits Preset number of bits.

With the above solution, the MAC core unit can update the first time point every time after sending the preset number of bits. Since there is also a certain error between the clock of the MAC core unit and the clock of the PMA unit, updating the first time point at intervals can reduce the accumulation of errors between the clocks of the above two units, thereby further improving the time estimated by the MAC core unit point accuracy.

In a possible implementation manner, when the MAC core unit estimates the second time point when the PMA unit sends the target bit according to the first time point and the number of bits spaced between the target bit and the first bit, It is specifically used for: estimating the second time point according to the formula t2=t1+n*UI; wherein, t1 is the first time point; t2 is the second time point; n is the bit interval between the target bit and the first bit Number of bits; UI is the transmission time for the PMA unit to send 1-bit data.

In a possible implementation manner, the MAC core unit is further configured to: start a first counter, and the first counter is used to count the number of bits that the MAC core unit continues to receive after receiving the first bit; The first time point, and the number of bits spaced between the target bit and the first bit, stop the first counter before estimating the second time point when the PMA unit sends the target bit; at this time, the value recorded by the first counter is is the number of bits between the target bit and the first bit.

In a possible implementation manner, the MAC core unit is further configured to: count the number of bits received by using the second counter; when the second counter accumulates 64 bits, restart the second counter and restart the second counter at the current time of the first counter. An additional 2 bits are added to the recorded value.

The PCS unit encodes the data stream received from the MAC core unit, and encodes every 64 bits, and one encoding adds 2 bits to the data stream. By adopting the above scheme, the second counter adds 2 to the value currently recorded by the first counter every 64 bits, so that the count result of the first counter includes the number of bits added by the PCS unit code, so that the count result is more accurate , which further improves the accuracy of the time point estimated by the MAC core unit.

In a possible implementation, the first signal may be a pulse signal.

In a possible implementation manner, the target bit may be the start bit of the 1588 message; the MAC core unit may also be used to: add or update the timestamp in the 1588 message according to the estimated second time point .

In a second aspect, an embodiment of the present application provides a medium access control MAC device, the device includes: a MAC core unit and a physical medium connection sublayer PMA unit; wherein the PMA unit is used to obtain the third time of the second bit. point, and send the third time point to the MAC core unit; wherein, the third time point of the second bit is the time point when the PMA unit receives the second bit; the MAC core unit is used to receive the target bit, according to the first Three time points, and the number of bits spaced between the target bit and the second bit, estimate the fourth time point when the PMA unit receives the target bit; wherein, the target bit and the second bit are continuously received by the PMA unit bits in the data stream.

In a possible implementation manner, the PMA unit may send the third time point to the MAC core unit via the PCS unit.

In a possible implementation manner, the MAC core unit is further configured to: receive a second signal and data stream sent by the PMA unit to the MAC core unit via the PCS unit; the second signal is used to instruct the MAC core unit to send the data from the PCS The second bit in the data stream received by the unit.

Some MAC core units cannot identify the function of the first bit from the data stream. With the above solution, the MAC core unit can determine the second bit in the received data stream according to the second signal, so as to record the number of bits that continue to be received after the second bit is received.

In a possible implementation manner, the second bit may be a bit that satisfies a preset rule in the data stream sent by the PMA unit to the PCS unit; wherein the preset rule includes a predetermined interval between any adjacent second bits. Set the number of bits.

In a possible implementation manner, when the MAC core unit estimates the fourth time point when the PMA unit receives the target bit according to the number of bits spaced between the target bit and the second bit at the third time point, It is specifically used for: estimating the fourth time point according to the formula t4=t3+m*UI; wherein, t3 is the third time point; t4 is the fourth time point; m is the bit interval between the target bit and the second bit Number of bits; UI is the transmission time for the PMA unit to receive 1-bit data.

In a possible implementation manner, the MAC core unit is further configured to: enable a third counter, and the third counter is used to count the number of bits that the MAC core unit continues to receive after receiving the second signal; The time point, and the number of bits between the target bit and the second bit, stop the third counter before the estimated fourth time point when the PMA unit receives the target bit; the value recorded by the third counter is the target bit The number of bits spaced from the second bit.

In a possible implementation manner, the MAC core unit is further configured to: count the number of bits received by a fourth counter; when the fourth counter accumulates 64 bits, restart the fourth counter and reset the number of bits in the fourth counter. An additional 2 bits are added to the value currently recorded by the three counters.

The PCS unit decodes the data stream received from the PMA unit. Decoding is performed every 64 bits, and one decoding will deduct 2 bits from the data stream. By adopting the above scheme, the fourth counter adds 2 to the value currently recorded by the third counter every 64 bits, so that the count result of the third counter includes the number of bits deducted by the PCS unit code, so that the count result is more accurate , the accuracy of the time point estimated by the MAC core unit can be further improved.

In a possible implementation manner, the second signal is a pulse signal.

In a third aspect, an embodiment of the present application provides a method for estimating a time point, including: acquiring a first time point of a first bit; wherein, the first time point of the first bit is a time point of sending the first bit; Receive the target bit to be sent, and estimate the second time point for sending the target bit according to the first time point and the number of bits spaced between the target bit and the first bit; the first bit and the target bit Bits in a continuously transmitted data stream.

In a possible implementation manner, the second time point can be estimated according to the formula t2=t1+n*UI; wherein, t1 is the first time point; t2 is the second time point; n is the target bit and the first bit The number of bits in the interval between bits; UI is the transmission time to send 1-bit data.

In a possible implementation manner, the first counter may also be started, and the first counter is used to count the number of bits that continue to be received after the first bit is received; at the first time point, and the target bit Stop the first counter before estimating the second time point of sending the target bit; the value recorded by the first counter can be used as the distance between the target bit and the first bit The number of bits in the interval.

In a possible implementation manner, the number of bits received may also be counted by the second counter; when the second counter accumulates 64 bits, the second counter is restarted and an additional amount is added to the currently recorded value of the first counter Add 2 bits.

In a possible implementation manner, the target bit may be the start bit of the 1588 message; the MAC core unit may also add or update the timestamp in the 1588 message according to the estimated second time point.

In a fourth aspect, an embodiment of the present application provides another method for estimating a time point, including: acquiring a third time point of the second bit; wherein the third time point of the second bit is the time point of receiving the second bit ; Receive the target bit, according to the third time point, and the number of bits spaced between the target bit and the second bit, estimate the fourth time point at which the target bit is received; wherein, the target bit and the second bit Bits are bits in a continuously received data stream.

In a possible implementation manner, the fourth time point can be estimated according to the formula t4=t3+m*UI; wherein, t3 is the third time point; t4 is the fourth time point; m is the target bit and the second bit The number of bits in the interval between bits; UI is the transmission time to receive 1-bit data.

In a possible implementation manner, a third counter may also be enabled, and the third counter is used to count the number of bits that continue to be received after the second bit is received; at the third time point, and the target bit The number of bits between the bit and the second bit, the third counter can also be stopped before the fourth time point when the target bit is estimated to be received; the value recorded by the third counter can be used as the target bit and the second bit. The number of bits in the interval between bits.

In a possible implementation manner, the number of bits received may also be counted by a fourth counter; when the fourth counter accumulates 64 bits, the fourth counter is restarted and an additional value is added to the value currently recorded by the third counter Add 2 bits.

In a fifth aspect, an embodiment of the present application further provides a chip, the chip includes a MAC device and a parallel/serializer serdes, and a PMA unit in the MAC device is connected to the serdes; wherein, the MAC device is as described in the above first aspect, or the first Any implementation manner of one aspect, or the second aspect, or the MAC apparatus provided by any implementation manner of the second aspect.

In a sixth aspect, an embodiment of the present application further provides an electronic device, where the electronic device includes the chip provided in the fifth aspect.

In a seventh aspect, an embodiment of the present application further provides a program, which, when executed on a device, will enable the device to implement the above-mentioned third aspect, or any implementation manner of the third aspect, or the fourth aspect, or The point-in-time estimation method provided by any implementation manner of the fourth aspect

Description of drawings

1 is a schematic diagram of a wireless network communication system architecture;

2 is a schematic structural diagram of an interface chip;

3 is a schematic diagram of the relationship between a data flow in a MAC core unit and a PMA unit according to an embodiment of the present application;

4 is a schematic flowchart of a time point estimation method provided by an embodiment of the present application;

FIG. 5 is a schematic diagram of a first signal inside a MAC device according to an embodiment of the present application;

6 is a schematic flowchart of a possible time point estimation method provided by an embodiment of the present application;

FIG. 7 is a schematic flowchart of a time point estimation method provided by an embodiment of the present application.

Detailed ways

In order to make the purposes, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the accompanying drawings in the embodiments of the present application.

In a wireless network communication system, network elements in the system often need to estimate the sending or receiving time point of a specific bit. Usually, the estimation of the sending or receiving time point of a specific bit is performed by the interface chip in the network element. of.

The following takes the 1588 protocol as an example to introduce the application environment of the interface chip:

FIG. 1 is a schematic diagram of the architecture of a wireless network communication system. As shown in FIG. 1, the wireless communication system includes multiple base stations (such as base station 41 and base station 42), multiple network elements (NE) (such as NE31, NE32, NE33, NE34, NE35 and NE36), a global positioning system (global positioning system, GPS) signal receiver 1, and a radio network controller (radio network controller, RNC) 2 and so on.

The GPS signal receiver 1 in FIG. 1 is used to tame the crystal oscillator by GPS to generate a time signal with nanosecond precision. The time signal generated by the GPS signal receiver 1 is used for the periodic time synchronization of the entire clock network, wherein the clock network is a network composed of multiple network elements in FIG. PTP) system. The network elements in the PTP system can generally be classified into boundary clock (BC) nodes, ordinary clock (OC) nodes and transparent clock (TC) nodes according to their positions and functions in the network.

Among them, the BC node, such as NE31 in Figure 1, has multiple 1588 ports, one of which can be used as a slave (slave) port, and the other ports can be used as a master (master) port. The BC node synchronizes the frequency and time of the clock with the upper-level equipment (such as GPS signal receiver 1 in Figure 1) through the slave port. Afterwards, it sends synchronization packets to multiple next-level devices (such as NE32 and NE33 in Figure 1) through multiple master ports. The synchronization packet includes a time stamp, and the time pointed to by the time stamp is obtained by the BC node according to the time signal received by the slave port and the processing delay of the BC node itself.

The OC node, such as NE35 and NE36 in Figure 1, is usually the start or end device of the clock network. It has only one 1588 port, and this port can only be used as a slave port or a master port.

TC nodes, such as NE32, NE33, and NE34 in Figure 1, have multiple 1588 ports. The TC node forwards all received synchronization packets, measures the residence time of the synchronization packets passing through the TC node, and updates the time stamp in the synchronization packets.

Usually, when the BC node and the TC node send the 1588 message to the lower-level device, they need to add (or update) a timestamp in the 1588 message, and the timestamp is used to indicate the BC node or the TC node to send the 1588 message. Therefore, the BC node and the TC node generally need to configure the interface chip to add a time stamp to the 1588 message by estimating the sending time point of the start bit of the 1588 message.

FIG. 2 is a schematic structural diagram of an interface chip. As shown in FIG. 2 , the interface chip 200 includes a MAC circuit 201 and a serdes 202 , wherein the MAC circuit 201 further includes a MAC core unit 2011 , a PCS unit 2012 and a PMA unit 2013 .

In the interface chip 200, the MAC core unit 2011 is often used to estimate the time point when the PMA unit sends a certain bit to the serdes. Taking the 1588 message based on the IEEE1588 protocol as an example, the MAC core unit 2011 is often used to estimate the time point at which the PMA unit 2013 sends the start bit to the serdes202 when receiving the start bit of the 1588 message, and then according to the time point Add timestamp to 1588 packets. After that, the MAC core unit 2011 sends the timestamp-added 1588 message to the PCS unit 2012 . The PCS unit 2012 physically encodes and scrambles the 1588 packet, and then sends the physically encoded 1588 packet to the PMA unit 2013 . The PMA unit 2013 is used for bit width conversion, so that the sending bit width matches the receiving bit width of the serdes 202, thereby sending the 1588 message to the serdes 202, and then sending the 1588 message to other network elements through the serdes 202.

FIG. 3 exemplarily shows a schematic diagram of the data flow relationship between the MAC core unit 2011 and the PMA unit 2013. In FIG. 3, the MAC core unit 2011 can send 80bit data to the PMA unit 2013 via the PCS unit 2012 within the unit time T. The PMA unit 2013 sends 40bit data to serdes202 within unit time T. In FIG. 3, after the MAC core unit 2011 sends 80 bits of data to the PCS unit 2012 in the first unit time T1, it stops sending data to the PCS unit 2012 in the second bit time T2. Continue to send 80-bit data to the PCS unit 2012 within the third unit time T3, and stop sending data to the PCS unit 2012 within the fourth unit time. For the PMA unit 2013, it keeps sending data to the serdes 202 continuously at the speed of sending 40 bits of data per unit time.

At present, the MAC core unit 2011 estimates the target bit by the MAC circuit 201 according to the time point when it receives the target bit (eg, the start bit of the 1588 message) and the estimated time delay of the target bit in the MAC circuit 201. Time sent to serdes202. For example, if the time when the MAC core unit 2011 receives the target bit is ta, and the estimated delay is tdelay, the estimated time when the MAC circuit 201 sends the target bit to the serdes 202 is ta+tdelay.

The time delay of the MAC core unit 2011 in estimating the target bit in the MAC circuit 201 is generally estimated according to factors such as the logical architecture and transmission bandwidth of the PCS unit 2012 and the PMA unit 2013 . However, the PCS unit 2012 and the PMA unit 2013 have different logic structures under different system designs, resulting in different adjustments to the algorithm for estimating the delay, and the generality is poor. Moreover, the delay caused by the target bits passing through the asynchronous first-in-first-out (AFIFO) queue in the PMA unit 2013 is uncertain and cannot be accurately estimated, which causes the PMA unit 2013 estimated by the MAC core unit 2011 to send the target The accuracy of the bit time point cannot meet the requirements of 5G communication.

Based on this, an embodiment of the present application provides a MAC device to improve the accuracy of estimating the time point at which the PMA unit 2013 sends the target bit. The device may be the MAC circuit 201 in the interface chip 200 in FIG. 2 , or may be an independent chip, which is not limited in this application. The following description takes the MAC circuit 201 in the interface chip 200 as an example. Therefore, the MAC device provided in this embodiment of the present application may also be represented by the MAC device 201 .

In the MAC apparatus 201 shown in FIG. 2 , the PMA unit 2013 is configured to acquire the first time point of the first bit, and send the first time point to the MAC core unit. The first time point of the first bit is the time point when the PMA unit sends the first bit.

In this embodiment of the present application, the first bit may be a bit in the data stream sent by the MAC core unit 2011 to the PMA unit 2013 via the PCS unit 2012. In a possible implementation manner, the first bit may be any bit in the data stream sent by the MAC core unit 2011 to the PCS unit 2012, and in another possible implementation, the first bit may also be It is the bits that satisfy the preset rule in the data stream sent by the MAC core unit 2011 to the PCS unit 2012. For example, the MAC core unit 2011 determines that the currently sent bit is the first bit every preset number of bits. As shown in FIG. 3 , the MAC core unit 2011 determines the 60th bit of data sent in T1 as the first bit bit1. Among them, the data stream sent by the MAC core unit 2011 to the PCS unit 2012 includes but is not limited to various types of messages, code streams, etc. For the PCS unit 2012 and the PMA unit 2013, the specific content in the data stream may not be distinguished. Process the received data stream directly.

After receiving the data stream from the PCS unit 2012, the PMA unit 2013 performs processing such as bit-width conversion on the received data stream, and then continuously transmits the processed data stream. Wherein, the above-mentioned first bit is also included in the data stream continuously sent by the PMA unit.

In this embodiment of the present application, the PMA unit 2013 may obtain the first time point at which the first bit is sent through its internal clock circuit. For example, in FIG. 3 , the first time point when the PMA unit 2013 collects and transmits the first bit bit1 is t1.

In a possible implementation manner, after the PMA unit 2013 collects the first time point, the first time point may be sent to the MAC core unit 2011 via the PCS unit 2012 .

In another possible implementation manner, as shown in FIG. 2 , the PMA unit 2013 and the MAC core unit 2011 are directly connected through a wire, and the PMA unit 2013 directly connects the first time point through the wire with the MAC core unit 2011 Sent to the MAC core unit 2011. For most of the existing PCS units 2012, bidirectional transmission is not supported. This application provides the PMA unit 2013 with the transmission of the first time point to the MAC core unit 2011 by adding a wire between the PMA unit 2013 and the MAC core unit 2011. Moreover, the structure is simple in implementation, low in cost and higher in transmission speed.

In the MAC device 201 shown in FIG. 2, the MAC core unit 2011 is configured to receive the target bit to be sent, and estimate the number of bits between the target bit and the first bit according to the first time point and the interval between the target bit and the first bit. The second time point at which the PMA unit 2013 transmits the target bit. Wherein, after the data stream where the target bit is located is transmitted through the MAC core unit 2011 and the PCS unit 2012, the PMA unit 2013 sends the data stream where the target bit is located. The above-mentioned first time point may be the first time point that the MAC core unit receives and buffers from the PMA unit 2013 for the last time.

As shown in FIG. 3 , the 20th bit received by the MAC core unit 2011 in the third unit time T3 is the target bit bit0, then the MAC core unit 2011 can send the bit1 according to the number of bits in the interval between bit0 and bit1 and the PMA unit 2013 The first time point estimates the second time point at which the PMA unit 2013 sends bit0. In Figure 3, the interval between bit0 and bit1 is 40 bits. Since the PMA unit 2013 continuously sends data streams, the MAC core unit 2011 can determine the difference between the bit0 and bit1 sent by the PMA unit 2013 by calculating the time for the PMA unit 2013 to send 40bit data. In combination with the pre-obtained first time point at which bit1 is sent, the second time point at which the PMA unit 2013 sends bit0 can be obtained.

In a possible implementation manner, the MAC core unit 2011 estimates the second time point at which the PMA unit 2013 sends the target bit according to the first time point and the number of bits spaced between the target bit and the first bit , the second time point can be estimated according to the following formula 1:

t2=t1+n*UI (1)

Wherein, t1 is the first time point; t2 is the second time point; n is the number of bits spaced between the target bit and the first bit; UI is the transmission time for the PMA unit 2013 to send 1-bit data. In this embodiment of the present application, the UI may be obtained by calculation according to the bandwidth of the serdes202. For example, when the bandwidth of the serdes202 is 10.3125Gbps, the value of the UI may be 1/10.3125Gbps≈97ps.

For the 1588 packet, after acquiring the second time point, the MAC core unit 2011 can add (or update) a timestamp to the 1588 packet according to the second time point, and add (or update) the timestamped 1588 packet It is sent to the PMA unit 2013 via the PCS unit 2012, and the PMA unit 2013 sends the 1588 message to the serdes202.

With the above solution, the acquired first time point at which the PMA unit 2013 sends the first bit is a relatively accurate time point. And on this basis, since the PMA unit 2013 in the MAC device 201 can continuously send the data stream, the PMA unit 2013 sends the second time point of the target bit and the first time point when the first bit is sent. The time interval can be estimated more accurately by the number of bits in the interval between the target bit and the first bit. Therefore, the MAC core unit 2011 can more accurately estimate and obtain the transmission target of the PMA unit 2013 according to the number of bits spaced between the target bit and the first bit, and the first time point when the PMA unit 2013 sends the first bit. The second time point of the bit is beneficial to improve the estimated accuracy of the time point at which the PMA unit 2013 sends the target bit. Generally, the error can be controlled within 1 ns, which can meet the requirements of 5G communication.

In this embodiment of the present application, the first bit may not have a fixed feature. Most of the PMA units 2013 cannot identify the first bit in the data stream when sending the data stream, so that the PMA unit 2013 cannot obtain the first time point of the first bit. Based on this, in this embodiment of the present application, the PMA unit 2013 is further configured to: receive the first signal and data stream sent by the MAC core unit 2011 to the PMA unit 2013 via the PCS unit 2012 . The first signal is used to indicate the first bit in the data stream received by the PMA unit from the PCS unit. In this embodiment of the present application, the first signal may be a pulse signal.

In a possible implementation manner, the first signal is a parallel signal of the first bit in the data stream, and the two are synchronized in time. The first signal is also received when the PMA unit receives the first bit from the PCS unit. When receiving the first signal, the PMA unit can determine that the currently received bit is the first bit.

In a possible implementation manner, the PMA unit also processes the first signal of the data stream in parallel, and takes the time point when the parallel processing of the first signal is completed as the first time point.

With the above solution, when sending the first bit, the MAC core unit 2011 sends the first signal in parallel, and the first signal is used as the parallel signal of the first bit. In this embodiment of the present application, the MAC core unit 2011 may send the first signal through out-of-band transmission, so as not to occupy the transmission bandwidth of the data stream. The first signal is always kept in parallel with the first bit in the PCS unit 2012 and the PMA unit 2013. For example, when the first signal passes through the PCS unit 2012 and the PMA unit 2013, it will undergo the same processing process as the first bit, Therefore, the same transmission delay as the first bit is generated, thereby maintaining parallelism with the first bit. Therefore, when the PMA unit 2013 finishes processing the first signal, it also finishes sending the first bit. Therefore, the time point for sending the first bit, ie, the first time point, can be determined according to the time point when processing the first signal is completed. For example, the PMA unit 2013 may use the processing result of the first signal as a trigger condition for obtaining the first time point, and when the first signal is processed, the PMA unit 2013 obtains the current time point from the clock circuit as the first time point.

In this embodiment of the present application, the MAC core unit 2011 needs to estimate the second time point at which the PMA unit 2013 sends the target bit according to the number of bits spaced between the target bit and the first bit. In a possible implementation manner, the MAC core unit 2011 is further configured to: enable a first counter, and the first counter is used to count the number of bits that the MAC core unit 2011 continues to receive after receiving the first bit; Before estimating the second time point at which the PMA unit 2013 sends the target bit according to the first time point and the number of bits spaced between the target bit and the first bit, the first counter is stopped, and at this time the first counter records The value of can be used as the number of bits between the target bit and the first bit.

For example, in FIG. 3 , after receiving the first bit bit1, the MAC core unit 2011 starts a first counter, and the first counter starts to record the number of bits that the MAC core unit 2011 continues to send after sending the first bit bit1. After receiving the target bit bit bit0, the MAC core unit 2011 stops the first counter, and the value recorded by the first counter at this time is 40 bits of bits in the interval between bit0 and bit1.

In the MAC device 201, the PCS unit 2012 will encode the data stream sent by the MAC core unit 2011 based on the stipulations of the IEEE 802.3 protocol, usually every 64 bits is encoded, and each encoding will add 2 bits to the data stream . For example, the size of the data stream sent by the MAC core unit 2011 to the PCS unit 2012 is 128 bits, and after being encoded by the PCS unit 2012, the size of the data stream sent by the PCS unit 2012 to the PMA unit 2013 becomes 132 bits. When the PCS unit 2012 encodes the data stream, the size of the data stream will change, which is not conducive to improving the accuracy of the estimated second time point.

Based on this, in a possible implementation manner, the MAC core unit 2011 is further configured to: count the number of bits sent by using the second counter; when the second counter accumulates 64 bits, restart the second counter and start the second counter in the first An additional 2 bits are added to the currently recorded value of a counter. The restarted second counter may continue to count the number of bits sent by the MAC core unit 2011 from zero.

With the above solution, the MAC core unit 2011 adds 2 to the value currently recorded by the first counter every 64 bits through the second counter, so that the counting result of the first counter includes the increase in the data stream due to the encoding of the PCS unit 2012 , so that the counting result is more accurate, and the accuracy of the estimated second time point is further improved.

Based on the same technical concept, the embodiment of the present application further provides another MAC device, which can more accurately estimate the time point when the PMA unit receives the target bit. The structure of the MAC device for estimating the time point when the PMA unit receives the target bit provided by the embodiment of the present application is similar to the structure of the aforementioned MAC device for estimating the time point when the PMA unit sends the target bit. The MAC device for estimating the time point at which the PMA unit receives the target bit will continue to be described by taking the MAC device 201 shown in FIG. 2 as an example.

In the MAC apparatus 201 shown in FIG. 2 , the PMA unit 2013 is configured to acquire the third time point of the second bit, and send the third time point to the MAC core unit 2011 . The third time point of the second bit is the time point when the PMA unit receives the second bit.

In this embodiment of the present application, the PMA unit 2013 can continuously receive data streams from the serdes 202, and the data streams can be in various forms such as messages and code streams. The PMA unit 2013 performs bit width conversion on the received data stream, and then sends it to the PCS unit 2012 . The PCS unit 2014 performs decoding and other processing on the received data stream, and then sends it to the MAC core unit 2011 .

In this embodiment of the present application, the second bit may be any bit in the data stream sent by the PMA unit 2013 to the PCS unit 2012, or may be any bit in the data stream sent by the PMA unit 2013 to the PCS unit 2012 that satisfies a preset rule For example, the PMA unit 2013 determines that the currently sent bit is the first bit every preset bit number.

Since the transmission direction of the third time point sent by the PMA unit 2013 in this embodiment of the present application is the same as the transmission direction of the data stream received in the MAC device 201 , the PMA unit 2013 in the MAC device 201 may send the third time point through the PCS unit Sent to the MAC core unit 2011.

The MAC core unit 2011 is configured to receive the target bit, and estimate the fourth time point when the PMA unit 2013 receives the target bit according to the third time point and the number of bits spaced between the target bit and the second bit. The target bit is the bit in the data stream received by the PMA unit 2012 , and is sent to the MAC core unit 2011 via the PMA unit 2013 and the PCS unit 2012 .

For example, the MAC core unit 2011 estimates the fourth time point according to the following formula 2:

t4=t3+m*UI (2)

Wherein, t3 is the third time point; t4 is the fourth time point; m is the number of bits between the target bit and the second bit; UI is the transmission time for the PMA unit 2013 to receive 1-bit data. In this embodiment of the present application, the UI can be calculated and obtained according to the bandwidth of the serdes202.

With the above solution, since the PMA unit 2013 in the MAC device 201 can continuously receive the data stream from the serdes 202, the PMA unit 2013 receives the fourth time point of the target bit and the third time point when the second bit is received. The time interval can be estimated more accurately by the number of bits in the interval between the target bit and the second bit. Therefore, the MAC core unit 2011 can more accurately estimate the number of bits received by the PMA unit 2013 through the number of bits spaced between the target bit and the second bit and the third time point when the PMA unit 2013 receives the second bit. The fourth time point of the target bit.

In this embodiment of the present application, the second bit may not have a fixed feature. Therefore, most of the MAC core units 2011 do not have the function of identifying the second bit in the data stream when receiving the data stream. Based on this, the MAC core unit 2011 is further configured to: receive the second signal and data stream sent by the PMA unit 2013 to the MAC core unit 2011 via the PCS unit 2012; the second signal is used to instruct the MAC core unit 2011 to receive data from the PCS unit 2012 The second bit in the stream. In a possible implementation manner, the second signal may be a pulse signal. In this embodiment of the present application, the second signal may also be a parallel signal of the second bit, and the parallel relationship between the second signal and the second bit is similar to the parallel relationship between the first signal and the first bit , which is not repeated in this embodiment of the present application.

In this embodiment of the present application, the MAC core unit 2011 needs to estimate the fourth time point at which the PMA unit 2013 receives the target bit according to the number of bits in the interval between the fourth bit and the third bit. In a possible implementation manner, the MAC core unit 2011 is further configured to start a third counter, and the third counter is configured to count the number of bits that the MAC core unit 2011 continues to receive after receiving the second bit; At the third time point, and the number of bits spaced between the target bit and the second bit, before estimating the fourth time point when the PMA unit 2013 sends the target bit, stop the third counter; the value recorded by the third counter can be The number of bits as the interval between the target bit and the second bit.

In a possible implementation manner, the MAC core unit 2011 may determine whether the second bit is received according to the second signal. After receiving the second signal, the MAC core unit 2011 starts the third counter, and starts to count the number of bits that continue to be received after receiving the second bit.

In the MAC device 201 , the PCS unit 2012 has a decoding function, and decoding is performed every 64 bits, and one decoding will deduct 2 bits in the data stream received by the PCS unit 2012 . In order to improve the precision of the fourth time point estimated by the MAC core unit 2011, in a possible implementation manner, the MAC core unit 2011 is further configured to: count the number of bits received through a fourth counter; When 64 bits are accumulated, the fourth counter is restarted and an additional 2 bits are added to the currently recorded value of the third counter.

Using the above solution, the MAC core unit 2011 adds 2 to the value currently recorded by the first counter every 64 bits through the fourth counter, so that the counting result of the first counter includes the data stored in the PMA unit 2013 due to the decoding by the PCS unit 2012. The number of bits deducted from the received data stream makes the counting result more accurate, thereby improving the precision of the estimated fourth time point.

Based on the same technical concept, the embodiments of the present application also provide a time point estimation method, which can estimate the time point at which the target bit is sent. It should be understood that the time point estimation method provided by the embodiments of the present application may be implemented by software. For example, the processor inside the device that sends the target bits calls the program instructions stored in the memory to execute the method provided by the embodiments of the present application. point-in-time estimation method. In addition, what is provided by the embodiments of the present application may also be implemented by a combination of hardware and software, for example, implemented by the MAC device shown in FIG. 2 . For ease of understanding, the embodiment of the present application takes the MAC device shown in FIG. 2 as an example to introduce the time point estimation method provided by the embodiment of the present application. FIG. 4 is a schematic flowchart of a time point estimation method provided by an embodiment of the present application, as shown in FIG. 4 , which mainly includes the following steps:

S401: The PMA unit 2013 obtains the first time point of the first bit.

The first time point of the first bit is the time point when the PMA unit 2013 sends the first bit.

S402: The PMA unit sends the first time point to the MAC core unit 2011.

S403: The MAC core unit 2011 receives the target bit to be sent, and estimates the second time point at which the PMA unit 2013 sends the target bit according to the first time point and the number of bits spaced between the target bit and the first bit .

In a possible implementation manner, when the MAC core unit 2011 sends the data stream including the first bit to the PMA unit 2013 via the PCS unit 2012, the MAC core unit 2011 may also send the first signal to the PMA unit 2013 via the PCS unit 2012; The signal is a parallel signal of the first bit; when the PMA unit 2013 processes the data stream, it processes the first signal and the first bit in parallel, and takes the first bit and the time point when the parallel processing of the first signal is completed as the the first point in time. Wherein, the first signal may be a pulse signal.

FIG. 5 takes the 1588 packet as an example, which is a schematic diagram of a first signal inside a MAC device provided by an embodiment of the present application, wherein the start bit of the 1588 packet is the target bit. As shown in FIG. 5 , the MAC core unit 2011 sends the first signal and the first bit bit1 to the PMA unit 2013 in parallel, wherein the first signal adopts out-of-band transmission and does not occupy the transmission bandwidth of the data stream where bit1 is located. The PMA unit 2013 processes and sends bit1, and acquires the time point at which the processing of the first signal is completed as the first time point t1. After that, the PMA unit 2013 sends the first time point t1 to the MAC core unit 2011 . When receiving the target bit, the MAC core unit 2011 estimates the second time point t2 according to the first time point t1 and the number of bits in the interval between the target bit and bit1. After that, the MAC core unit 2011 adds (or updates) a timestamp to the 1588 packet according to the second time point t2, and sends the 1588 packet to which the timestamp is added (or updated) to the PMA unit 2013 via the PCS unit 2012. After receiving and processing the 1588 message, the PMA unit 2013 sends the processed 1588 message.

In a possible implementation manner, the MAC core unit 2011 may estimate the second time point according to the formula t2=t1+n*UI, where t1 is the first time point; t2 is the second time point; n is the target bit position The number of bits spaced from the first bit; UI is the transmission time for the PMA unit 2013 to send 1-bit data.

In a possible implementation manner, the MAC core unit 2011 may also start a first counter, and the first counter is used to count the number of bits that the MAC core unit 2011 continues to receive after receiving the first bit; the MAC core The unit 2011 stops the first counter before estimating the second time point when the PMA unit 2013 sends the target bit according to the first time point and the number of bits spaced between the target bit and the first bit. The value recorded by the counter can be used as the number of bits between the target bit and the first bit.

Taking the 1588 message as an example, FIG. 6 is a schematic flowchart of a possible time point estimation method provided by an embodiment of the present application. As shown in FIG. 6 , it mainly includes the following steps:

S601: The MAC core unit 2011 sends a first signal to the PMA unit 2013 via the PCS unit 2012, and starts the first counter.

S602: The PMA unit 2013 completes the processing of the first signal, and acquires the time point at which the processing of the first signal is completed as the first time point.

S603: The PMA unit 2013 sends the acquired first time point to the MAC core unit 2011.

S604: The MAC core unit 2011 receives and buffers the first time point.

S605: When receiving the start bit of the 1588 message, the MAC core unit 2011 estimates the second time point according to the value currently recorded by the first counter and the first time point. And add (or update) a timestamp to the 1588 message according to the estimated second time point.

S606: The MAC core unit 2011 sends the 1588 message to which the timestamp is added (or updated) to the PMA unit 2013 via the PCS unit 2012.

S607: The MAC core unit 2011 determines whether the first time point needs to be updated. If yes, go back to S601; if not, go back to S605.

In this embodiment of the present application, the MAC core unit 2011 may determine the first bit from the received data stream according to a preset bit interval, and when receiving the first bit that satisfies the preset rule, It can be considered that the first time point needs to be updated.

In a possible implementation manner, the MAC core unit 2011 may also count the number of bits sent by using the second counter; when the second counter accumulates 64 bits, the MAC core unit 2011 restarts the second counter and restarts the second counter in the first An additional 2 bits are added to the value currently recorded by the counter.

Based on the same technical concept, the embodiment of the present application also provides a time point estimation method, which can estimate the time point when the target bit is received. It should be understood that the time point estimation method provided by the embodiments of the present application may be implemented by software. For example, the processor inside the device that receives the target bits calls the program instructions stored in the memory to execute the method provided by the embodiments of the present application. point-in-time estimation method. In addition, what is provided by the embodiments of the present application may also be implemented by a combination of hardware and software, for example, implemented by the MAC device shown in FIG. 2 . For ease of understanding, the embodiment of the present application takes the MAC device shown in FIG. 2 as an example to introduce the time point estimation method provided by the embodiment of the present application. FIG. 7 is a schematic flowchart of a time point estimation method provided by an embodiment of the present application, as shown in FIG. 7 , which mainly includes the following steps:

S701: The PMA unit 2013 acquires the third time point of the second bit, and sends the third time point to the MAC core unit 2011.

The third time point of the second bit is the time point when the PMA unit 2013 receives the second bit. In this embodiment of the present application, the second bit is a bit in the data stream continuously received by the PMA unit 2013 . As shown in FIG. 7 , the PMA unit will send the data stream containing the second bit to the MAC core unit 2011 through the PCS unit 2012 .

S702: The MAC core unit 2011 receives the second bit from the PCS unit 2012, and receives the third time point sent by the PMA unit 2013, and the MAC core unit 2011 may further buffer the third time point.

S703: The MAC core unit 2011 receives the target bit, and estimates the fourth time point when the PMA unit 2013 receives the target bit according to the third time point and the number of bits spaced between the target bit and the second bit.

As shown in FIG. 7 , the PMA unit will continue to send the received data to the MAC core unit through the PCS unit 2012 . The MAC core unit 2011 receives the data stream sent by the PCS 2012, and can execute S703 when the target bit is received.

In a possible implementation manner, the PMA unit 2013 may also generate a second signal; when processing the received second bit, the second signal is processed in parallel; After the second bit, the second signal is sent in parallel to the MAC core unit 2011 via the PCS unit 2012; the MAC core unit 2011 receives the second signal and the second bit that are sent in parallel by the PCS unit 2012; The number of bits to continue to receive after the second bit. Wherein, the second signal may be a pulse signal.

In a possible implementation manner, the second bit is a bit that satisfies a preset rule in the data stream sent by the PMA unit 2013 to the PCS unit 2012; the preset rule includes a preset interval between any adjacent second bits number of bits.

In a possible implementation manner, the MAC core unit 2011 may estimate the fourth time point according to the following formula: t4=t3+m*UI, where t3 is the third time point; t4 is the fourth time point; m is the target The number of bits in the interval between the bit and the second bit; UI is the transmission time for the PMA unit 2013 to receive 1-bit data.

In a possible implementation manner, the MAC core unit 2011 may also enable a third counter, and the third counter is used to count the number of bits that the MAC core unit 2011 continues to receive after receiving the second signal; the MAC core unit 2011 Before estimating the fourth time point at which the PMA unit 2013 sends the target bit according to the third time point and the number of bits spaced between the target bit and the second bit, the third counter may be stopped. At this time, the third counter The recorded value can be used as the number of bits between the target bit and the second bit.

In a possible implementation manner, the MAC core unit 2011 may also count the number of bits received by the fourth counter; when the fourth counter accumulates 64 bits, restart the fourth counter and record the number of bits currently recorded by the third counter. 2 extra bits are added to the value.

Based on the same technical idea, an embodiment of the present application further provides a chip, where the chip includes the MAC device provided in any of the foregoing embodiments. In one possible implementation, the chip also includes serdes. The serdes are connected to the PMA unit in the MAC device. It should be understood that between the serdes and the MAC device can be two separate circuit structures, or can be integrated in the same circuit structure, for example, the serdes can also be integrated with the PMA unit in the same circuit structure, and for example, the PCS unit, the PMA unit The unit and the serdes unit may be integrated in the same circuit structure, etc., which is not limited in this embodiment of the present application.

Based on the same technical concept, an embodiment of the present application further provides an electronic device, which includes the MAC device provided in any of the foregoing embodiments, and can execute the time point estimation method shown in FIG. 4 and/or FIG. 7 .

Based on the same technical concept, an embodiment of the present application further provides a program, which, when executed on a device, enables the device to implement the time point estimation method provided by any of the above embodiments.

As described above, the above embodiments are only used to introduce the technical solutions of the present application in detail, but the descriptions of the above embodiments are only used to help understand the methods of the embodiments of the present application, and should not be construed as limitations on the embodiments of the present application. Changes or substitutions that can be easily conceived by those skilled in the art should all fall within the protection scope of the embodiments of the present application.

Claims (26)

1. A medium access control, MAC, apparatus, comprising: the MAC core unit and the physical medium connection sub-layer PMA unit;

the PMA unit is configured to obtain a first time point of a first bit, and send the first time point to the MAC core unit; a first time point of the first bit is a time point when the PMA unit sends the first bit;

the MAC core unit is configured to receive a target bit to be sent, and estimate a second time point at which the PMA unit sends the target bit according to the first time point and a bit number of an interval between the target bit and the first bit; the first bit and the target bit are bits in a data stream continuously transmitted by the PMA unit.

2. The MAC apparatus of claim 1, the PMA unit further to:

receiving a first signal and a data stream which are transmitted to the PMA unit by the MAC core unit through a Physical Coding Sublayer (PCS) unit; the first signal is to indicate the first bit in a data stream received by the PMA unit from the PCS unit.

3. The MAC apparatus of claim 2, wherein the first bit is a bit that satisfies a preset rule in a data stream transmitted by the MAC core unit to the PCS unit; the preset rule comprises a preset bit number spaced between any adjacent first bits.

4. The MAC device according to any of claims 1 to 3, wherein the MAC core unit, when estimating a second point in time at which the PMA unit transmits the target bit based on the first point in time and a number of bits spaced between the target bit and the first bit, is specifically configured to:

estimating the second point in time according to the following formula:

t2＝t1+n*UI

wherein t1 is the first time point; t2 is the second time point; n is the number of bits between the target bit and the first bit; the UI is the transmission time for the PMA unit to send 1-bit data.

5. The MAC apparatus of any of claims 1 to 4, wherein the MAC core unit is further to:

starting a first counter, wherein the first counter is used for counting the number of bits continuously received after the MAC core unit receives the first bit;

stopping the first counter before estimating a second time point at which the PMA unit transmits the target bit according to the first time point and the number of bits spaced between the target bit and the first bit; the value recorded by the first counter is the number of bits of the interval between the target bit and the first bit.

6. The MAC apparatus of claim 5, wherein the MAC core unit is further to:

counting the number of received bits by a second counter;

and when the second counter accumulates 64 bits, restarting the second counter and additionally adding 2 bits in the value currently recorded by the first counter.

7. The MAC apparatus of claim 2, wherein the first signal is a pulse signal.

8. The MAC device according to any one of claims 1 to 7, wherein the target bit is a start bit of a 1588 message;

the MAC core element is further configured to:

and adding or updating the time stamp in the 1588 message according to the second time point obtained by estimation.

9. A medium access control, MAC, apparatus, comprising: the MAC core unit and the physical medium connection sub-layer PMA unit;

the PMA unit is configured to obtain a third time point of a second bit, and send the third time point to the MAC core unit; a third time point of the second bit is a time point of the PMA unit receiving the second bit;

the MAC core unit is configured to receive a target bit, and estimate a fourth time point at which the PMA unit receives the target bit according to the third time point and a bit number of an interval between the target bit and the second bit; the target bit and the second bit are bits in a data stream that is continuously received by the PMA unit.

10. The MAC apparatus of claim 9, wherein the MAC core unit is further to:

receiving a second signal and a data stream which are sent by the PMA unit to the MAC core unit through a Physical Coding Sublayer (PCS) unit; the second signal is to indicate a second bit in a data stream received by the MAC core unit from the PCS unit.

11. The MAC apparatus of claim 10, wherein the second bit is a bit that satisfies a preset rule in a data stream transmitted by the PMA unit to the PCS unit; the preset rule comprises a preset bit number spaced between any two adjacent second bits.

12. The MAC device of any of claims 9 to 11, wherein the MAC core unit, when estimating the fourth point in time at which the PMA unit receives the target bit based on the third point in time and a number of bits spaced between the target bit and the second bit, is specifically configured to:

estimating the fourth time point according to the following formula:

t4＝t3+m*UI

wherein t3 is the third time point; t4 is the fourth time point; m is the number of bits of the interval between the target bit and the second bit; the UI is the transmission time for the PMA unit to receive 1-bit data.

13. The MAC apparatus of any of claims 9 to 12, wherein the MAC core unit is further to:

starting a third counter, where the third counter is used to count the number of bits that the MAC core unit continues to receive after receiving the second bit;

stopping the third counter before estimating a fourth time point at which the PMA unit receives the target bit based on the third time point and the number of bits spaced between the target bit and the second bit; the third counter records a value of the number of bits of the interval between the target bit and the second bit.

14. The MAC apparatus of claim 13, wherein the MAC core unit is further to:

counting the number of received bits by a fourth counter;

and when the fourth counter accumulates 64 bits, restarting the fourth counter and additionally adding 2 bits in the value currently recorded by the third counter.

15. The MAC apparatus of claim 10, wherein the second signal is a pulse signal.

16. A time point estimation method, comprising:

acquiring a first time point of a first bit; a first time point of the first bit is a time point of sending the first bit;

receiving a target bit to be sent, and estimating a second time point for sending the target bit according to the first time point and the bit number of the interval between the target bit and the first bit; the first bit and the target bit are bits in a continuously transmitted data stream.

17. The method of claim 16, wherein estimating a second point in time at which the target bit is transmitted based on the first point in time and a number of bits spaced between the target bit and the first bit comprises:

estimating the second point in time according to the following formula:

t2＝t1+n*UI

wherein t1 is the first time point; t2 is the second time point; n is the number of bits between the target bit and the first bit; UI is the transmission time for transmitting 1-bit data.

18. The method of claim 16 or 17, further comprising:

starting a first counter, wherein the first counter is used for counting the number of bits which are continuously received after the first bit is received;

estimating, according to the first time point and the number of bits spaced between the target bit and the first bit, a time before a second time point when the target bit is transmitted, further comprising:

stopping the first counter; the value recorded by the first counter is the number of bits of the interval between the target bit and the first bit.

19. The method of claim 18, wherein the method further comprises:

counting the number of received bits by a second counter;

and when the second counter accumulates 64 bits, restarting the second counter and additionally adding 2 bits in the value currently recorded by the first counter.

20. The method according to any one of claims 16 to 19, wherein the target bit is a start bit of a 1588 message;

the method further comprises the following steps:

and adding or updating the time stamp in the 1588 message according to the second time point obtained by estimation.

21. A time point estimation method, comprising:

acquiring a third time point of the second bit; a third time point of the second bit is a time point of receiving the second bit;

receiving a target bit, and estimating a fourth time point of receiving the target bit according to the third time point and the bit number of the interval between the target bit and the second bit; the target bit and the second bit are bits in a continuously received data stream.

22. The method of claim 21, wherein estimating a fourth point in time at which the target bit is received based on the third point in time and the number of bits spaced between the target bit and the second bit comprises:

estimating the fourth time point according to the following formula:

t4＝t3+m*UI

wherein t3 is the third time point; t4 is the fourth time point; m is the number of bits of the interval between the target bit and the second bit; UI is the transmission time to receive 1-bit data.

23. The method of claim 21 or 22, further comprising:

starting a third counter, wherein the third counter is used for counting the number of bits which are continuously received after the second bit is received;

estimating, before a fourth time point when the target bit is received, according to the third time point and the number of bits spaced between the target bit and the second bit, the method further includes:

stopping the third counter; the third counter records a value of the number of bits of the interval between the target bit and the second bit.

24. The method of claim 23, wherein the method further comprises:

counting the number of received bits by a fourth counter;

and when the fourth counter accumulates 64 bits, restarting the fourth counter and additionally adding 2 bits in the value currently recorded by the third counter.

25. A chip comprising, for example, MAC devices and parallel/serializer serdes;

the PMA unit in the MAC device is connected with the serdes; the MAC device as claimed in any one of claims 1 to 15.

26. An electronic device comprising the chip of claim 25.

Images