CN112640355A

CN112640355A - MAC device and time point estimation method

Info

Publication number: CN112640355A
Application number: CN201880097191.4A
Authority: CN
Inventors: 沈岚; 朱久运
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2018-09-30
Filing date: 2018-09-30
Publication date: 2021-04-09
Anticipated expiration: 2038-09-30
Also published as: WO2020062225A1; CN112640355B

Abstract

A MAC device and a time point estimation method, the MAC device includes: the MAC core unit and the physical medium connection sub-layer PMA unit; the PMA unit is used for acquiring a first time point of a first bit and sending the first time point to the MAC core unit; wherein, the first time point of the first bit is the time point when the PMA unit sends the first bit; and the MAC core unit is used for receiving a target bit to be sent and estimating a second time point of sending the target bit by the PMA unit according to the first time point and the bit number of the interval between the target bit and the first bit. The adoption of the scheme is beneficial to improving the accuracy of the estimated second time point.

Description

MAC device and time point estimation method

Technical Field

The present disclosure relates to the field of electronic communications technologies, and in particular, to an MAC apparatus and a time point estimation method.

Background

In a wireless network communication system, message interaction between network elements is mostly realized through an interface chip. Generally, a Media Access Control (MAC) circuit and a serial/parallel device (servers) are included in the interface chip, where the MAC circuit further includes a MAC core (core) unit, a Physical Coding Sublayer (PCS) unit, and a Physical Media Attachment (PMA) unit.

In an interface chip, an MAC core unit often needs to estimate a time point when a PMA unit sends a certain specific bit to servers, for example, based on an Institute of Electrical and Electronics Engineers (IEEE) 1588 protocol, the MAC core unit needs to estimate a time point when the PMA unit sends a starting bit of a 1588 message to the servers, and adds a timestamp generated according to the time point to the 1588 message, and for example, based on a y1731 protocol, the MAC core unit needs to estimate a time point when the PMA unit sends a starting bit of a y1731 message to the servers, and needs to fill the timestamp in a corresponding domain segment of the y1731 message according to the y1731 protocol.

However, with the fifth generation (5)^thgeneration, 5G), the existing estimation method cannot meet the accuracy requirement of the 5G communication on the time point estimated by the MAC core unit, and therefore, the accuracy of the time point estimated by the MAC core unit still needs to be further improved.

Disclosure of Invention

The embodiment of the application provides an MAC device and a time point estimation method, which are used for improving the accuracy of the estimated time point.

In a first aspect, an embodiment of the present application provides a MAC apparatus, including: the MAC core unit and the physical medium connection sub-layer PMA unit; the PMA unit is configured to acquire a first time point of a first bit, and then send the first time point to the MAC core unit; wherein, the first time point of the first bit is the time point when the PMA unit sends the first bit; the MAC core unit is used for receiving a target bit to be sent, and estimating a second time point of sending the target bit by the PMA unit according to the first time point and the bit number of the interval between the target bit and the first bit; wherein, the first bit and the target bit are bits in a data stream continuously transmitted by the PMA unit.

By adopting the scheme, the acquired first time point when the PMA unit sends the first bit is a more accurate time point. On the basis, because the PMA unit in the MAC apparatus can continuously transmit the data stream to the outside, the time interval between the second time point when the PMA unit transmits the target bit to the outside and the first time point when the PMA unit transmits the first bit can be estimated more accurately by the number of bits of the interval between the target bit and the first bit. Therefore, the MAC core unit can estimate the second time point for obtaining the target bit sent by the PMA unit more accurately by the number of bits spaced between the target bit and the first time point for sending the first bit by the PMA, which is beneficial to improving the accuracy of the time point estimated by the MAC core unit.

In one possible implementation, the PMA unit is directly connected to the MAC core unit; the PMA unit may directly send the first point in time to the MAC core unit over a connection with the MAC core unit.

Since there is unidirectional transmission between portions of the MAC core unit and the PMA unit, there is no path for the PMA unit to transmit to the MAC core unit. With the above scheme, by adding a direct connection between the PMA unit and the MAC core unit, the PMA unit is provided with a path to send a first point in time to the MAC core unit.

In another possible implementation, the PMA unit may send the first point in time to the MAC core unit via the PCS unit.

In one possible implementation, the PMA unit is further configured to: receiving a first signal and a data stream which are transmitted to a PMA unit by the MAC core unit through a PCS unit; wherein the first signal is to indicate a first bit in a data stream received by the PMA unit from the PCS unit.

Most PMA units are unable to identify the function of the first bit from the data stream. With the above scheme, the PMA unit may determine, according to the first signal, to determine a first bit in the received data stream, and may further obtain a first time point of the first bit.

In a possible implementation manner, the first bit may be a bit that satisfies a preset rule in a data stream sent by the MAC core unit to the PCS unit; the preset rule comprises a preset bit number at intervals between any adjacent first bits.

By adopting the scheme, the MAC core unit can update the first time point every time after sending the preset bit number. Because a certain error also exists between the clock of the MAC core unit and the clock of the PMA unit, updating the first time point at intervals can reduce the accumulation of errors between the clocks of the two units, thereby further improving the accuracy of the time point estimated by the MAC core unit.

In a possible implementation manner, the MAC core unit, when estimating a second time point at which the PMA unit sends the target bit according to the first time point and the number of bits spaced between the target bit and the first bit, is specifically configured to: estimating a second time point according to the formula t2 ═ t1+ n × UI; wherein t1 is a first time point; t2 is a second time point; n is the number of bits between the target bit and the first bit; the UI is the transmission time for the PMA unit to send 1-bit data.

In one possible implementation, the MAC core unit is further configured to: starting a first counter, wherein the first counter is used for counting the number of bits which are continuously received after the MAC core unit receives the first bit; stopping the first counter before estimating a second time point when the PMA unit transmits the target bit according to the first time point and the bit number of the interval between the target bit and the first bit; the value recorded by the first counter is the number of bits between the target bit and the first bit.

In one possible implementation, the MAC core unit is further configured to: counting the number of received bits by a second counter; when the second counter accumulates 64 bits, the second counter is restarted and 2 bits are additionally added to the currently recorded value of the first counter.

The PCS unit encodes the data stream received from the MAC core unit every 64 bits, with 2 bits added to the data stream. By adopting the scheme, the counting result of the first counter comprises the bit number added by the PCS unit coding through adding 2 to the current numerical value recorded by the first counter every 64 bits by the second counter, so that the counting result is more accurate, and the precision of the time point estimated by the MAC core unit is further improved.

In one possible implementation, the first signal may be a pulse signal.

In a possible implementation manner, the target bit may be a start bit of the 1588 message; the MAC core element may be further configured to: and adding or updating the time stamp in the 1588 message according to the second time point obtained by the estimation.

In a second aspect, an embodiment of the present application provides a medium access control MAC apparatus, including: the MAC core unit and the physical medium connection sub-layer PMA unit; the PMA unit is configured to acquire a third time point of the second bit, and send the third time point to the MAC core unit; wherein, the third time point of the second bit is the time point when the PMA unit receives the second bit; the MAC core unit is used for receiving the target bit and estimating a fourth time point when the PMA unit receives the target bit according to the third time point and the bit number of the interval between the target bit and the second bit; wherein the target bit and the second bit are bits in a data stream continuously received by the PMA unit.

In one possible implementation, the PMA unit may send the third point in time to the MAC core unit via the PCS unit.

In one possible implementation, the MAC core unit is further configured to: receiving a second signal and a data stream which are transmitted to the MAC core unit by the PMA unit through the PCS unit; the second signal is for indicating a second bit in a data stream received by the MAC core unit from the PCS unit.

Part of the MAC core unit cannot identify the function of the first bit from the data stream. By adopting the above scheme, the MAC core unit may determine the second bit in the received data stream according to the second signal, so as to record the number of bits that continue to be received after receiving the second bit.

In a possible implementation manner, the second bit may be a bit that satisfies a preset rule in a data stream sent by the PMA unit to the PCS unit; the preset rule comprises a preset bit number spaced between any two adjacent second bits.

In a possible implementation manner, when estimating, by the MAC core unit, a fourth time point at which the PMA unit receives the target bit according to the third time point, the number of bits spaced between the target bit and the second bit, the MAC core unit is specifically configured to: estimating a fourth time point according to the formula t4 ═ t3+ m UI; wherein t3 is a third time point; t4 is a fourth time point; m is the bit number of the interval between the target bit and the second bit; the UI is the transmission time for the PMA unit to receive 1-bit data.

In one possible implementation, the MAC core unit is further configured to: starting a third counter, wherein the third counter is used for counting the bit number continuously received after the MAC core unit receives the second signal; stopping the third counter before estimating a fourth time point when the PMA unit receives the target bit according to the third time point and the bit number of the interval between the target bit and the second bit; the third counter records the value of the bit number of the interval between the target bit and the second bit.

In one possible implementation, the MAC core unit is further configured to: counting the number of received bits by a fourth counter; and when the fourth counter accumulates 64 bits, restarting the fourth counter and additionally adding 2 bits in the value currently recorded by the third counter.

The PCS unit may perform a process of de-encoding the data stream received from the PMA unit. Every 64 bits are decoded, which subtracts 2 bits from the data stream. By adopting the scheme, 2 is added to the current numerical value recorded by the third counter every 64 bits by the fourth counter, so that the counting result of the third counter comprises the bit number deducted by the PCS unit code, the counting result is more accurate, and the precision of the time point estimated by the MAC core unit can be further improved.

In one possible implementation, the second signal is a pulsed signal.

In a third aspect, an embodiment of the present application provides a time point estimation method, including: acquiring a first time point of a first bit; wherein, the first time point of the first bit is the time point of sending the first bit; receiving a target bit to be sent, and estimating a second time point for sending the target bit according to the first time point and the bit number of the interval between the target bit and the first bit; the first bit and the target bit are bits in a data stream that is transmitted continuously.

In one possible implementation, the second time point may be estimated according to the formula t2 ═ t1+ n × UI; wherein t1 is a first time point; t2 is a second time point; n is the number of bits between the target bit and the first bit; UI is the transmission time for transmitting 1-bit data.

In a possible implementation manner, a first counter may be further started, where the first counter is configured to count the number of bits that are continuously received after the first bit is received; stopping the first counter before estimating a second time point of sending the target bit according to the first time point and the number of bits spaced between the target bit and the first bit; the value recorded by the first counter can be used as the number of bits of the interval between the target bit and the first bit.

In a possible implementation manner, the number of received bits may also be counted by the second counter; when the second counter accumulates 64 bits, the second counter is restarted and 2 bits are additionally added to the currently recorded value of the first counter.

In a possible implementation manner, the target bit may be a start bit of the 1588 message; the MAC core unit can also add or update the time stamp in the 1588 message according to the second time point obtained by estimation.

In a fourth aspect, an embodiment of the present application provides another time point estimation method, including: acquiring a third time point of the second bit; wherein, the third time point of the second bit is the time point of receiving the second bit; receiving the target bit, and estimating a fourth time point of receiving the target bit according to the third time point and the bit number of the interval between the target bit and the second bit; wherein the target bit and the second bit are bits in a continuously received data stream.

In one possible implementation, the fourth time point may be estimated according to the formula t4 ═ t3+ m × UI; wherein t3 is a third time point; t4 is a fourth time point; m is the bit number of the interval between the target bit and the second bit; UI is the transmission time to receive 1-bit data.

In a possible implementation manner, a third counter may be further started, where the third counter is configured to count the number of bits that are continuously received after the second bit is received; the third counter may also be stopped before a fourth time point at which the target bit is received is estimated based on the third time point and the number of bits spaced between the target bit and the second bit; the value recorded by the third counter may be used as the number of bits of the interval between the target bit and the second bit.

In a possible implementation manner, the number of received bits may be counted by a fourth counter; when the fourth counter accumulates 64 bits, the fourth counter is restarted and 2 bits are additionally added to the value currently recorded by the third counter.

In a fifth aspect, an embodiment of the present application further provides a chip, where the chip includes an MAC device and serdes, and a PMA unit in the MAC device is connected to the serdes; the MAC device is the MAC device provided in the first aspect, or any implementation manner of the first aspect, or the second aspect, or any implementation manner of the second aspect.

In a sixth aspect, embodiments of the present application further provide an electronic device, where the electronic device includes the chip provided in the fifth aspect.

In a seventh aspect, an embodiment of the present application further provides a program, which when executed on an apparatus, will enable the apparatus to implement the method for estimating a time point provided in the third aspect, or any implementation manner of the fourth aspect

Drawings

FIG. 1 is a diagram of a wireless network communication system architecture;

FIG. 2 is a schematic diagram of an interface chip;

fig. 3 is a schematic diagram illustrating a relationship between data flows in a MAC core unit and a PMA unit according to an embodiment of the present application;

fig. 4 is a schematic flow chart of a time point estimation method according to an embodiment of the present disclosure;

fig. 5 is a schematic diagram of a first signal inside a MAC device according to an embodiment of the present disclosure;

FIG. 6 is a schematic flow chart illustrating a possible time point estimation method according to an embodiment of the present disclosure;

fig. 7 is a flowchart illustrating a time point estimation method according to an embodiment of the present application.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application.

In a wireless network communication system, a network element in the system often needs to estimate a transmission or reception time point of a specific bit, and generally, the estimation of the transmission or reception time point of the specific bit is performed by an interface chip in the network element.

The following introduces the application environment of the interface chip by taking 1588 protocol as an example:

fig. 1 is a schematic diagram of an architecture of a wireless network communication system, and as shown in fig. 1, the wireless network communication system includes a plurality of base stations (e.g., base station 41 and base station 42), a plurality of network elements (e.g., NE31, NE32, NE33, NE34, NE35, and NE36), a Global Positioning System (GPS) signal receiver 1, a Radio Network Controller (RNC) 2, and the like.

The GPS signal receiver 1 in fig. 1 is used to generate a time signal of nanosecond accuracy by a GPS taming crystal oscillator. The time signal generated by the GPS signal receiver 1 is used for periodic time synchronization of the whole clock network, wherein the clock network is a network formed by a plurality of network elements in fig. 1, and may be referred to as Precision Timing Protocol (PTP) system. Network elements in a PTP system can be generally divided into Boundary Clock (BC) nodes, Ordinary Clock (OC) nodes, and Transparent Clock (TC) nodes according to the location and function in the network.

The BC node, such as NE31 in fig. 1, has multiple 1588 ports, where one port may be a slave (slave) port and the other ports may be master (master) ports. The BC node synchronizes the frequency and time of the clock to the higher-level device (e.g., the GPS signal receiver 1 in fig. 1) through the slave port. And then, sending the sync message to a plurality of next-level devices (such as NE32 and NE33 in fig. 1) through a plurality of master ports. The synchronization message includes a timestamp, and the time pointed by the timestamp is obtained by the BC node according to the time signal received by the slave port and the processing delay of the BC node itself.

The OC nodes, such as NE35 and NE36 in fig. 1, are usually the start or end devices of the clock network, and have only one 1588 port, and the port can only be used as a slave port or a master port.

The TC node, e.g. NE32, NE33, NE34 in fig. 1, has a plurality of 1588 ports. And the TC node forwards all the received synchronous messages, measures the residence time of the synchronous messages passing through the TC node, and updates the time stamps in the synchronous messages.

Generally, when a BC node and a TC node send a 1588 message to a next-stage device, time stamps need to be added (or updated) in the 1588 message, and the time stamps are used to indicate a time point when the BC node or the TC node sends the 1588 message, so the BC node and the TC node generally need to configure interface chips to add the time stamps to the 1588 message by estimating a sending time point of an initial bit of the 1588 message.

Fig. 2 is a schematic structural diagram of an interface chip, and as shown in fig. 2, the interface chip 200 includes: MAC circuit 201 and serdes202, wherein MAC circuit 201 further includes a MAC core unit 2011, a PCS unit 2012, and a PMA unit 2013.

In the interface chip 200, the MAC core unit 2011 is often used to estimate a time point when a PMA unit sends a certain bit to serdes. Taking 1588 message based on IEEE1588 protocol as an example, the MAC core unit 2011 is usually configured to estimate a time point when the PMA unit 2013 sends the start bit to the serdes202 when the start bit of the 1588 message is received, and then add a timestamp to the 1588 message according to the time point. Then, the MAC core unit 2011 sends the 1588 message with the timestamp added to the PCS unit 2012. The PCS unit 2012 performs physical encoding and scrambling on the 1588 packet, and then sends the physically encoded 1588 packet to the PMA unit 2013. The PMA unit 2013 is configured to perform bit width conversion, match the sending bit width with the receiving bit width of the serdes202, send the 1588 packet to the serdes202, and send the 1588 packet to other network elements through the serdes 202.

Fig. 3 schematically illustrates a data flow relationship between the MAC core unit 2011 and the PMA unit 2013, where the MAC core unit 2011 in fig. 3 may send 80-bit data to the PMA unit 2013 via the PCS unit 2012 during the unit time T, and the PMA unit 2013 sends 40-bit data to the serdes202 during the unit time T. In fig. 3, the MAC core 2011 stops transmitting data to the PCS2012 during a second bit time T2 after transmitting 80-bit data to the PCS2012 during a first unit time T1. The transmission of 80-bit data to PCS unit 2012 is continued for the third unit time T3, and the transmission of data to PCS unit 2012 is stopped for the fourth unit time. For PMA unit 2013, it keeps sending data to serdes202 continuously at the rate of sending 40 bits of data per unit time.

At present, the MAC core unit 2011 estimates, according to a time point when the MAC core unit receives a target bit (for example, a 1588 message start bit) and an estimated time delay of the target bit in the MAC circuit 201, a time when the MAC circuit 201 sends the target bit to the servers 202. For example, the time point at which the MAC core unit 2011 receives the target bit is ta, and the estimated time delay is tdelay, the estimated time point at which the MAC circuit 201 sends the target bit to the serdes202 is ta + tdelay.

The MAC core 2011 estimates the delay of the target bit in the MAC circuit 201, generally according to the logical structures of the PCS2012 and PMA 2013 units, the transmission bandwidth, and so on. However, the PCS unit 2012 and the PMA unit 2013 have different logic structures under different system designs, which results in different adjustments of the delay estimation algorithm, and the generality is poor. Furthermore, the delay caused by the target bit passing through the Asynchronous First Input First Output (AFIFO) queue in the PMA unit 2013 is uncertain and cannot be accurately estimated, so that the accuracy of the time point at which the target bit is sent by the PMA unit 2013, which is estimated by the MAC core unit 2011, cannot meet the requirement of 5G communication.

Based on this, the embodiments of the present application provide a MAC apparatus to improve the accuracy of estimating the time point when the PMA unit 2013 sends the target bit. The apparatus may be the MAC circuit 201 in the interface chip 200 in fig. 2, or may be an independent chip, which is not limited in this application. In the following, the MAC circuit 201 in the interface chip 200 is taken as an example for description, and therefore, the MAC device provided in the embodiment of the present application may also be represented by the MAC device 201.

In the MAC device 201 shown in fig. 2, the PMA unit 2013 is configured to obtain a first time point of a first bit, and send the first time point to the MAC core unit. Wherein, the first time point of the first bit is the time point when the PMA unit sends the first bit.

In the embodiment of the present application, the first bit may be a bit in a data stream sent by the MAC core unit 2011 to the PMA unit 2013 via the PCS unit 2012. In one possible implementation, the first bit may be any bit in the data stream sent by the MAC core unit 2011 to the PCS unit 2012, and in another possible implementation, the first bit may also be a bit that satisfies a preset rule in the data stream sent by the MAC core unit 2011 to the PCS unit 2012, for example, the MAC core unit 2011 determines that the currently sent bit is the first bit every preset number of bits. As shown in fig. 3, the MAC core unit 2011 determines the 60 th bit data transmitted in T1 as the first bit 1. The data stream sent by the MAC core unit 2011 to the PCS unit 2012 includes, but is not limited to, various types of packets, code streams, and the like, and for the PCS unit 2012 and the PMA unit 2013, the received data stream may be directly processed without distinguishing specific contents in the data stream.

The PMA unit 2013 receives a data stream from the PCS unit 2012, performs processing such as bit-width conversion on the received data stream, and then continuously transmits the processed data stream. The data stream continuously transmitted by the PMA unit also includes the first bit.

In this embodiment, the PMA unit 2013 may obtain, through its internal clock circuit, a first time point at which the first bit is sent. For example, the first time point when the PMA unit 2013 collects and sends the first bit1 in fig. 3 is t 1.

In one possible implementation, the PMA unit 2013 may send the first time point to the MAC core unit 2011 via the PCS unit 2012 after acquiring the first time point.

In another possible implementation, as shown in fig. 2, the PMA unit 2013 is directly connected to the MAC core unit 2011 by a wire, and the PMA unit 2013 directly sends the first time point to the MAC core unit 2011 by a wire connected to the MAC core unit 2011. For most existing PCS units 2012 do not support bidirectional transmission, in the present application, a wire is added between a PMA unit 2013 and a MAC core unit 2011 to provide a transmission path for the PMA unit 2013 to send a first time point to the MAC core unit 2011, and the structure is simple to implement, low in cost, and higher in transmission speed.

In the MAC device 201 shown in fig. 2, the MAC core unit 2011 is configured to receive a target bit to be sent, and estimate a second time point at which the PMA unit 2013 sends the target bit according to the first time point and a bit number of an interval between the target bit and the first bit. After the data stream with the target bit is passed through the MAC core 2011 and the PCS2012 units, the PMA unit 2013 sends the data stream with the target bit. The first time point may be a first time point at which the MAC core unit last received and buffered from the PMA unit 2013.

As shown in fig. 3, if the 20 th bit received by the MAC core 2011 in the third unit time T3 is the target bit0, the MAC core 2011 may estimate the second time point at which the PMA unit 2013 sends the bit0 according to the bit number of the interval between the bit0 and the bit1 and the first time point at which the PMA unit 2013 sends the bit 1. In fig. 3, an interval of 40 bits is between bit0 and bit1, and since PMA unit 2013 continuously transmits a data stream, MAC core unit 2011 may determine a time interval between sending bit0 and sending bit1 by PMA unit 2013 by calculating a time for PMA unit 2013 to send 40 bits of data, and may obtain a second time point for PMA unit 2013 to send bit0 by combining a first time point obtained in advance for sending bit 1.

In one possible implementation, when the MAC core unit 2011 estimates a second time point when the PMA unit 2013 sends the target bit according to the first time point and the number of bits spaced between the target bit and the first bit, the MAC core unit 2011 may estimate the second time point according to the following formula one:

t2 ═ t1+ n × UI (one)

Wherein t1 is a first time point; t2 is a second time point; n is the number of bits between the target bit and the first bit; the UI is the transmission time for the PMA unit 2013 to send 1-bit data. In the embodiment of the application, the UI may be obtained by calculation according to the bandwidth of the servers 202, for example, when the bandwidth of the servers 202 is 10.3125Gbps, the value of the UI may be 1/10.3125Gbps ≈ 97 ps.

For the 1588 message, after acquiring the second time point, the MAC core unit 2011 may add (or update) a timestamp to the 1588 message according to the second time point, send the 1588 message with the timestamp added (or updated) to the PMA unit 2013 through the PCS unit 2012, and send the 1588 message to the servers 202 through the PMA unit 2013.

By adopting the above scheme, the obtained first time point when the PMA unit 2013 sends the first bit is a more accurate time point. On this basis, since the PMA unit 2013 in the MAC device 201 can continuously transmit the data stream, the time interval between the second time point when the PMA unit 2013 transmits the target bit and the first time point when the PMA unit 2013 transmits the first bit can be estimated more accurately by the number of bits of the interval between the target bit and the first bit. Therefore, the MAC core unit 2011 can estimate and acquire the second time point of the target bit sent by the PMA unit 2013 more accurately according to the number of bits spaced between the target bit and the first time point of the first bit sent by the PMA unit 2013, which is beneficial to improving the accuracy of the estimated time point of the target bit sent by the PMA unit 2013, generally can control the error within 1ns, and can meet the requirement of 5G communication.

In the embodiments of the present application, the first bit may not have a fixed characteristic. Most of the PMA units 2013 may not be able to identify the first bit in the data stream when sending the data stream, resulting in a first time point when the PMA units 2013 cannot obtain the first bit. Based on this, the PMA unit 2013 in this embodiment of the application is further configured to: the first signal and data stream sent by the MAC core unit 2011 to the PMA unit 2013 via the PCS unit 2012 are received. Wherein the first signal is to indicate a first bit in a data stream received by the PMA unit from the PCS unit. In the embodiment of the present application, the first signal may be a pulse signal.

In one possible implementation, the first signal is a parallel signal of a first bit in the data stream, which are synchronized in time. When the PMA unit receives the first bit from the PCS unit, it also receives the first signal. Upon receiving the first signal, the PMA unit may determine the currently received bit as the first bit.

In a possible implementation, the PMA unit also processes the data stream first signals in parallel, taking the point in time at which the parallel processing of the first signals is completed as the first point in time.

With the above arrangement, when the MAC core unit 2011 transmits the first bit, the MAC core unit 2011 transmits the first signal in parallel, and the first signal serves as a parallel signal of the first bit. In this embodiment, the MAC core unit 2011 may send the first signal through out-of-band transmission, so as not to occupy a transmission bandwidth of the data stream. The first signal is always kept in parallel with the first bit in the PCS unit 2012 and the PMA unit 2013, for example, the first signal undergoes the same processing as the first bit when passing through the PCS unit 2012 and the PMA unit 2013, and thus, the same propagation delay as the first bit is generated, thereby keeping in parallel with the first bit. Accordingly, the PMA unit 2013 completes transmitting the first bit also when processing the first signal is completed, and thus the point in time at which the first bit is transmitted, that is, the first point in time can be determined according to the point in time at which processing the first signal is completed. For example, the PMA unit 2013 may use the processing result of the first signal as a trigger to acquire the first time point, and when the processing of the first signal is completed, the PMA unit 2013 acquires the current time point from the clock circuit as the first time point.

In this embodiment, the MAC core unit 2011 needs to estimate a second time point when the PMA unit 2013 sends the target bit according to the number of bits of the interval between the target bit and the first bit. In one possible implementation, the MAC core unit 2011 is further configured to: starting a first counter, where the first counter is used to count the number of bits that the MAC core unit 2011 continues to receive after receiving the first bit; before estimating a second time point when the PMA unit 2013 sends the target bit according to the first time point and the number of bits spaced between the target bit and the first bit, the first counter is stopped, and the value recorded by the first counter can be used as the number of bits spaced between the target bit and the first bit.

For example, in fig. 3, after receiving the first bit1, the MAC core 2011 starts a first counter, which starts to record the number of bits that the MAC core 2011 continues to transmit after transmitting the first bit 1. After receiving the target bit0, the MAC core 2011 stops the first counter, and records a value of 40 bits between bit0 and bit 1.

In the MAC device 201, the PCS unit 2012 encodes the data stream transmitted by the MAC core 2011 according to the IEEE 802.3 protocol, typically every 64 bits, and adds 2 bits to the data stream for each encoding. For example, if the size of the data stream sent by the MAC core unit 2011 to the PCS unit 2012 is 128 bits, the size of the data stream sent by the PCS unit 2012 to the PMA unit 2013 becomes 132 bits after being encoded by the PCS unit 2012. The PCS unit 2012 encodes the data stream, which may change the size of the data stream, and thus it is not favorable to improve the accuracy of the estimated second time point.

Based on this, in one possible implementation, the MAC core unit 2011 is further configured to: counting the number of transmitted bits by a second counter; when the second counter accumulates 64 bits, the second counter is restarted and 2 bits are additionally added to the currently recorded value of the first counter. The restarted second counter may continue to count the number of bits sent by the MAC core unit 2011 from zero.

With the above scheme, the MAC core unit 2011 adds 2 to the currently recorded numerical value of the first counter every 64 bits by the second counter, so that the counting result of the first counter includes the number of bits added to the data stream due to the coding by the PCS unit 2012, thereby making the counting result more accurate and further improving the accuracy of the estimated second time point.

Based on the same technical concept, the embodiments of the present application further provide another MAC apparatus, which can more accurately estimate a time point when a PMA unit receives a target bit. The structure of the MAC apparatus for estimating the time point when the PMA unit receives the target bit according to the embodiment of the present application is similar to that of the MAC apparatus for estimating the time point when the PMA unit transmits the target bit, so the embodiment of the present application will continue to use the MAC apparatus 201 shown in fig. 2 as an example to describe the MAC apparatus for estimating the time point when the PMA unit receives the target bit.

In the MAC device 201 shown in fig. 2, the PMA unit 2013 is configured to acquire a third time point of the second bit and send the third time point to the MAC core unit 2011. Wherein the third time point of the second bit is a time point when the PMA unit receives the second bit.

In this embodiment of the application, the PMA unit 2013 may continuously receive a data stream from the serdes202, where the data stream may be in various forms such as a message and a code stream. The PMA unit 2013 performs processing such as bit width conversion on the received data stream, and sends the data stream to the PCS unit 2012. The PCS unit 2014 performs processing such as decoding on the received data stream, and sends the result to the MAC core unit 2011.

In the embodiment of the present application, the second bit may be any bit in the data stream sent by the PMA unit 2013 to the PCS unit 2012, or may be a bit that meets a preset rule in the data stream sent by the PMA unit 2013 to the PCS unit 2012, for example, the PMA unit 2013 determines that the currently sent bit is the first bit every preset number of bits.

Since the transmission direction of the PMA unit 2013 sending the third time point in the embodiment of the present application is the same as the transmission direction of the data stream received in the MAC device 201, the PMA unit 2013 in the MAC device 201 may send the third time point to the MAC core unit 2011 via the PCS unit.

The MAC core unit 2011 is configured to receive the target bit, and estimate a fourth time point when the PMA unit 2013 receives the target bit according to the third time point and the number of bits spaced between the target bit and the second bit. The target bit is a bit in the data stream received by the PMA unit 2012 and is sent to the MAC core unit 2011 via the PMA unit 2013 and the PCS unit 2012.

For example, the MAC core 2011 estimates the fourth time point according to the following equation two:

t4 ═ t3+ m × UI (two)

Wherein t3 is a third time point; t4 is a fourth time point; m is the bit number of the interval between the target bit and the second bit; the UI is the transmission time for the PMA unit 2013 to receive 1-bit data. In the embodiment of the present application, the UI may be obtained by calculating the bandwidth of the servers 202.

With the above scheme, since the PMA unit 2013 in the MAC device 201 can continuously receive the data stream from the serdes202, the time interval between the fourth time point when the PMA unit 2013 receives the target bit and the third time point when the PMA unit 2013 receives the second bit can be more accurately estimated by the number of bits of the interval between the target bit and the second bit. Therefore, the MAC core 2011 may estimate the fourth time point at which the PMA unit 2013 receives the target bit more accurately according to the number of bits between the target bit and the second bit and the third time point at which the PMA unit 2013 receives the second bit.

In the embodiments of the present application, the second bit may not have a fixed characteristic. Therefore, most of the MAC core units 2011 do not have a function of identifying the second bit in the data stream when receiving the data stream. Based on this, the MAC core 2011 is also configured to: receive the second signal and data stream sent by PMA unit 2013 to MAC core unit 2011 via PCS unit 2012; the second signal is used to indicate a second bit in the data stream that MAC core unit 2011 receives from PCS unit 2012. In one possible implementation, the second signal may be a pulse signal. In this embodiment of the present application, the second signal may also be a parallel signal of a second bit, and a parallel relationship between the second signal and the second bit is similar to a parallel relationship between the first signal and the first bit, which is not described in detail in this embodiment of the present application.

In the embodiment of the present application, the MAC core unit 2011 needs to estimate a fourth time point when the PMA unit 2013 receives the target bit according to the number of bits spaced between the fourth bit and the third bit. In a possible implementation manner, the MAC core unit 2011 is further configured to start a third counter, where the third counter is configured to count the number of bits that the MAC core unit 2011 continues to receive after receiving the second bit; stopping the third counter before estimating a fourth time point when the PMA unit 2013 sends the target bit according to the third time point and the bit number of the interval between the target bit and the second bit; the value recorded by the third counter may be used as the number of bits of the interval between the target bit and the second bit.

In one possible implementation, the MAC core 2011 may determine whether the second bit is received according to the second signal. Upon receiving the second signal, the MAC core 2011 turns on the third counter to start counting the number of bits that continue to be received after receiving the second bit.

In the MAC device 201, the PCS unit 2012 performs a de-encoding function to perform a de-encoding process every 64 bits, wherein the de-encoding process subtracts 2 bits from the data stream received by the PCS unit 2012. In order to improve the accuracy of the fourth time point estimated by the MAC core 2011, in one possible implementation, the MAC core 2011 is further configured to: counting the number of received bits by a fourth counter; and when the fourth counter accumulates 64 bits, restarting the fourth counter and additionally adding 2 bits in the currently recorded numerical value of the third counter.

With the above scheme, the MAC core unit 2011 adds 2 to the currently recorded value of the first counter every 64 bits by the fourth counter, so that the counting result of the first counter includes the number of bits deducted from the data stream received by the PMA unit 2013 due to the de-encoding by the PCS unit 2012, thereby making the counting result more accurate and further improving the accuracy of the fourth time point obtained by estimation.

Based on the same technical concept, the embodiment of the present application further provides a time point estimation method, which can estimate a time point of transmitting a target bit. It should be understood that the time point estimation method provided by the embodiments of the present application can be implemented by software, for example, by a processor inside the device sending the target bit calling a program instruction stored in a memory to execute the time point estimation method provided by the embodiments of the present application. In addition, what is provided by the embodiments of the present application may also be implemented by a combination of hardware and software, for example, by the MAC apparatus shown in fig. 2. For convenience of understanding, the embodiment of the present application takes the MAC apparatus shown in fig. 2 as an example, and introduces a time point estimation method provided in the embodiment of the present application. Fig. 4 is a schematic flow chart of a time point estimation method provided in the embodiment of the present application, as shown in fig. 4, the method mainly includes the following steps:

s401: the PMA unit 2013 obtains a first point in time of a first bit.

The first time point of the first bit is the time point when the PMA unit 2013 sends the first bit.

S402: the PMA unit sends a first point in time to the MAC core unit 2011.

S403: the MAC core unit 2011 receives a target bit to be sent, and estimates a second time point at which the PMA unit 2013 sends the target bit according to the first time point and the number of bits spaced between the target bit and the first bit.

In one possible implementation, the MAC core unit 2011 may also send a first signal to the PMA unit 2013 via the PCS unit 2012 when sending a data stream comprising the first bit to the PMA unit 2013 via the PCS unit 2012; the first signal is a parallel signal of a first bit; the PMA unit 2013 processes the first signal and the first bit in parallel when processing the data stream, and takes the first bit and a time point at which the parallel processing completes the first signal as the first time point. Wherein the first signal may be a pulse signal.

Fig. 5 illustrates, by taking 1588 message as an example, a schematic diagram of a first signal inside an MAC device according to an embodiment of the present application, where an initial bit of the 1588 message is a target bit. As shown in fig. 5, the MAC core unit 2011 sends a first signal and a first bit1 in parallel to the PMA unit 2013, where the first signal is transmitted out of band and does not occupy the transmission bandwidth of the data stream where the bit1 is located. The PMA unit 2013 processes and sends bit1, and acquires a time point at which the processing of the first signal is completed as a first time point t 1. Thereafter, the PMA unit 2013 sends the first time point t1 to the MAC core unit 2011. When receiving the target bit, the MAC core 2011 estimates a second time point t2 according to the first time point t1 and the number of bits between the target bit and bit 1. Thereafter, the MAC core unit 2011 adds (or updates) a timestamp to the 1588 message according to the second time point t2, and sends the 1588 message with the timestamp added (or updated) to the PMA unit 2013 through the PCS unit 2012. The PMA unit 2013 receives and processes the 1588 message, and then sends the processed 1588 message.

In one possible implementation, the MAC core unit 2011 may estimate the second time point according to the formula t2 ═ t1+ n × UI, where t1 is the first time point; t2 is a second time point; n is the number of bits between the target bit and the first bit; the UI is the transmission time for the PMA unit 2013 to send 1-bit data.

In a possible implementation manner, the MAC core unit 2011 may further start a first counter, where the first counter is configured to count the number of bits that the MAC core unit 2011 continues to receive after receiving the first bit; the MAC core 2011 stops the first counter before estimating a second time point when the PMA 2013 sends the target bit according to the first time point and the number of bits spaced between the target bit and the first bit, and the value recorded by the first counter at this time can be used as the number of bits spaced between the target bit and the first bit.

Taking 1588 message as an example, fig. 6 is a schematic flow chart of a possible time point estimation method provided in the embodiment of the present application, as shown in fig. 6, mainly including the following steps:

in step S601, the MAC core unit 2011 sends a first signal to the PMA unit 2013 via the PCS unit 2012 and starts a first counter.

S602: the PMA unit 2013 processes the first signal, and acquires a point in time at which the processing of the first signal is completed as a first point in time.

S603: the PMA unit 2013 sends the acquired first point in time to the MAC core unit 2011.

S604: the MAC core unit 2011 receives and buffers the first time point.

S605: when receiving the start bit of the 1588 message, the MAC core unit 2011 estimates a second time point according to the value currently recorded by the first counter and the first time point. And adding (or updating) a timestamp for the 1588 message according to the estimated second time point.

S606: the MAC core unit 2011 sends a 1588 message with the timestamp added (or updated) to the PMA unit 2013 via the PCS unit 2012.

S607: the MAC core 2011 determines whether the first time point needs to be updated. If yes, returning to execute S601; if not, the process returns to step S605.

In this embodiment, the MAC core 2011 may determine the first bit from the received data stream according to a preset bit interval, and when the first bit meeting the preset rule is received, it may determine that the first time point needs to be updated.

In a possible implementation, the MAC core unit 2011 may further count the number of bits sent by the second counter; the MAC core unit 2011 restarts the second counter and additionally adds 2 bits to the value currently recorded by the first counter when the second counter accumulates 64 bits.

Based on the same technical concept, the embodiment of the present application further provides a time point estimation method, which can estimate a time point when a target bit is received. It should be understood that the time point estimation method provided by the embodiments of the present application can be implemented by software, for example, by a processor inside a device receiving a target bit calling program instructions stored in a memory to execute the time point estimation method provided by the embodiments of the present application. In addition, what is provided by the embodiments of the present application may also be implemented by a combination of hardware and software, for example, by the MAC apparatus shown in fig. 2. For convenience of understanding, the embodiment of the present application takes the MAC apparatus shown in fig. 2 as an example, and introduces a time point estimation method provided in the embodiment of the present application. Fig. 7 is a schematic flow chart of a time point estimation method according to an embodiment of the present application, as shown in fig. 7, which mainly includes the following steps:

s701: the PMA unit 2013 acquires a third point in time of the second bit and sends the third point in time to the MAC core unit 2011.

The third time point of the second bit is the time point when the PMA unit 2013 receives the second bit. In an embodiment of the application, the second bit is a bit in the data stream that is continuously received by the PMA unit 2013. As shown in fig. 7, the PMA unit sends the data stream with the second bit to the MAC core 2011 via the PCS 2012.

S702: the MAC core 2011 receives the second bit from the PCS2012 unit and receives the third time point sent by the PMA 2013, and the MAC core 2011 may further buffer the third time point.

S703: the MAC core 2011 receives the target bit and estimates a fourth time point when the PMA 2013 receives the target bit according to the third time point and the number of bits spaced between the target bit and the second bit.

As shown in fig. 7, the PMA unit continues to send the received data stream to the MAC core unit via PCS unit 2012. The MAC core 2011 receives the data stream from the PCS2012, and if the target bit is received, S703 is executed.

In one possible implementation, the PMA unit 2013 may also generate a second signal; processing the second signal in parallel while processing the received second bit; when the processed second bit is sent to the MAC core 2011 via the PCS2012, a second signal is sent in parallel to the MAC core 2011 via the PCS 2012; the MAC core 2011 receives the second signal and the second bit sent in parallel by the PCS2012 unit; and recording the number of bits which are continuously received after the second bit is received according to the second signal. Wherein the second signal may be a pulse signal.

In a possible implementation manner, the second bit is a bit that satisfies a preset rule in the data stream sent by the PMA unit 2013 to the PCS unit 2012; the predetermined rule includes a predetermined number of bits spaced between any adjacent second bits.

In one possible implementation, the MAC core 2011 may estimate the fourth time point according to the following formula: t4 ═ t3+ m UI, where t3 is the third time point; t4 is a fourth time point; m is the bit number of the interval between the target bit and the second bit; the UI is the transmission time for the PMA unit 2013 to receive 1-bit data.

In a possible implementation manner, the MAC core unit 2011 may further start a third counter, where the third counter is configured to count the number of bits that the MAC core unit 2011 continues to receive after receiving the second signal; the MAC core 2011 may stop the third counter before estimating the fourth time point when the PMA 2013 sends the target bit according to the third time point and the number of bits spaced between the target bit and the second bit, and the value recorded by the third counter may be used as the number of bits spaced between the target bit and the second bit.

In a possible implementation, the MAC core unit 2011 may further count the number of received bits by using a fourth counter; when the fourth counter accumulates 64 bits, the fourth counter is restarted and 2 bits are additionally added to the value currently recorded by the third counter.

Based on the same technical concept, embodiments of the present application further provide a chip, where the chip includes the MAC apparatus provided in any of the above embodiments. In one possible implementation, the chip further includes serdes. serdes is connected to a PMA unit in a MAC device. It should be understood that two separate circuit structures may be provided between serdes and the MAC device, or the serdes and the MAC device may be integrated in the same circuit structure, for example, the serdes and the PMA unit may be integrated in the same circuit structure, for example, the PCS unit, the PMA unit and the serdes unit may be integrated in the same circuit structure, and the like, which is not limited in this embodiment of the application.

Based on the same technical concept, embodiments of the present application further provide an electronic device, which includes the MAC apparatus provided in any of the above embodiments and is capable of executing the time point estimation method shown in fig. 4 and/or fig. 7.

Based on the same technical concept, embodiments of the present application further provide a program, which when executed on a device, will enable the device to implement the time point estimation method provided in any one of the above embodiments.

The above embodiments are only used to describe the technical solutions of the present application in detail, but the above embodiments are only used to help understanding the method of the embodiments of the present application, and should not be construed as limiting the embodiments of the present application. Modifications and substitutions that may be readily apparent to those skilled in the art are intended to be included within the scope of the embodiments of the present application.

Claims

A medium access control, MAC, apparatus, comprising: the MAC core unit and the physical medium connection sub-layer PMA unit;

the PMA unit is configured to obtain a first time point of a first bit, and send the first time point to the MAC core unit; a first time point of the first bit is a time point when the PMA unit sends the first bit;

the MAC core unit is configured to receive a target bit to be sent, and estimate a second time point at which the PMA unit sends the target bit according to the first time point and a bit number of an interval between the target bit and the first bit; the first bit and the target bit are bits in a data stream continuously transmitted by the PMA unit.
The MAC apparatus of claim 1, the PMA unit further to:

receiving a first signal and a data stream which are transmitted to the PMA unit by the MAC core unit through a Physical Coding Sublayer (PCS) unit; the first signal is to indicate the first bit in a data stream received by the PMA unit from the PCS unit.
The MAC apparatus of claim 2, wherein the first bit is a bit that satisfies a preset rule in a data stream transmitted by the MAC core unit to the PCS unit; the preset rule comprises a preset bit number spaced between any adjacent first bits.
The MAC device of any of claims 1 to 3, wherein the MAC core unit, when estimating a second point in time at which the PMA unit transmits the target bit based on the first point in time and a number of bits spaced between the target bit and the first bit, is specifically configured to:

estimating the second point in time according to the following formula:

t2＝t1＋n*UI

wherein t1 is the first time point; t2 is the second time point; n is the number of bits between the target bit and the first bit; the UI is the transmission time for the PMA unit to send 1-bit data.
The MAC apparatus of any of claims 1 to 4, wherein the MAC core unit is further to:

starting a first counter, wherein the first counter is used for counting the number of bits continuously received after the MAC core unit receives the first bit;

stopping the first counter before estimating a second time point at which the PMA unit transmits the target bit according to the first time point and the number of bits spaced between the target bit and the first bit; the value recorded by the first counter is the number of bits of the interval between the target bit and the first bit.
The MAC apparatus of claim 5, wherein the MAC core unit is further to:

counting the number of received bits by a second counter;

and when the second counter accumulates 64 bits, restarting the second counter and additionally adding 2 bits in the value currently recorded by the first counter.
The MAC apparatus of claim 2, wherein the first signal is a pulse signal.
The MAC device according to any one of claims 1 to 7, wherein the target bit is a start bit of a 1588 message;

the MAC core element is further configured to:

and adding or updating the time stamp in the 1588 message according to the second time point obtained by estimation.
A medium access control, MAC, apparatus, comprising: the MAC core unit and the physical medium connection sub-layer PMA unit;

the PMA unit is configured to obtain a third time point of a second bit, and send the third time point to the MAC core unit; a third time point of the second bit is a time point of the PMA unit receiving the second bit;

the MAC core unit is configured to receive a target bit, and estimate a fourth time point at which the PMA unit receives the target bit according to the third time point and a bit number of an interval between the target bit and the second bit; the target bit and the second bit are bits in a data stream that is continuously received by the PMA unit.
The MAC apparatus of claim 9, wherein the MAC core unit is further to:

receiving a second signal and a data stream which are sent by the PMA unit to the MAC core unit through a Physical Coding Sublayer (PCS) unit; the second signal is to indicate a second bit in a data stream received by the MAC core unit from the PCS unit.
The MAC apparatus of claim 10, wherein the second bit is a bit that satisfies a preset rule in a data stream transmitted by the PMA unit to the PCS unit; the preset rule comprises a preset bit number spaced between any two adjacent second bits.
The MAC device of any of claims 9 to 11, wherein the MAC core unit, when estimating a fourth point in time at which the PMA unit receives the target bit based on the third point in time and a number of bits spaced between the target bit and the second bit, is specifically configured to:

estimating the fourth time point according to the following formula:

t4＝t3+m*UI

wherein t3 is the third time point; t4 is the fourth time point; m is the number of bits of the interval between the target bit and the second bit; the UI is the transmission time for the PMA unit to receive 1-bit data.
The MAC apparatus of any of claims 9 to 12, wherein the MAC core unit is further to:

starting a third counter, where the third counter is used to count the number of bits that the MAC core unit continues to receive after receiving the second bit;

stopping the third counter before estimating a fourth time point at which the PMA unit receives the target bit based on the third time point and the number of bits spaced between the target bit and the second bit; the third counter records a value of the number of bits of the interval between the target bit and the second bit.
The MAC apparatus of claim 13, wherein the MAC core unit is further to:

counting the number of received bits by a fourth counter;

and when the fourth counter accumulates 64 bits, restarting the fourth counter and additionally adding 2 bits in the value currently recorded by the third counter.
The MAC apparatus of claim 10, wherein the second signal is a pulsed signal.
A time point estimation method, comprising:

acquiring a first time point of a first bit; a first time point of the first bit is a time point of sending the first bit;

receiving a target bit to be sent, and estimating a second time point for sending the target bit according to the first time point and the bit number of the interval between the target bit and the first bit; the first bit and the target bit are bits in a continuously transmitted data stream.
The method of claim 16, wherein estimating a second point in time at which the target bit is transmitted based on the first point in time and a number of bits spaced between the target bit and the first bit comprises:

estimating the second point in time according to the following formula:

t2＝t1+n*UI

wherein t1 is the first time point; t2 is the second time point; n is the number of bits between the target bit and the first bit; UI is the transmission time for transmitting 1-bit data.
The method of claim 16 or 17, further comprising:

starting a first counter, wherein the first counter is used for counting the number of bits which are continuously received after the first bit is received;

estimating, according to the first time point and the number of bits spaced between the target bit and the first bit, a time before a second time point when the target bit is transmitted, further comprising:

stopping the first counter; the value recorded by the first counter is the number of bits of the interval between the target bit and the first bit.
The method of claim 18, wherein the method further comprises:

counting the number of received bits by a second counter;

and when the second counter accumulates 64 bits, restarting the second counter and additionally adding 2 bits in the value currently recorded by the first counter.
The method according to any one of claims 16 to 19, wherein the target bit is a start bit of a 1588 message;

the method further comprises the following steps:

and adding or updating the time stamp in the 1588 message according to the second time point obtained by estimation.
A time point estimation method, comprising:

acquiring a third time point of the second bit; a third time point of the second bit is a time point of receiving the second bit;

receiving a target bit, and estimating a fourth time point of receiving the target bit according to the third time point and the bit number of the interval between the target bit and the second bit; the target bit and the second bit are bits in a continuously received data stream.
The method of claim 21, wherein estimating a fourth point in time at which the target bit is received based on the third point in time and the number of bits spaced between the target bit and the second bit comprises:

estimating the fourth time point according to the following formula:

t4＝t3+m*UI

wherein t3 is the third time point; t4 is the fourth time point; m is the number of bits of the interval between the target bit and the second bit; UI is the transmission time of the received 1-bit data.
The method of claim 21 or 22, further comprising:

starting a third counter, wherein the third counter is used for counting the number of bits which are continuously received after the second bit is received;

estimating, before a fourth time point when the target bit is received, according to the third time point and the number of bits spaced between the target bit and the second bit, the method further includes:

stopping the third counter; the third counter records a value of the number of bits of the interval between the target bit and the second bit.
The method of claim 23, wherein the method further comprises:

counting the number of received bits by a fourth counter;

and when the fourth counter accumulates 64 bits, restarting the fourth counter and additionally adding 2 bits in the value currently recorded by the third counter.
A chip comprising, for example, MAC devices and parallel/serializer serdes;

the PMA unit in the MAC device is connected with the serdes; the MAC device as claimed in any one of claims 1 to 15.
An electronic device comprising the chip of claim 25.