CN112599321A - Miniature three-dimensional solenoid transformer and digital isolator - Google Patents
Miniature three-dimensional solenoid transformer and digital isolator Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F19/00—Fixed transformers or mutual inductances of the signal type
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/28—Coils; Windings; Conductive connections
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
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- H01F27/2804—Printed windings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/28—Coils; Windings; Conductive connections
- H01F27/32—Insulating of coils, windings, or parts thereof
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Abstract
The invention relates to a miniature three-dimensional solenoid transformer and a digital isolator, wherein the miniature three-dimensional solenoid transformer comprises two solenoids which have the same structure and are wound in a staggered mode, a silicon substrate for supporting the solenoids and a polyimide isolation layer; each solenoid comprises a plurality of turns of coils which are parallel to each other, the distance between every two adjacent coils is consistent, each turn of coil comprises an upper strip-shaped horizontal lead and a lower strip-shaped horizontal lead and two cylindrical vertical leads connected with the horizontal leads, the projections of the upper and lower horizontal leads on the horizontal plane are two isosceles sides of an isosceles triangle, the adjacent coils of the two solenoids are isolated by polyimide isolation layers, and the head coil and the tail coil of each solenoid are connected with pins on the upper surface of a silicon substrate. The miniature three-dimensional solenoid transformer allows the distance between the primary coil and the secondary coil to be larger, has stronger voltage isolation capability, and has the advantages of small size, high structural strength, excellent performance, low manufacturing cost and the like.
Description
Technical Field
The invention relates to the technical field of digital isolators, in particular to a miniature three-dimensional solenoid transformer and a digital isolator.
Background
The digital isolator can realize data transmission when the circuit is physically isolated and has no current conduction, plays a role in isolating voltage at two ends of the circuit and environmental noise, protects the circuit and important components from being damaged by high voltage, and stabilizes data transmission. The digital isolator has important application in the control system, high voltage transmission, power maintenance and electronic equipment interface of the traditional medical treatment, aerospace, military and civil industries.
In the past, opto-isolators have dominated the market in the above applications. However, the optoelectronic isolator has the disadvantages of short service life, high requirement on applicable temperature, high energy consumption, high delay, low transmission rate, incapability of transmitting power and the like. The electromagnetic digital isolator (hereinafter referred to as digital isolator) can perfectly solve the problems of the photoelectric isolator.
In the existing digital isolators, all on-chip spiral transformers or on-chip laminated transformers are used for realizing circuit isolation, the performance is improved through various circuit designs, and micro three-dimensional solenoid transformers are not used as cores. Since the on-chip spiral transformer or the laminated transformer has problems of small voltage gain, narrow high voltage gain (-3dB or more) band, small inductance value and mutual inductance value, etc., when the isolation performance is increased by increasing the distance between the primary coil and the secondary coil, the performance of the transformer is drastically decreased, and it is necessary to increase the performance by increasing the number of turns of the transformer. However, the on-chip transformer and the laminated transformer are both planar coils, so the area of the outer coil is increasingly large, the gain of the overall performance of the transformer is increasingly low, the volume of the digital isolator is excessively large, or the designed isolation requirement cannot be met at all, the incompatibility of the transformer and the coding and decoding circuit is easily caused by the excessively narrow high-voltage gain frequency band, the digital isolator which mainly uses the on-chip transformer as the core, the polyimide isolation layer is only 20-40 μm, and the isolation capability is limited.
For example, the ADuM724X series from ANALOG DEVICES (ADI) is a suitable codec circuit matching an on-chip stacked transformer as a core and polyimide as an isolation material. Digital isolators from ADI have been produced in a variety of products, but without exception, on-chip transformers are used, which, as mentioned above, have problems in terms of isolation potential and signal transmission capability, and thus it has become very difficult to develop digital isolators with larger voltage isolation capability (above 7.5KVrms or above 25KV ESD).
The differential signal amplifying circuit, the digital isolator and the digital receiver disclosed in the chinese patent application with the publication number CN111446935A, the low-jitter digital isolator circuit disclosed in the publication number CN111193507A, and the linear isolator disclosed in the publication number CN109831202A, etc. all adopt an encoding and decoding mode in the form of OKK, which has high energy consumption and is increasingly not suitable for the low energy consumption and high heat dissipation requirements required by present electronic devices.
The anti-interference digital isolator disclosed in the Chinese patent application with the publication number of CN111521855A adopts a single-pulse coding mode of both rising edge and falling edge, and once signal jitter occurs in the coding mode, subsequent decoding is completely disordered.
The above patent applications all adopt a certain specific circuit, then add some parts on the circuit, optimize the signal stability and richen function of digital isolator to incompatible multiple coding circuit, and these circuits all need to reach the frequency of GHz just can work, and the circuit design degree of difficulty is great, and its core transformer is weak with the compatible ability of circuit. For example, products of ADI company are adopted, and at present, 1ns pulse waves are adopted to realize transmission of signals in a transformer, which brings great troubles to circuit design. No one has innovative solutions on the core isolation area at present.
Disclosure of Invention
The invention provides a miniature three-dimensional solenoid transformer and a digital isolator, aiming at solving the problems that a core isolation transformer of the existing digital isolator is not easy to be compatible with a low-frequency external circuit and is difficult to adapt to various coding and decoding circuits, so that the voltage isolation and the noise isolation capability development of the digital isolator taking an on-chip transformer as the core are limited, and the like.
A miniature three-dimensional solenoid transformer comprises two solenoids with the same structure and mutually staggered and wound, a silicon substrate supporting the solenoids and a polyimide isolation layer;
each solenoid comprises a plurality of turns of coils which are parallel to each other, the distance between the adjacent coils is consistent, each turn of the coil comprises an upper strip-shaped horizontal lead and a lower strip-shaped horizontal lead and two cylindrical vertical leads connected with the horizontal leads, the projection of the upper and lower horizontal leads on the horizontal plane is two isosceles sides of an isosceles triangle, the adjacent coils of the two solenoids are separated by a polyimide isolation layer, and the head coil and the tail coil of each solenoid are connected with pins positioned on the upper surface of the silicon substrate.
Correspondingly, the invention also provides a digital isolator which comprises an encoding circuit, a decoding circuit and the miniature three-dimensional solenoid transformer;
the encoding circuit is connected to a pair of pins of one solenoid in the miniature three-dimensional solenoid transformer, and the decoding circuit is connected to a pair of pins of the other solenoid in the miniature three-dimensional solenoid transformer.
Compared with the prior art, the invention has the following beneficial effects:
the micro three-dimensional solenoid transformer and the digital isolator provided by the invention solve the problems that a core isolation transformer of the existing digital isolator is not easy to be compatible with a low-frequency external circuit and is difficult to adapt to various coding and decoding circuits, the defects of the existing photoelectric isolator that the service life is low, the temperature is high, the energy consumption is high, and the energy cannot be transmitted, and the problems that the voltage isolation and the noise isolation capability of the existing digital isolator taking an on-chip transformer as the core are limited. The invention has the following beneficial effects:
(1) the miniature three-dimensional solenoid transformer fully utilizes the upper vertical space, the single inductance and the quality factor of the transformer are far higher than those of a planar coil, and the inductance of three turns of coils can reach 50-100 nH;
(2) the solenoids in the miniature three-dimensional solenoid transformer are mutually staggered and wound, so that the coupling coefficient is higher than that of a planar coil and can reach more than 0.8; the high-voltage gain frequency band is wide and can reach 50MHz-2GHz, so when the working environment of the digital isolator does not need high-speed data transmission, a coding and decoding circuit with lower frequency can be adopted to reduce the design and manufacturing cost of the circuit; when the working environment of the digital isolator needs high-speed data transmission, a coding and decoding circuit for generating high-frequency pulses can be adopted, namely, the transformer can be compatible with the requirements of the low-frequency and high-frequency working environments at the same time and can be compatible with various coding and decoding modes;
(3) the distance between the primary coil and the secondary coil is allowed to be larger due to the advantage of transmission performance of the miniature three-dimensional solenoid transformer, the main stream of the digital isolator takes the on-chip transformer as a core, the polyimide isolation layer is only 20-40 mu m, the isolation capability is limited, the isolation layer can reach at least 100 mu m, the isolation voltage of the digital isolator manufactured by taking the miniature three-dimensional solenoid transformer as the core can reach 20KVrms, and larger isolation voltage potential exists;
(4) when the distance between the primary and secondary coils is increased to increase the voltage isolation capability, the number of turns of the coil needs to be increased to satisfy good transmission performance. However, the on-chip transformer has a weaker and weaker effect of increasing the number of turns of the coil due to the larger and larger area of the outer ring, but the three-dimensional solenoid transformer does not have the problem. This is also one reason why the present invention has greater voltage isolation potential. Meanwhile, in the digital isolator with the same isolation capability, the area of the invention is smaller than that of the existing digital isolator. The digital isolator of the LTM2810 model of ADI company can realize the voltage isolation of 7.5KVrms, the area of the digital isolator is 22mm 6.25mm 2.06mm, while the invention can realize the miniature three-dimensional solenoid transformer with the isolation capability of 20KVrms, the area of the miniature three-dimensional solenoid transformer is only 1.5mm 1mm, and the whole digital isolator can be expected to be packaged in the size within 10mm or even 5 mm;
(5) the miniature three-dimensional solenoid transformer has the advantages of small size, high structural strength, excellent performance and low manufacturing cost;
(6) most of silicon substrates in the three-dimensional solenoid transformer can be removed through a specific exposure pattern, and under the condition that the performance is not influenced, partial silicon columns in the three-dimensional solenoid transformer and the silicon substrates connected with the vertical conducting wires are left, the solenoid coil with a large number of silicon substrates removed is supported, the relative position of the primary coil and the secondary coil is ensured, and the filling thickness of the polyimide isolation material is ensured; and the primary coil and the secondary coil are prevented from being connected through a silicon connection way only by a polyimide filling material in a mode of cutting at the edge, so that the manufacturing of the miniature three-dimensional solenoid transformer filled with the polyimide isolation material is realized.
Drawings
FIG. 1 is a perspective view of a miniature three-dimensional solenoid transformer;
FIG. 2 is a top view of a miniature three-dimensional solenoid transformer;
FIG. 3 is a side view of a miniature three-dimensional solenoid transformer;
FIG. 4 is a process flow diagram for preparing a silicon-based solenoid transformer;
FIG. 5 is an exposed top surface view of a silicon-based solenoid transformer with portions of the silicon substrate removed;
FIG. 6 is an overall perspective view of a silicon-based solenoid transformer with portions of the silicon substrate removed;
FIG. 7 is a perspective view of a coil and supporting silicon posts in a silicon-based solenoid transformer with a portion of the silicon substrate removed;
FIG. 8 is a schematic diagram of an encoding circuit;
FIG. 9 is a coding timing diagram of the coding circuit;
FIG. 10 is a schematic diagram of a decoding circuit;
fig. 11 is a decoding timing diagram of the decoding circuit.
Detailed Description
The technical solution of the present invention will be described in detail with reference to the accompanying drawings and preferred embodiments.
In one embodiment, the present invention provides a miniature three-dimensional solenoid transformer comprising: 1. a solenoid; 2. silicon-based; 3. a polyimide isolation layer.
As shown in fig. 1, the miniature three-dimensional solenoid transformer includes two solenoids (solenoid 1 and solenoid 2, respectively) with the same structure and interlaced winding, a silicon substrate (not shown in fig. 1) is used to support the solenoids, each solenoid includes a plurality of turns of coils parallel to each other, and the adjacent coil spacing is consistent, each turn of coil includes an upper and a lower strip-shaped horizontal wires and two cylindrical vertical wires connected with the horizontal wires, the projections of the upper and the lower horizontal wires on the horizontal plane are two isosceles sides of an isosceles triangle, the adjacent coils of the two solenoids are separated by a polyimide isolation layer, and the head and tail coils of each solenoid are connected with a pin (ped) on the upper surface of the silicon substrate.
Miniature three-dimensional solenoidal transformers are three-dimensional coils, like those formed magnetically in large dimensions. Each solenoid comprises a plurality of turns of coils which are parallel to each other, each turn of coil comprises an upper strip-shaped horizontal lead and a lower strip-shaped horizontal lead, and two cylindrical vertical leads connected with the horizontal leads, and the two horizontal leads and the two vertical leads form a turn of coil together. Each turn of coil is connected with the front and rear turns of coil through a horizontal wire and a vertical wire.
The projection of the two horizontal wires on the upper and lower surfaces of each turn of coil on the horizontal plane can be regarded as two isosceles sides of an isosceles triangle. The setting of the shape ensures that the space between the adjacent sides of all the horizontal wires of the designed three-dimensional solenoid transformer is the same, and the size design of the structure is optimized.
The miniature three-dimensional solenoid transformer comprises a solenoid 1 and a solenoid 2, wherein the solenoid 1 and the solenoid 2 are mutually wound in an interlaced way, namely, a coil of the solenoid 2 is arranged in the middle of an adjacent coil of the solenoid 1, a coil of the solenoid 1 is arranged in the middle of an adjacent coil of the solenoid 2, and all the coils of the solenoid 1 and the solenoid 2 are mutually parallel, and the adjacent coils are uniformly spaced.
The end-to-end coils of both solenoid 1 and solenoid 2 are connected to ped, ped on the top surface of the silicon substrate for direct connection to circuitry, including but not limited to wire bonding, which is connected to ped.
The miniature three-dimensional solenoid transformer does not comprise an iron core structure, the solenoid 1 and ped on the head-tail two-turn coil on the upper surface of the silicon substrate jointly form a primary coil of the miniature three-dimensional solenoid transformer, and the solenoid 2 and ped on the head-tail two-turn coil on the upper surface of the silicon substrate jointly form a secondary coil of the miniature three-dimensional solenoid transformer. The primary coil and the secondary coil are isolated by polyimide which is an isolation material, the thickness of the polyimide isolation layer directly determines the performance of the miniature three-dimensional solenoid transformer and the digital isolator which takes the miniature three-dimensional solenoid transformer as a core, and the miniature three-dimensional solenoid transformer allows a larger distance between the primary coil and the secondary coil, so that the isolation voltage of the digital isolator can be improved.
The method for manufacturing the miniature three-dimensional solenoid transformer in this embodiment is various, for example, the miniature three-dimensional solenoid transformer is manufactured on a single silicon wafer and divided into two silicon wafers, and the process for manufacturing the miniature three-dimensional solenoid transformer on the single silicon wafer and the two silicon wafers comprises the steps of: preparing a solenoid and a pin on a silicon substrate to obtain a silicon-based solenoid transformer; removing a portion of the silicon substrate in the silicon-based solenoid transformer; and filling polyimide. The respective steps will be described in detail below. The micro three-dimensional solenoid transformer has the advantages of small size, high structural strength, excellent performance and low manufacturing cost.
The method comprises the following steps: and preparing the solenoid and the pin on the silicon substrate to obtain the silicon-based solenoid transformer.
1. On a single silicon wafer
(1) Exposing an upper horizontal groove and four ped on the upper surface of the silicon chip, and exposing a lower horizontal groove on the lower surface of the silicon chip;
(2) exposing vertical through holes on the upper surface and the lower surface of the silicon chip in sequence, wherein the exposure of the upper vertical through hole and the exposure of the drooping straight through hole are required to be accurately aligned, the vertical through holes are arranged at the two ends of the horizontal groove, the diameter of each vertical through hole is slightly smaller than the width of the horizontal groove, and a certain alignment error is ensured to be completely arranged in the horizontal groove;
(3) etching vertical through holes on the upper surface and the lower surface of the silicon chip in sequence to ensure that the vertical through holes are etched or are close to etched;
(4) washing off SiO protecting horizontal groove2Etching horizontal grooves and ped on the upper surface of the silicon chip, and etching horizontal grooves on the lower surface of the silicon chip;
(5) cleaning the photoresist on the surface of the protective silicon wafer to obtain a complete spiral channel;
(6) performing thermal oxidation to generate oxide layers on all surfaces of the spiral channel;
(7) adopting vacuum electroplating to densely fill copper in the spiral channel;
(8) and removing excessive copper on the surface of the silicon wafer by adopting a Mechanical Chemical Polishing (CMP) method, so that the preparation of the solenoid and the pin on the silicon substrate is completed to obtain the silicon-based solenoid transformer.
2. Production of divided silicon wafers
The process of preparing the solenoid and the pin on the silicon substrate by adopting a two-layer silicon bonding mode can refer to an MEMS (micro electro mechanical system) square solenoid transformer with Chinese patent application publication No. CN109599249A and a manufacturing method thereof, and is different in that the process of electroplating an iron core in an iron core groove is omitted in the manufacturing process of the invention.
Step two: a portion of the silicon substrate in the silicon-based solenoid transformer is removed. The method comprises the following steps:
(1) cleaning the silicon-based solenoid transformer obtained in the first step, and respectively thermally oxidizing the upper surface and the lower surface of the silicon-based solenoid transformer to generate oxide layers;
(2) respectively coating glue on the upper surface and the lower surface of the oxidized silicon-based solenoid transformer and exposing the silicon-based solenoid transformer to expose the silicon-based pattern to be removed; the exposed silicon-based surface is represented by the blank portion in fig. 5;
(3) and successively etching the upper surface and the lower surface of the exposed silicon-based solenoid transformer until the silicon substrate corresponding to the pattern is completely etched and removed, wherein in the silicon-based solenoid transformer with part of the silicon substrate removed, the silicon substrate which is not removed at the periphery of the solenoid is wrapped on the outer ring of the solenoid, the silicon substrate is connected with the vertical lead and the pin of each turn of coil, two sides and the middle of the horizontal lead are respectively provided with a silicon column (as shown in figure 7), and the silicon columns are connected with the corresponding upper horizontal lead and the corresponding lower horizontal lead. Because the thickness of the isolation material has great influence on the performance of the digital isolator, the process and the structure can ensure that the space between the primary coil and the secondary coil is consistent with that in design after most silicon substrates are removed, and the coil structure still has enough strength to ensure the normal operation of the subsequent process.
Step three: and filling polyimide. Polyimide (abbreviated as PI) is one of organic polymer materials with the best comprehensive performance, has high temperature resistance of more than 400 ℃, long-term use temperature range of-200-300 ℃, no obvious melting point, high insulating property, dielectric constant of 4.0, dielectric strength of 300KV/mm and excellent mechanical property, and is very suitable for serving as an isolation material of a digital isolator. After removing part of the silicon substrate in the silicon-based solenoid transformer, filling a polyimide isolation material into the silicon-based solenoid transformer after removing part of the silicon substrate, wherein the process of filling the polyimide isolation material specifically comprises the following steps:
filling the whole silicon-based solenoid transformer with the removed part of the silicon substrate with polyimide in any one of gluing, soaking or spin coating, and heating to solidify the polyimide;
thinning and polishing the surface of the filled silicon-based solenoid transformer by using a mechanical chemical polishing method to expose the pins;
and cutting off the silicon substrate connected with the periphery of the polished silicon-based solenoid transformer to disconnect the silicon connecting path between the coils, and enabling a polyimide isolation layer to be arranged between the adjacent coils of the two solenoids to finally obtain the miniature three-dimensional solenoid transformer.
In the present embodiment, the number of turns of each solenoid is 3, the pitch between adjacent coils (i.e. the pitch between adjacent horizontal wires) is 100 μm, the width of the horizontal wire is 60 μm, the diameter of the vertical wire is 50 μm, the width of the transformer spiral coil is 800 μm, and the width of ped is added, so that the overall width of the miniature three-dimensional solenoid transformer is 1100 μm, and the overall height is 1000 μm, and the overall length of the miniature three-dimensional solenoid transformer is 1150 μm. The top view and the side view of the miniature three-dimensional solenoid transformer in this embodiment are shown in fig. 2 and 3, respectively.
The manufacturing process comprises the following steps:
firstly, preparing a solenoid and a pin on a silicon substrate to obtain a silicon-based solenoid transformer, wherein the processing technology is as follows, and the process flow chart is shown in fig. 4:
(1) firstly, a 1000-micron thick double-polished silicon wafer is adopted. And the high-resistivity silicon wafer is adopted to improve the insulation of the whole structure and reduce the eddy current loss at high frequency. And thermally oxidizing the silicon wafer to generate a thermal oxidation layer with the thickness of 2 microns on both sides.
(2) And coating photoresist, exposing the horizontal groove and the ped structure on the upper surface of the silicon substrate, exposing the horizontal groove on the lower surface of the silicon substrate, and developing to remove the exposed photoresist.
(3) The silicon dioxide at the exposed position was removed using a BOE solution and the photoresist was removed using a piranha solution.
(4) And gluing for the second time, exposing vertical through hole patterns on the upper surface and the lower surface of the silicon substrate, and developing. The through hole patterns are completely arranged in the horizontal groove and are positioned at two ends of the horizontal groove, and the upper through hole and the lower through hole are accurately aligned.
(5) Etching the silicon through hole on the upper surface deeply by silicon, and stopping etching the upper surface when the depth is 480-; and etching the lower surface silicon through hole, and stopping etching at 480-500 mu m. The photoresist is then masked.
(6) All photoresist was removed using piranha solution.
(7) And respectively deeply etching the horizontal grooves and the ped structures on the upper surface and the lower surface by silicon until the depth is 60 mu m, and ensuring that the vertical through holes are completely communicated at the moment so as to finish the removal of the silicon substrate. At this time, SiO2And (5) making a mask.
(8) And thermally oxidizing to form an oxide layer with the thickness of 2 microns.
(9) The metal titanium with the thickness of 100nm is magnetron sputtered on the lower surface of the silicon wafer to form an intermediate layer (the thickness is not shown in figure 4), and then the metal copper with the thickness of 500nm is sputtered to form a seed layer.
(10) And electroplating metal copper to fill the electroplated copper from the bottom to the lower plane position of the top horizontal groove, and finishing the lower surface.
(11) The upper surface is magnetically controlled to sputter 500nm of metal copper.
(12) And electroplating metal copper to completely cover the whole structure of the upper surface by the electroplated copper, thereby completing the copper filling of the spiral coil.
(13) And (3) thinning the metal copper on the upper surface and the lower surface by using CMP (chemical mechanical polishing) until the metal copper is thinned to the same height as the surface of the thermal oxidation layer of the silicon chip, and polishing the surface by using CMP to finish the manufacturing of the miniature three-dimensional solenoid transformer on the silicon substrate.
Next, the silicon substrate is removed and the polyimide is filled, and fig. 5 to 7 are respectively an upper surface exposure view, an overall perspective view and a partial perspective view of the silicon-based solenoid transformer after a portion of the silicon substrate is removed:
(1) and cleaning the silicon wafer, and generating a 2-micron oxide layer on the upper surface and the lower surface of the silicon wafer by thermal oxidation.
(2) And gluing the upper surface and the lower surface respectively, and exposing to expose the surface of the silicon substrate to be removed. The exposed silicon-based surface is represented by the blank portion in fig. 5, developed. Ped is 75 μm from the cut line and the vertical wire to silicon based connection is 350 μm long as shown in fig. 5.
(3) And etching from the upper surface of the silicon chip to the bottom of the lower horizontal wire.
(4) Etching back from the lower surface to the bottom of the upper horizontal wire. And finishing the removal of the silicon substrate of the three-dimensional solenoid transformer.
(5) And filling polyimide in the spare part of the silicon-based solenoid transformer with the silicon substrate removed by gluing, soaking or spin coating, and the like, and heating and solidifying the spare part of the silicon-based solenoid transformer.
(6) The upper surface thinning is performed using CMP, followed by CMP polishing of the surface, exposing ped of the wire.
(7) And cutting the polished silicon-based solenoid transformer according to the cutting line shown in fig. 5, and cutting off a silicon connecting passage between the primary coil and the secondary coil of the transformer, wherein only the polyimide isolation layer is connected between the primary coil and the secondary coil at the moment, so that the micro three-dimensional solenoid transformer filled with the polyimide isolation material is processed.
The miniature three-dimensional solenoid transformer provided by the embodiment can be compatible with various coding and decoding circuits, and can be compatible with circuits with high frequency (above GHz) and low frequency (below 100 MHz), namely, has a wide high-voltage gain frequency band.
In another embodiment, the present invention provides a digital isolator with a miniature three-dimensional solenoid transformer as a core, the digital isolator comprising: 1. an encoding circuit; 2. a miniature three-dimensional solenoid transformer; 3. a decoding circuit. The structure of the micro three-dimensional solenoid transformer and the manufacturing method thereof can refer to the description in the foregoing embodiments, and are not repeated herein.
The encoding circuit can adopt, but is not limited to, the following encoding modes of the digital isolator: 1. an On-off encoding circuit using an oscillation circuit; 2. respectively coding the rising edge and the falling edge of the control signal into a double-pulse coding mode and a single-pulse coding mode; 3. the rising edge and the falling edge of the control signal are respectively coded into a coding mode of positive pulse wave and a coding mode of negative pulse wave.
The decoding circuit corresponds to the encoding circuit, for example, the encoding circuit adopts an On-off mode of the oscillating circuit, and the decoding circuit can adopt a full-bridge rectifying circuit for decoding; the encoding circuit adopts a rising edge double-pulse and falling edge single-pulse encoding mode, and the decoding circuit can adopt a pulse counter for decoding.
The encoding circuit and the decoding circuit are respectively connected with ped of the miniature three-dimensional solenoid transformer, and optionally, the encoding circuit and the decoding circuit are respectively connected with ped of the miniature three-dimensional solenoid transformer through wire bonding.
The invention adopts the miniature three-dimensional solenoid transformer as the core of the digital isolator, and the miniature three-dimensional solenoid transformer has large high-voltage gain range, so the invention can be adapted to various coding and decoding circuits, and allows the coding circuit and the decoding circuit to be various and have multiple frequency bands.
As a specific implementation, as shown in fig. 8, the encoding circuit includes a first delay circuit TD1, a second delay circuit TD2, an exclusive or gate, an and gate, an or gate, and a first inverter. An input signal in to be coded is respectively connected to one input end of a first delay circuit TD1, an exclusive-OR gate and an AND gate, an output signal S1 of a first delay circuit TD1 is respectively connected to the other input end of the exclusive-OR gate and the input end of a first inverter, an output signal S1 of the first inverter is connected to the other input end of the AND gate, an output signal S3 of the AND gate is connected to a second delay circuit TD2, an output signal S2 of the exclusive-OR gate and an output signal S4 of the second delay circuit TD2 are jointly input to the input end of the OR gate, and an output end of the OR gate outputs a coding signal F to the miniature three-dimensional solenoid transformer. The encoding circuit of the embodiment can realize an encoding mode of encoding the rising edge of the input signal into double pulses and encoding the falling edge into single pulses, thereby realizing the transmission of the signal in the transformer.
Fig. 9 is an encoding timing chart of the encoding circuit, and it can be seen that the delay time Δ t2 of the second delay circuit TD2 should be the delay time Δ t1 of the first delay circuit TD1 plus the interval between two pulses. When Δ t1 is 10ns, and Δ t2 is 20ns, the encoding circuit encodes the input signal in into a signal F which can be transmitted in the transformer and has a pulse width of 10ns and a pulse interval of 10ns, wherein the signal F has a rising edge double pulse and a falling edge single pulse.
Further, as shown in fig. 10, the decoding circuit includes a first flip-flop, a second flip-flop, a third delay circuit TD3, a fourth delay circuit TD4, and a second inverter. The coded signal F to be decoded output by the miniature three-dimensional solenoid transformer is respectively connected to a clock end CK1 of the first trigger and a clock end CK2 of the second trigger, a signal output end Q1 of the first trigger is respectively connected to a RESET end RESET1 of the first trigger and a clock end CK3 of the third trigger after passing through a third delay circuit TD3 and a second inverter, an output signal S5 of a signal output end Q1 of the first trigger is also respectively connected to a signal input end D2 and a RESET end RESET2 of the second trigger through a fourth delay circuit TD4, a signal output end Q2 of the second trigger is connected to a signal input end D3 of the third trigger, a signal output end Q3 of the third trigger is used as an output end to output a decoded signal out, namely the decoded signal, and the signal input end D1 of the first trigger and the RESET end RESET3 of the third trigger are both connected to a signal VDD. All the triggers normally operate when a RESET signal at a RESET end is 1, and the output end Q is 0 when the RESET signal at the RESET end is 0.
Fig. 11 is a decoding timing diagram of the decoding circuit, and it can be seen that the delay time Δ t3 formed by the third delay circuit TD3 is the pulse width of the RESET1 and Q1 signals, and the signal formed by the Q1 after passing through the fourth delay circuit TD4 is to wrap the first rising edge of the ESET1 signal, which is the second rising edge of the double pulse of the F signal, that is to say, it is to satisfy: Δ t1< Δ t3< Δ t4<2 × Δ t1, and Δ t2 ═ 2 × Δ t1, where Δ t3 is the delay time of the third delay circuit TD3, and Δ t4 is the delay time of the fourth delay circuit TD 4. Thus, after passing through the first flip-flop, a detection signal Q1 can be formed in which only the first pulse is active; the Q1 passes through the fourth delay circuit TD4 to form the detection signal Q2 that only the second pulse is valid, which is equivalent to the double pulse that only the rising edge of the input signal in is encoded to be able to generate the pulse for the Q2; the Q2 signal is output to D3, and D3 is high when the first pulse of the CK3 signal rises, and D3 is low when the second pulse rises. Thus, decoding is completed.
The delay time of the decoding circuit is determined by Δ t1, and is twice Δ t 1. Adjusting the delta t1 and satisfying the above formula of the delay time requirement can obtain the coding results with different pulse widths. As the pulse width becomes smaller, more precise control is also required for the delay time of each delay circuit.
Further, the decoding circuit further comprises a shaping circuit arranged between the miniature three-dimensional solenoid transformer and the first trigger, the shaping circuit is positioned at the starting side of the decoding circuit and is used for removing signal fluctuation and burrs caused by transmission in the transformer isolation area, and the shaping circuit can be realized by adopting a Schmidt shaping circuit or a triode shaping circuit and the like.
The digital isolator provided by the invention solves the defects of low service life, high temperature sensitivity, high energy consumption and incapability of transmitting energy of the existing photoelectric isolator, and solves the problems of limited voltage isolation and noise isolation capability development of the existing digital isolator taking the on-chip transformer as the core and the problems that the core isolation transformer of the existing digital isolator is not easy to be compatible with a low-frequency external circuit and is difficult to adapt to various coding and decoding circuits. The invention has the following beneficial effects:
(1) the miniature three-dimensional solenoid transformer fully utilizes the upper vertical space, the single inductance and the quality factor of the transformer are far higher than those of a planar coil, and the inductance of three turns of coils can reach 50-100 nH;
(2) the solenoids in the miniature three-dimensional solenoid transformer are mutually staggered and wound, so that the coupling coefficient is higher than that of a planar coil and can reach more than 0.8; the high-voltage gain frequency band is wide and can reach 50MHz-2GHz, so when the working environment of the digital isolator does not need high-speed data transmission, a coding and decoding circuit with lower frequency can be adopted to reduce the design and manufacturing cost of the circuit; when the working environment of the digital isolator needs high-speed data transmission, a coding and decoding circuit for generating high-frequency pulses can be adopted, namely, the transformer can be compatible with the requirements of the low-frequency and high-frequency working environments at the same time and can be compatible with various coding and decoding modes;
(3) the distance between the primary coil and the secondary coil is allowed to be larger due to the advantage of transmission performance of the miniature three-dimensional solenoid transformer, the main stream of the digital isolator takes the on-chip transformer as a core, the polyimide isolation layer is only 20-40 mu m, the isolation capability is limited, the isolation layer can reach at least 100 mu m, the isolation voltage of the digital isolator manufactured by taking the miniature three-dimensional solenoid transformer as the core can reach 20KVrms, and larger isolation voltage potential exists;
(4) when the distance between the primary and secondary coils is increased to increase the voltage isolation capability, the number of turns of the coil needs to be increased to satisfy good transmission performance. However, the on-chip transformer has a weaker and weaker effect of increasing the number of turns of the coil due to the larger and larger area of the outer ring, but the three-dimensional solenoid transformer does not have the problem. This is also one reason why the present invention has greater voltage isolation potential. Meanwhile, in the digital isolator with the same isolation capability, the area of the invention is smaller than that of the existing digital isolator. The digital isolator of the LTM2810 model of ADI company can realize the voltage isolation of 7.5KVrms, the area of the digital isolator is 22mm 6.25mm 2.06mm, while the invention can realize the miniature three-dimensional solenoid transformer with the isolation capability of 20KVrms, the area of the miniature three-dimensional solenoid transformer is only 1.5mm 1mm, and the whole digital isolator can be expected to be packaged in the size within 10mm or even 5 mm;
(5) the miniature three-dimensional solenoid transformer has the advantages of small size, high structural strength, excellent performance and low manufacturing cost;
(6) most of silicon substrates in the three-dimensional solenoid transformer can be removed through a specific exposure pattern, and under the condition that the performance is not influenced, partial silicon columns in the three-dimensional solenoid transformer and the silicon substrates connected with the vertical conducting wires are left, the solenoid coil with a large number of silicon substrates removed is supported, the relative position of the primary coil and the secondary coil is ensured, and the filling thickness of the polyimide isolation material is ensured; and the primary coil and the secondary coil are prevented from being connected through a silicon connection way only by a polyimide filling material in a mode of cutting at the edge, so that the manufacturing of the miniature three-dimensional solenoid transformer filled with the polyimide isolation material is realized.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A miniature three-dimensional solenoid transformer is characterized by comprising two solenoids with the same structure and mutually staggered and wound, a silicon substrate supporting the solenoids and a polyimide isolation layer;
each solenoid comprises a plurality of turns of coils which are parallel to each other, the distance between the adjacent coils is consistent, each turn of the coil comprises an upper strip-shaped horizontal lead and a lower strip-shaped horizontal lead and two cylindrical vertical leads connected with the horizontal leads, the projection of the upper and lower horizontal leads on the horizontal plane is two isosceles sides of an isosceles triangle, the adjacent coils of the two solenoids are separated by a polyimide isolation layer, and the head coil and the tail coil of each solenoid are connected with pins positioned on the upper surface of the silicon substrate.
2. The miniature three-dimensional solenoid transformer of claim 1, wherein said miniature three-dimensional solenoid transformer is prepared by the steps of:
the method comprises the following steps: preparing the solenoid and the pin on a silicon substrate to obtain a silicon-based solenoid transformer;
step two: removing a portion of the silicon substrate in the silicon-based solenoid transformer;
cleaning the silicon-based solenoid transformer, and respectively thermally oxidizing the upper surface and the lower surface of the silicon-based solenoid transformer to generate oxide layers;
respectively coating glue on the upper surface and the lower surface of the oxidized silicon-based solenoid transformer and exposing the silicon-based solenoid transformer to expose the silicon-based pattern to be removed;
successively etching the upper surface and the lower surface of the exposed silicon-based solenoid transformer until the silicon substrate corresponding to the pattern is completely etched and removed, in the silicon-based solenoid transformer with part of the silicon substrate removed, the silicon substrate which is not removed around the solenoid is wrapped on the outer ring of the solenoid, the silicon substrate is connected with the vertical lead and the pin of each turn of coil, two sides and the right middle of the horizontal lead are respectively provided with a silicon column, and the silicon columns are connected with the corresponding upper horizontal lead and the lower horizontal lead;
step three: filling polyimide;
filling the whole silicon-based solenoid transformer with the removed part of the silicon substrate with polyimide in any one of gluing, soaking or spin coating, and heating to solidify the polyimide;
thinning and polishing the surface of the filled silicon-based solenoid transformer by using a mechanical chemical polishing method to expose the pins;
and cutting off the silicon substrate connected with the periphery of the polished silicon-based solenoid transformer to disconnect the silicon connecting path between the coils, and enabling a polyimide isolation layer to be arranged between the adjacent coils of the two solenoids to obtain the miniature three-dimensional solenoid transformer.
3. The miniature three-dimensional solenoid transformer of claim 2, wherein step one comprises the steps of:
exposing an upper horizontal groove and four ped on the upper surface of the silicon chip, and exposing a lower horizontal groove on the lower surface of the silicon chip;
exposing vertical through holes on the upper surface and the lower surface of the silicon chip in sequence, wherein the exposure of the upper vertical through hole and the exposure of the drooping straight through hole are required to be accurately aligned, the vertical through holes are arranged at the two ends of the horizontal groove, the diameter of each vertical through hole is slightly smaller than the width of the horizontal groove, and a certain alignment error is ensured to be completely arranged in the horizontal groove;
etching vertical through holes on the upper surface and the lower surface of the silicon chip in sequence to ensure that the vertical through holes are etched or are close to etched;
washing off the silicon dioxide layer for protecting the horizontal groove, etching the horizontal groove and the pins on the upper surface of the silicon chip, and etching the horizontal groove on the lower surface of the silicon chip;
cleaning the photoresist on the surface of the protective silicon wafer to obtain a complete spiral channel;
thermally oxidizing all surfaces of the spiral channel to generate an oxide layer;
adopting vacuum electroplating to densely fill copper in the spiral channel;
and removing redundant copper on the surface of the silicon wafer by adopting a mechanical chemical polishing method to obtain the silicon-based solenoid transformer.
4. The miniature three-dimensional solenoid transformer of claim 1 or 3,
the number of turns of each solenoid coil is 3, the distance between adjacent solenoids is 100 μm, the width of each solenoid coil is 800 μm, the width of each horizontal lead wire is 60 μm, the diameter of each vertical lead wire is 50 μm, the overall width of the miniature three-dimensional solenoid transformer is 1100 μm, the overall height is 1000 μm, and the overall length is 1150 μm.
5. A digital isolator comprising encoding circuitry, decoding circuitry and a miniature three dimensional solenoid transformer according to any of claims 1 to 4;
the encoding circuit is connected with a pair of pins of one solenoid in the miniature three-dimensional solenoid transformer, and the decoding circuit is connected with a pair of pins of the other solenoid in the miniature three-dimensional solenoid transformer.
6. A digital isolator according to claim 5, wherein said encoding circuit comprises a first delay circuit (TD1), a second delay circuit (TD2), an XOR gate, an AND gate, an OR gate and a first inverter;
input signals to be coded are respectively connected to the first delay circuit (TD1), one input end of the exclusive-OR gate and one input end of the AND gate, output signals of the first delay circuit (TD1) are respectively connected to the other input end of the exclusive-OR gate and the input end of the first inverter, output signals of the first inverter are connected to the other input end of the AND gate, output signals of the AND gate are connected to the second delay circuit (TD2), the output signals of the exclusive-OR gate and the output signals of the second delay circuit (TD2) are jointly input to the input end of the OR gate, and the output end of the OR gate outputs coding signals to the miniature three-dimensional solenoid transformer.
7. A digital isolator according to claim 6, wherein said decoding circuit comprises a first flip-flop, a second flip-flop, a third delay circuit (TD3), a fourth delay circuit (TD4) and a second inverter;
the coded signals to be decoded output by the miniature three-dimensional solenoid transformer are respectively connected to a clock end (CK1) of the first trigger and a clock end (CK2) of the second trigger, the signal output end (Q1) of the first flip-flop is respectively connected with the RESET end (RESET1) of the first flip-flop and the clock end (CK3) of the third flip-flop after passing through the third delay circuit (TD3) and the second inverter, the signal output end (Q1) of the first flip-flop is also respectively connected with the signal input end (D2) and the RESET end (RESET2) of the second flip-flop through the fourth delay circuit (TD4), the signal output (Q2) of the second flip-flop is connected to the signal input (D3) of the third flip-flop, the signal output end (Q3) of the third flip-flop outputs a decoded signal, and the signal input end (D1) of the first flip-flop and the RESET end (RESET3) of the third flip-flop are both connected with a VDD signal.
8. A digital isolator according to claim 7,
the decoding circuit further comprises a shaping circuit arranged between the miniature three-dimensional solenoid transformer and the first trigger, and the shaping circuit is a Schmidt shaping circuit or a triode shaping circuit.
9. A digital isolator according to claim 7 or 8,
the delay time Δ t1 of the first delay circuit (TD1) is 10ns, the delay time of the second delay circuit (TD2) is 20ns, and the delay times of the third delay circuit (TD3) and the fourth delay circuit (TD4) satisfy the following equation:
Δt1<Δt3<Δt4<2*Δt1
where Δ t3 is the delay time of the third delay circuit (TD3), and Δ t4 is the delay time of the fourth delay circuit (TD 4).
10. A digital isolator according to any one of claims 5 to 8,
the coding circuit and the decoding circuit are respectively connected with the pins of the miniature three-dimensional solenoid transformer through lead bonding.
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| CN113452234A (en) * | 2021-07-26 | 2021-09-28 | 北京航空航天大学 | Ultra-miniature voice coil motor based on MEMS three-dimensional coil |
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