CN112599321B - Miniature three-dimensional solenoid transformer and digital isolator - Google Patents
Miniature three-dimensional solenoid transformer and digital isolator Download PDFInfo
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- 229910052710 silicon Inorganic materials 0.000 claims abstract description 137
- 239000010703 silicon Substances 0.000 claims abstract description 137
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 136
- 238000002955 isolation Methods 0.000 claims abstract description 60
- 239000004642 Polyimide Substances 0.000 claims abstract description 37
- 229920001721 polyimide Polymers 0.000 claims abstract description 37
- 238000004519 manufacturing process Methods 0.000 claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 16
- 238000000034 method Methods 0.000 claims description 19
- 238000005530 etching Methods 0.000 claims description 15
- 238000011049 filling Methods 0.000 claims description 14
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 13
- 229910052802 copper Inorganic materials 0.000 claims description 13
- 239000010949 copper Substances 0.000 claims description 13
- 238000005498 polishing Methods 0.000 claims description 9
- 238000007493 shaping process Methods 0.000 claims description 9
- 230000003647 oxidation Effects 0.000 claims description 7
- 238000007254 oxidation reaction Methods 0.000 claims description 7
- 229920002120 photoresistant polymer Polymers 0.000 claims description 7
- 238000004026 adhesive bonding Methods 0.000 claims description 6
- 238000005520 cutting process Methods 0.000 claims description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 claims description 4
- 238000004140 cleaning Methods 0.000 claims description 3
- 238000002360 preparation method Methods 0.000 claims description 3
- 238000002791 soaking Methods 0.000 claims description 3
- 238000004528 spin coating Methods 0.000 claims description 3
- 238000007747 plating Methods 0.000 claims description 2
- 230000001681 protective effect Effects 0.000 claims description 2
- 235000012239 silicon dioxide Nutrition 0.000 claims description 2
- 239000000377 silicon dioxide Substances 0.000 claims description 2
- 238000005406 washing Methods 0.000 claims description 2
- 101001077374 Oryza sativa subsp. japonica UMP-CMP kinase 3 Proteins 0.000 claims 1
- 230000008901 benefit Effects 0.000 abstract description 8
- 235000012431 wafers Nutrition 0.000 description 22
- 230000005540 biological transmission Effects 0.000 description 15
- 239000000463 material Substances 0.000 description 14
- 230000008569 process Effects 0.000 description 11
- 230000000630 rising effect Effects 0.000 description 11
- 238000013461 design Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 7
- 238000005265 energy consumption Methods 0.000 description 5
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical group [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 238000011161 development Methods 0.000 description 3
- 238000009713 electroplating Methods 0.000 description 3
- 241000252506 Characiformes Species 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000035945 sensitivity Effects 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 238000007711 solidification Methods 0.000 description 2
- 230000008023 solidification Effects 0.000 description 2
- 102100023696 Histone-lysine N-methyltransferase SETDB1 Human genes 0.000 description 1
- 101710168120 Histone-lysine N-methyltransferase SETDB1 Proteins 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 230000005389 magnetism Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 229920000620 organic polymer Polymers 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 239000002861 polymer material Substances 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F19/00—Fixed transformers or mutual inductances of the signal type
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/28—Coils; Windings; Conductive connections
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/28—Coils; Windings; Conductive connections
- H01F27/2804—Printed windings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/28—Coils; Windings; Conductive connections
- H01F27/32—Insulating of coils, windings, or parts thereof
- H01F27/327—Encapsulating or impregnating
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Abstract
The invention relates to a miniature three-dimensional solenoid transformer and a digital isolator, wherein the miniature three-dimensional solenoid transformer comprises two solenoids which have the same structure and are mutually staggered and wound, and silicon-based and polyimide isolation layers for supporting the solenoids; each solenoid comprises a plurality of coils which are parallel to each other, the distance between the adjacent coils is consistent, each coil comprises an upper strip-shaped horizontal wire, a lower strip-shaped horizontal wire and two cylindrical vertical wires connected with the horizontal wires, the projections of the upper and lower horizontal wires on a horizontal plane are two isosceles sides of an isosceles triangle, the adjacent coils of the two solenoids are isolated by a polyimide isolation layer, and the head coil and the tail coil of each solenoid are connected with pins positioned on the upper surface of a silicon substrate. The miniature three-dimensional solenoid transformer provided by the invention allows the distance between the primary coil and the secondary coil to be larger, has stronger voltage isolation capability, and has the advantages of small size, high structural strength, excellent performance, low manufacturing cost and the like.
Description
Technical Field
The invention relates to the technical field of digital isolators, in particular to a miniature three-dimensional solenoid transformer and a digital isolator.
Background
The digital isolator can realize data transmission when the circuit is physically isolated and no current is conducted, plays roles in isolating voltages at two ends of the circuit and isolating environmental noise, protects the circuit and important components from being damaged by high voltage, and stabilizes data transmission. Digital isolators find important applications in traditional medical, aerospace, military, civil industry control systems, high voltage power transmission, power maintenance, and electronic equipment interfaces.
In the past, photovoltaic isolators have occupied the major market in the above cases. However, the photoelectric isolator has the defects of short service life, high applicable temperature requirement, high energy consumption, high delay, low transmission rate, incapability of transmitting power and the like. Electromagnetic digital isolators (hereinafter referred to as digital isolators) can perfectly solve these problems of the opto-electronic isolators.
In the current digital isolator, the on-chip spiral transformer or the on-chip laminated transformer is used for realizing circuit isolation, and the performance is improved through various circuit designs, and the miniature three-dimensional solenoid transformer is not used as a core. Since the on-chip spiral transformer or the laminated transformer has problems of small voltage gain, narrow high voltage gain (-3 dB or more) band, small inductance value and mutual inductance value, etc., when the isolation performance is increased by increasing the distance between the primary coil and the secondary coil, the performance of the transformer is drastically reduced, and at this time, it is necessary to increase the performance by increasing the number of turns of the transformer. However, the on-chip transformer and the laminated transformer are both planar coils, so that the area of the outer layer coil is larger and larger, the benefit for the overall performance of the transformer is lower and lower, the volume of the digital isolator is finally overlarge, or the designed isolation requirement cannot be met at all, the incompatibility of the transformer and the coding and decoding circuit is easily brought by an excessively narrow high-voltage gain frequency band, the polyimide isolation layer of the digital isolator taking the on-chip transformer as a core is only 20-40 mu m, and the isolation capability is limited.
For example, ADuM724X series of ANALOG DEVICES (ADI) is implemented by using an on-chip laminated transformer as a core, polyimide as an isolation material, and matching with a proper coding and decoding circuit. ADI corporation digital isolators are plentiful, but without exception, on-chip transformers are used, which, as mentioned above, have problems in terms of isolation potential, signal transmission capability, and thus it has become very difficult to develop digital isolators with greater voltage isolation capability (above 7.5KVrms or above 25KV ESD).
The differential signal amplifying circuit, the digital isolator and the digital receiver with the publication number of CN111446935A, the low-jitter digital isolator circuit with the publication number of CN111193507A, the linear isolator with the publication number of CN109831202A and the like are all coded and decoded in the OKK mode, so that the mode has higher energy consumption and is not suitable for the low energy consumption and high heat dissipation requirements of the current electronic equipment.
An anti-interference digital isolator with the publication number of CN111521855A adopts a mode of single pulse coding on rising edge and falling edge, and once signal jitter occurs in the coding mode, subsequent decoding is completely disordered.
The above patent application adopts a specific circuit, then adds some parts on the circuit, optimizes the signal stability and rich functions of the digital isolator, is not compatible with various coding circuits, and the circuits can work only by reaching GHz frequency, so that the circuit design difficulty is high, and the compatibility of the core transformer and the circuit is weak. Taking ADI company products as an example, 1ns pulse wave is adopted to realize the transmission of signals in a transformer at present, which brings little trouble to circuit design. At present, no one has an innovative scheme on a core isolation area.
Disclosure of Invention
The invention provides a miniature three-dimensional solenoid transformer and a digital isolator, which are used for solving the problems that a core isolation transformer of the existing digital isolator is not easy to be compatible with a low-frequency external circuit, and is difficult to be matched with various encoding and decoding circuits, so that the voltage isolation and the noise isolation capability development of the digital isolator taking an on-chip transformer as a core are limited.
A miniature three-dimensional solenoid transformer comprises two solenoids which have the same structure and are mutually staggered and wound, and silicon-based and polyimide isolation layers for supporting the solenoids;
Each solenoid comprises a plurality of coils parallel to each other, the distance between the adjacent coils is consistent, each coil comprises an upper strip-shaped horizontal wire, a lower strip-shaped horizontal wire and two cylindrical vertical wires connected with the horizontal wires, the projections of the upper strip-shaped horizontal wires and the lower strip-shaped horizontal wires on a horizontal plane are two isosceles sides of an isosceles triangle, the adjacent coils of the two solenoids are isolated by the polyimide isolation layer, and the head coil and the tail coil of each solenoid are connected with pins positioned on the upper surface of the silicon substrate.
Correspondingly, the invention also provides a digital isolator which comprises an encoding circuit, a decoding circuit and the miniature three-dimensional solenoid transformer;
the encoding circuit is connected with a pair of pins of one solenoid of the miniature three-dimensional solenoid transformer, and the decoding circuit is connected with a pair of pins of the other solenoid of the miniature three-dimensional solenoid transformer.
Compared with the prior art, the invention has the following beneficial effects:
The miniature three-dimensional solenoid transformer and the digital isolator provided by the invention solve the problems that a core isolation transformer of the existing digital isolator is not easy to be compatible with a low-frequency external circuit and is difficult to be matched with various encoding and decoding circuits, and the defects that the existing photoelectric isolator is low in service life, high in temperature sensitivity, high in energy consumption and incapable of transmitting energy, and the existing digital isolator taking an on-chip transformer as a core is limited in voltage isolation and noise isolation capability development. The invention has the following beneficial effects:
(1) The miniature three-dimensional solenoid transformer fully utilizes the upper vertical space, the single inductance and the quality factor of the transformer are far higher than those of a planar coil, and the inductance of a three-turn coil can reach 50-100nH;
(2) Because solenoids in the miniature three-dimensional solenoid transformer are mutually staggered and wound, the coupling coefficient is higher than that of a planar coil and can reach more than 0.8; the high-voltage gain frequency band can reach 50MHz-2GHz, so that a lower-frequency encoding and decoding circuit can be adopted when the working environment of the digital isolator does not need high-speed data transmission, thereby reducing the circuit design and manufacturing cost; when the working environment of the digital isolator needs high-speed data transmission, an encoding circuit and a decoding circuit which generate high-frequency pulses can be adopted, namely, the transformer can be compatible with the requirements of the working environment of low frequency and high frequency and can be compatible with various encoding and decoding modes;
(3) Because of the advantage of transmission performance of the miniature three-dimensional solenoid transformer, the distance between the primary coil and the secondary coil is allowed to be larger, the main stream of the digital isolator taking the on-chip transformer as a core is that the polyimide isolation layer is only 20-40 mu m, the isolation capability is limited, the isolation voltage of the digital isolator manufactured by taking the miniature three-dimensional solenoid transformer as the core can reach 20KVRms, and the potential of the isolation voltage is larger;
(4) In order to increase the voltage isolation capability by increasing the primary and secondary coil spacing, the number of coil turns needs to be increased to meet good transmission performance. However, the on-chip transformer has a smaller and smaller effect of increasing the number of turns of the coil due to a larger and larger outer ring area, but the three-dimensional solenoid transformer does not have the problem. This is also one reason for the greater voltage isolation potential of the present invention. Meanwhile, in the digital isolator with the same isolation capability, the area of the invention is smaller than that of the existing digital isolator. The current digital isolator of model LTM2810 of ADI company can realize voltage isolation of 7.5KVRms, the area of the digital isolator is 22mm, 6.25mm and 2.06mm, the miniature three-dimensional solenoid transformer with 20KVRms isolation capability can be realized, the area of the miniature three-dimensional solenoid transformer is only 1.5mm, 1mm and 1mm, and the packaging of the whole digital isolator is expected to be realized within the size of 10mm or even 5mm in length;
(5) The miniature three-dimensional solenoid transformer has the advantages of small size, high structural strength, excellent performance and low manufacturing cost;
(6) The method has the advantages that through a specific exposure pattern, most of silicon substrates in the three-dimensional solenoid transformer can be removed, and under the condition that the performance is not affected, part of silicon columns in the three-dimensional solenoid transformer and the silicon substrates connected with vertical wires are left, a large number of silicon-based solenoid coils are supported and removed, the relative positions of primary and secondary coils are ensured, and the filling thickness of polyimide isolation materials is ensured; and the primary coil and the secondary coil are prevented from being connected by a polyimide filling material only through a silicon connecting way by cutting at the edge, so that the manufacturing of the miniature three-dimensional solenoid transformer filled with the polyimide isolation material is realized.
Drawings
FIG. 1 is a perspective view of a miniature three-dimensional solenoid transformer;
FIG. 2 is a top view of a miniature three-dimensional solenoid transformer;
FIG. 3 is a side view of a miniature three-dimensional solenoid transformer;
FIG. 4 is a process flow diagram for manufacturing a silicon-based solenoidal transformer;
FIG. 5 is an exposure view of the upper surface of a silicon-based solenoidal transformer with a portion of the silicon-based removed;
FIG. 6 is an overall perspective view of a silicon-based solenoidal transformer with a portion of the silicon-based removed;
FIG. 7 is a perspective view of the coil and support silicon post in a silicon-based solenoidal transformer with a portion of the silicon base removed;
FIG. 8 is a schematic diagram of the structure of the encoding circuit;
FIG. 9 is a coding timing diagram of the coding circuit;
FIG. 10 is a schematic diagram of a decoding circuit;
fig. 11 is a decoding timing diagram of the decoding circuit.
Detailed Description
The technical scheme of the present invention will be described in detail with reference to the accompanying drawings and preferred embodiments.
In one embodiment, the present invention provides a miniature three-dimensional solenoid transformer comprising: 1. a solenoid; 2. silicon-based; 3. polyimide isolation layer.
As shown in fig. 1, the miniature three-dimensional solenoid transformer comprises two solenoids (solenoid 1 and solenoid 2 respectively) which are identical in structure and are wound in a staggered manner, a silicon base (not shown in fig. 1) is used for supporting the solenoids, each solenoid comprises a plurality of coils which are parallel to each other, the adjacent coils are consistent in distance, each coil comprises an upper strip-shaped horizontal wire, a lower strip-shaped horizontal wire and two cylindrical vertical wires connected with the horizontal wires, the projection of the upper strip-shaped horizontal wire and the lower strip-shaped horizontal wire on a horizontal plane is two isosceles sides of an isosceles triangle, adjacent coils of the two solenoids are separated by a polyimide isolation layer, and the head coil and the tail coil of each solenoid are connected with pins (ped) positioned on the upper surface of the silicon base.
Miniature three-dimensional solenoidal transformers are three-dimensional coils, just like coils formed around magnetism in large sizes. Each solenoid comprises a plurality of coils which are parallel to each other, each coil comprises an upper strip-shaped horizontal wire, a lower strip-shaped horizontal wire and two cylindrical vertical wires connected with the horizontal wires, and the two horizontal wires and the two vertical wires form a coil. Each turn of coil is connected with the front and back turns of coils through horizontal wires and vertical wires.
Wherein the projection of two horizontal wires on the upper and lower surfaces of each turn of coil on the horizontal plane can be regarded as two isosceles sides of an isosceles triangle. The configuration ensures that the spacing between adjacent sides of all horizontal wires of the designed three-dimensional solenoid transformer is the same, and the size design of the structure is optimized.
The miniature three-dimensional solenoid transformer comprises a solenoid 1 and a solenoid 2, wherein the solenoid 1 and the solenoid 2 are mutually staggered and wound, namely, a coil of the solenoid 2 is arranged between adjacent coils of the solenoid 1, a coil of the solenoid 1 is arranged between adjacent coils of the solenoid 2, all coils of the solenoid 1 and the solenoid 2 are parallel, and the adjacent coil intervals are consistent.
Both the end-to-end coils of solenoid 1 and solenoid 2 are connected ped, ped on a silicon-based upper surface for direct connection to an electrical circuit, including but not limited to wire bonding, to ped.
The miniature three-dimensional solenoid transformer does not contain an iron core structure, ped on the first and second coils on the upper surface of the silicon substrate jointly form a primary coil of the miniature three-dimensional solenoid transformer, and ped on the first and second coils on the upper surface of the silicon substrate jointly form a secondary coil of the miniature three-dimensional solenoid transformer. The primary coil and the secondary coil are isolated by the isolation material polyimide, the thickness of the polyimide isolation layer directly determines the performances of the miniature three-dimensional solenoid transformer and the digital isolator taking the miniature three-dimensional solenoid transformer as a core, and the miniature three-dimensional solenoid transformer provided by the invention allows a larger distance between the primary coil and the secondary coil, so that the isolation voltage of the digital isolator can be improved.
In this embodiment, the manufacturing method of the micro three-dimensional solenoid transformer is various, for example, manufacturing on a single silicon wafer and manufacturing by dividing the single silicon wafer into two silicon wafers, and the process of manufacturing the micro three-dimensional solenoid transformer on the single silicon wafer and the two silicon wafers includes the steps of: preparing a solenoid and a pin on silicon base to obtain a silicon base solenoid transformer; removing part of silicon base in the silicon base solenoid transformer; filling polyimide. The respective steps are described in detail below. The following processing method can obtain the miniature three-dimensional solenoid transformer with small size, high structural strength, excellent performance and low manufacturing cost.
Step one: and preparing a solenoid and pins on the silicon substrate to obtain the silicon-based solenoid transformer.
1. Fabrication on a single silicon wafer
(1) Exposing an upper horizontal groove and four ped on the upper surface of the silicon wafer, and exposing a lower horizontal groove on the lower surface of the silicon wafer;
(2) Exposing vertical through holes on the upper surface and the lower surface of the silicon wafer in sequence, wherein the exposure of the upper vertical through hole and the lower vertical through hole are accurately aligned, the vertical through holes are arranged at two ends of the horizontal groove, the diameter of the vertical through holes is slightly smaller than the width of the horizontal groove, and certain alignment error is ensured to ensure that the vertical through holes are all arranged in the horizontal groove;
(3) Etching vertical through holes on the upper surface and the lower surface of the silicon wafer in sequence, so that the vertical through holes are etched or nearly etched;
(4) Washing off SiO 2 for protecting the horizontal groove, etching the horizontal groove and ped on the upper surface of the silicon wafer, and etching the horizontal groove on the lower surface;
(5) The photoresist on the surface of the protective silicon wafer is cleaned to obtain a complete spiral channel;
(6) Thermal oxidation, forming an oxide layer on all surfaces of the spiral channel;
(7) Vacuum plating is adopted to densely fill copper in the spiral channel;
(8) Removing excessive copper on the surface of the silicon wafer by adopting a mechanochemical polishing (Chemical-MECHANICAL POLISHING, CMP) method, and preparing the solenoid and the pin on the silicon substrate to obtain the silicon-based solenoid transformer.
2. Divided into two silicon wafers
The process of preparing solenoid and pins on silicon base by adopting two-layer silicon bonding mode can refer to a MEMS square solenoid transformer with the publication number of CN109599249A and a manufacturing method thereof in the process of obtaining the silicon base solenoid transformer, and the difference is that the process of electroplating iron core in the iron core groove is omitted in the manufacturing process of the invention.
Step two: and removing part of silicon base in the silicon base solenoid transformer. The method comprises the following steps:
(1) Cleaning the silicon-based solenoid transformer obtained in the first step, and respectively performing thermal oxidation on the upper surface and the lower surface of the silicon-based solenoid transformer to generate oxide layers;
(2) Respectively gluing and exposing the upper surface and the lower surface of the oxidized silicon-based solenoid transformer to expose the silicon-based pattern to be removed; the exposed silicon-based surface is represented by the blank portion in fig. 5;
(3) And etching the upper and lower surfaces of the exposed silicon-based solenoid transformer successively until the silicon corresponding to the pattern is completely etched and removed, wherein in the silicon-based solenoid transformer with part of the silicon removed, the silicon not removed around the solenoid is wrapped on the outer ring of the solenoid, the silicon is connected with the vertical wire and the pin of each turn of coil, and a silicon column (shown in figure 7) is arranged on both sides and the middle of the horizontal wire and connected with the corresponding upper and lower horizontal wires. Because the thickness of the isolation material has great influence on the performance of the digital isolator, the process and the structure can ensure that the distance between the primary coil and the secondary coil is consistent with the design time after most silicon base is removed, and the coil structure still has enough strength to ensure the normal operation of the subsequent process.
Step three: filling polyimide. Polyimide (abbreviated as PI) is one of organic polymer materials with optimal comprehensive performance, has high temperature resistance of more than 400 ℃, long-term use temperature range of-200-300 ℃, no obvious melting point, high insulating performance, dielectric constant of 4.0, dielectric strength of 300KV/mm and excellent mechanical performance, and is very suitable for being used as an isolation material of a digital isolator. After removing part of silicon base in the silicon base solenoid transformer, filling polyimide isolation material into the silicon base solenoid transformer after removing part of silicon base, wherein the process of filling polyimide isolation material specifically comprises the following steps:
filling the whole silicon-based solenoid transformer with polyimide by any one of gluing, soaking or spin coating, and heating to solidify the polyimide;
Carrying out surface thinning and polishing on the filled silicon-based solenoid transformer by using a mechanochemical polishing method to expose pins;
Silicon base connected with the periphery of the polished silicon-based solenoid transformer is cut off, so that a silicon connecting passage between coils is disconnected, polyimide isolation layers are arranged between adjacent coils of two solenoids, and finally the miniature three-dimensional solenoid transformer is obtained.
The following example provides a miniature three-dimensional solenoid transformer of specific dimensions and a manufacturing process thereof, in the present example, the number of turns of the coil of each solenoid is 3, the pitch of the adjacent coils (i.e., the pitch of the adjacent horizontal wires) is 100 μm, the width of the horizontal wires is 60 μm, the diameter of the vertical wires is 50 μm, the width of the spiral coil of the transformer is 800 μm, the overall width of the miniature three-dimensional solenoid transformer after adding ped widths is 1100 μm, the overall height is 1000 μm, and the overall length of the miniature three-dimensional solenoid transformer is 1150 μm by the above parameters. A top view and a side view of the miniature three-dimensional solenoid transformer in this embodiment are shown in fig. 2 and 3, respectively.
The manufacturing process comprises the following steps:
firstly, preparing a solenoid and pins on silicon base to obtain a silicon base solenoid transformer, wherein the processing technology is as follows, and the process flow chart is shown in fig. 4:
(1) Firstly, a double polished silicon wafer with the thickness of 1000 mu m is adopted. And a high-resistivity silicon wafer is adopted to improve the insulativity of the whole structure and reduce the eddy current loss under high frequency. And thermally oxidizing the silicon wafer to generate a thermal oxidation layer with the thickness of 2 mu m on the two sides.
(2) Coating photoresist, exposing the horizontal groove on the upper surface of the silicon substrate and ped structures, exposing the horizontal groove on the lower surface, and developing to remove the photoresist of the exposed part.
(3) The silicon dioxide at the exposed locations was removed using a BOE solution and the photoresist was removed using a piranha solution.
(4) And (3) gluing for the second time, exposing the vertical through hole patterns on the upper surface and the lower surface of the silicon substrate, and developing. The through hole patterns are completely inside the horizontal groove and are positioned at the two ends of the horizontal groove, and the positions of the upper through hole and the lower through hole are accurately aligned.
(5) Etching the silicon through hole on the upper surface by deep etching, and stopping etching the upper surface when the depth is 480-500 mu m; the lower surface through silicon vias are etched, again stopping the etching at 480 μm-500 μm. The photoresist is now used as a mask.
(6) All photoresist was removed using piranha solution.
(7) And (3) respectively deeply etching the horizontal grooves and ped structures on the upper surface and the lower surface of the silicon to a depth of 60 mu m, and ensuring complete conduction of the vertical through holes at the moment, so as to finish the removal of the silicon substrate. At this point SiO 2 was used as a mask.
(8) And (5) performing thermal oxidation to form a2 mu m thick oxide layer.
(9) The lower surface of the silicon wafer was magnetron sputtered with 100nm metallic titanium as an intermediate layer (this thickness is not shown in fig. 4), followed by 500nm metallic copper as a seed layer.
(10) And electroplating metallic copper, filling the electroplated copper into the position of the lower plane of the top horizontal groove from the bottom, and ending the lower surface.
(11) The upper surface is magnetically sputtered with 500nm metallic copper.
(12) And electroplating metallic copper, so that the whole structure of the upper surface is completely covered by the electroplated copper, and completing copper filling of the spiral coil.
(13) And (3) carrying out metal copper thinning on the upper surface and the lower surface by using CMP until the metal copper is thinned to the same height as the surface of the thermal oxide layer of the silicon wafer, and then polishing the surface by CMP to finish the manufacture of the miniature three-dimensional solenoid transformer on the silicon substrate.
Next, the silicon base is removed and polyimide is filled, and fig. 5 to 7 are an upper surface exposure view, an overall perspective view and a partial perspective view of the silicon base solenoid transformer after removing part of the silicon base, respectively:
(1) Cleaning the silicon wafer, and generating 2 mu m oxide layers on the upper and lower surfaces of the silicon wafer by thermal oxidation.
(2) The upper surface and the lower surface are respectively coated with glue and exposed to expose the surface of the silicon substrate to be removed. The exposed silicon-based surface is represented by the blank in fig. 5, developed. The distance of Ped from the cutting line is 75 μm, and the length of the connection portion of the vertical wire and the silicon base is 350 μm, as shown in fig. 5.
(3) And etching deeply from the upper surface of the silicon wafer until reaching the bottom of the lower horizontal wire.
(4) And etching back from the lower surface until reaching the bottom of the upper horizontal wire. And (5) removing the silicon base of the three-dimensional solenoid transformer.
(5) Filling polyimide into the spare part of the silicon-based solenoid transformer after removing part of silicon-based by adopting the modes of gluing, soaking or spin coating and the like, and heating for solidification, wherein the concrete process of heating and solidification is based on the thermosetting process of the polyimide material actually adopted.
(6) The upper surface is thinned using CMP, followed by CMP polishing of the surface, exposing ped of the wiring.
(7) The polished silicon-based solenoidal transformer is cut according to the cutting line shown in fig. 5, and the silicon connecting passage between the primary coil and the secondary coil of the transformer is cut off, at this time, only the polyimide isolation layer between the primary coil and the secondary coil is connected, and the processing of the miniature three-dimensional solenoidal transformer filled with the polyimide isolation material is completed.
The miniature three-dimensional solenoid transformer provided by the embodiment can be compatible with various encoding and decoding circuits, and can be compatible with circuits of high frequency (more than GHz) and low frequency (less than 100 MHz), namely, the miniature three-dimensional solenoid transformer has a very wide high-voltage gain band.
In another embodiment, the present invention provides a digital isolator with a miniature three-dimensional solenoid transformer as a core, the digital isolator comprising: 1. an encoding circuit; 2. a miniature three-dimensional solenoid transformer; 3. a decoding circuit. The structure of the miniature three-dimensional solenoid transformer and the preparation method thereof can be described in the previous embodiments, and are not repeated here.
The encoding circuit may employ, but is not limited to, the following encoding scheme of the digital isolator: 1. an On-off encoding circuit using an oscillating circuit; 2. the rising edge and the falling edge of the control signal are respectively encoded into a double-pulse encoding mode and a single-pulse encoding mode; 3. the rising edge and the falling edge of the control signal are respectively encoded into positive pulse wave and negative pulse wave.
The decoding circuit corresponds to the encoding circuit, for example, the encoding circuit adopts an On-off mode of the oscillating circuit, and the decoding circuit can adopt a full-bridge rectifying circuit for decoding; the coding circuit adopts a coding mode of rising edge double pulses and falling edge single pulses, and the decoding circuit can adopt a pulse counter to decode.
The encoding circuit and the decoding circuit are respectively connected with ped of the miniature three-dimensional solenoid transformer, and optionally, the encoding circuit and the decoding circuit are respectively connected with ped of the miniature three-dimensional solenoid transformer through wire bonding.
The miniature three-dimensional solenoid transformer is adopted as the core of the digital isolator, and the high-voltage gain range of the miniature three-dimensional solenoid transformer is large, so that the miniature three-dimensional solenoid transformer can be adapted to various coding and decoding circuits, and various and multi-frequency bands of the coding circuits and the decoding circuits are allowed.
As a specific embodiment, as shown in fig. 8, the encoding circuit includes a first delay circuit TD1, a second delay circuit TD2, an exclusive or gate, an and gate, an or gate, and a first inverter. The input signal in to be coded is respectively connected to one input end of the first delay circuit TD1, the exclusive-OR gate and the AND gate, the output signal S1 of the first delay circuit TD1 is respectively connected to the other input end of the exclusive-OR gate and the input end of the first inverter, the output signal S1 of the first inverter is connected to the other input end of the AND gate, the output signal S3 of the AND gate is connected to the second delay circuit TD2, the output signal S2 of the exclusive-OR gate and the output signal S4 of the second delay circuit TD2 are jointly input to the input end of the OR gate, and the output end of the OR gate outputs the coding signal F to the miniature three-dimensional solenoid transformer. The encoding circuit of the present embodiment can realize an encoding scheme in which a rising edge of an input signal is encoded into a double pulse and a falling edge is encoded into a single pulse, thereby realizing transmission of the signal in a transformer.
Fig. 9 is a coding timing diagram of the coding circuit, and it can be seen that the delay time Δt2 of the second delay circuit TD2 should be the delay time Δt1 of the first delay circuit TD1 plus the interval between two pulses. When Δt1=10ns and Δt2=20ns, the encoding circuit encodes the input signal in into a rising edge double pulse and a falling edge single pulse, the pulse width is 10ns, and the double pulse interval is 10ns of the signal F which can be transmitted in the transformer.
Further, as shown in fig. 10, the decoding circuit includes a first flip-flop, a second flip-flop, a third delay circuit TD3, a fourth delay circuit TD4, and a second inverter. The to-be-decoded coding signal F output by the miniature three-dimensional solenoid transformer is respectively connected into a clock end CK1 of the first trigger and a clock end CK2 of the second trigger, a signal output end Q1 of the first trigger is respectively connected into a RESET end RESET1 of the first trigger and a clock end CK3 of the third trigger after passing through a third delay circuit TD3 and a second inverter, an output signal S5 of the signal output end Q1 of the first trigger is also respectively connected into a signal input end D2 and a RESET end RESET2 of the second trigger after passing through a fourth delay circuit TD4, a signal output end Q2 of the second trigger is connected into a signal input end D3 of the third trigger, a signal output end Q3 of the third trigger is used as an output end to output a decoded signal out, and namely the signal input end D1 of the first trigger and the RESET end RESET3 of the third trigger are both connected into VDD signals. The above triggers are all normally operated when the RESET signal of the RESET terminal is 1, and the output terminal Q is 0 when the RESET signal of the RESET terminal is 0.
Fig. 11 is a decoding timing diagram of the decoding circuit, and it can be seen that the delay time Δt3 formed by the third delay circuit TD3 is the pulse width of the RESET1 and Q1 signals, and the signal formed by Q1 passing through the fourth delay circuit TD4 is to wrap the first rising edge of the signal of the second rising edge ESET of the double pulse of the F signal, namely, to satisfy: Δt1< Δt3< Δt4<2×Δt1, Δt2=2×Δt1, where Δt3 is the delay time of the third delay circuit TD3 and Δt4 is the delay time of the fourth delay circuit TD 4. Thus, after passing through the first trigger, a detection signal Q1 with only the first pulse being valid can be formed; q1 passes through the fourth delay circuit TD4 to form a detection signal Q2 which is valid only for the second pulse, and corresponds to double pulses formed by encoding only the rising edge of the input signal in, so that the Q2 can generate pulses; q2 is output to D3, D3 is high at the first pulse rising edge of the CK3 signal, and D3 is low at the second pulse rising edge. Thus, the decoding work is completed.
The delay time of the decoding circuit is determined by deltat 1, and the delay time is twice deltat 1. And adjusting delta t1, and meeting the delay time requirement formula, so that the encoding results with different pulse widths can be obtained. As the pulse width becomes smaller, more precise control is also required for the delay time of each delay circuit.
Further, the decoding circuit further comprises a shaping circuit arranged between the miniature three-dimensional solenoid transformer and the first trigger, the shaping circuit is positioned at the starting side of the decoding circuit and is used for removing signal fluctuation and burrs caused by transmission in the transformer isolation area, and the shaping circuit can be realized by a Schmidt shaping circuit or a triode shaping circuit.
The digital isolator provided by the invention solves the defects of low service life, high temperature sensitivity, high energy consumption and energy transmission incapability of the existing photoelectric isolator, solves the problems of limited voltage isolation and noise isolation capability development of the existing digital isolator taking an on-chip transformer as a core, and solves the problems that the core isolation transformer of the existing digital isolator is not easy to be compatible with a low-frequency external circuit and is difficult to be adapted to various encoding and decoding circuits. The invention has the following beneficial effects:
(1) The miniature three-dimensional solenoid transformer fully utilizes the upper vertical space, the single inductance and the quality factor of the transformer are far higher than those of a planar coil, and the inductance of a three-turn coil can reach 50-100nH;
(2) Because solenoids in the miniature three-dimensional solenoid transformer are mutually staggered and wound, the coupling coefficient is higher than that of a planar coil and can reach more than 0.8; the high-voltage gain frequency band can reach 50MHz-2GHz, so that a lower-frequency encoding and decoding circuit can be adopted when the working environment of the digital isolator does not need high-speed data transmission, thereby reducing the circuit design and manufacturing cost; when the working environment of the digital isolator needs high-speed data transmission, an encoding circuit and a decoding circuit which generate high-frequency pulses can be adopted, namely, the transformer can be compatible with the requirements of the working environment of low frequency and high frequency and can be compatible with various encoding and decoding modes;
(3) Because of the advantage of transmission performance of the miniature three-dimensional solenoid transformer, the distance between the primary coil and the secondary coil is allowed to be larger, the main stream of the digital isolator taking the on-chip transformer as a core is that the polyimide isolation layer is only 20-40 mu m, the isolation capability is limited, the isolation voltage of the digital isolator manufactured by taking the miniature three-dimensional solenoid transformer as the core can reach 20KVRms, and the potential of the isolation voltage is larger;
(4) In order to increase the voltage isolation capability by increasing the primary and secondary coil spacing, the number of coil turns needs to be increased to meet good transmission performance. However, the on-chip transformer has a smaller and smaller effect of increasing the number of turns of the coil due to a larger and larger outer ring area, but the three-dimensional solenoid transformer does not have the problem. This is also one reason for the greater voltage isolation potential of the present invention. Meanwhile, in the digital isolator with the same isolation capability, the area of the invention is smaller than that of the existing digital isolator. The current digital isolator of model LTM2810 of ADI company can realize voltage isolation of 7.5KVRms, the area of the digital isolator is 22mm, 6.25mm and 2.06mm, the miniature three-dimensional solenoid transformer with 20KVRms isolation capability can be realized, the area of the miniature three-dimensional solenoid transformer is only 1.5mm, 1mm and 1mm, and the packaging of the whole digital isolator is expected to be realized within the size of 10mm or even 5mm in length;
(5) The miniature three-dimensional solenoid transformer has the advantages of small size, high structural strength, excellent performance and low manufacturing cost;
(6) The method has the advantages that through a specific exposure pattern, most of silicon substrates in the three-dimensional solenoid transformer can be removed, and under the condition that the performance is not affected, part of silicon columns in the three-dimensional solenoid transformer and the silicon substrates connected with vertical wires are left, a large number of silicon-based solenoid coils are supported and removed, the relative positions of primary and secondary coils are ensured, and the filling thickness of polyimide isolation materials is ensured; and the primary coil and the secondary coil are prevented from being connected by a polyimide filling material only through a silicon connecting way by cutting at the edge, so that the manufacturing of the miniature three-dimensional solenoid transformer filled with the polyimide isolation material is realized.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the invention, which are described in detail and are not to be construed as limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (4)
1. The preparation method of the miniature three-dimensional solenoid transformer is characterized by comprising two solenoids which have the same structure and are mutually staggered and wound, and a silicon-based and polyimide isolation layer for supporting the solenoids;
Each solenoid comprises a plurality of coils which are parallel to each other, the distance between the adjacent coils is consistent, each coil comprises an upper strip-shaped horizontal wire, a lower strip-shaped horizontal wire and two cylindrical vertical wires connected with the horizontal wires, the projections of the upper and lower horizontal wires on a horizontal plane are two isosceles sides of an isosceles triangle, the adjacent coils of the two solenoids are isolated by the polyimide isolation layer, and the head coil and the tail coil of each solenoid are connected with pins positioned on the upper surface of the silicon substrate;
The miniature three-dimensional solenoid transformer is prepared by the following steps:
Step one: preparing the solenoid and the pins on silicon base to obtain a silicon base solenoid transformer; step one comprises the following steps:
Exposing an upper horizontal groove and four ped on the upper surface of the silicon wafer, and exposing a lower horizontal groove on the lower surface of the silicon wafer;
Exposing vertical through holes on the upper surface and the lower surface of the silicon wafer in sequence, wherein the exposure of the upper vertical through hole and the lower vertical through hole are accurately aligned, the vertical through holes are arranged at two ends of the horizontal groove, the diameter of the vertical through holes is slightly smaller than the width of the horizontal groove, and certain alignment error is ensured to ensure that the vertical through holes are all arranged in the horizontal groove;
etching vertical through holes on the upper surface and the lower surface of the silicon wafer in sequence, so that the vertical through holes are etched or nearly etched;
washing off a silicon dioxide layer for protecting the horizontal groove, etching the horizontal groove and the pins on the upper surface of the silicon wafer, and etching the horizontal groove on the lower surface of the silicon wafer;
the photoresist on the surface of the protective silicon wafer is cleaned to obtain a complete spiral channel;
thermal oxidation is carried out on all surfaces of the spiral channel to generate an oxide layer;
vacuum plating is adopted to densely fill copper in the spiral channel;
removing redundant copper on the surface of the silicon wafer by adopting a mechanochemical polishing method to obtain the silicon-based solenoid transformer;
Step two: removing part of silicon base in the silicon base solenoid transformer;
cleaning the silicon-based solenoid transformer, and respectively performing thermal oxidation on the upper surface and the lower surface of the silicon-based solenoid transformer to generate oxide layers;
respectively gluing and exposing the upper surface and the lower surface of the oxidized silicon-based solenoid transformer to expose the silicon-based pattern to be removed;
Etching the upper and lower surfaces of the exposed silicon-based solenoid transformer successively until the silicon-based corresponding to the pattern is completely etched and removed, wherein in the silicon-based solenoid transformer with part of the silicon-based removed, the silicon-based which is not removed around the solenoid is wrapped on the outer ring of the solenoid, the silicon-based is connected with the vertical wire and the pin of each turn of coil, two sides and the middle of the horizontal wire are respectively provided with a silicon column, and the silicon columns are connected with the corresponding upper and lower horizontal wires;
step three: filling polyimide;
filling the whole silicon-based solenoid transformer with polyimide in any one mode of gluing, soaking or spin coating, and heating to solidify the polyimide;
carrying out surface thinning and polishing on the filled silicon-based solenoid transformer by using a mechanochemical polishing method to expose the pins;
cutting off silicon base connected with the periphery of the polished silicon base solenoid transformer, disconnecting the silicon connecting passage between the coils, and enabling polyimide isolating layers to be arranged between the adjacent coils of the two solenoids to obtain the miniature three-dimensional solenoid transformer.
2. The method for manufacturing a miniature three-dimensional solenoid transformer according to claim 1, wherein,
The number of turns of the coil of each solenoid is 3, the distance between adjacent coils is 100 mu m, the width of the coils is 800 mu m, the width of the horizontal wire is 60 mu m, the diameter of the vertical wire is 50 mu m, the whole width of the miniature three-dimensional solenoid transformer is 1100 mu m, the whole height is 1000 mu m, and the whole length is 1150 mu m.
3. A digital isolator, comprising an encoding circuit, a decoding circuit and a miniature three-dimensional solenoid transformer prepared by the preparation method as claimed in claim 1 or 2;
The encoding circuit is connected with a pair of pins of one solenoid in the miniature three-dimensional solenoid transformer, the decoding circuit is connected with a pair of pins of the other solenoid in the miniature three-dimensional solenoid transformer, and the encoding circuit and the decoding circuit are respectively connected with the pins of the miniature three-dimensional solenoid transformer through wire bonding;
The coding circuit comprises a first delay circuit (TD 1), a second delay circuit (TD 2), an exclusive OR gate, an AND gate, an OR gate and a first inverter; the input signals to be encoded are respectively connected to the first delay circuit (TD 1), the exclusive-OR gate and one input end of the AND gate, the output signals of the first delay circuit (TD 1) are respectively connected to the other input end of the exclusive-OR gate and the input end of the first inverter, the output signals of the first inverter are connected to the other input end of the AND gate, the output signals of the AND gate are connected to the second delay circuit (TD 2), the output signals of the exclusive-OR gate and the output signals of the second delay circuit (TD 2) are jointly input to the input end of the OR gate, and the output end of the OR gate outputs the encoded signals to the miniature three-dimensional solenoid transformer;
The decoding circuit comprises a first trigger, a second trigger, a third delay circuit (TD 3), a fourth delay circuit (TD 4) and a second inverter; the to-be-decoded coding signals output by the miniature three-dimensional solenoid transformer are respectively connected into a clock end (CK 1) of the first trigger and a clock end (CK 2) of the second trigger, a signal output end (Q1) of the first trigger is connected into a RESET end (RESET 1) of the first trigger and a clock end (CK 3) of the third trigger after passing through the third delay circuit (TD 3) and the second inverter, a signal output end (Q1) of the first trigger is also connected into a signal input end (D2) and a RESET end (RESET 2) of the second trigger after passing through the fourth delay circuit (TD 4), a signal output end (Q2) of the second trigger is connected into a signal input end (D3) of the third trigger, and the signal output end (Q3) of the third trigger outputs decoded signals, and the signal input end (D1) of the first trigger and the RESET end (VDD 3) of the third trigger are connected into RESET signals;
The delay time deltat 1 of the first delay circuit (TD 1) is 10ns, the delay time of the second delay circuit (TD 2) is 20ns, and the delay times of the third delay circuit (TD 3) and the fourth delay circuit (TD 4) satisfy the following equation:
Δt1<Δt3<Δt4<2*Δt1
wherein Δt3 is the delay time of the third delay circuit (TD 3), and Δt4 is the delay time of the fourth delay circuit (TD 4).
4. A digital isolator as claimed in claim 3, wherein,
The decoding circuit further comprises a shaping circuit arranged between the miniature three-dimensional solenoid transformer and the first trigger, and the shaping circuit is a Schmidt shaping circuit or a triode shaping circuit.
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