CN112579540A - Component mounting position identification method, mounting control method, device and medium - Google Patents
Component mounting position identification method, mounting control method, device and medium Download PDFInfo
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- CN112579540A CN112579540A CN202011209418.5A CN202011209418A CN112579540A CN 112579540 A CN112579540 A CN 112579540A CN 202011209418 A CN202011209418 A CN 202011209418A CN 112579540 A CN112579540 A CN 112579540A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
- G06F16/10—File systems; File servers
- G06F16/16—File or folder operations, e.g. details of user interfaces specifically adapted to file systems
- G06F16/164—File meta data generation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
- G06F16/10—File systems; File servers
- G06F16/11—File system administration, e.g. details of archiving or snapshots
- G06F16/116—Details of conversion of file system types or formats
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
- H05K13/0015—Orientation; Alignment; Positioning
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
- H05K13/04—Mounting of components, e.g. of leadless components
- H05K13/046—Surface mounting
- H05K13/0469—Surface mounting by applying a glue or viscous material
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Abstract
The invention discloses a component mounting position identification method, a mounting control method, equipment and a medium, wherein the mounting control method comprises the following steps: the method comprises the steps of file import, wherein after a substrate is detected by AOI equipment, a mapping file which is output by the AOI equipment and corresponds to the substrate is imported; format conversion, converting the mapping file into a file format recognizable by a chip mounter; data processing, namely performing binarization processing on the line defect detection result of each unit in the mapping file; and performing surface mounting control, namely selectively mounting the substrate according to the mapping file after binarization processing. Compared with the traditional manual identification, the invention carries out binarization processing in the mapping file, can quickly and accurately mark the position of a unit with a line defect, is beneficial to avoiding the marked unit when mounting components, thereby avoiding the ineffective loss of the mounted components and greatly utilizing a substrate with relatively low yield to carry out effective mounting.
Description
Technical Field
The invention relates to the technical field of circuit boards, in particular to a component mounting position identification method, a mounting control method, equipment and a medium.
Background
With the development of electronic technologies, electronic products are developed endlessly, and both the traditional surface mount technology and the novel package embedding technology use a large number of electronic devices on a circuit board, wherein the price of passive components (such as resistors and capacitors) is relatively low, so that certain loss in the production process of the circuit board has little influence on the cost, but the price of active components (such as chips) is high, and the loss in the production process of the circuit board has direct influence on the cost.
The traditional PCB substrate is simple in structure and large in line width and line distance, the yield of the PCB substrate is generally 85% -98% according to different production difficulties of products, defective products are scrapped, if multiple jointed boards are adopted for production, the jointed boards with the defective products are scrapped, and defective identification processing is performed, such as sticking of defective labels or different color marks.
The line width and line distance of the packaging substrate are small, the yield of finished products is low, and for products with high processing difficulty, the yield of the packaging substrate is about 80%. The packaging substrate is arranged in a gridding mode, the large plate comprises a plurality of sleeve plates, hundreds of units are arranged in each sleeve plate in a gridding mode, and each unit is an independent main body. The elements are pasted on the substrate with the cardinal number of thousands as the unit, and the ineffective loss of the active element materials is reduced by one percentage point, so that the important effect on reducing the cost is achieved. Because the size of the unit in the sleeve plate is small, the bad mark cannot be effectively arranged, or the cost for arranging the bad mark and subsequently identifying the bad mark is too high due to too large base number of the unit, the current method is to select the substrate with the yield rate larger than a certain proportion (for example, 95%) to carry out whole-plate mounting, and discard the bad unit after the mounting is finished, so a large amount of electronic devices are wasted, and the production cost is increased.
Therefore, how to mount the package substrate with relatively low yield to the maximum extent becomes a key issue for reducing the manufacturing cost of each manufacturer.
Disclosure of Invention
The present invention is directed to solving at least one of the problems of the prior art. Therefore, the invention provides a component mounting position identification method, a mounting control method, a mounting device and a computer readable storage medium, which can accurately identify a circuit defect unit on a substrate and avoid the invalid loss of a mounted component.
The component mounting position identification method provided by the embodiment of the invention comprises the following steps:
the method comprises the steps of file import, wherein after a substrate is detected by AOI equipment, a mapping file which is output by the AOI equipment and corresponds to the substrate is imported;
and data processing, namely performing binarization processing on the line defect detection result of each unit in the mapping file.
The component mounting position identification method provided by the embodiment of the invention at least has the following beneficial effects:
compared with the traditional manual identification, the invention carries out binarization processing in the mapping file, can quickly and accurately mark the position of a unit with a line defect, is beneficial to avoiding the marked unit when the component is subsequently mounted, thereby avoiding the ineffective loss of the mounted component and greatly utilizing the substrate with relatively low yield rate to carry out effective mounting.
According to some embodiments of the invention, the data processing comprises:
marking a unit without a path defect in the mapping file as '1';
and marking the unit with the line defect in the mapping file as '0'.
The component mounting control method according to the embodiment of the invention comprises the following steps:
the method comprises the steps of file import, wherein after a substrate is detected by AOI equipment, a mapping file which is output by the AOI equipment and corresponds to the substrate is imported;
format conversion, converting the mapping file into a file format recognizable by a chip mounter;
data processing, namely performing binarization processing on the line defect detection result of each unit in the mapping file;
and performing surface mounting control, namely selectively mounting the substrate according to the mapping file after binarization processing.
The component mounting control method provided by the embodiment of the invention at least has the following beneficial effects:
compared with the traditional manual identification, the invention carries out binarization processing in the mapping file, can quickly and accurately mark the position of a unit with a line defect, is beneficial to avoiding the marked unit when mounting components, thereby avoiding the ineffective loss of the mounted components and greatly utilizing a substrate with relatively low yield to carry out effective mounting.
According to some embodiments of the invention, the substrate is provided with an identification code, and the file name of the mapping file is consistent with the identification code of the substrate.
According to some embodiments of the invention, the files recognizable by the mounter include substrate information, nest plate information, and mapping information.
According to some embodiments of the invention, the format conversion comprises:
and converting the coordinates in the mapping file into the coordinate address of the chip mounter.
According to some embodiments of the invention, the data processing comprises:
marking a unit without a path defect in the mapping file as '1';
and marking the unit with the line defect in the mapping file as '0'.
According to some embodiments of the invention, the component mounting control method further comprises:
the chip mounter scans and identifies the substrate;
and when the scanning identification information is matched with the binarization-processed mapping file information, the chip mounter selectively mounts the substrate according to the binarization-processed mapping file.
A patch device according to an embodiment of the invention comprises a processor for performing the above-mentioned method steps.
According to an embodiment of the invention, a computer-readable storage medium stores a computer program which, when executed by a processor, implements the above-mentioned method steps.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 is a schematic plan view of a substrate according to an embodiment of the present invention;
fig. 2 is a flowchart illustrating steps of a component mounting position identifying method according to an embodiment of the present invention;
fig. 3 is a flowchart illustrating steps of a component mounting control method according to an embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
In the description of the present invention, the meaning of a plurality of means is one or more, the meaning of a plurality of means is two or more, and larger, smaller, larger, etc. are understood as excluding the number, and larger, smaller, inner, etc. are understood as including the number. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present invention, unless explicitly defined otherwise, terms such as setting, mounting, and the like should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the terms in the present invention by combining the specific contents of the technical solutions.
In the description of the present invention, the consecutive reference numbers of the method steps are for convenience of examination and understanding, and the implementation order between the steps is adjusted without affecting the technical effect achieved by the technical solution of the present invention by combining the whole technical solution of the present invention and the logical relationship between the steps.
Referring to fig. 1, the package substrate is arranged in a grid, the substrate 110 includes a plurality of nest plates 120, and a plurality of units 130 are arranged in the grid in each nest plate 120. In order to facilitate detecting whether the circuit defect exists on the substrate 110, Optical detection may be performed on the substrate 110 by an Automatic Optical Inspection (AOI) device, and after the AOI device detects the substrate 110, a mapping file may be output, where the mapping file records Optical detection results of each unit 130 on the substrate 110, where the Optical detection results include coordinates of the unit 130 and whether the unit 130 has the circuit defect.
Example 1
Referring to fig. 1 and fig. 2, an embodiment of the present invention discloses a method for identifying a mounting position of a component, including:
s110, importing a file, and importing a mapping file which is output by the AOI equipment and corresponds to the substrate 110 after the substrate 110 is detected by the AOI equipment.
After the substrate 110 is detected by the AOI device, the AOI device outputs the mapping file corresponding to the substrate 110, and performs corresponding import processing on the mapping file according to different application environments, for example, when the AOI device is online with a chip mounter, the chip mounter may directly import the mapping file output by the AOI device, and when the AOI device communicates with a background server or an upper computer, the background server or the upper computer may import the mapping file output by the AOI device to perform corresponding processing, which is beneficial to improving the flexibility of file application.
And S120, data processing, namely performing binarization processing on the line defect detection result of each unit 130 in the mapping file.
Since the cells 130 on the substrate 110 are arranged in a network, each cell 130 recorded in the mapping file is also arranged in a network, and the mapping file records the optical detection result of each cell 130, including whether a line defect exists and the type of the line defect. In order to facilitate understanding of the position distribution of the line defect detection result of each unit 130, the binarization processing is performed on the line defect detection result of each unit 130 in the mapping file, so as to simplify the data and understand whether the corresponding unit 130 has a line defect.
Compared with the traditional manual identification, the embodiment carries out binarization processing in mapping files, can rapidly and accurately mark the position of a unit with line defects, is favorable for saving labor and improving efficiency, and avoids the marked unit 130 when being convenient for subsequently mounting components, thereby avoiding the ineffective loss of mounting components and greatly utilizing the relatively low substrate 110 of yield to effectively mount.
The step S120 of data processing includes:
s121, marking a unit without a circuit defect in the mapping file as '1';
s122, marking the unit with the line defect in the mapping file as '0'.
Because the units 130 on the substrate 110 are arranged in a network manner, and the units without circuit defects and the units with circuit defects are marked by adopting '1' and '0', the relative positions of all the units in the mapping file can form a matrix with multiple rows and columns, so that the relative positions of the units with circuit defects can be conveniently known, and the units with circuit defects can be avoided in the subsequent component mounting process.
Example 2
Referring to fig. 1 and fig. 3, the present embodiment discloses a component mounting control method, including:
s210, importing files, namely importing mapping files which are output by AOI equipment and correspond to the substrate 110 after the substrate 110 is detected by the AOI equipment;
s220, converting the format, namely converting the mapping file into a file format which can be recognized by a chip mounter;
s230, data processing, namely performing binarization processing on the line defect detection result of each unit 130 in the mapping file;
and S240, controlling the mounting, namely selectively mounting the substrate 110 according to the mapping file after the binarization processing.
In this embodiment, the mapping file of the AOI device may be directly imported into the chip mounter for format conversion, data processing, and chip mounting control, or the mapping file of the AOI device is imported into the background server or the upper computer, and after the format conversion and the data processing are performed by the background server or the upper computer, the chip mounter is controlled to perform chip mounting control. Compare with traditional manual sign, this embodiment carries out binarization processing in mapping file, can mark the position that has the unit of circuit defect fast accurately, even the yield of base plate is lower relatively, also can avoid by the unit of mark during the dress components and parts to avoid the ineffective loss of dress components and parts, avoid directly scrapping the base plate that the yield is lower relatively, be favorable to utilizing the base plate that the yield is lower relatively to carry out effectively subsides dress by a wide margin. The portions of the present embodiment are referred to in embodiment 1.
Referring to fig. 1, in order to manage the substrate 110 and the files, the substrate 110 is provided with an identification code 140, the identification code 140 may be a barcode or a two-dimensional code, when the substrate 110 enters the AOI device, the AOI device may scan and identify the substrate 110 to identify the identification code 140 on the substrate 110, and when the mapping file is output, the file name of the mapping file is consistent with the identification code of the substrate 110, so as to associate the mapping file with the corresponding substrate 110.
In the above step S220 and format conversion, the following examples of codes in the file format recognizable by the mounter are given:
STRIP MAP＝{
STRIP _ ID ═ xxx// deck information
ROWS＝6
COLUMNS＝20
BLOCKS＝1
SUPPLIER_NAME＝"NA"
DEVICE_NUBMER＝"NA"
LOT _ ID ═ xxx// substrate information
MAP {// mapping information
11011111111111111111
11111111111111111111
11111111111111111111
11111111111111111111
11111111111111111111
11111111111111111111}}
The files recognizable by the chip mounter include substrate information, package information, and mapping information, and the substrate information and the package information can be obtained by scanning and recognizing the corresponding identification codes 140 disposed on the substrate 110 and the package 120 by the AOI device. The substrate 110 shown in the figure comprises 6 × 20 cells, so that the line defect condition of each cell can be identified by a matrix of "0" "1" in 6 rows and 20 columns.
The step S220 of converting the format includes: and converting the coordinates in the mapping file into the coordinate address of the chip mounter. The coordinates of each unit are recorded in the mapping file, and because the coordinate formats of the chip mounters of different models are different, when format conversion is performed, the coordinates in the mapping file need to be converted into coordinate addresses of the chip mounters of corresponding models, wherein a method for converting the coordinates is common knowledge to those skilled in the art, and therefore, description of the embodiment is not repeated.
The step S230 of data processing includes:
s231, marking a unit without a circuit defect in the mapping file as '1';
s232, marking the unit with the line defect in the mapping file as '0'.
Because the units 130 on the substrate 110 are arranged in a network mode, the units without the circuit defects and the units with the circuit defects are marked by the marks of '1' and '0', a matrix with multiple rows and columns can be formed at the relative positions of the units 130, the relative positions of the units with the circuit defects can be conveniently known, the units with the circuit defects can be avoided when the components are mounted, the components can be directly mounted by the chip mounter according to the marks of '1' and '0' of the mapping file, camera identification is not needed, and the production efficiency is improved.
In this embodiment, the component mounting control method further includes:
s241, the chip mounter scans and identifies the substrate 110;
in order to facilitate management of the substrate 110, the substrate 110 is provided with an identification code, and the chip mounter may scan and identify the identification code on the substrate 110 to avoid component mounting errors.
And S242, when the scanning identification information is matched with the binarization-processed mapping file information, the chip mounter selectively mounts the substrate 110 according to the binarization-processed mapping file.
In the embodiment, the mapping file and the substrate 110 are prevented from being not corresponding through scanning, identifying and verifying the substrate 110, and the improvement of the reliability of component mounting of the substrate 110 is facilitated.
The embodiment of the invention also discloses a piece mounting device which comprises a processor, wherein the processor is used for executing the steps of the method.
The embodiment of the invention also discloses a computer readable storage medium, which stores a computer program, and the computer program realizes the steps of the method when being executed by a processor.
The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the gist of the present invention.
Claims (10)
1. A component mounting position identification method is characterized by comprising the following steps:
the method comprises the steps of file import, wherein after a substrate is detected by AOI equipment, a mapping file which is output by the AOI equipment and corresponds to the substrate is imported;
and data processing, namely performing binarization processing on the line defect detection result of each unit in the mapping file.
2. A component mounting position identifying method as claimed in claim 1, wherein the data processing comprises:
marking a unit without a path defect in the mapping file as '1';
and marking the unit with the line defect in the mapping file as '0'.
3. A component mounting control method is characterized by comprising the following steps:
the method comprises the steps of file import, wherein after a substrate is detected by AOI equipment, a mapping file which is output by the AOI equipment and corresponds to the substrate is imported;
format conversion, converting the mapping file into a file format recognizable by a chip mounter;
data processing, namely performing binarization processing on the line defect detection result of each unit in the mapping file;
and performing surface mounting control, namely selectively mounting the substrate according to the mapping file after binarization processing.
4. A component mounting control method according to claim 3, wherein an identification code is provided on the substrate, and wherein the file name of the mapping file is identical to the identification code of the substrate.
5. A component mounting control method according to claim 3 or 4, wherein the files recognizable to the mounter include substrate information, nest plate information, and mapping information.
6. A component mounting control method according to claim 3, wherein said format conversion comprises:
and converting the coordinates in the mapping file into the coordinate address of the chip mounter.
7. A component mounting control method according to claim 3 or 6, wherein the data processing comprises:
marking a unit without a path defect in the mapping file as '1';
and marking the unit with the line defect in the mapping file as '0'.
8. A component mounting control method according to claim 3, further comprising:
the chip mounter scans and identifies the substrate;
and when the scanning identification information is matched with the binarization-processed mapping file information, the chip mounter selectively mounts the substrate according to the binarization-processed mapping file.
9. A patch device comprising a processor, characterized in that the processor is adapted to perform the method steps of any of claims 1 to 8.
10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the method steps of any one of claims 1 to 8.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113297271A (en) * | 2021-05-19 | 2021-08-24 | 深圳明锐理想科技有限公司 | Method and equipment for automatically splicing PCB (printed circuit board) |
| CN113297271B (en) * | 2021-05-19 | 2022-02-18 | 深圳明锐理想科技有限公司 | Method and equipment for automatically splicing PCB (printed circuit board) |
| CN117032085A (en) * | 2023-08-04 | 2023-11-10 | 安徽捷圆电子科技有限公司 | Automatic control method and system for AOI machine connection and application thereof |
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