CN112566367A - 一种多线路薄铜箔fpc及其制造工艺 - Google Patents

一种多线路薄铜箔fpc及其制造工艺 Download PDF

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CN112566367A
CN112566367A CN202011570019.1A CN202011570019A CN112566367A CN 112566367 A CN112566367 A CN 112566367A CN 202011570019 A CN202011570019 A CN 202011570019A CN 112566367 A CN112566367 A CN 112566367A
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林均秀
陈浪
邵家坤
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ZHUHAI TOPSUN ELECTRONIC TECHNOLOGY CO LTD
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    • HELECTRICITY
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    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
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    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
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    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/118Printed elements for providing electric connections to or between printed circuits specially for flexible printed circuits, e.g. using folded portions
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    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0047Drilling of holes
    • HELECTRICITY
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    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
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    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
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    • HELECTRICITY
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    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/068Apparatus for etching printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/427Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/429Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers

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Abstract

本发明公开并提供了一种多线路薄铜箔FPC及其制造工艺,可以很好解决这类W/S较小的FPC制造问题,并且回避了技术壁垒以及具有好的可靠性,具有较高合格率。多线路薄铜箔FPC包括PI基材,所述PI基材上开设有若干个通孔,所述PI基材的表面和所述通孔的孔壁上均包覆有导电层,所述导电层上叠合有镀铜层;所述多线路薄铜箔FPC制造工艺包括用FCCL原材料PI基材,按照产品要求先进行打孔,再对PI基材进行电镀媒介处理,附上一层导电介质,再对处理后的PI基材镀铜,再进行线路制作。本发明可应用于FPC生产的技术领域。

Description

一种多线路薄铜箔FPC及其制造工艺
技术领域
本发明涉及一种FPC及其制造工艺,特别涉及一种多线路薄铜箔FPC及其制造工艺。
背景技术
随着电子技术发展,使用线路板的领域越来越多,FPC凭着轻薄短小、立体装配的优势应用也越来越广泛,并且随着电子器件布置密度增加,FPC线路密度也在增加,线宽/线距(W/S)变得越来越小。
随着W/S进一步减小,使用的铜箔也会相减薄,否则传统厚度的铜箔会给FPC生产带来诸多不便,例如常规镀铜会由于铜太厚W/S太小导致合格低,降低镀铜厚度会因孔铜厚度不够可能导致可靠性问题,将铜箔减薄后再生产又增加生产工序并且铜箔厚度不均匀等等;并且还可能需要使用到新型生产技术才能制造,而新技术又会受到技术和设备投入的制约,令这类FPC制造遇到瓶颈。
发明内容
本发明所要解决的技术问题是克服现有技术的不足,提供了一种多线路薄铜箔FPC及其制造工艺,可以很好解决这类W/S较小的FPC制造问题,并且回避了技术壁垒以及具有好的可靠性,具有较高合格率。
本发明所采用的技术方案是:所述多线路薄铜箔FPC包括PI基材,所述PI基材上开设有若干个通孔,所述PI基材的表面和所述通孔的孔壁上均包覆有导电层,所述导电层上叠合有镀铜层。
进一步,所述镀铜层的厚度为9-12um。
进一步,所述镀铜层的厚度为10um。
所述多线路薄铜箔FPC的制造工艺包括以下步骤:
步骤a、开料:取PI基材;
步骤b、打孔:对步骤a中的所述PI基材上钻孔;
步骤c、导电层处理:对步骤b中打完孔的所述PI基材进行导电层附着处理,PI基材不导电,在PI基材上镀铜需要在基材表面附上一层导电物质,作为后面电镀的媒体;
步骤d、镀铜: 对附着导电层后的所述PI基材进行镀铜,镀铜厚度根据产品需要决定;
步骤e、贴干膜:在已覆铜的PI基材的两面贴上干膜;
步骤f、曝光显影:将贴上干膜的PI基材进行曝光,对曝光后的干膜进行显影,将线路区干膜保留下来,间隙区干膜去掉,另一面铜箔的干膜将整体保留下来;
步骤g、蚀刻脱膜:将显影后的所述PI基材进行蚀刻,没有干膜保护的间隙区的镀铜被去掉,再将所述PI基材上下面的干膜全部脱掉后,形成了所需的线路;
步骤h、AOI检验:利用AOI设备对PI基材进行检测;
步骤i、贴覆盖膜:将覆盖膜压在线路上,对线路形成保护层;
步骤j、测试分切;
步骤k、检查包装。
进一步,在步骤c中,导电层附着处理包括如下方式:
真空电镀:在高真空下将铜或铜合金的金属靶材利用高温等方法令其释放出金属离子,吸附在PI基材表面和孔壁,形成一层导电媒体。
进一步,在步骤c中,导电层附着处理包括如下方式:
溅射:用高能离子束将铜或铜合金轰击出金属离子,在高压下离子定向附着在PI基材表面和孔壁,形成一层导电媒体。
进一步,在步骤c中,导电层附着处理包括如下方式:
离子注入:给铜或铜合金离子加速到具备较高能量,直接轰击PI基材,视能量大小金属离子将全部或部分嵌入PI基材,这样将在基材表面和孔壁形成一层导电媒体。
本发明的有益效果是:采用FCCL原材料PI基材作为基材,按照产品要求先打孔,再对PI基材进行电镀媒介处理,附上一层导电介质,再对处理后的PI基材镀铜,两面的面铜分别镀到9-12um,再进行线路制作。这种厚度下的过孔孔铜厚度将超过8um,满足可靠性要求,同时总铜厚较薄高密度线路蚀刻时没有难度,适合较高密度线路的FPC制造。
附图说明
图1是FPC所用的原材料PI基材示意图;
图2是PI基材上钻孔后的示意图;
图3是在PI基材上附上导电层后的截面图;
图4是PI基材镀铜后截面图;
图4a是镀铜后可能出现的过孔填铜示意图。
具体实施方式
如图1和图4所示,在本实施例中,本发明包括PI基材1,所述PI基材1上开设有若干个通孔2,所述PI基材1的表面和所述通孔2的孔壁上均包覆有导电层3,所述导电层3上叠合有镀铜层4,所述镀铜层4的厚度为9-12um。FPC所用的PI基材1原材料,可以利用来制造FPC所用的覆铜板原材料FCCL。在本技术不需要使用到覆铜板,只需要使用PI基材1。PI基材1厚度7.5-125um,典型厚度是25-50um。整卷材料,长度不限。
如图2所示,在PI基材1上钻孔。根据FPC制造厂的制程能力,将单件FPC按一定规则拼在一起形成一个拼版,以提高生产效率。在PI基材1上钻出拼版的所有的孔,按需要包括PTH和NPTH孔。钻孔可以采用激光打孔,也可以采用合适的机械钻孔。一个拼版的孔钻完,PI基材1按照收卷方向移动一定距离,再钻另一张拼板的孔,这样周而复始就可以完成卷对卷RTR钻孔。
如图3所示,PI基材1不导电,在PI基材1上镀铜需要在表面附上一层导电物质,作为后面电镀的媒体。附上这层导电媒体的步骤主要有三种:
一种是真空电镀。在高真空下将金属靶材如铜、铜合金利用高温等方法令其释放出金属离子,吸附在PI基材1表面和孔壁形成导电媒体。
第二种是溅射。用高能离子束将特种铜或铜合金轰击出金属离子,在高压下离子定向附着在PI基材1表面和孔壁,形成一层导电媒体。
第三种是离子注入。给铜或铜合金离子加速到具备较高能量,直接轰击PI基材1,视能量大小金属离子将全部或部分嵌入PI基材1,这样将在基材表面和孔壁形成一层导电媒体。
以上处理是PI基材1双面同时处理,三种技术所形成的导电媒体层厚度都属于纳米级别。
如图4所示,PI基材1表面附着导电层3后,就可以进行镀铜。按照产品需要选择要镀的铜厚,常规情况下是镀到单面铜总厚9-12um。
如图4a所示,如果前面钻的孔径较小,例如50um,或者镀的铜较厚,例如超过18um,或者电镀生产线TP值较大,将可能出现小孔被铜堵住甚至填满的情况,这属于正常情况,不影响后续FPC制造的任何性能。
以上部分也可以委托专业覆铜板厂制造,可以简化FPC厂设备和流程。
以上覆铜板制造完成后,转入FPC厂生产FPC。钻孔等前面的流程已做好,从镀铜后的干膜工序开始往下做,即制造工艺步骤e及之后的步骤。
综上所述,本发明采用FCCL原材料PI基材1,按照产品要求先打孔,再对PI基材1进行电镀媒介处理,附上一层导电介质,再对处理后的PI基材1镀铜,两面的面铜分别镀到9-12um,再进行线路制作,这种厚度下的过孔孔铜厚度将超过8um,满足可靠性要求,同时总铜厚较薄高密度线路蚀刻时没有难度。以上流程都在卷对卷制程完成,适合较高密度线路双面FPC制造,合格率高,不存在孔铜厚度不够的可靠性隐患,可以很好解决这类W/S较小的FPC制造问题,并且回避了技术壁垒和可靠性问题。
本发明可应用于FPC生产的技术领域。
虽然本发明的实施例是以实际方案来描述的,但是并不构成对本发明含义的限制,对于本领域的技术人员,根据本说明书对其实施方案的修改及与其他方案的组合都是显而易见的。

Claims (7)

1.一种多线路薄铜箔FPC,其特征在于:它包括PI基材(1),所述PI基材(1)上开设有若干个通孔(2),所述PI基材(1)的表面和所述通孔(2)的孔壁上均包覆有导电层(3),所述导电层(3)上叠合有镀铜层(4)。
2.根据权利要求1所述的一种多线路薄铜箔FPC,其特征在于:所述镀铜层(4)的厚度为9-12um。
3.根据权利要求2所述的一种多线路薄铜箔FPC,其特征在于:所述镀铜层(4)的厚度为10um。
4.一种多线路薄铜箔FPC的制造工艺,其特征在于:所述制造工艺包括以下步骤:
步骤a、开料:取PI基材(1);
步骤b、打孔:对步骤a中的所述PI基材(1)上钻孔;
步骤c、导电层(3)处理:对步骤b中打完孔的所述PI基材(1)进行导电层(3)附着处理,PI基材(1)不导电,在PI基材(1)上镀铜需要在基材表面附上一层导电物质,作为后面电镀的媒体;
步骤d、镀铜: 对附着导电层(3)后的所述PI基材(1)进行镀铜,镀铜厚度根据产品需要决定;
步骤e、贴干膜:在已覆铜的PI基材(1)的两面贴上干膜;
步骤f、曝光显影:将贴上干膜的PI基材(1)进行曝光,对曝光后的干膜进行显影,将线路区干膜保留下来,间隙区干膜去掉,另一面铜箔的干膜将整体保留下来;
步骤g、蚀刻脱膜:将显影后的所述PI基材(1)进行蚀刻,没有干膜保护的间隙区的镀铜被去掉,再将所述PI基材(1)上下面的干膜全部脱掉后,形成了所需的线路;
步骤h、AOI检验:利用AOI设备对PI基材(1)进行检测;
步骤i、贴覆盖膜:将覆盖膜压在线路上,对线路形成保护层;
步骤j、测试分切;
步骤k、检查包装。
5.根据权利要求4所述的多线路薄铜箔FPC的制造工艺,其特征在于:在步骤c中,导电层(3)附着处理包括以下步骤:
真空电镀:在高真空下将铜或铜合金的金属靶材利用高温方法令其释放出金属离子,吸附在PI基材(1)表面和孔壁,形成一层导电媒体。
6.根据权利要求4所述的多线路薄铜箔FPC的制造工艺,其特征在于:在步骤c中,导电层(3)附着处理包括以下步骤:
溅射:用高能离子束将铜或铜合金轰击出金属离子,在高压下离子定向附着在PI基材(1)表面和孔壁,形成一层导电媒体。
7.根据权利要求4所述的多线路薄铜箔FPC的制造工艺,其特征在于:在步骤c中,导电层(3)附着处理包括以下步骤:
离子注入:给铜或铜合金离子加速到具备较高能量,直接轰击PI基材(1),视能量大小金属离子将全部或部分嵌入PI基材(1),这样将在膜表面和孔壁形成一层导电媒体。
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CN114710878A (zh) * 2022-03-02 2022-07-05 业成科技(成都)有限公司 双面导电的层叠结构及其制造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114710878A (zh) * 2022-03-02 2022-07-05 业成科技(成都)有限公司 双面导电的层叠结构及其制造方法

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