CN112564858B - CRC error correction method and system for satellite navigation - Google Patents

CRC error correction method and system for satellite navigation Download PDF

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CN112564858B
CN112564858B CN202011222221.5A CN202011222221A CN112564858B CN 112564858 B CN112564858 B CN 112564858B CN 202011222221 A CN202011222221 A CN 202011222221A CN 112564858 B CN112564858 B CN 112564858B
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CN112564858A (en
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张升强
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Shandong Zhongke Taiyue Electronic Technology Co ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00—Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01—Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13—Receivers
    • G01S19/23—Testing, monitoring, correcting or calibrating of receiver elements

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Error Detection And Correction (AREA)

Abstract

The invention provides a CRC error correction method and a CRC error correction system for satellite navigation, which are used for correcting bit errors in information bits. The method comprises the following steps: acquiring a receiving sequence; the receiving sequence is obtained after CRC codes sent by a sender are transmitted through a channel; calculating a syndrome vector of the received sequence using a preset generator polynomial; if the syndrome vector is an all-zero sequence, the representation CRC passes, otherwise, the representation CRC fails; if the CRC fails, using a preset syndrome table and a syndrome vector to try to locate the position where the error occurs in the receiving sequence; and correcting the bit value of the positioned error position. In the embodiment of the invention, after the CRC fails, the received sequence is not directly discarded, but the error position in the received sequence is tried to be positioned and corrected, thereby improving the data receiving and processing efficiency.

Description

CRC error correction method and system for satellite navigation
Technical Field
The invention relates to the field of information security, in particular to a CRC error correction method and system for satellite navigation.
Background
In a communication system, information may be erroneous in transmission or reception for various reasons. In order to determine the correctness of the received data at the receiving end, check bits are usually added at the end of the data during transmission. Cyclic Redundancy Check (CRC) coding and decoding are simple, error detection capability is strong, and anti-interference performance is excellent, so that the CRC is widely applied to many communication protocols and digital subscriber line technologies, and in a next generation satellite navigation system, CRC is used as an error detection scheme for navigation messages to improve message accuracy.
The basic idea of CRC is to process the original k-bit binary data to be transmitted according to a certain rule by using the principle of linear code, to generate a p-bit CRC check sequence and attach the sequence to the back of the original data, to form a data frame and transmit the data frame. And performing CRC check at the receiving end according to the same rule so as to judge whether the received information is correct.
However, the inventor finds that if the CRC check is successful, the receiving end uses the information bits in the data frame for subsequent processing; if the CRC check fails, the receiving end typically discards the corresponding data frame and prepares to re-receive.
In an environment with poor received signal quality, a large number of data frames may fail to be checked. If the CRC check fails, the data frame is directly discarded, which affects the data receiving and processing efficiency, thereby affecting the navigation and positioning performance.
Disclosure of Invention
In view of this, the present invention provides a CRC error correction method and system for satellite navigation, so as to correct bit errors in information bits, improve data receiving and processing efficiency, and reduce error rate of navigation messages.
In order to achieve the above object, the present invention provides the following technical solutions:
a CRC error correction method for satellite navigation comprises the following steps:
acquiring a receiving sequence; the length of the receiving sequence is n bits; the receiving sequence is obtained after n-bit CRC codes sent by a sender are transmitted through a channel; n is a positive integer;
calculating a syndrome vector of the received sequence using a preset generator polynomial; if the syndrome vector is an all-zero sequence, the representation CRC passes, otherwise, the representation CRC fails;
if the CRC fails, trying to locate the position where the error occurs in the receiving sequence by using a preset syndrome table and the syndrome vector; the syndrome table comprises n vectors with the length of p, wherein the ith vector is a syndrome corresponding to the ith bit of the received sequence;
and correcting the bit value of the positioned error position.
Optionally, the ith vector is denoted as t (i); the attempting to locate the location of the error in the received sequence using a preset syndrome table and the syndrome vector comprises: for the ith position, performing modulo-2 operation on the syndrome vector and T (i) to obtain an intermediate vector; and when the intermediate vector is an all-zero sequence or a vector matched with the intermediate vector is searched in the syndrome table, determining the ith position as a position where an error occurs.
Optionally, the generating process of the ith vector in the syndrome table includes: calculating x ^ i mod g (x) to obtain a polynomial S (i) corresponding to the ith vector; wherein g (x) is the generator polynomial; let the coefficients of the polynomial s (i) be t (i).
Optionally, the method further includes: counting the number of the positioned error positions; and if the counted number is 0, discarding the receiving sequence.
Optionally, the generator polynomial g (x) is given by a satellite navigation interface file.
A CRC error correction system for satellite navigation, comprising:
an acquisition unit configured to: acquiring a receiving sequence; the length of the receiving sequence is n bits; the receiving sequence is obtained after n-bit CRC codes sent by a sender are transmitted through a channel; n is a positive integer;
a CRC check unit to: calculating a syndrome vector of the received sequence using a preset generator polynomial; if the syndrome vector is an all-zero sequence, the representation CRC passes, otherwise, the representation CRC fails;
a CRC error correction unit to:
if the CRC fails, trying to locate the position where the error occurs in the receiving sequence by using a preset syndrome table and the syndrome vector; the syndrome table comprises n vectors with the length of p, wherein the ith vector is a syndrome corresponding to the ith bit of the received sequence;
and correcting the bit value of the positioned error position.
Optionally, the ith vector is denoted as t (i); in the aspect of attempting to locate a position where an error occurs in the received sequence by using a preset syndrome table and the syndrome vector, the CRC error correction unit is specifically configured to: for the ith position, performing modulo-2 operation on the syndrome vector and T (i) to obtain an intermediate vector; and when the intermediate vector is an all-zero sequence or a vector matched with the intermediate vector is searched in the syndrome table, determining the ith position as a position where an error occurs.
Optionally, the method further includes:
a syndrome table generation unit to:
calculating x ^ i mod g (x) to obtain a polynomial S (i) corresponding to the ith vector T (i);
wherein g (x) is the generator polynomial;
let the polynomial coefficient of the polynomial S (i) be T (i).
Optionally, the CRC error correction unit is further configured to:
counting the number of the positioned error positions;
and if the counted number is 0, discarding the receiving sequence.
Optionally, the generator polynomial is given by a satellite navigation interface file.
Therefore, in the embodiment of the invention, after the CRC fails, the received sequence is not directly discarded, but a preset syndrome table and the syndrome vector are used for trying to locate the position where the error occurs in the received sequence and correcting the bit value of the located position where the error occurs, so that the data receiving and processing efficiency is improved, and the error rate of the navigation message is reduced.
Drawings
Fig. 1 is an exemplary flow chart of a CRC error correction method for satellite navigation according to an embodiment of the present invention;
fig. 2 is another exemplary flow chart of a satellite navigation CRC error correction method according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a bit error rate according to an embodiment of the present invention;
fig. 4 is an exemplary structure of a CRC error correction system for satellite navigation according to an embodiment of the present invention;
fig. 5 is another exemplary structure of a CRC error correction system for satellite navigation according to an embodiment of the present invention.
Detailed Description
The next generation satellite navigation system uses CRC codes as error detection schemes for navigation messages. The generation of the CRC code and how to perform the CRC check will now be described.
Assuming that the length of original k-bit binary data (information bits) to be transmitted is k, the corresponding polynomial is m (x), the degree of generating the polynomial g (x) is p, and the generating polynomial g (x) is given by a satellite navigation interface file.
A polynomial x p m (x) the remainder of g (x) yields a polynomial p (x) of degree p, whose coefficients correspond to the length p of the sequence, called the check sequence or CRC check code.
The remainder formula is as follows:
p(x)＝x p m (x) mod g (x) (equation 1)
Then, a CRC check sequence is appended to the original data to constitute a navigation message data frame including a CRC code, and the CRC code has a length of n ═ k + p. Assuming that the polynomial corresponding to the CRC code is c (x), then
c(x)＝x p m (x) + p (x) (formula 2)
And performing CRC at a signal receiving end to judge whether errors occur in the navigation message data frame in the transmission process. After being transmitted by a channel, the CRC code is received by a signal receiving end to obtain a receiving sequence of n bits.
Assuming that r (x) is a polynomial corresponding to the received sequence and e (x) is a polynomial corresponding to the channel error, the relationship between r (x) and c (x) can be expressed by the following formula:
r (x) ═ c (x) + e (x) (equation 3) is given below
s (x) r (x) mod g (x) (formula 4)
s (x) is a polynomial of degree p below, whose coefficients correspond to a sequence of length p, called the syndrome vector of the received sequence.
It can be deduced from equations (3) and (4):
r(x)mod g(x)＝(c(x)+e(x))mod g(x)
＝c(x)mod g(x)+e(x)mod g(x)
as can be seen from the above equations (1) and (2), c (x) is a multiple of g (x), so c (x) mod g (x) is 0. Thus, it can be deduced that:
s (x) e (x) mod g (x) (formula 5)
If s (x) is an all-zero sequence, the CRC check is successful. Otherwise, the CRC check fails.
In environments with poor received signal quality, CRC check failures may occur for a large number of data frames. If the data frames are directly discarded by adopting the traditional method, the data receiving and processing efficiency is influenced, and the navigation and positioning performance is influenced. Since the CRC is a kind of linear code per se and has an error correction function, when the CRC check fails, the error correction function can be used to correct the error, thereby improving the above-mentioned problem.
In view of this, the present invention provides a CRC error correction method and system to correct bit errors in information bits, improve data receiving and processing efficiency, and reduce error rate of navigation messages.
Fig. 1 shows an exemplary flow of a satellite navigation CRC error correction method, including:
s1: a receive sequence is obtained.
As mentioned above, the received sequence has a length of n bits (n is a positive integer); the receiving sequence is obtained by the transmission of the n-bit CRC code sent by the sender through the channel and the hard decision.
S2: the syndrome vector of the received sequence is calculated using a preset generator polynomial.
The calculation method is the above mentioned formula 4, wherein if the syndrome vector is an all-zero sequence, the CRC check is passed, otherwise, the CRC check is failed.
S3: if the CRC check fails, a preset syndrome table and syndrome vector are used to attempt to locate the location of the error in the received sequence.
Wherein, the syndrome table can be represented by T. The syndrome table includes n vectors of length p; the ith vector is the syndrome corresponding to the ith bit of the received sequence.
For ease of reference, the ith vector may be denoted as T (i).
In one example, the syndrome table may be calculated based on equation 5 above.
Taking T (i) as an example, let e (x) be equal to x in equation 5 i Calculating x i mod g(x)
Obtaining a polynomial corresponding to the ith vector, and expressing the polynomial by the formula S (i).
The coefficients of the polynomial s (i) correspond to a sequence of length p, which is t (i).
S4: and correcting the bit value of the positioned error position.
Specifically, for the ith position, the correction sub-vector and T (i) are subjected to modulo-2 operation to obtain an intermediate vector s (i) ；
Is calculated by the formula
s (i) (equation 6)
When the intermediate vector is an all-zero sequence or a vector matched with the intermediate vector is searched in the syndrome table, the ith position is determined as the position where the error occurs.
Therefore, in the embodiment of the invention, after the CRC fails, the received sequence is not directly discarded, but a preset syndrome table and the syndrome vector are used for trying to locate the position where the error occurs in the received sequence and correcting the bit value of the located position where the error occurs, so that the data receiving and processing efficiency is improved, and the error rate of the navigation message is reduced.
The following description will introduce the CRC error correction method in more detail with emphasis on positioning. Fig. 2 shows another exemplary flow of a CRC error correction method, including:
s21: when decoding starts, the receiving sequence and the syndrome table T are read.
S22: using a predetermined generator polynomial, a syndrome vector s of the received sequence is calculated.
Steps S21-S22 are similar to steps S1-S2, and are not repeated herein.
S23: judging whether s is an all-zero sequence, if so, ending the decoding process; otherwise, the process proceeds to S24.
S24: and setting i to be 0.
S25: performing modulo-2 operation on the syndrome vector and T (i) to obtain an intermediate vector s (i) 。
The calculation formula can refer to the aforementioned formula 6.
S26: judgment s (i) If the sequence is an all-zero sequence, the process goes to S29; otherwise, go to S27;
e (x) equals x, assuming there is only one error at the ith position i By substituting equation 5, the polynomial s (x) corresponding to the syndrome vector is found to be x i mod g (x), S (x) is equal to t (i) (see the above description of S3).
If it is assumed that the m-th position is erroneous in addition to the i-th position, e (x) is equal to x i +x m 。
By substituting equation 5, the polynomial s (x) x corresponding to the syndrome vector can be known i mod g(x)+x m mod g (x), i.e., s (x), corresponds to a coefficient s equal to T (i) + T (m).
So on, it will not be described in detail.
From equation 6, s can be found (i) ＝s+T(i)。
Therefore, if there is only one error at the ith position, s (i) ＝s+T(i)＝T(i)+T(i)＝0。
If an error occurs in both the ith and mth positions, the coefficient s is equal to T (i) + T (m), s (i) ＝s+T(i)＝T(i)+T(m)+T(i)＝T(m)。
Of course, if an error occurs at three positions, assuming that an error occurs at the i-th position, the m-th position, and the y-th position, the coefficient s is equal to T (i) + T (m) + T (y), s (i) ＝s+T(i)＝T(i)+T(m)+T(y)+T(i)＝T(m)+T(y)。
S27: the syndrome table T is searched for vectors that match the intermediate vectors.
The matching search mode is that vector-by-vector sequential search is carried out.
S28: and judging whether the search is successful, if so, entering S29, and if not, entering S210.
Search success means that there is a sum of s in the syndrome table T (i) Identical vectors.
Suppose a and s (i) If the identical vector is the m-th vector, it means that there is an error in the m-th vector in addition to the i-th vector, and two errors coexist.
Of course, if there are 3 errors, S is determined by following the example of S26 assuming that the ith position is erroneous (i) T (m) + T (y), the number of vectors that complete the same cannot be found in the syndrome table T.
In fact, it is not possible to determine whether an error has occurred at the ith position.
S29: and correcting the ith bit by error.
The error correction method is to invert the ith bit and correct the ith bit from 0 to 1 or from 1 to 0.
S210: judging whether the value of the current i is equal to n-1 or not, if so, ending the decoding process; if not, the process proceeds to S211.
S211: place i ← i +1, return to S25.
In other embodiments of the present invention, after the decoding process is finished, the number of the positioned error positions may be counted subsequently, and if the counted number is 0, the received sequence is discarded.
Fig. 3 shows the bit error rate before and after CRC decoding by using the error correction method in the navigation system according to the embodiment of the present invention, where the code length n is 600 bits, and it can be seen that the text bit error rate after CRC decoding by using the error correction method is significantly reduced.
The embodiment of the present invention also claims a CRC error correction system for satellite navigation, please refer to fig. 4, which exemplarily includes:
an acquisition unit 1 for: acquiring a receiving sequence;
wherein, the length of the receiving sequence is n bits (n is a positive integer); the receiving sequence is obtained after n-bit CRC codes sent by a sending party are transmitted through a channel.
A CRC check unit 2 for: calculating a syndrome vector of the received sequence using a preset generator polynomial;
and if the syndrome vector is an all-zero sequence, the representation CRC check passes, otherwise, the representation CRC check fails. The generator polynomial is given by the satellite navigation interface file.
A CRC error correction unit 3 for:
if CRC fails, using preset syndrome table T and syndrome vector to try to locate the position where error occurs in the received sequence; the syndrome table T comprises n vectors of length p; the ith vector t (i) is the syndrome corresponding to the ith bit of the received sequence;
and correcting the bit value of the positioned error position.
For details, please refer to the above description, which is not repeated herein.
In other embodiments of the present invention, in attempting to locate a position where an error occurs in a received sequence using a preset syndrome table and syndrome vector, the CRC error correction unit 3 is specifically configured to:
for the ith position, performing modulo-2 operation on the correction sub-vector and T (i) to obtain an intermediate vector;
when the intermediate vector is an all-zero sequence or a vector matched with the intermediate vector is searched in the syndrome table, the ith position is determined as the position where the error occurs.
For details, please refer to the above description, which is not repeated herein.
In another embodiment of the present invention, referring to fig. 5, the system may further include:
a syndrome table generation unit 4 for:
calculating x ^ i mod g (x) to obtain a polynomial S (i) corresponding to the ith vector; wherein g (x) is a generator polynomial;
let the coefficients of the polynomial s (i) be t (i).
For details, please refer to the above description, which is not repeated herein.
In other embodiments of the present invention, the CRC error correction unit 3 is further configured to:
counting the number of the positioned error positions;
if the counted number is 0, discarding the received sequence.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is simple, and the description can be referred to the method part.
Those of skill would further appreciate that the various illustrative components and model steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The steps of a method or model described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, WD-ROM, or any other form of storage medium known in the art.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (8)

1. A CRC error correction method for satellite navigation is characterized by comprising the following steps:
acquiring a receiving sequence; the length of the receiving sequence is n bits; the receiving sequence is obtained after n-bit CRC codes sent by a sender are transmitted through a channel; n is a positive integer;
calculating a syndrome vector of the received sequence using a preset generator polynomial; if the syndrome vector is an all-zero sequence, the representation CRC passes, otherwise, the representation CRC fails;
if the CRC fails, trying to locate the position where the error occurs in the receiving sequence by using a preset syndrome table and the syndrome vector; the syndrome table comprises n vectors with the length of p, wherein the ith vector is a syndrome corresponding to the ith bit of the received sequence;
correcting the bit value of the positioned error position;
the ith vector is denoted as T (i);
the attempting to locate the position of the error in the received sequence using a preset syndrome table and the syndrome vector comprises:
for the ith position, performing modulo-2 operation on the syndrome vector and T (i) to obtain an intermediate vector;
when the intermediate vector is an all-zero sequence, determining the ith position as a position where an error occurs;
or, when the intermediate vector is not an all-zero sequence and a vector matched with the intermediate vector is searched in the syndrome table, determining a position m corresponding to the intermediate vector, and determining the ith position and the mth position as positions where errors occur.
2. The method of claim 1, wherein the generating of the ith vector in the syndrome table comprises:
calculating x i mod g (x) to obtain a polynomial S (i) corresponding to T (i); wherein, g (x)
For said generating a polynomial;
let the coefficients of the polynomial s (i) be t (i).
3. The method of claim 1, further comprising:
counting the number of the positioned error positions;
and if the counted number is 0, discarding the receiving sequence.
4. The method of claim 1, wherein the generator polynomial g (x) is given by a satellite navigation interface file.
5. A CRC error correction system for satellite navigation, comprising:
an acquisition unit configured to: acquiring a receiving sequence; the length of the receiving sequence is n bits; the receiving sequence is obtained after n-bit CRC codes sent by a sender are transmitted through a channel; n is a positive integer;
a CRC check unit to: calculating a syndrome vector of the received sequence using a preset generator polynomial; if the syndrome vector is an all-zero sequence, the representation CRC passes, otherwise, the representation CRC fails;
a CRC error correction unit to:
if the CRC fails, trying to locate the position where the error occurs in the receiving sequence by using a preset syndrome table and the syndrome vector; the syndrome table comprises n vectors with the length of p, wherein the ith vector is a syndrome corresponding to the ith bit of the received sequence;
correcting the bit value of the positioned error position;
the ith vector is denoted as T (i);
in the aspect of attempting to locate a position where an error occurs in the received sequence by using a preset syndrome table and the syndrome vector, the CRC error correction unit is specifically configured to:
for the ith position, performing modulo-2 operation on the syndrome vector and T (i) to obtain an intermediate vector;
when the intermediate vector is an all-zero sequence, determining the ith position as a position where an error occurs;
or, when the intermediate vector is not an all-zero sequence and a vector matched with the intermediate vector is searched in the syndrome table, determining a position m corresponding to the intermediate vector, and determining the ith position and the mth position as positions where errors occur.
6. The system of claim 5, further comprising:
a syndrome table generation unit to:
calculating x ^ i mod g (x) to obtain a polynomial S (i) corresponding to the ith vector T (i);
wherein g (x) is the generator polynomial;
let the polynomial coefficient of the polynomial S (i) be T (i).
7. The system of claim 5, wherein the CRC error correction unit is further to:
counting the number of the positioned error positions;
and if the counted number is 0, discarding the receiving sequence.
8. The system of claim 5, wherein the generator polynomial g (x) is given by a satellite navigation interface file.
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CN101621299A (en) * 2008-07-04 2010-01-06 华为技术有限公司 Burst correcting method, equipment and device
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