CN103312458B - Hybrid coding method - Google Patents
Hybrid coding method Download PDFInfo
- Publication number
- CN103312458B CN103312458B CN201310257768.2A CN201310257768A CN103312458B CN 103312458 B CN103312458 B CN 103312458B CN 201310257768 A CN201310257768 A CN 201310257768A CN 103312458 B CN103312458 B CN 103312458B
- Authority
- CN
- China
- Prior art keywords
- code
- cyclic redundancy
- check
- redundancy check
- coding method
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Detection And Prevention Of Errors In Transmission (AREA)
- Error Detection And Correction (AREA)
Abstract
The present invention relates to communication data transmission field, more particularly to a kind of hybrid coding method is encoded as follows：（A）By waiting message to fix digit as one group, it is divided into multigroup；（B）Splice cyclic redundancy check code after per group information, forms inner code；（C）Splice parity check code outside inner code again, forms outer code；Outer code is sent, cataloged procedure terminates.For traditional parity check coding method, in the occupancy of MCU only can more point, but the present invention is with encryption, error correction, when mistake occurs in parity check bit, error correction is carried out by the Cyclic Redundancy Code of internal layer, it is not necessary to again by data retransmission.Efficiency of transmission is also assured while increasing Information Security.
Description
Technical field
The present invention relates to communication data transmission field, more particularly to a kind of hybrid coding method.
Background technology
It is all transmitted using binary system in the transmission of communication data transmission field, data, because of the presence of interference,
Data are caused unavoidably to generate mistake in transmission process, 0 on certain positions, which becomes 1 or 1, becomes 0 so that receives
Information and the information of transmission are inconsistent, generate position, that is, so-called error code of mistake, to reduce the appearance of error code, the prior art
Middle generally use checksum coding or cyclic redundancy check coding encode the information of transmission.No matter which kind of is encoded, first
All it is first to be grouped waiting message by fixed digit, for example with 32 information for one group, colonel is then added after every group information
Code is tested, the check code of checksum coding only has one, and the check code of cyclic redundancy code has multidigit.
For both the above coding mode, checksum coding is simple in structure, coding, decoding fast response time, MCU（It is micro-
Control unit）Resources occupation rate is low, but the check code is without the function of encryption, error correction；Cyclic redundancy check coding has non-
The debugging of Chang Qiang, error correction also have both encryption function, but its coding, decoding process are complex, the resources occupation of MCU
Rate is high, influences MCU and obtains real-time, and increases system power dissipation.
Invention content
The purpose of the present invention is to provide a kind of hybrid coding methods, and MCU resources occupation rates are low, and transmission is effective, safe.
In order to achieve the above object, the technical solution adopted by the present invention is：A kind of hybrid coding method, carries out as follows
Coding：（A）By waiting message to fix digit as one group, it is divided into multigroup；（B）Splice cyclic redundancy check code after per group information,
Form inner code；（C）Splice parity check code outside inner code again, forms outer code；Outer code is sent, cataloged procedure terminates.
Compared with prior art, there are following technique effects by the present invention：
Hybrid coding method in the present invention, for traditional parity check coding method, although accounting in MCU
With can more point, but for low power SCM system or acceptable, while hybrid coding method
Also with encryption, error correction, when mistake occurs in parity check bit, then school is carried out to the Cyclic Redundancy Code of internal layer
It tests, error correction, it is not necessary to again by data retransmission, ensure that efficiency of transmission.
Description of the drawings
Fig. 1 is the coding flow chart of the present invention；
Fig. 2 is the decoding process figure of the present invention.
Specific implementation mode
With reference to Fig. 1 to Fig. 2, the present invention is described in further detail：
Refering to fig. 1, a kind of hybrid coding method, is encoded as follows：（A）It is to fix digit by waiting message
One group, it is divided into multigroup；Fixed digit mentioned here is indefinite, is selected according to user oneself.（B）Splicing cycle is superfluous after per group information
Remaining check code forms inner code；（C）Splice parity check code outside inner code again, forms outer code；Outer code is sent, it is encoded
Journey terminates.As the preferred embodiment of the present invention, the digit r for the cyclic redundancy check code spliced after every group information and the group information position
It should meet 2 between number Kr-1K≤2 ＜r, the error correction effect of such cyclic redundancy check is best.
For above-mentioned steps are described in detail, below by taking 8 code characters as an example, i.e., fixation digit described above is 8, at this time K=8.
First by waiting message with 8 be one group, be divided into several groups, it is assumed that one of which information be 10111001, according to 2r-1＜ K≤
2rR=3 can be calculated, because the digit of cyclic redundancy check code is than polynomial few one, while by standard current in the world
Polynomial highest order and lowest order must be 1, we can arrange multinomial g (x)=x with recipient3+ x+1, this is multinomial
The binary bits string of formula is 1011.Then start to calculate the cyclic redundancy check code of the group information.
It will be obtained first plus three 0 behind the group information 10111001：10111001000, with the two of multinomial g (x)
1011 mould 2 of system Bit String removes 101110111001000, obtains remainder 110, is substituted added by front with obtained remainder 110
Obtain inner code 10111001110 for three 0, wherein remainder is the cyclic redundancy check code of splicing.
After obtaining inner code, we are divided into odd parity, even school in one bit parity check code of addition, the mode of even-odd check
It tests, here by taking even parity check as an example, that is, adds a bit parity check code and so that in entire outer code that the number of " 1 " is even number.
The number of " 1 " in this example in inner code is odd number, so parity check code is 1, outer code 101110011101.
Other code characters are repeated with the splicing of cyclic redundancy check code and parity check code, then by obtained information
It sends.
Referring to Fig.2, receiving terminal is decoded as follows：（a）The outer code received is subjected to even-odd check and is gone
Except parity check bit obtains inner code, if check results mistake, enters step b；Check results are correct, enter step d；（b）
Cyclic redundancy check is carried out to inner code, if check results mistake, enters step c；Check results are correct, enter step d；
（c）Error correction simultaneously removes cyclic redundancy check code, enters step e；（d）Cyclic redundancy check code is directly removed, e is entered step；（e）
Obtained multigroup code character is merged, decoding process terminates.
Equally, by taking above-mentioned outer code as an example, even-odd check is carried out to outer code first, that is, is judged in outer code " 1 "
Whether number is even number, when the number of wherein " 1 " is not even number, illustrates that the data of transmission are wrong, removes its odd even
Error correction is carried out after check code；If it is even number, illustrates that the data of transmission are correct, directly remove parity check code, cyclic redundancy
Check code restores code group information.It should be pointed out that the number of " 1 " is even number, not necessarily correctly, such as outer code
In there are even number bit-errors, such as third, six generation mistakes, outer code at this time is 100111011101, wherein the number of " 1 "
It is still even number, such case is that even-odd check is inevitable.In this example, it is assumed that every transmitted error rate is 5%, then
All correctly probability is 0.9512≈ 54%, the probability for a bit-errors occur are C1 12×0.05×0.9511≈ 34% occurs two
The probability of bit-errors is C2 12×0.052×0.9510≈ 9.9%, the probability for three bit-errors occur are C3 12×0.053×0.959≈
1.7%, it similarly calculates below, and probability of occurrence is smaller when wrong digit is more.By result above we it is found that occur a dislocation
Probability or prodigious accidentally, when there are two bit-errors even-odd check can ignore, in contrast probability is not very big.
If parity check code is wrong, illustrate that data transmission is wrong, and the digit of mistake is odd bits, then needs internally
Layer code carries out cyclic redundancy check, that is, 1011 mould 2 of binary bits string of multinomial g (x) is used to remove inner code, if remainder is 0,
Then cyclic redundancy check is correct；Remainder is not 0, illustrates that cyclic redundancy check is wrong.In general, even-odd check is wrong, says
Bright inner code is wrong, and cyclic redundancy check result is also mistake, and still, sometimes inner code mistake is more, leads to it
The result of cyclic redundancy check may be correct, directly remove cyclic redundancy check code at this time.Although such case obtains
To code character be not necessarily correctly, but such case odds very little can be ignored substantially.
Under normal circumstances, the remainder of cyclic redundancy check is not 0, with the inner code 00111001110 of the first error of transmission
For, 00111001110 is removed with 1011 mould 2 of binary bits string of g (x), remainder 011, at this point, more than being found in error correction
Number for 011 when, we just by first corrected i.e. 1 become 0,0 become 1 can.When remainder difference, the position of correction
Number is also different, in this way, all being corrected for the case where one error of transmission of appearance.Cyclic redundancy check code is removed after correcting
It can be obtained correct information.
It should be pointed out that the digit of cyclic redundancy check code is more, error correcting capability is stronger, but the system money of its consumption
Source is also more.The digit r of cyclic redundancy check code meets 2 in the present inventionr-1K≤2 ＜r, can ensure to there are a bit-errors
Effectively corrected, if r increase, effectively multi-bit error can also be corrected, but by the preceding paragraph we
It can learn that the probability for a bit-errors occur is 34% or prodigious, and the probability for three bit-errors occur has fallen to 1.7%,
Substantially can ignore, therefore, it may be desirable to so that r meets formula 2r-1K≤2 ＜r.
Simple parity check system can again require that sender retransmits when finding wrong, and
Still an error has occurred for meeting after transmission, and coding method using the present invention, and when mistake occurs, we pass through internal additional
Cyclic redundancy check code is corrected, and need not be sent again, and resource has been saved, and the validity of transmission is high.
In parity checking process, with 32（31+1 bit parity check codes of information）For code character, with MSP430 monolithics
Machine carries out even-odd check and about consumes 40 machine cycles, information above data is encoded using cyclic redundancy check, i.e., 31
+ 5 cyclic redundancy check code of information about consume 1000 to 5000 machines when carrying out cyclic redundancy check with MSP430 microcontrollers
Period.Coding method using the present invention, i.e.+1 bit parity check code of+5 cyclic redundancy check code of 31 information, uses MSP430
Microcontroller, which is decoded, about to be taken with 340 machine cycles.Compared with cyclic redundancy check, accounting for for MCU is greatly reduced
There is rate, reduce system power dissipation, improves system response.
Checksum coding is easy to be cracked, count due to only increasing by a bit check code behind each code character
It is not high according to the safety of transmission；Cyclic redundancy check coding adds multidigit check code behind each code character, and check code is logical
Cross what multinomial g (x) was calculated, for not knowing for the third party of multinomial g (x), it is desirable to crack and be difficult.This hair
Length of the coding method due to having both the two in bright, is attached with cyclic redundancy check code, therefore also have behind each code character
For encryption function, the safety of data transmission is improved.
Claims (3)
1. a kind of hybrid coding method, it is characterised in that：It is encoded as follows：
（A）By waiting message to fix digit as one group, it is divided into multigroup；
（B）Splice cyclic redundancy check code after per group information, forms inner code；
（C）Splice parity check code outside inner code again, forms outer code；Outer code is sent, cataloged procedure terminates.
2. hybrid coding method as described in claim 1, it is characterised in that：The cyclic redundancy check code spliced after per group information
Digit r and group information digit K between should meet 2r-1K≤2 ＜r。
3. hybrid coding method as described in claim 1, it is characterised in that：It is decoded as follows：
（a）It carries out even-odd check by the outer code received and removes parity check bit to obtain inner code, if check results are wrong
Accidentally, b is entered step；Check results are correct, enter step d；
（b）Cyclic redundancy check is carried out to inner code, if check results mistake, enters step c；Check results are correct, enter
Step d；
（c）Error correction simultaneously removes cyclic redundancy check code, enters step e；
（d）Cyclic redundancy check code is directly removed, e is entered step；
（e）Obtained multigroup code character is merged, decoding process terminates.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310257768.2A CN103312458B (en) | 2013-06-25 | 2013-06-25 | Hybrid coding method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310257768.2A CN103312458B (en) | 2013-06-25 | 2013-06-25 | Hybrid coding method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103312458A CN103312458A (en) | 2013-09-18 |
| CN103312458B true CN103312458B (en) | 2018-09-18 |
Family
ID=49137275
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310257768.2A Active CN103312458B (en) | 2013-06-25 | 2013-06-25 | Hybrid coding method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103312458B (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109150402A (en) * | 2018-08-30 | 2019-01-04 | 宁夏凯晨电气集团有限公司 | More data transmission methods of industrial control system communication bus |
| CN110401458B (en) * | 2019-07-30 | 2022-05-17 | 北京无线电测量研究所 | Data check coding method and system |
| JP2023542015A (en) * | 2020-09-18 | 2023-10-04 | 華為技術有限公司 | Data transmission methods, communication devices, and storage media |
| CN112564858B (en) * | 2020-11-05 | 2022-08-09 | 山东中科泰岳电子科技有限公司 | CRC error correction method and system for satellite navigation |
| CN114244615B (en) * | 2021-12-20 | 2024-07-05 | 海特尔机电工程技术（马鞍山）有限公司 | Signal self-encryption system of communication equipment |
| CN115037415B (en) * | 2022-05-31 | 2024-02-09 | 江苏屹信航天科技有限公司 | CRC-based error correction coding method, CRC-based error correction coding device and CRC-based error correction coding terminal |
| CN115103357B (en) * | 2022-08-26 | 2022-11-25 | 汉仪科技(深圳)有限公司 | 5G communication encryption system based on FPGA |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102611531A (en) * | 2012-03-12 | 2012-07-25 | 成都龙冠科技实业有限公司 | One-way data transmission method |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101323089B1 (en) * | 2007-08-07 | 2013-10-29 | 엘지전자 주식회사 | Method for transmitting of control information in Time Division Duplex wireless communication system |
| US8792469B2 (en) * | 2009-10-02 | 2014-07-29 | Sharp Laboratories Of America, Inc. | Coding a control message with determined data code block repetition |
| CN103138881B (en) * | 2011-11-30 | 2016-03-16 | 北京东方广视科技股份有限公司 | Decoding method and equipment |
-
2013
- 2013-06-25 CN CN201310257768.2A patent/CN103312458B/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102611531A (en) * | 2012-03-12 | 2012-07-25 | 成都龙冠科技实业有限公司 | One-way data transmission method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103312458A (en) | 2013-09-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103312458B (en) | Hybrid coding method | |
| CN101662335B (en) | Forward error correction encoding method, forward error correction decoding method and devices thereof | |
| CN101958720B (en) | Encoding and decoding methods for shortening Turbo product code | |
| CN101656593B (en) | Forward error correction coding method, forward error correction decoding method and device thereof | |
| US11075652B2 (en) | Polar code transmission method and apparatus | |
| CN102761389B (en) | Asynchronous master-slave serial communication system, data transmission method and control module | |
| CN101702639B (en) | Check value calculation method and device of cyclic redundancy check | |
| JP2020504529A (en) | Information processing method, device, and communication system | |
| WO2015184914A1 (en) | Data packet processing method and device | |
| CN102355341A (en) | Network coding method of hybrid automatic request retransmission for long-term evolution system | |
| WO2017121334A1 (en) | Data-processing method and device | |
| WO2011137790A1 (en) | Method and apparatus for sending/receiving common public radio interface service | |
| JP2019525657A (en) | Method and apparatus for encoding and decoding polar codes | |
| CN107947902A (en) | The data error processing system and method for a kind of high-speed interface chip | |
| CN104135345A (en) | Cross-layer coding and decoding method applied to long-term evolution system | |
| CN102480333B (en) | Line coding method as well as synchronous processing method and device of coded data block | |
| WO2018127234A1 (en) | Polar code coding and decoding method and apparatus | |
| CN110750383B (en) | Method for carrying information by using CRC (cyclic redundancy check) code | |
| CN103138881B (en) | Decoding method and equipment | |
| CN105007286A (en) | Decoding method, decoding device, and cloud storage method and system | |
| CN111183748B (en) | Error code resisting method based on cyclic redundancy check and erasure correction coding | |
| CN101442380A (en) | Method and apparatus for testing error rate based on high speed serial interface encoded mode | |
| CN109412748B (en) | Method and device for encoding and decoding polarization code | |
| CN103401649B (en) | Distributed transmission method based on fountain coding under a kind of noisy channels | |
| CN113242045A (en) | Efficient decoding method and device for polarization code and computer readable storage medium |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address |
Address after: 230000 No. 228, Wanshui Road, high tech Zone, Hefei, Anhui Patentee after: Hefei Jinxing Intelligent Control Technology Co.,Ltd. Patentee after: Anhui Haijin Cement Technology Development Co., Ltd Address before: High tech Zone Hefei city Anhui province 230088 Tianzhi Road No. 23 Patentee before: HEFEI GOLD STAR MECHATRONICS TECHNICAL DEVELOPMENT Co.,Ltd. Patentee before: Anhui Haijin Cement Technology Development Co., Ltd |
|
| CP03 | Change of name, title or address |