CN112512146A - Asymmetric wire winding structure and thermal field temperature control method - Google Patents

Asymmetric wire winding structure and thermal field temperature control method Download PDF

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Publication number
CN112512146A
CN112512146A CN202011408624.9A CN202011408624A CN112512146A CN 112512146 A CN112512146 A CN 112512146A CN 202011408624 A CN202011408624 A CN 202011408624A CN 112512146 A CN112512146 A CN 112512146A
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furnace
temperature
wire
subarea
wires
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CN112512146B (en
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林佳继
庞爱锁
郭永胜
刘群
朱太荣
林依婷
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Laplace New Energy Technology Co ltd
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Shenzhen Laplace Energy Technology Co Ltd
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B3/00Ohmic-resistance heating
    • H05B3/62Heating elements specially adapted for furnaces
    • H05B3/64Heating elements specially adapted for furnaces using ribbon, rod, or wire heater
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B1/00Details of electric heating devices
    • H05B1/02Automatic switching arrangements specially adapted to apparatus ; Control of heating devices
    • H05B1/0227Applications
    • H05B1/023Industrial applications
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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Abstract

The invention discloses an asymmetric wire winding structure and a thermal field temperature control method, which comprises a furnace wire, wherein the furnace wire is composed of a furnace opening auxiliary hot area furnace wire, a constant temperature area furnace wire and a furnace tail auxiliary hot area furnace wire, the furnace opening auxiliary hot area furnace wire, the constant temperature area furnace wire and the furnace tail auxiliary hot area furnace wire are respectively composed of a plurality of temperature area furnace wires in the axial direction, at least one temperature area furnace wire is composed of at least two groups of subareas, the furnace wires of each subarea are unevenly distributed, the furnace wire uneven distribution is controlled to comprise the furnace wire density of each subarea or/and the furnace wire diameter of each subarea or/and the furnace wire number of each subarea, the furnace wires unevenly distributed control the power of each subarea, the power controls the temperature of the subareas, the invention subdivides at least one group of furnace wires into at least 2 subareas, each subarea performs corresponding layout on the furnace wire density, and the furnace wire density performs layout through the distance Pj1 or/and the furnace wire pitch Pj2 of each subarea, thereby realizing uniform control of the temperature of the silicon wafer group.

Description

Asymmetric wire winding structure and thermal field temperature control method
Technical Field
The invention belongs to the field of photovoltaics, and relates to an asymmetric wire winding structure and a thermal field temperature control method.
Background
The resistance furnace is an important core device for manufacturing the solar cell, the temperature of the silicon wafer is required to be as uniform as possible when the silicon wafer is subjected to various processes in the furnace, and the resistance furnace is a heat source for reaction of the silicon wafer, so that the winding and layout of electric furnace wires in the resistance furnace are particularly important.
In the manufacturing and designing process of the resistance furnace, in order to make the internal thermal field uniform, the most common method in the prior art is to achieve the most uniform furnace wire winding, layout, pitch and other aspects as far as possible, however, in the production process, because the layout of the product placed in the furnace is asymmetric, the distance between the product and the furnace wire is different, the load of each place is not uniformly arranged, and the temperatures of different parts of the product are obviously different after the furnace wire is heated.
In the continuous pursuit of product performance, the influence of temperature difference of different parts of a product on the performance of a silicon chip is gradually shown, and the problem that the thermal field of a conventional wire winding structure is difficult to process is solved effectively.
Disclosure of Invention
The invention provides an asymmetric wire winding structure and a thermal field temperature control method in order to overcome the defects of the prior art.
In order to achieve the purpose, the invention adopts the following technical scheme: the asymmetric wire winding structure is characterized by comprising a furnace wire, wherein the furnace wire is composed of a furnace opening auxiliary heating area furnace wire, a constant temperature area furnace wire and a furnace tail auxiliary heating area furnace wire, the furnace opening auxiliary heating area furnace wire, the constant temperature area furnace wire and the furnace tail auxiliary heating area furnace wire are respectively composed of a plurality of temperature area furnace wires in the axial direction, at least one temperature area furnace wire is composed of at least two groups of subareas, the furnace wires of all subareas are distributed unevenly, the furnace wire uneven distribution is controlled to comprise the density of the furnace wires of all subareas or/and the furnace wire diameters of all subareas or/and the furnace wire quantity of all subareas, the furnace wires distributed unevenly control the power of all subareas, and the power controls the temperature of the area where each subarea is located.
Further, the method comprises the following steps of; the furnace wire adopts horizontal or/and vertical setting, the district's quantity of temperature zone furnace wire in the circumferencial direction of the hot area furnace wire is assisted to the fire door of furnace wire, thermostatic zone furnace wire and stove tail hot area furnace wire sets up to four groups, including upper end, right-hand member portion, lower tip and left end portion, according to the temperature setting upper end, right-hand member portion, each subregion of furnace wire density or/and each subregion's furnace wire footpath or/and each subregion's furnace wire quantity in silicon chip group upper portion silicon chip, middle part silicon chip and lower part silicon chip place region, upper end control silicon chip group upper portion silicon chip place region's temperature, the lower tip controls the regional temperature in silicon chip group lower part silicon chip place region, right-hand member portion and left end control silicon chip group middle part silicon chip place region's temperature.
Further, the method comprises the following steps of; the furnace wire density is controlled by the power, the furnace wire density is controlled by the value of the distance Pj1 between adjacent furnace wires of each subarea or/and the value of the pitch Pj2 of the furnace wires of each subarea, the upper end part, the lower end part, the right end part and the left end part are connected by one or more circuits, and the temperature values of the areas where the upper end part, the right end part, the lower end part and the left end part are positioned synchronously reach the set temperature value by controlling the layout density of the furnace wires of each subarea.
Further, the method comprises the following steps of; the power of each subarea is in direct proportion to the heat capacity distribution proportion of the silicon wafer and the carrier of each subarea, the number of the furnace wires of each subarea for density of the furnace wires of each subarea is in direct proportion to the heat capacity distribution proportion of the silicon wafer and the carrier, the diameter of the furnace wire of each subarea is in inverse proportion to the heat capacity distribution proportion of the silicon wafer and the carrier, the heat capacity distribution proportion of the silicon wafer and the carrier is set according to the shape and the material of the carrier in actual production, and the temperature of the area where each subarea is located is controlled to synchronously reach the set temperature value.
Further, the method comprises the following steps of; the partitions of at least one group are divided into at least two groups of blocks, one part of the blocks in each group is connected with other partition circuits, and the other part of the blocks is connected with a fine tuning circuit, so that the temperature of the area where each block is located is controlled through the fine tuning circuit.
The method controls the circuit power of each subarea by furnace wires which are distributed unevenly in each subarea, and the circuit power controls the temperature of each subarea of the furnace wires of each temperature area respectively to control the temperature of the whole resistance furnace.
Further, the method comprises the following steps;
(1) setting a target temperature value reached by a region where a silicon wafer group is located in a thermal field;
(2) confirming the difference value between the area temperature value of the area where each partition is located and the target temperature value and the heat capacity distribution proportion of the silicon chip and the carrier;
(3) confirming the distribution rule of the temperature values of each subarea according to the difference value and the heat capacity distribution proportion;
(4) confirming the relationship between the furnace wire and the temperature change according to the temperature distribution rule;
(5) according to the relation of temperature change, determining the percentage of the furnace wires which are distributed unevenly among the subareas;
(6) the temperature of the furnace wires in one group of temperature zones is controlled through the steps 1-5, and the temperature of the furnace wires in other temperature zones is synchronously controlled through the steps in sequence.
In conclusion, the invention has the advantages that:
1) the invention controls the temperature of the furnace wires in the temperature areas of the furnace wire in the furnace mouth auxiliary heating area, the furnace wire in the constant temperature area and the furnace wire in the furnace tail auxiliary heating area, thereby ensuring the uniformity of the integral temperature of products in the furnace and greatly improving the temperature control capability.
2) The furnace wires of at least one group of temperature zones are subdivided into at least 2 subareas, each subarea is used for correspondingly distributing the density of the furnace wires, and the density of the furnace wires is distributed through the space Pj1 between the adjacent furnace wires of each subarea or/and the pitch Pj2 of the furnace wires of each subarea, so that the silicon wafer group is in an optimized temperature field, and the uniform control of the temperature of the silicon wafer group is realized.
3) And each subarea of the invention carries out corresponding layout on the wire diameter of the furnace wire, so that the silicon wafer group is in an optimized temperature field, thereby realizing uniform control of the temperature of the silicon wafer group.
4) And each subarea of the invention carries out corresponding layout on the number of furnace wires, so that the silicon wafer group is in an optimized temperature field, thereby realizing uniform control on the temperature of the silicon wafer group.
5) Each temperature zone of the invention contains a plurality of subareas, thus being convenient for installation and control.
6) At least one group of partitions is divided into at least two groups of blocks, and the blocks are connected with the fine tuning circuit, so that the power of each partition can be finely tuned conveniently, and the uniform control of the temperature of the silicon wafer group is realized.
Drawings
FIG. 1 is a schematic view of the silicon wafer assembly of the present invention.
Fig. 2 is a first schematic view of the transverse arrangement of the furnace wires according to the first embodiment of the invention.
Fig. 3 is a schematic diagram of the transverse arrangement of the furnace wires in the first embodiment of the invention.
Fig. 4 is a first schematic view of the longitudinal arrangement of furnace wires according to a first embodiment of the present invention.
Fig. 5 is a second schematic view of the longitudinal arrangement of furnace wires in the first embodiment of the invention.
Fig. 6 is a first furnace wire arrangement diagram in the second embodiment of the present invention.
Fig. 7 is a second furnace wire arrangement schematic diagram in the second embodiment of the invention.
Fig. 8 is a third schematic view of the arrangement of furnace wires in the second embodiment of the present invention.
Fig. 9 is a first schematic diagram of the number arrangement of the furnace filaments in the fourth embodiment of the present invention.
The labels in the figure are: the silicon wafer group comprises a silicon wafer group 100, an upper silicon wafer 101, a middle silicon wafer 102, a lower silicon wafer 103, a quartz tube 200, a furnace wire 300, a furnace mouth auxiliary heating area furnace wire 301, a constant temperature area furnace wire 302, a furnace tail auxiliary heating area furnace wire 303, an upper end 310, a right end 320, a lower end 330, a left end 340, a first path 350, a second path 360, a third path 370, a first path 380, a second path 390, hard heat insulation cotton 400, a shell 500, a carrier 600, a first block 3101, a second block 3102, a first area 311, a second area 312, a third area 313, a fourth area 314, a fifth area 315, a sixth area 316, a seventh area 317, an eighth area 318, a first axial area 321, a second axial area 322, a third axial area 323 and a fourth axial area 324.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict.
It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
All directional indicators (such as up, down, left, right, front, rear, lateral, longitudinal … …) in the embodiments of the present invention are only used to explain the relative positional relationship between the components, the movement, etc. in a particular posture, and if the particular posture is changed, the directional indicator is changed accordingly.
The first embodiment is as follows:
as shown in fig. 1 to 5, an asymmetric wire winding structure and a thermal field temperature control method include a furnace wire 300, where the furnace wire 300 is composed of a furnace opening auxiliary heating area furnace wire 301, a constant temperature area furnace wire 302, and a furnace tail auxiliary heating area furnace wire 303, the furnace opening auxiliary heating area furnace wire 301, the constant temperature area furnace wire 302, and the furnace tail auxiliary heating area furnace wire 303 are respectively composed of a plurality of temperature area furnace wires in an axial direction, each group of temperature area furnace wires is independent of each other, a group of temperature area furnace wires is composed of one or more furnace wires, each group of temperature area furnace wires is composed of a plurality of subareas, the furnace wires in each subarea are unevenly distributed, the unevenly distributed furnace wires control power of each subarea, and the power controls temperature of the area where each subarea is located.
In the embodiment, the furnace mouth auxiliary heating area furnace wires 301 and the furnace tail auxiliary heating area furnace wires 303 are respectively arranged in one group, and the temperature areas of the furnace mouth auxiliary heating area furnace wires 301 and the furnace tail auxiliary heating area furnace wires 303 are arranged in three groups.
As shown in fig. 1, the resistance furnace is composed of a quartz tube 200, a furnace wire 300, hard thermal insulation cotton 400 and a housing 500, the silicon wafer group 100 is composed of a plurality of horizontally arranged and stacked silicon wafers, the horizontally arranged and stacked silicon wafers are loaded into the resistance furnace along the z direction (shown in the figure coordinate), the silicon wafer group 100 is divided into three parts from top to bottom, namely an upper silicon wafer 101, a middle silicon wafer 102 and a lower silicon wafer 103, in this embodiment, the furnace wire 300 is arranged in a transverse direction (shown in fig. 2 and 3), a longitudinal direction (shown in fig. 4 and 5) or other manners, as shown in fig. 3, the number of temperature zone furnace wires of the furnace mouth auxiliary heat zone furnace wire 301, the constant temperature zone furnace wire 302 and the furnace tail auxiliary heat zone furnace wire 303 is set into four groups in the circumferential direction, namely an upper end part 310, a right end part 320, a lower end part 330 and a left end part 340, the upper end part 310 is located right above the silicon wafer group 100, the right end part 320, the lower end portion 330 is located right below the silicon wafer assembly 100, the left end portion 340 is located right left and located right left of the silicon wafer assembly 100, the upper end portion 310, the lower end portion 330, the right end portion 320 and the left end portion 340 are connected with one or more circuits, the density of the furnace wires in the four groups of the upper end portion 310, the right end portion 320, the lower end portion 330 and the left end portion 340 is controlled by the value of the pitch Pj1 (the pitch of the same furnace wire is consistent in the embodiment, and the pitch of at least one furnace wire is different from the pitch of other furnace wires) of different furnace wires in each group, and the pitch Pj2 (the pitch of the same furnace wire is consistent in the embodiment, and the pitch of at least one furnace wire is different from the pitch of other furnace wires) of different furnace wires in each group, so that the circuit power of each group is controlled, and the temperature of the region where each.
In order to further fine-tune the power of each partition to ensure the temperature uniformity of the temperature field, at least one group of partitions is divided into at least two groups of blocks, and part or all of the blocks are connected with a fine tuning circuit, as shown in fig. 5, the upper end portion 310 is composed of a first block 3101 and a second block 3102, the first block 3101 or/and the second block 3102 are/is connected with the fine tuning circuit, and the fine tuning circuit controls the temperature of the area where the first block 3101 or/and the second block 3102 are/is located, so as to ensure the temperature uniformity of the area where the upper end portion 310 is located.
The furnace wires in the temperature zones of the furnace opening auxiliary heating zone furnace wire 301, the constant temperature zone furnace wire 302 and the furnace tail auxiliary heating zone furnace wire 303 of the furnace wire 300 are respectively composed of an upper end part 310, a right end part 320, a lower end part 330 and a left end part 340 which are distributed with different furnace wire densities, so that the uniformity of the whole temperature of the furnace wire 300 is ensured, and the temperature control capability is greatly improved.
Example two:
as shown in fig. 6-8, the present embodiment is different from the first embodiment in that the density of the furnace wires is controlled by the spacing and pitch between different furnace wires in the first embodiment, and the density of the furnace wires is controlled by the spacing and pitch in one furnace wire in the present embodiment.
As shown in fig. 6, according to the temperature difference of different parts of the product in the thermal field, the number of the partitions of one furnace wire in the circumferential direction is set into a plurality of groups, the number of the furnace wire pitches of the adjacent partitions is different, so that the temperature of the area where each partition is located synchronously reaches the set temperature value, and the speed of reaching the set temperature is increased, taking fig. 6 as an example, the number of the partitions of one furnace wire is set into eight groups, namely, the number of the pitches Pj31 of the first, third, fifth and seventh areas 311, 312, 313, 314, 315, 316, seventh and 318 is different from the number of the pitches Pj32 of the second, fourth, 316 and eighth areas 318, the pitch value is set according to the power of each partition, the partition pitch value of the low temperature area is low, the partition value of the high temperature area is high, in fig. 6, the value of the pitch Pj31 is higher than that of the pitch Pj32, so that the temperature of each subarea of the furnace wire can quickly reach the set temperature value synchronously.
As shown in fig. 7, a furnace wire is wound in a plurality of coils in the axial direction, and according to the temperature difference of different parts of a product in a thermal field, a furnace wire is composed of at least two groups of partitions in the axial direction, the pitch values of the furnace wire in the two groups of partitions are different, so that the temperature of the area where each partition is located synchronously reaches a set temperature value, and the speed of reaching the set temperature is increased.
As shown in fig. 8, a plurality of coils of furnace wire are axially wound, and according to the temperature difference of different parts of the product in the thermal field, one furnace wire is axially composed of at least two groups of partitions, the furnace wire pitch values of the two groups of partitions are different, so that the temperature of the area where each partition is located synchronously reaches a set temperature value, and the speed of reaching the set temperature is increased.
In this embodiment, the function of controlling the density of the furnace wires by a plurality of furnace wires is realized by one furnace wire.
Example three:
the difference between this embodiment and the first embodiment is that in the first embodiment, the power of each partition is controlled by distributing different furnace wires in each partition, and the temperature of the area where each partition is located is controlled, and in this embodiment, the power of each partition is controlled by distributing furnace wires with different wire diameters in each partition, and the temperature of the area where each partition is located is controlled.
Example four:
as shown in fig. 9, the present embodiment is different from the above-mentioned embodiments in that in the first embodiment, the power of each zone is controlled by distributing different furnace wires in each zone, and the temperature of the zone where each zone is located is controlled, and in the second embodiment, the power of each zone is controlled by distributing furnace wires with different wire diameters in each zone, and the temperature of the zone where each zone is located is controlled, whereas in the present embodiment, the power of each zone is controlled by distributing different numbers of furnace wires in each zone, and the temperature of the zone where each zone is located is controlled.
In addition, in other embodiments, at least one group of temperature zone furnace wires of the furnace wire 300, namely the furnace opening auxiliary heating zone furnace wire 301, the constant temperature zone furnace wire 302 and the furnace tail auxiliary heating zone furnace wire 303, is composed of at least two groups of subareas.
In other embodiments, the silicon wafers may be loaded into the resistance furnace in a vertical arrangement, an inclined arrangement, or other arrangements.
In other embodiments, the uneven distribution of the furnace wires of each subarea adopts a part or all of three modes of density of the furnace wires of each subarea, diameter of the furnace wires of each subarea and quantity of the furnace wires of each subarea.
The invention also provides a thermal field temperature control method, which controls the circuit power of each subarea through furnace wires which are distributed unevenly in each subarea in the embodiment, ensures that the silicon wafer group 100 meets the temperature requirement in each subarea, and simultaneously controls the temperature of the furnace wires in each temperature area, and ensures the integral temperature of the resistance furnace.
According to the invention, the specific operating method is as follows:
(1) setting a target temperature value reached by a region where the silicon wafer group 100 is located in the thermal field;
(2) confirming the difference value between the area temperature value of the area where each partition is located and the target temperature value and the heat capacity distribution proportion of the silicon chip 100 and the carrier 600;
the superposed silicon wafer group 100 has different temperatures of the upper silicon wafer 101, the middle silicon wafer 102 and the lower silicon wafer 103 due to different placing modes, and the temperatures of the areas of the upper silicon wafer 101, the middle silicon wafer 102 and the lower silicon wafer 103 are recorded as area temperature values;
as shown in fig. 2 to 3, the carrier 600 is a carrier for supporting a silicon wafer, and the heat capacity distribution ratio of the silicon wafer 100 and the carrier 600 is set according to the shape and material of the carrier 600 in actual production;
(3) confirming the distribution rule of the temperature values of each subarea according to the difference value and the heat capacity distribution proportion;
when the difference value between the zone temperature value of the partition and the target temperature value is a negative value, namely the zone temperature value of the partition is smaller than the target temperature value; when the difference value between the zone temperature value of the zone and the target temperature value is a positive value, namely the zone temperature value of the zone is greater than the target temperature value, and then the difference value between the zone temperature value of each zone and the target temperature value and the proportional relation between the zone temperature values of each zone are confirmed;
(4) confirming the relationship between the furnace wire and the temperature change according to the temperature distribution rule;
setting furnace wire data as reference data, wherein the temperature value of a subarea is lower than a target temperature value, and in order to enable the temperature value of the subarea to reach the target temperature value, the furnace wires of the subareas are increased in density or/and reduced in wire diameter or/and increased in quantity in proportion; the temperature value of the area of each subarea is larger than the target temperature value, in order to enable the temperature value of the area of each subarea to reach the target temperature value, the furnace wires of each subarea are proportionally reduced in density or/and increased in wire diameter or/and reduced in quantity, and the proportion of the density, the wire diameter and the quantity of the furnace wires of each subarea is confirmed, so that the temperature value of the area of each subarea synchronously reaches the target temperature value;
(5) according to the relation of temperature change, determining the percentage of the furnace wires which are distributed unevenly among the subareas;
according to the first embodiment, the arrangement mode of the furnace wires comprises two modes, wherein one mode is to control the distance Pj1 between adjacent different furnace wires of each subarea, and the other mode is to control the pitch Pj2 of different furnace wires of each subarea; taking the density of the furnace wires at the left end 340 as a reference density, the heat capacity distribution ratio of the silicon wafer 100 and the carrier 600 is set as C, the density of the furnace wires at the left end 340 is set as Cp, the right end 320, the upper end 310 and the lower end 330 are proportionally increased or decreased according to the power ratio of each partition, and the density of the furnace wires can be increased or decreased in other proportions according to the actual operation requirement;
according to the second embodiment, one furnace wire is composed of at least two groups of subareas in the circumferential direction or/and the axial direction, the density of the furnace wire is controlled by the furnace wire pitch Pj3 or/and the furnace wire pitch Pj4 of each group of subareas, the reference density ρ is the minimum furnace wire density subarea, the density of the furnace wires in other areas is proportionally increased on the reference density ρ, and the proportion is set according to actual operation requirements.
According to the third embodiment, taking the wire diameter of the furnace at the left end 340 as the reference wire diameter as an example, the heat capacity distribution ratio of the silicon wafer 100 and the carrier 600 is set as C, the wire diameter of the furnace at the upper end 310 is set as CD, the right end 320, the upper end 310 and the lower end 330 are proportionally increased or decreased according to the power ratio of each partition, and the wire diameter value can be increased or decreased by other ratios according to the actual operation requirement;
according to the fourth embodiment, taking the number of the furnace wires at the left end 340 as a reference number, the heat capacity distribution ratio of the silicon wafer 100 and the carrier 600 is set as C, the number of the furnace wires at the upper end 310 is set as CS, the right end 320, the upper end 310 and the lower end 330 are proportionally increased or decreased according to the power ratio of each partition, and the number of the furnace wires can be increased or decreased by other proportions according to the actual operation requirement;
(6) the temperature of the furnace wires in one group of temperature zones is controlled through the steps 1-5, and the temperature of the furnace wires in other temperature zones is synchronously controlled through the steps in sequence.
It is to be understood that the described embodiments are merely a few embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Claims (7)

1. An asymmetric wire winding structure is characterized in that: the furnace wire comprises a furnace wire, wherein the furnace wire comprises a furnace opening auxiliary heating area furnace wire, a constant temperature area furnace wire and a furnace tail auxiliary heating area furnace wire, the furnace opening auxiliary heating area furnace wire, the constant temperature area furnace wire and the furnace tail auxiliary heating area furnace wire are respectively composed of a plurality of groups of temperature area furnace wires in the axial direction, at least one group of temperature area furnace wire is composed of at least two groups of subareas, the furnace wires of each subarea are unevenly distributed, the furnace wire unevenly distributed is controlled to comprise the density of the furnace wires of each subarea or/and the diameter of the furnace wires of each subarea or/and the number of the furnace wires of each subarea, the furnace wires unevenly distributed control the power of each subarea, and the power controls the temperature of the area where each subarea is located.
2. An asymmetric filament winding structure according to claim 1, wherein: the furnace wire adopts horizontal or/and vertical setting, the district's quantity of temperature zone furnace wire in the circumferencial direction of the hot area furnace wire is assisted to the fire door of furnace wire, thermostatic zone furnace wire and stove tail hot area furnace wire sets up to four groups, including upper end, right-hand member portion, lower tip and left end portion, according to the temperature setting upper end, right-hand member portion, each subregion of furnace wire density or/and each subregion's furnace wire footpath or/and each subregion's furnace wire quantity in silicon chip group upper portion silicon chip, middle part silicon chip and lower part silicon chip place region, upper end control silicon chip group upper portion silicon chip place region's temperature, the lower tip controls the regional temperature in silicon chip group lower part silicon chip place region, right-hand member portion and left end control silicon chip group middle part silicon chip place region's temperature.
3. An asymmetric filament winding structure according to claim 1, wherein: the density of the furnace wires is controlled by the distance value of different furnace wires adjacent to each subarea or/and the distance value of the same furnace wire or/and the pitch value of different furnace wires of each subarea or/and the pitch value in the same furnace wire, the upper end part, the lower end part, the right end part and the left end part are connected by one or more circuits, the temperature values of the areas where the upper end part, the right end part, the lower end part and the left end part are positioned synchronously reach the set temperature value by controlling the layout density of each subarea furnace wire, the furnace wire density is controlled by the numerical value of the distance Pj1 between the adjacent furnace wires of each subarea or/and the numerical value of the pitch Pj2 of each subarea furnace wire, the upper end part, the lower end part, the right end part and the left end part are connected by one or more circuits, by controlling the layout density of the furnace wires of each subarea, the temperature values of the areas where the upper end part, the right end part, the lower end part and the left end part are positioned synchronously reach the set temperature values.
4. An asymmetric filament winding structure according to claim 1, wherein: the power of each subarea is in direct proportion to the heat capacity distribution proportion of the silicon wafer and the carrier of each subarea, the number of the furnace wires of each subarea for density of the furnace wires of each subarea is in direct proportion to the heat capacity distribution proportion of the silicon wafer and the carrier, the diameter of the furnace wire of each subarea is in inverse proportion to the heat capacity distribution proportion of the silicon wafer and the carrier, the heat capacity distribution proportion of the silicon wafer and the carrier is set according to the shape and the material of the carrier in actual production, and the temperature of the area where each subarea is located is controlled to synchronously reach the set temperature value.
5. An asymmetric filament winding structure according to claim 1, wherein: at least one group of the partitions is divided into at least two groups of blocks, and part of the blocks are connected with the fine tuning circuit, and the temperature of the area where each block is located is controlled through the fine tuning circuit.
6. A thermal field temperature control method is characterized in that circuit power of each subarea is controlled by furnace wires which are distributed unevenly in each subarea according to any one of claims 1 to 5, the circuit power controls the temperature of each subarea of the furnace wires of each temperature area respectively, and the temperature of the whole resistance furnace is controlled.
7. An asymmetric filament winding arrangement according to claim 6, comprising the steps of:
(1) setting a target temperature value reached by a region where a silicon wafer group is located in a thermal field;
(2) confirming the difference value between the area temperature value of the area where each partition is located and the target temperature value and the heat capacity distribution proportion of the silicon chip and the carrier;
(3) confirming the distribution rule of the temperature values of each subarea according to the difference value and the heat capacity distribution proportion;
(4) confirming the relationship between the furnace wire and the temperature change according to the temperature distribution rule;
(5) according to the relation of temperature change, determining the percentage of the furnace wires which are distributed unevenly among the subareas;
(6) the temperature of the furnace wires in one group of temperature zones is controlled through the steps 1-5, and the temperature of the furnace wires in other temperature zones is synchronously controlled through the steps in sequence.
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CN101776295A (en) * 2009-12-31 2010-07-14 深圳市创荣发电子有限公司 Method and system for controlling temperature of furnace and furnace
CN102466412A (en) * 2010-11-17 2012-05-23 中国科学院空间科学与应用研究中心 Integrated control system and method of multi-temperature-area furnace
CN202533823U (en) * 2012-03-20 2012-11-14 深圳市大族光伏科技股份有限公司 Temperature control system
CN102927830A (en) * 2012-11-01 2013-02-13 西安电炉研究所有限公司 Measurement and control system with discriminative tracking for temperature of high-temperature resistance furnace and monitoring method thereof
CN104962727A (en) * 2015-07-29 2015-10-07 上海宝钢节能环保技术有限公司 Continuous annealing furnace heating section furnace-temperature control system and method
CN110527984A (en) * 2019-08-29 2019-12-03 北京北方华创微电子装备有限公司 Heating furnace body and semiconductor equipment

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101776295A (en) * 2009-12-31 2010-07-14 深圳市创荣发电子有限公司 Method and system for controlling temperature of furnace and furnace
CN102466412A (en) * 2010-11-17 2012-05-23 中国科学院空间科学与应用研究中心 Integrated control system and method of multi-temperature-area furnace
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