CN112512146B - Thermal field temperature control method - Google Patents
Thermal field temperature control method Download PDFInfo
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- CN112512146B CN112512146B CN202011408624.9A CN202011408624A CN112512146B CN 112512146 B CN112512146 B CN 112512146B CN 202011408624 A CN202011408624 A CN 202011408624A CN 112512146 B CN112512146 B CN 112512146B
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B3/00—Ohmic-resistance heating
- H05B3/62—Heating elements specially adapted for furnaces
- H05B3/64—Heating elements specially adapted for furnaces using ribbon, rod, or wire heater
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B1/00—Details of electric heating devices
- H05B1/02—Automatic switching arrangements specially adapted to apparatus ; Control of heating devices
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- H05B1/023—Industrial applications
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
The invention discloses a thermal field temperature control method, which comprises a furnace wire, wherein the furnace wire is composed of a furnace opening auxiliary heat area furnace wire, a constant temperature area furnace wire and a furnace tail auxiliary heat area furnace wire, the furnace opening auxiliary heat area furnace wire, the constant temperature area furnace wire and the furnace tail auxiliary heat area furnace wire are respectively composed of a plurality of temperature area furnace wires in the axial direction, at least one temperature area furnace wire is composed of at least two groups of subareas, the furnace wires of all subareas are distributed unevenly, the furnace wire uneven distribution is controlled to comprise the furnace wire density of each subarea or/and the furnace wire diameter of each subarea or/and the furnace wire number of each subarea, the furnace wires distributed unevenly control the power of each subarea, and the temperature of the area where each subarea is located is controlled by the power.
Description
Technical Field
The invention belongs to the field of photovoltaics, and relates to a thermal field temperature control method.
Background
The resistance furnace is an important core device for manufacturing the solar cell, the temperature of the silicon wafer is required to be as uniform as possible when the silicon wafer is subjected to various processes in the furnace, and the resistance furnace is a heat source for reaction of the silicon wafer, so that the winding and layout of electric furnace wires in the resistance furnace are particularly important.
In the manufacturing and designing process of the resistance furnace, in order to make the internal thermal field uniform, the most common method in the prior art is to make the furnace wire winding, layout, pitch and other aspects as uniform as possible, however, in the production process, because the layout of the product placed in the furnace is asymmetric, the distance between the product and the furnace wire is different, the load of each place is not uniformly arranged, and after the furnace wire is heated, the temperatures of different parts of the product are obviously different.
In the continuous pursuit of product performance, the influence of temperature difference of different parts of a product on the performance of a silicon chip is gradually shown, and the problem that the thermal field of a conventional wire winding structure is difficult to process is solved effectively.
Disclosure of Invention
The invention provides a thermal field temperature control method for overcoming the defects of the prior art.
1. In order to achieve the purpose, the invention adopts the following technical scheme: a thermal field temperature control method controls circuit power of each subarea by furnace wires which are distributed unevenly in each subarea of an asymmetric wire winding structure, the asymmetric wire winding structure comprises the furnace wires, the furnace wires are composed of furnace mouth auxiliary hot area furnace wires, constant temperature area furnace wires and furnace tail auxiliary hot area furnace wires, the furnace mouth auxiliary hot area furnace wires, the constant temperature area furnace wires and the furnace tail auxiliary hot area furnace wires are respectively composed of a plurality of groups of temperature area furnace wires in the axial direction, at least one group of temperature area furnace wires is composed of at least two groups of subareas, the furnace wires of each subarea are distributed unevenly, the furnace wire uneven distribution is controlled to comprise furnace wire density of each subarea or/and furnace wire diameter of each subarea or/and furnace wire number of each subarea, the furnace wires distributed unevenly control power of each subarea, the power controls temperature of the area where each subarea is located, the circuit power controls temperature of each subarea of each furnace wire temperature area, and controls the whole temperature of a resistance furnace, and comprises the following steps:
(1) Setting a target temperature value reached by a region where a silicon wafer group is located in a thermal field;
(2) Confirming the difference value between the area temperature value of the area where each partition is located and the target temperature value and the heat capacity distribution proportion of the silicon chip and the carrier;
(3) Confirming the distribution rule of the temperature values of each subarea according to the difference value and the heat capacity distribution proportion;
(4) Confirming the relationship between the furnace wire and the temperature change according to the distribution rule of the temperature;
(5) According to the relation of temperature change, confirming the percentage of non-equal distribution furnace wires among all the subareas;
(6) The temperature of the furnace wires in one group of temperature zones is controlled through the steps 1-5, and the temperature of the furnace wires in other temperature zones is synchronously controlled through the steps in sequence.
Further, the method comprises the following steps of; the furnace wire adopts horizontal or/and vertical setting, the district's quantity of temperature zone furnace wire in the circumferencial direction of the hot area furnace wire is assisted to the fire door of furnace wire, thermostatic zone furnace wire and stove tail hot area furnace wire sets up to four groups, including upper end, right-hand member portion, lower tip and left end portion, according to the temperature setting upper end, right-hand member portion, each subregion of furnace wire density or/and each subregion's furnace wire footpath or/and each subregion's furnace wire quantity in silicon chip group upper portion silicon chip, middle part silicon chip and lower part silicon chip place region, upper end control silicon chip group upper portion silicon chip place region's temperature, the lower tip controls the regional temperature in silicon chip group lower part silicon chip place region, right-hand member portion and left end control silicon chip group middle part silicon chip place region's temperature.
Further, the method comprises the following steps of; the furnace wire density is controlled by the power, the furnace wire density is controlled by the numerical value of the interval Pj1 between adjacent furnace wires of each subarea or/and the numerical value of the pitch Pj2 of the furnace wires of each subarea, the upper end part, the lower end part, the right end part and the left end part are connected by one or more circuits, and the temperature values of the areas where the upper end part, the right end part, the lower end part and the left end part are positioned synchronously reach the set temperature value by controlling the layout density of the furnace wires of each subarea.
Further, the method comprises the following steps of; the power of each subarea is in direct proportion to the heat capacity distribution proportion of the silicon wafer and the carrier of each subarea, the number of the furnace wires of each subarea for density of the furnace wires of each subarea is in direct proportion to the heat capacity distribution proportion of the silicon wafer and the carrier, the diameter of the furnace wire of each subarea is in inverse proportion to the heat capacity distribution proportion of the silicon wafer and the carrier, the heat capacity distribution proportion of the silicon wafer and the carrier is set according to the shape and the material of the carrier in actual production, and the temperature of the area where each subarea is located is controlled to synchronously reach the set temperature value.
Further, the method comprises the following steps of; the partitions of at least one group are divided into at least two groups of blocks, one part of the blocks in each group is connected with other partition circuits, and the other part of the blocks is connected with a fine tuning circuit, so that the temperature of the area where each block is located is controlled through the fine tuning circuit.
In conclusion, the invention has the advantages that:
1) The invention controls the temperature of the furnace wire in the furnace mouth auxiliary heating area, the furnace wire in the constant temperature area and the furnace wire in the furnace tail auxiliary heating area, thereby ensuring the uniformity of the integral temperature of the product in the furnace and greatly improving the temperature control capability.
2) The invention subdivides at least one group of temperature zone furnace wires into at least 2 subareas, each subarea carries out corresponding layout on the density of the furnace wires, and the density of the furnace wires is arranged through the space Pj1 between the adjacent furnace wires of each subarea or/and the pitch Pj2 of the furnace wires of each subarea, the layout modes are various, so that the silicon wafer group is in an optimized temperature field, and the uniform control of the temperature of the silicon wafer group is realized.
3) And each subarea of the invention carries out corresponding layout on the wire diameter of the furnace wire, so that the silicon wafer group is in an optimized temperature field, thereby realizing uniform control of the temperature of the silicon wafer group.
4) And each subarea of the invention carries out corresponding layout on the number of furnace wires, so that the silicon wafer group is in an optimized temperature field, thereby realizing uniform control on the temperature of the silicon wafer group.
5) Each temperature zone of the invention contains a plurality of subareas, thus being convenient for installation and control.
6) At least one group of partitions is divided into at least two groups of blocks, and the blocks are connected with the fine tuning circuit, so that the power of each partition can be finely tuned conveniently, and the uniform control of the temperature of the silicon wafer group is realized.
Drawings
FIG. 1 is a schematic view of the silicon wafer assembly of the present invention.
Fig. 2 is a first schematic view of the transverse arrangement of the furnace wires according to the first embodiment of the present invention.
Fig. 3 is a schematic diagram of the transverse arrangement of the furnace wires in the first embodiment of the invention.
Fig. 4 is a first schematic view of the longitudinal arrangement of the furnace wires according to the first embodiment of the present invention.
Fig. 5 is a second schematic view of the longitudinal arrangement of furnace wires in the first embodiment of the invention.
Fig. 6 is a first furnace wire arrangement diagram in the second embodiment of the present invention.
Fig. 7 is a second furnace wire arrangement schematic diagram in the second embodiment of the invention.
Fig. 8 is a third schematic view of the arrangement of furnace wires in the second embodiment of the present invention.
Fig. 9 is a first schematic diagram of the number arrangement of the furnace filaments in the fourth embodiment of the present invention.
The labels in the figure are: the silicon wafer group comprises a silicon wafer group 100, an upper silicon wafer 101, a middle silicon wafer 102, a lower silicon wafer 103, a quartz tube 200, a furnace wire 300, a furnace mouth auxiliary heating area furnace wire 301, a constant temperature area furnace wire 302, a furnace tail auxiliary heating area furnace wire 303, an upper end 310, a right end 320, a lower end 330, a left end 340, a first path 350, a second path 360, a third path 370, a first path 380, a second path 390, hard heat insulation cotton 400, a shell 500, a carrier 600, a first block 3101, a second block 3102, a first area 311, a second area 312, a third area 313, a fourth area 314, a fifth area 315, a sixth area 316, a seventh area 317, an eighth area 318, a first axial area 321, a second axial area 322, a third axial area 323 and a fourth axial area 324.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict.
It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, and the type, amount and proportion of each component in actual implementation can be changed freely, and the layout of the components can be more complicated.
In the embodiment of the present invention, all directional indicators (such as up, down, left, right, front, rear, lateral, longitudinal \8230;) are used only to explain the relative positional relationship between the respective members, the movement, and the like in a specific posture, and if the specific posture is changed, the directional indicators are changed accordingly.
The first embodiment is as follows:
as shown in fig. 1 to 5, an asymmetric wire winding structure includes a furnace wire 300, the furnace wire 300 is composed of a furnace opening auxiliary heating area furnace wire 301, a constant temperature area furnace wire 302 and a furnace tail auxiliary heating area furnace wire 303, the furnace opening auxiliary heating area furnace wire 301, the constant temperature area furnace wire 302 and the furnace tail auxiliary heating area furnace wire 303 are respectively composed of a plurality of temperature area furnace wires in the axial direction, each group of temperature area furnace wires are independent from each other, a group of temperature area furnace wires are composed of one or more furnace wires, each group of temperature area furnace wires is composed of a plurality of subareas, the furnace wires in each subarea are unevenly distributed to control the power of each subarea, and the power controls the temperature of the area where each subarea is located.
In the embodiment, the furnace mouth auxiliary heating area furnace wires 301 and the furnace tail auxiliary heating area furnace wires 303 are respectively arranged in one group, and the temperature areas of the furnace mouth auxiliary heating area furnace wires 301 and the furnace tail auxiliary heating area furnace wires 303 are arranged in three groups.
As shown in fig. 1, the resistance furnace is composed of a quartz tube 200, a furnace wire 300, hard heat-insulating cotton 400 and a shell 500, the silicon wafer group 100 is composed of a plurality of horizontally arranged and stacked silicon wafers, the horizontally arranged and stacked silicon wafers are loaded into the resistance furnace along the z direction (shown in a coordinate), the silicon wafer group 100 is divided into three parts from top to bottom, namely an upper silicon wafer 101, a middle silicon wafer 102 and a lower silicon wafer 103, in this embodiment, the furnace wire 300 is arranged in a transverse direction (shown in fig. 2 and 3), a longitudinal direction (shown in fig. 4 and 5) or other manners, as shown in fig. 3, the number of temperature zone furnace wires of the furnace mouth auxiliary heat zone furnace wire 301, the constant temperature zone furnace wire 302 and the furnace tail auxiliary heat zone furnace wire 303 is set into four groups in the circumferential direction, namely an upper end part 310, a right end part 320, a lower end part 330 and a left end part 340, the upper end part 310 is located right above the silicon wafer group 100, the right end portion 320 is located right and right of the silicon wafer assembly 100, the lower end portion 330 is located right below and right below the silicon wafer assembly 100, the left end portion 340 is located right and left of the silicon wafer assembly 100, the upper end portion 310, the lower end portion 330, the right end portion 320 and the left end portion 340 are connected with one or more circuits, the density of the furnace wires in the four divided regions of the upper end portion 310, the right end portion 320, the lower end portion 330 and the left end portion 340 is controlled by the value of the pitch Pj1 of the adjacent different furnace wires in each divided region (the pitch of the same furnace wire in this embodiment is the same, and the pitch of at least one furnace wire is different from the pitch of other furnace wires in this embodiment) and the value of the pitch Pj2 of the different furnace wires in each divided region (the pitch of the same furnace wire in this embodiment is the same, and the pitch of at least one furnace wire is different from the pitch of other furnace wires), so as to control the circuit power of each divided region, the temperature of the zone in which each zone is located is controlled.
In order to further perform fine adjustment on the power of each partition to ensure the uniformity of the temperature field, at least one group of partitions is divided into at least two groups of blocks, and part or all of the blocks are connected with a fine adjustment circuit, as shown in fig. 5, the upper end portion 310 is composed of a first block 3101 and a second block 3102, the first block 3101 or/and the second block 3102 are/is connected with the fine adjustment circuit, and the fine adjustment circuit controls the temperature of the region where the first block 3101 or/and the second block 3102 are/is located, so as to ensure the uniformity of the temperature of the region where the upper end portion 310 is located.
The furnace wires in the temperature areas of the furnace wire 300, namely the furnace wire 301 in the furnace mouth auxiliary heating area, the furnace wire 302 in the constant temperature area and the furnace wire 303 in the furnace tail auxiliary heating area, are respectively formed by an upper end part 310, a right end part 320, a lower end part 330 and a left end part 340 which are distributed with different furnace wire densities, so that the uniformity of the overall temperature of the furnace wire 300 is ensured, and the temperature control capability is greatly improved.
Example two:
as shown in fig. 6-8, the present embodiment is different from the first embodiment in that the density of the furnace wires is controlled by the spacing and pitch between different furnace wires in the first embodiment, and the density of the furnace wires is controlled by the spacing and pitch in one furnace wire in the present embodiment.
As shown in fig. 6, according to the temperature difference of different parts of the product in the thermal field, the number of the zones of one furnace wire in the circumferential direction is set into a plurality of groups, and the number of the furnace wire pitches of adjacent zones is different, so that the temperature of the zone where each zone is located synchronously reaches the set temperature value, and the speed of reaching the set temperature is increased, taking fig. 6 as an example, the number of the zones of one furnace wire is set into eight groups, which are respectively the number of the pitches Pj31 of the first zone 311, the second zone 312, the third zone 313, the fourth zone 314, the fifth zone 315, the sixth zone 316, the seventh zone 317 and the eighth zone 318, the number of the pitches Pj31 of the first zone 311, the third zone 313, the fifth zone 315 and the seventh zone is different from the number of the pitches Pj32 of the second zone 312, the fourth zone 314, the sixth zone 316 and the eighth zone 318, and the pitch Pj32 of each zone is set according to the power of each zone, the pitch values are set, the zone pitch values of the zones are low zone pitch value and the zone pitch value of the high, and the zone pitch value of the high pitch value in fig. 6 is higher than the pitch value Pj31, so that the temperature of each zone of the furnace wire quickly reaches the set temperature value synchronously.
As shown in fig. 7, a furnace wire is wound in a plurality of coils in the axial direction, and according to the temperature difference of different parts of a product in a thermal field, a furnace wire is composed of at least two groups of partitions in the axial direction, the pitch values of the furnace wire in the two groups of partitions are different, so that the temperature of the area where each partition is located synchronously reaches a set temperature value, and the speed of reaching the set temperature is increased, taking fig. 7 as an example, the number of the partitions of a furnace wire is composed of at least a first axial area 321 and a second axial area 322, the pitch Pj34 value of the first axial area 321 is different from the pitch Pj33 value of the second axial area 322, the pitch value is set according to the power of each partition, the partition pitch value of the low temperature area is low, the partition pitch value of the high temperature area is high, and in fig. 7, the pitch Pj34 value is higher than the pitch Pj33 value, so that the temperature of each partition of the furnace wire quickly and synchronously reaches the set temperature value.
As shown in fig. 8, a furnace wire is wound in a plurality of coils in an axial direction, and according to the temperature difference of different parts of a product in a thermal field, one furnace wire is composed of at least two groups of zones in the axial direction, the furnace wire pitch values of the two groups of zones are different, so that the temperature of the zone where each zone is located synchronously reaches a set temperature value, and the speed of reaching the set temperature is increased.
In this embodiment, the function of controlling the density of the furnace wires by a plurality of furnace wires is realized by one furnace wire.
Example three:
the difference between the present embodiment and the first embodiment is that in the first embodiment, the power of each partition is controlled by distributing different furnace wires in each partition, and the temperature of the area where each partition is located is further controlled, and in the present embodiment, the power of each partition is controlled by distributing furnace wires with different wire diameters in each partition, and the temperature of the area where each partition is located is further controlled.
Example four:
as shown in fig. 9, the present embodiment is different from the above-mentioned embodiments in that in the first embodiment, the power of each zone is controlled by distributing different furnace wires in each zone, and the temperature of the zone where each zone is located is controlled, and in the second embodiment, the power of each zone is controlled by distributing furnace wires with different wire diameters in each zone, and the temperature of the zone where each zone is located is controlled, whereas in the present embodiment, the power of each zone is controlled by distributing different numbers of furnace wires in each zone, and the temperature of the zone where each zone is located is controlled.
In addition, in other embodiments, at least one group of temperature zone furnace wires of the furnace wire 300, namely the furnace opening auxiliary heating zone furnace wire 301, the constant temperature zone furnace wire 302 and the furnace tail auxiliary heating zone furnace wire 303, is composed of at least two groups of subareas.
In other embodiments, the silicon wafers may be loaded into the resistance furnace in a vertical arrangement, an inclined arrangement, or other arrangements.
In other embodiments, the uneven distribution of the furnace wires of each subarea adopts a part or all of three modes of density of the furnace wires of each subarea, diameter of the furnace wires of each subarea and quantity of the furnace wires of each subarea.
The invention also provides a thermal field temperature control method, which controls the circuit power of each subarea through furnace wires which are distributed unevenly in each subarea in the embodiment, ensures that the silicon wafer group 100 meets the temperature requirement in each subarea, and simultaneously controls the temperature of the furnace wires in each temperature area, and ensures the integral temperature of the resistance furnace.
According to the invention, the specific operating method is as follows:
(1) Setting a target temperature value reached by a region where the silicon wafer group 100 is located in the thermal field;
(2) Confirming the difference value between the area temperature value of the area where each partition is located and the target temperature value and the heat capacity distribution proportion of the silicon chip 100 and the carrier 600;
the superposed silicon wafer group 100 has different temperatures of the upper silicon wafer 101, the middle silicon wafer 102 and the lower silicon wafer 103 due to different placing modes, and the temperatures of the areas of the upper silicon wafer 101, the middle silicon wafer 102 and the lower silicon wafer 103 are recorded as area temperature values;
as shown in fig. 2-3, the carrier 600 is a carrier for carrying a silicon wafer, and the heat capacity distribution ratio of the silicon wafer 100 and the carrier 600 is set according to the shape and material of the carrier 600 in actual production;
(3) Confirming the distribution rule of the temperature values of each subarea according to the difference value and the heat capacity distribution proportion;
when the difference value between the zone temperature value of the zone and the target temperature value is a negative value, namely the zone temperature value of the zone is smaller than the target temperature value; when the difference value between the zone temperature value of the zone and the target temperature value is a positive value, namely the zone temperature value of the zone is greater than the target temperature value, and then the difference value between the zone temperature value of each zone and the target temperature value and the proportional relation between the zone temperature values of each zone are confirmed;
(4) Confirming the relationship between the furnace wire and the temperature change according to the temperature distribution rule;
setting furnace wire data as reference data, wherein the regional temperature value of a subarea is smaller than a target temperature value, and in order to enable the regional temperature value of the subarea to reach the target temperature value, the subarea furnace wire increases the density or/and reduces the wire diameter or/and increases the number in proportion; the temperature value of the area of each subarea is larger than the target temperature value, in order to enable the temperature value of the area of each subarea to reach the target temperature value, the furnace wires of each subarea are proportionally reduced in density or/and increased in wire diameter or/and reduced in quantity, and the proportion of the density, the wire diameter and the quantity of the furnace wires of each subarea is confirmed, so that the temperature value of the area of each subarea synchronously reaches the target temperature value;
(5) According to the relation of temperature change, determining the percentage of the furnace wires which are distributed unevenly among the subareas;
according to the first embodiment, the arrangement modes of the furnace wires comprise two modes, wherein one mode is to control the distance Pj1 between adjacent different furnace wires of each subarea, and the other mode is to control the pitch Pj2 of different furnace wires of each subarea; taking the density of the furnace wires at the left end 340 as a reference density, the heat capacity distribution ratio of the silicon wafer 100 and the carrier 600 is set as C, the density of the furnace wires at the left end 340 is set as Cp, the right end 320, the upper end 310 and the lower end 330 are proportionally increased or decreased according to the power ratio of each partition, and the density of the furnace wires can be increased or decreased in other proportions according to the actual operation requirement;
according to the second embodiment, one furnace wire is composed of at least two groups of subareas in the circumferential direction or/and the axial direction, the density of the furnace wire is controlled by the furnace wire pitch Pj3 or/and the furnace wire pitch Pj4 of each group of subareas, the minimum furnace wire density subarea is used as the reference density rho, the furnace wire densities of other areas are proportionally increased on the reference density rho, and the proportion is set according to actual operation requirements.
According to the third embodiment, taking the wire diameter of the furnace at the left end 340 as the reference wire diameter as an example, the heat capacity distribution ratio of the silicon wafer 100 and the carrier 600 is set as C, the wire diameter of the furnace at the upper end 310 is set as CD, the right end 320, the upper end 310 and the lower end 330 are proportionally increased or decreased according to the power ratio of each partition, and the wire diameter value can be increased or decreased by other ratios according to the actual operation requirement;
according to the fourth embodiment, taking the number of the furnace wires at the left end 340 as a reference number, the heat capacity distribution ratio of the silicon wafer 100 and the carrier 600 is set as C, the number of the furnace wires at the upper end 310 is set as CS, the right end 320, the upper end 310 and the lower end 330 are proportionally increased or decreased according to the power ratio of each partition, and the number of the furnace wires can be increased or decreased by other proportions according to the actual operation requirement;
(6) The temperature of the furnace wires in one group of temperature zones is controlled through the steps 1-5, and the temperature of the furnace wires in other temperature zones is synchronously controlled through the steps in sequence.
It is to be understood that the described embodiments are merely a few embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Claims (5)
1. A thermal field temperature control method is characterized in that: the method controls circuit power of each subarea by furnace wires which are distributed unevenly in each subarea of an asymmetric wire winding structure, the asymmetric wire winding structure comprises the furnace wires, the furnace wires are composed of furnace mouth auxiliary hot area furnace wires, constant temperature area furnace wires and furnace tail auxiliary hot area furnace wires, the furnace mouth auxiliary hot area furnace wires, the constant temperature area furnace wires and the furnace tail auxiliary hot area furnace wires are respectively composed of a plurality of groups of temperature area furnace wires in the axial direction, at least one group of temperature area furnace wires are composed of at least two groups of subareas, the furnace wires of each subarea are distributed unevenly, the furnace wire uneven distribution is controlled to comprise furnace wire density of each subarea or/and furnace wire diameter of each subarea or/and furnace wire number of each subarea, the furnace wires distributed unevenly control power of each subarea, the power controls temperature of the area where each subarea is located, and the circuit power controls temperature of each subarea of each furnace wire, and controls the whole temperature of a resistance furnace, and comprises the following steps:
(1) Setting a target temperature value reached by a region where a silicon wafer group is located in a thermal field;
(2) Confirming the difference value between the area temperature value of the area where each partition is located and the target temperature value and the heat capacity distribution proportion of the silicon chip and the carrier;
(3) Confirming the distribution rule of the temperature values of each subarea area according to the difference value and the heat capacity distribution proportion;
(4) Confirming the relationship between the furnace wire and the temperature change according to the temperature distribution rule;
(5) According to the relation of temperature change, confirming the percentage of non-equal distribution furnace wires among all the subareas;
(6) The temperature of the furnace wires in one group of temperature zones is controlled through the steps 1-5, and the temperature of the furnace wires in other temperature zones is synchronously controlled through the steps in sequence.
2. The thermal field temperature control method according to claim 1, characterized in that: the stove silk adopts horizontal or/and fore-and-aft setting, the district's quantity of temperature zone stove silk that hot zone stove silk, thermostatic zone stove silk and stove tail were assisted to the fire door of stove silk sets up to four groups at the circumferencial direction's subregion quantity, including upper end, right-hand member portion, lower tip and left end portion, according to the regional temperature setting upper end of silicon chip group upper portion silicon chip, middle part silicon chip and lower part silicon chip place, right-hand member portion, the lower tip and each subregion's stove silk density or/and each subregion's stove silk footpath or/and each subregion's stove silk quantity, the regional temperature in upper end control silicon chip group upper portion silicon chip place, the regional temperature in lower part control silicon chip group lower part silicon chip place down, the regional temperature in right-hand member portion and left end control silicon chip group middle part silicon chip place.
3. The thermal field temperature control method according to claim 1, characterized in that: the furnace wire density control power is controlled, the furnace wire density is controlled through the distance numerical values of different adjacent furnace wires of each subarea or/and the distance numerical value of the same furnace wire or/and the pitch numerical values of different furnace wires of each subarea or/and the pitch numerical value in the same furnace wire, the upper end part, the lower end part, the right end part and the left end part are connected through one or more circuits, the temperature values of the areas where the upper end part, the right end part, the lower end part and the left end part are located are synchronously controlled to reach set temperature values through controlling the layout density of the furnace wires of each subarea, the furnace wire density is controlled through the distance Pj1 numerical value of the adjacent furnace wires of each subarea or/and the pitch Pj2 numerical value of the furnace wires of each subarea, the upper end part, the lower end part, the right end part and the left end part are connected through one or more circuits, and the temperature values of the areas where the upper end part, the right end part, the lower end part and the left end part are located are synchronously reach the set temperature values through controlling the layout density of the furnace wires of each subarea.
4. The thermal field temperature control method according to claim 1, characterized in that: the power of each subarea is in direct proportion to the heat capacity distribution proportion of the silicon wafer and the carrier of each subarea, the number of the furnace wires of each subarea for density of the furnace wires of each subarea is in direct proportion to the heat capacity distribution proportion of the silicon wafer and the carrier, the diameter of the furnace wire of each subarea is in inverse proportion to the heat capacity distribution proportion of the silicon wafer and the carrier, the heat capacity distribution proportion of the silicon wafer and the carrier is set according to the shape and the material of the carrier in actual production, and the temperature of the area where each subarea is located is controlled to synchronously reach the set temperature value.
5. The thermal field temperature control method according to claim 1, characterized in that: at least one group of the partitions is divided into at least two groups of blocks, part of the blocks are connected with the fine tuning circuit, and the temperature of the area where each block is located is controlled through the fine tuning circuit.
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| CN202011408624.9A CN112512146B (en) | 2020-12-04 | 2020-12-04 | Thermal field temperature control method |
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| CN202011408624.9A CN112512146B (en) | 2020-12-04 | 2020-12-04 | Thermal field temperature control method |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101776295A (en) * | 2009-12-31 | 2010-07-14 | 深圳市创荣发电子有限公司 | Method and system for controlling temperature of furnace and furnace |
| CN102466412A (en) * | 2010-11-17 | 2012-05-23 | 中国科学院空间科学与应用研究中心 | Integrated control system and method of multi-temperature-area furnace |
| CN202533823U (en) * | 2012-03-20 | 2012-11-14 | 深圳市大族光伏科技股份有限公司 | Temperature control system |
| CN102927830A (en) * | 2012-11-01 | 2013-02-13 | 西安电炉研究所有限公司 | Measurement and control system with discriminative tracking for temperature of high-temperature resistance furnace and monitoring method thereof |
| CN104962727A (en) * | 2015-07-29 | 2015-10-07 | 上海宝钢节能环保技术有限公司 | Continuous annealing furnace heating section furnace-temperature control system and method |
| CN110527984A (en) * | 2019-08-29 | 2019-12-03 | 北京北方华创微电子装备有限公司 | Heating furnace body and semiconductor equipment |
-
2020
- 2020-12-04 CN CN202011408624.9A patent/CN112512146B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101776295A (en) * | 2009-12-31 | 2010-07-14 | 深圳市创荣发电子有限公司 | Method and system for controlling temperature of furnace and furnace |
| CN102466412A (en) * | 2010-11-17 | 2012-05-23 | 中国科学院空间科学与应用研究中心 | Integrated control system and method of multi-temperature-area furnace |
| CN202533823U (en) * | 2012-03-20 | 2012-11-14 | 深圳市大族光伏科技股份有限公司 | Temperature control system |
| CN102927830A (en) * | 2012-11-01 | 2013-02-13 | 西安电炉研究所有限公司 | Measurement and control system with discriminative tracking for temperature of high-temperature resistance furnace and monitoring method thereof |
| CN104962727A (en) * | 2015-07-29 | 2015-10-07 | 上海宝钢节能环保技术有限公司 | Continuous annealing furnace heating section furnace-temperature control system and method |
| CN110527984A (en) * | 2019-08-29 | 2019-12-03 | 北京北方华创微电子装备有限公司 | Heating furnace body and semiconductor equipment |
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