CN112491510A - Signal processing method - Google Patents
Signal processing method Download PDFInfo
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- CN112491510A CN112491510A CN202110170266.0A CN202110170266A CN112491510A CN 112491510 A CN112491510 A CN 112491510A CN 202110170266 A CN202110170266 A CN 202110170266A CN 112491510 A CN112491510 A CN 112491510A
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- instruction unit
- signal
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- data operation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/24—Resetting means
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
- G06F3/0611—Improving I/O performance in relation to response time
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/445—Program loading or initiating
- G06F9/44505—Configuring for program initiating, e.g. using registry, configuration files
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0015—Systems modifying transmission characteristics according to link quality, e.g. power backoff characterised by the adaptation strategy
- H04L1/0017—Systems modifying transmission characteristics according to link quality, e.g. power backoff characterised by the adaptation strategy where the mode-switching is based on Quality of Service requirement
- H04L1/0018—Systems modifying transmission characteristics according to link quality, e.g. power backoff characterised by the adaptation strategy where the mode-switching is based on Quality of Service requirement based on latency requirement
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- Theoretical Computer Science (AREA)
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- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Human Computer Interaction (AREA)
- Programmable Controllers (AREA)
Abstract
The invention relates to a signal processing method, which comprises the following steps: the controller sends a first request signal to the first instruction unit and starts the first instruction unit; the first instruction unit carries out data operation on a first slave station according to preset parameters of the first slave station and outputs a first execution completion signal; the controller starts a first delay unit, and the first delay unit performs first timing according to a preset first time length; when the first timing reaches a first time length, the controller closes the first request signal and the first execution completion signal, sends a second request signal to the second instruction unit, and starts the second instruction unit. The invention solves the overtime phenomenon in the communication process by adding the delay unit, and solves the false operation and 485 signal interference in the peripheral equipment response process by adding the reset of the output signal of the command unit, thereby realizing a stable and reliable multi-site communication method and realizing stable reading and writing of the physical quantity of a plurality of peripheral equipment.
Description
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a signal processing method.
Background
A PLC (Programmable Logic Controller) is a digital operation Controller with a microprocessor for automatic control, and can load control instructions into a memory at any time for storage and execution. The programmable controller is composed of a Central Processing Unit (CPU), an instruction and data memory, an input/output interface, a power supply, a digital-to-analog converter, and other functional units. The communication between the PLC and a plurality of peripheral devices such as a temperature module, a humidity transmitter, a frequency converter and the like can be realized through programming, and the purpose is to realize the reading and writing of physical quantities such as temperature, humidity, frequency and the like related to the plurality of peripheral devices by the PLC.
In the process of reading a plurality of peripheral devices, a polling communication method is usually used, when the number of the peripheral devices is not more than 5, the communication is basically normal, and when the number of the peripheral devices is more than 5, due to the timeout phenomenon existing in the communication process, misoperation in the response process of some peripheral devices, interference of 485 signals and the like, some peripheral devices cannot read and write in the communication process, and some error information also appears, so that the communication with the peripheral devices fails.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention aims to provide a signal processing method, which solves the problem of timeout phenomenon in the communication process by adding a delay unit and solves the problems of misoperation and 485 signal interference in the response process of peripheral equipment by adding reset to an output signal of an instruction unit, thereby realizing a stable and reliable multi-site communication method and realizing stable reading and writing of physical quantities of a plurality of peripheral equipment.
In order to achieve the above object, the present invention provides a signal processing method comprising:
the controller sends a first request signal to a first instruction unit and starts the first instruction unit;
the first instruction unit carries out data operation on a first slave station according to preset parameters of the first slave station and outputs a first execution completion signal;
the controller starts a first time delay unit, and the first time delay unit performs first timing according to a preset first time length;
when the first timing reaches the first time length, the controller closes the first request signal and the first execution completion signal, sends a second request signal to a second instruction unit, and starts the second instruction unit.
Preferably, the first secondary station parameter comprises: the system comprises a first slave station number, a first read-write mode, a first address, a first data bit number and a first storage position.
Further preferably, the performing, by the first instruction unit, data operation of the first slave station according to a preset parameter of the first slave station, and outputting the first execution completion signal specifically includes:
the first instruction unit generates first slave station data operation request information according to the first reading and writing mode, the first address, the first data bit number and the first storage position;
the first instruction unit sends the data operation request information of the first slave station to the first slave station corresponding to the serial number of the first slave station;
the first instruction unit receives data operation response information of a first slave station sent by the first slave station, and outputs the first execution completion signal.
Preferably, after the first instruction unit performs the first slave station data operation according to the preset first slave station parameter, the method further includes:
the first instruction unit outputs a first execution error signal.
Further preferably, when the first timing reaches the first time length, the method further includes:
the controller judges whether the first execution error signal contains error information;
when the first execution error signal contains error information, the controller displays the error information in the first execution error signal.
The embodiment of the invention provides a signal processing method, which solves the problem of timeout in the communication process by adding a delay unit and solves the problems of misoperation and 485 signal interference in the response process of peripheral equipment by adding reset of an output signal of an instruction unit, thereby realizing a stable and reliable multi-site communication method and realizing stable reading and writing of physical quantities of a plurality of peripheral equipment.
Drawings
Fig. 1 is a flowchart of a signal processing method according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the present invention will be described in further detail with reference to the accompanying drawings, and it is apparent that the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The embodiment of the invention provides a signal processing method, which solves the problem of timeout in the communication process by adding a delay unit and solves the problems of misoperation and 485 signal interference in the response process of peripheral equipment by adding reset of an output signal of an instruction unit, thereby realizing a stable and reliable multi-site communication method and realizing stable reading and writing of physical quantities of a plurality of peripheral equipment.
The execution main body of the embodiment of the invention is a programmable logic controller PLC, which is hereinafter referred to as a controller.
Fig. 1 is a flowchart of a signal processing method according to an embodiment of the present invention, and as shown in fig. 1, the signal processing method according to the embodiment of the present invention specifically includes the following steps:
the controller needs to implement the read-write operation of the physical quantity of the corresponding peripheral device through an instruction unit, where the instruction unit is an MBUS _ MSG instruction box and is used to start sending a request to the corresponding peripheral device to implement the read-write operation of the physical quantity of the corresponding peripheral device by the controller, and therefore, when the controller needs to communicate with the peripheral device, the instruction box corresponding to the peripheral device needs to be started first. Also, the controller can only activate one MBUS _ MSG instruction block at a time, and activate multiple instruction blocks at the same time, which will generate an error code.
The first request signal is used to activate the first command unit, so the controller sends the first request signal to the first command unit to activate the first command unit, and the first command unit should remain activated during the process of the first command unit sending a request to the corresponding peripheral device, waiting for a response, and processing the response.
the first instruction unit is set with preset parameters of a first slave station, and the first slave station is one of a plurality of peripheral devices and can be a temperature module, a humidity transmitter, a frequency converter or the like.
The preset first secondary station parameters comprise: the slave station comprises a first slave station number, a first read-write mode, a first address, a first data bit number and a first storage position, wherein the first slave station number is the unique number of the first slave station in a plurality of peripheral devices, the first read-write mode is that the current request operation is a read data operation or a write data operation, the first address is a memory address in the first slave station to be operated, the first data bit number is the number of data elements to be read or written in the current request operation, the first storage position is a memory position in the controller, when the current operation is a read data operation, the first storage position is used for storing data read from the first slave station, and when the current operation is a write data operation, the data stored in the first storage position is read and sent to the first slave station.
The first instruction unit generates data operation request information of the first slave station according to a first reading and writing mode, a first address, a first data bit number and a first storage position in preset parameters of the first slave station. According to the difference of the first reading and writing modes, the data operation request information of the first slave station has two types:
when the first read-write mode is read data operation, the first instruction unit generates first slave station data read request information;
when the first read-write mode is a data writing operation, the first instruction unit generates first slave station data writing request information.
Then, the first instruction unit sends the data operation request information of the first slave station to the first slave station corresponding to the first slave station number, and waits for the response of the first slave station.
After receiving the response information of the first slave station, the first instruction unit processes the response information and outputs a first execution completion signal, which indicates that the data operation request information of the first slave station is sent and the processing is completed.
in order to solve the problem of timeout in the communication process, a first delay unit is added in the invention, the first delay unit is a switch-on delay timer, the controller starts the first delay unit, and the first delay unit performs first timing according to a preset first time length, preferably, the preset first time length in the embodiment is 1 second.
when the first timing of the first delay unit reaches a preset first time length, the controller closes the first request signal and the first execution completion signal, namely resets the first execution completion signal output by the first instruction unit, so as to avoid generating interference on the following read-write operation requests of other peripheral equipment parameters.
The controller generates a second request signal and sends the second request signal to a second instruction unit, and the second instruction unit is started, wherein the second instruction unit is an MBUS _ MSG instruction frame used by the controller for reading and writing parameters of a second slave station, the second slave station is a second peripheral device, the signal processing method for reading and writing the parameters of the second slave station is the same as the signal processing method for reading and writing the parameters of the first slave station, and the method can be expanded to stably read and write the parameters of more peripheral devices without mutual interference according to the principle.
The signal processing method of the present invention further includes:
after the first instruction unit carries out data operation on the first slave station according to preset parameters of the first slave station, the first instruction unit outputs a first execution error signal;
when the first timing reaches a first time length, the controller judges whether the first execution error signal contains error information, and if the first execution error signal contains the error information, the controller displays the error information in the first execution error signal.
Compared with the prior art, the embodiment of the invention provides a signal processing method, which solves the problem of timeout in the communication process by adding the delay unit and solves the problems of misoperation and 485 signal interference in the response process of peripheral equipment by adding the reset of the output signal of the instruction unit, thereby realizing a stable and reliable multi-site communication method and realizing stable reading and writing of physical quantities of a plurality of peripheral equipment.
The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are merely exemplary embodiments of the present invention, and are not intended to limit the scope of the present invention, and any modifications, equivalent substitutions, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (5)
1. A method of signal processing, the method comprising:
the controller sends a first request signal to a first instruction unit and starts the first instruction unit;
the first instruction unit carries out data operation on a first slave station according to preset parameters of the first slave station and outputs a first execution completion signal;
the controller starts a first time delay unit, and the first time delay unit performs first timing according to a preset first time length;
when the first timing reaches the first time length, the controller closes the first request signal and the first execution completion signal, sends a second request signal to a second instruction unit, and starts the second instruction unit.
2. A signal processing method as claimed in claim 1, characterised in that the first secondary station parameters comprise: the system comprises a first slave station number, a first read-write mode, a first address, a first data bit number and a first storage position.
3. The signal processing method of claim 2, wherein the performing the first secondary station data operation according to the preset first secondary station parameter by the first instruction unit and outputting the first execution completion signal specifically comprises:
the first instruction unit generates first slave station data operation request information according to the first reading and writing mode, the first address, the first data bit number and the first storage position;
the first instruction unit sends the data operation request information of the first slave station to the first slave station corresponding to the serial number of the first slave station;
the first instruction unit receives data operation response information of a first slave station sent by the first slave station, and outputs the first execution completion signal.
4. The signal processing method of claim 1, wherein after the first instruction unit performs the first secondary station data operation according to the preset first secondary station parameter, the method further comprises:
the first instruction unit outputs a first execution error signal.
5. The signal processing method according to claim 4, wherein when the first timing reaches the first time length, the method further comprises:
the controller judges whether the first execution error signal contains error information;
when the first execution error signal contains error information, the controller displays the error information in the first execution error signal.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110170266.0A CN112491510A (en) | 2021-02-08 | 2021-02-08 | Signal processing method |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110170266.0A CN112491510A (en) | 2021-02-08 | 2021-02-08 | Signal processing method |
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| CN112491510A true CN112491510A (en) | 2021-03-12 |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3458037B2 (en) * | 1996-04-01 | 2003-10-20 | 富士通株式会社 | Split bus control method |
| CN101645057A (en) * | 2008-08-06 | 2010-02-10 | 中兴通讯股份有限公司 | Method and device for preventing CPU local bus from suspension |
| CN104301188A (en) * | 2013-05-29 | 2015-01-21 | 株式会社安川电机 | Industrial network apparatus and data communication method |
| CN108319217A (en) * | 2018-03-19 | 2018-07-24 | 延锋伟世通汽车电子有限公司 | CAN, LIN control circuit based on STM32 systems |
| KR101957400B1 (en) * | 2017-04-20 | 2019-06-19 | 엘에스산전 주식회사 | Programmable logic control system |
| CN110098897A (en) * | 2019-04-25 | 2019-08-06 | 珠海格力电器股份有限公司 | Serial communication method, device, computer equipment and storage medium |
-
2021
- 2021-02-08 CN CN202110170266.0A patent/CN112491510A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3458037B2 (en) * | 1996-04-01 | 2003-10-20 | 富士通株式会社 | Split bus control method |
| CN101645057A (en) * | 2008-08-06 | 2010-02-10 | 中兴通讯股份有限公司 | Method and device for preventing CPU local bus from suspension |
| CN104301188A (en) * | 2013-05-29 | 2015-01-21 | 株式会社安川电机 | Industrial network apparatus and data communication method |
| KR101957400B1 (en) * | 2017-04-20 | 2019-06-19 | 엘에스산전 주식회사 | Programmable logic control system |
| CN108319217A (en) * | 2018-03-19 | 2018-07-24 | 延锋伟世通汽车电子有限公司 | CAN, LIN control circuit based on STM32 systems |
| CN110098897A (en) * | 2019-04-25 | 2019-08-06 | 珠海格力电器股份有限公司 | Serial communication method, device, computer equipment and storage medium |
Non-Patent Citations (4)
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| 宋卫海等: "《工业自动化技术在行业中的应用》", 31 August 2018 * |
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Application publication date: 20210312 |